1 /*!
2 \file gd32vf103_dbg.c
3 \brief DBG driver
4
5 \version 2019-06-05, V1.0.0, firmware for GD32VF103
6 \version 2020-08-04, V1.1.0, firmware for GD32VF103
7 */
8
9 /*
10 Copyright (c) 2020, GigaDevice Semiconductor Inc.
11
12 Redistribution and use in source and binary forms, with or without modification,
13 are permitted provided that the following conditions are met:
14
15 1. Redistributions of source code must retain the above copyright notice, this
16 list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright notice,
18 this list of conditions and the following disclaimer in the documentation
19 and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holder nor the names of its contributors
21 may be used to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
30 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
33 OF SUCH DAMAGE.
34 */
35
36 #include "gd32vf103_dbg.h"
37
38 /*!
39 \brief read DBG_ID code register
40 \param[in] none
41 \param[out] none
42 \retval DBG_ID code
43 */
dbg_id_get(void)44 uint32_t dbg_id_get(void)
45 {
46 return DBG_ID;
47 }
48
49 /*!
50 \brief enable low power behavior when the mcu is in debug mode
51 \param[in] dbg_low_power:
52 one or more parameters can be selected which are shown as below:
53 \arg DBG_LOW_POWER_SLEEP: keep debugger connection during sleep mode
54 \arg DBG_LOW_POWER_DEEPSLEEP: keep debugger connection during deepsleep mode
55 \arg DBG_LOW_POWER_STANDBY: keep debugger connection during standby mode
56 \param[out] none
57 \retval none
58 */
dbg_low_power_enable(uint32_t dbg_low_power)59 void dbg_low_power_enable(uint32_t dbg_low_power)
60 {
61 DBG_CTL |= dbg_low_power;
62 }
63
64 /*!
65 \brief disable low power behavior when the mcu is in debug mode
66 \param[in] dbg_low_power:
67 one or more parameters can be selected which are shown as below:
68 \arg DBG_LOW_POWER_SLEEP: donot keep debugger connection during sleep mode
69 \arg DBG_LOW_POWER_DEEPSLEEP: donot keep debugger connection during deepsleep mode
70 \arg DBG_LOW_POWER_STANDBY: donot keep debugger connection during standby mode
71 \param[out] none
72 \retval none
73 */
dbg_low_power_disable(uint32_t dbg_low_power)74 void dbg_low_power_disable(uint32_t dbg_low_power)
75 {
76 DBG_CTL &= ~dbg_low_power;
77 }
78
79 /*!
80 \brief enable peripheral behavior when the mcu is in debug mode
81 \param[in] dbg_periph: refer to dbg_periph_enum
82 one or more parameters can be selected which are shown as below:
83 \arg DBG_FWDGT_HOLD : debug FWDGT kept when core is halted
84 \arg DBG_WWDGT_HOLD : debug WWDGT kept when core is halted
85 \arg DBG_CANx_HOLD (x=0,1): hold CANx counter when core is halted
86 \arg DBG_I2Cx_HOLD (x=0,1): hold I2Cx smbus when core is halted
87 \arg DBG_TIMERx_HOLD (x=0,1,2,3,4,5,6): hold TIMERx counter when core is halted
88 \param[out] none
89 \retval none
90 */
dbg_periph_enable(dbg_periph_enum dbg_periph)91 void dbg_periph_enable(dbg_periph_enum dbg_periph)
92 {
93 DBG_CTL |= (uint32_t)dbg_periph;
94 }
95
96 /*!
97 \brief disable peripheral behavior when the mcu is in debug mode
98 \param[in] dbg_periph: refer to dbg_periph_enum
99 one or more parameters can be selected which are shown as below:
100 \arg DBG_FWDGT_HOLD : debug FWDGT kept when core is halted
101 \arg DBG_WWDGT_HOLD : debug WWDGT kept when core is halted
102 \arg DBG_CANx_HOLD (x=0,1): hold CAN0 counter when core is halted
103 \arg DBG_I2Cx_HOLD (x=0,1): hold I2Cx smbus when core is halted
104 \arg DBG_TIMERx_HOLD (x=0,1,2,3,4,5,6): hold TIMERx counter when core is halted
105 \param[out] none
106 \retval none
107 */
dbg_periph_disable(dbg_periph_enum dbg_periph)108 void dbg_periph_disable(dbg_periph_enum dbg_periph)
109 {
110 DBG_CTL &= ~(uint32_t)dbg_periph;
111 }
112
