1 /*!
2 \file gd32l23x_misc.c
3 \brief MISC driver
4
5 \version 2021-08-04, V1.0.0, firmware for GD32L23x
6 \version 2021-12-09, V1.0.0, firmware for GD32L23x
7 */
8
9 /*
10 Redistribution and use in source and binary forms, with or without modification,
11 are permitted provided that the following conditions are met:
12
13 1. Redistributions of source code must retain the above copyright notice, this
14 list of conditions and the following disclaimer.
15 2. Redistributions in binary form must reproduce the above copyright notice,
16 this list of conditions and the following disclaimer in the documentation
17 and/or other materials provided with the distribution.
18 3. Neither the name of the copyright holder nor the names of its contributors
19 may be used to endorse or promote products derived from this software without
20 specific prior written permission.
21
22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
26 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
28 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 OF SUCH DAMAGE.
32 */
33
34 #include "gd32l23x_misc.h"
35
36 /*!
37 \brief enable NVIC request
38 \param[in] nvic_irq: the NVIC interrupt request, detailed in IRQn_Type
39 \param[in] nvic_irq_priority: the priority needed to set (0-3)
40 \param[out] none
41 \retval none
42 */
nvic_irq_enable(uint8_t nvic_irq,uint8_t nvic_irq_priority)43 void nvic_irq_enable(uint8_t nvic_irq,
44 uint8_t nvic_irq_priority)
45 {
46 /* set the priority and enable the selected IRQ */
47 NVIC_SetPriority((IRQn_Type)nvic_irq, (uint32_t)nvic_irq_priority);
48 NVIC_EnableIRQ((IRQn_Type)nvic_irq);
49 }
50
51 /*!
52 \brief disable NVIC request
53 \param[in] nvic_irq: the NVIC interrupt request, detailed in IRQn_Type
54 \param[out] none
55 \retval none
56 */
nvic_irq_disable(uint8_t nvic_irq)57 void nvic_irq_disable(uint8_t nvic_irq)
58 {
59 /* disable the selected IRQ.*/
60 NVIC_DisableIRQ((IRQn_Type)nvic_irq);
61 }
62
63 /*!
64 \brief initiates a system reset request to reset the MCU
65 \param[in] none
66 \param[out] none
67 \retval none
68 */
nvic_system_reset(void)69 void nvic_system_reset(void)
70 {
71 NVIC_SystemReset();
72 }
73
74 /*!
75 \brief set the NVIC vector table base address
76 \param[in] nvic_vict_tab: the RAM or FLASH base address
77 \arg NVIC_VECTTAB_RAM: RAM base address
78 \arg NVIC_VECTTAB_FLASH: Flash base address
79 \param[in] offset: Vector Table offset
80 \param[out] none
81 \retval none
82 */
nvic_vector_table_set(uint32_t nvic_vict_tab,uint32_t offset)83 void nvic_vector_table_set(uint32_t nvic_vict_tab, uint32_t offset)
84 {
85 SCB->VTOR = nvic_vict_tab | (offset & NVIC_VECTTAB_OFFSET_MASK);
86 __DSB();
87 }
88
89 /*!
90 \brief set the state of the low power mode
91 \param[in] lowpower_mode: the low power mode state
92 \arg SCB_LPM_SLEEP_EXIT_ISR: if chose this para, the system always enter low power
93 mode by exiting from ISR
94 \arg SCB_LPM_DEEPSLEEP: if chose this para, the system will enter the DEEPSLEEP mode
95 \arg SCB_LPM_WAKE_BY_ALL_INT: if chose this para, the lowpower mode can be woke up
96 by all the enable and disable interrupts
97 \param[out] none
98 \retval none
99 */
system_lowpower_set(uint8_t lowpower_mode)100 void system_lowpower_set(uint8_t lowpower_mode)
101 {
102 SCB->SCR |= (uint32_t)lowpower_mode;
103 }
104
105 /*!
106 \brief reset the state of the low power mode
107 \param[in] lowpower_mode: the low power mode state
108 \arg SCB_LPM_SLEEP_EXIT_ISR: if chose this para, the system will exit low power
109 mode by exiting from ISR
110 \arg SCB_LPM_DEEPSLEEP: if chose this para, the system will enter the SLEEP mode
111 \arg SCB_LPM_WAKE_BY_ALL_INT: if chose this para, the lowpower mode only can be
112 woke up by the enable interrupts
113 \param[out] none
114 \retval none
115 */
system_lowpower_reset(uint8_t lowpower_mode)116 void system_lowpower_reset(uint8_t lowpower_mode)
117 {
118 SCB->SCR &= (~(uint32_t)lowpower_mode);
119 }
120
121 /*!
122 \brief set the systick clock source
123 \param[in] systick_clksource: the systick clock source needed to choose
124 \arg SYSTICK_CLKSOURCE_HCLK: systick clock source is from HCLK
125 \arg SYSTICK_CLKSOURCE_HCLK_DIV8: systick clock source is from HCLK/8
126 \param[out] none
127 \retval none
128 */
129
systick_clksource_set(uint32_t systick_clksource)130 void systick_clksource_set(uint32_t systick_clksource)
131 {
132 if(SYSTICK_CLKSOURCE_HCLK == systick_clksource) {
133 /* set the systick clock source from HCLK */
134 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
135 } else {
136 /* set the systick clock source from HCLK/8 */
137 SysTick->CTRL &= SYSTICK_CLKSOURCE_HCLK_DIV8;
138 }
139 }
140
