1 /*!
2 \file gd32l23x_dbg.c
3 \brief DBG driver
4
5 \version 2021-08-04, V1.0.0, firmware for GD32L23x
6 */
7
8 /*
9 Copyright (c) 2021, GigaDevice Semiconductor Inc.
10
11 Redistribution and use in source and binary forms, with or without modification,
12 are permitted provided that the following conditions are met:
13
14 1. Redistributions of source code must retain the above copyright notice, this
15 list of conditions and the following disclaimer.
16 2. Redistributions in binary form must reproduce the above copyright notice,
17 this list of conditions and the following disclaimer in the documentation
18 and/or other materials provided with the distribution.
19 3. Neither the name of the copyright holder nor the names of its contributors
20 may be used to endorse or promote products derived from this software without
21 specific prior written permission.
22
23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
29 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
32 OF SUCH DAMAGE.
33 */
34
35 #include "gd32l23x_dbg.h"
36
37 #define DBG_RESET_VAL ((uint32_t)0x00000000U) /*!< DBG reset value */
38
39 /*!
40 \brief deinitialize the DBG
41 \param[in] none
42 \param[out] none
43 \retval none
44 */
dbg_deinit(void)45 void dbg_deinit(void)
46 {
47 DBG_CTL0 = DBG_RESET_VAL;
48 DBG_CTL1 = DBG_RESET_VAL;
49 }
50
51 /*!
52 \brief read DBG_ID code register
53 \param[in] none
54 \param[out] none
55 \retval DBG_ID code
56 */
dbg_id_get(void)57 uint32_t dbg_id_get(void)
58 {
59 return DBG_ID;
60 }
61
62 /*!
63 \brief enable low power behavior when the MCU is in debug mode
64 \param[in] dbg_low_power:
65 one or more parameters can be selected which are shown as below:
66 \arg DBG_LOW_POWER_SLEEP: keep debugger connection during sleep mode
67 \arg DBG_LOW_POWER_DEEPSLEEP: keep debugger connection during deepsleep mode
68 \arg DBG_LOW_POWER_STANDBY: keep debugger connection during standby mode
69 \param[out] none
70 \retval none
71 */
dbg_low_power_enable(uint32_t dbg_low_power)72 void dbg_low_power_enable(uint32_t dbg_low_power)
73 {
74 DBG_CTL0 |= dbg_low_power;
75 }
76
77 /*!
78 \brief disable low power behavior when the MCU is in debug mode
79 \param[in] dbg_low_power:
80 one or more parameters can be selected which are shown as below:
81 \arg DBG_LOW_POWER_SLEEP: keep debugger connection during sleep mode
82 \arg DBG_LOW_POWER_DEEPSLEEP: keep debugger connection during deepsleep mode
83 \arg DBG_LOW_POWER_STANDBY: keep debugger connection during standby mode
84 \param[out] none
85 \retval none
86 */
dbg_low_power_disable(uint32_t dbg_low_power)87 void dbg_low_power_disable(uint32_t dbg_low_power)
88 {
89 DBG_CTL0 &= ~dbg_low_power;
90 }
91
92 /*!
93 \brief enable peripheral behavior when the MCU is in debug mode
94 \param[in] dbg_periph: DBG peripheral
95 only one parameter can be selected which is shown as below:
96 \arg DBG_FWDGT_HOLD: hold FWDGT counter when core is halted
97 \arg DBG_WWDGT_HOLD: hold WWDGT counter when core is halted
98 \arg DBG_TIMER1_HOLD: hold TIMER1 counter when core is halted
99 \arg DBG_TIMER2_HOLD: hold TIMER2 counter when core is halted
100 \arg DBG_TIMER5_HOLD: hold TIMER5 counter when core is halted
101 \arg DBG_TIMER6_HOLD: hold TIMER6 counter when core is halted
102 \arg DBG_TIMER8_HOLD: hold TIMER8 counter when core is halted
103 \arg DBG_TIMER11_HOLD: hold TIMER11 counter when core is halted
104 \arg DBG_LPTIMER_HOLD: hold LPTIMER counter when core is halted
105 \arg DBG_I2C0_HOLD: hold I2C0 SMBUS when core is halted
106 \arg DBG_I2C1_HOLD: hold I2C1 SMBUS when core is halted
107 \arg DBG_I2C2_HOLD: hold I2C2 SMBUS when core is halted
108 \arg DBG_RTC_HOLD: hold RTC calendar and wakeup counter when core is halted
109 \param[out] none
110 \retval none
111 */
dbg_periph_enable(dbg_periph_enum dbg_periph)112 void dbg_periph_enable(dbg_periph_enum dbg_periph)
113 {
114 DBG_REG_VAL(dbg_periph) |= BIT(DBG_BIT_POS(dbg_periph));
115 }
116
117 /*!
118 \brief disable peripheral behavior when the MCU is in debug mode
119 \param[in] dbg_periph: DBG peripheral
120 only one parameter can be selected which is shown as below:
121 \arg DBG_FWDGT_HOLD: hold FWDGT counter when core is halted
122 \arg DBG_WWDGT_HOLD: hold WWDGT counter when core is halted
123 \arg DBG_TIMER1_HOLD: hold TIMER1 counter when core is halted
124 \arg DBG_TIMER2_HOLD: hold TIMER2 counter when core is halted
125 \arg DBG_TIMER5_HOLD: hold TIMER5 counter when core is halted
126 \arg DBG_TIMER6_HOLD: hold TIMER6 counter when core is halted
127 \arg DBG_TIMER8_HOLD: hold TIMER8 counter when core is halted
128 \arg DBG_TIMER11_HOLD: hold TIMER11 counter when core is halted
129 \arg DBG_LPTIMER_HOLD: hold LPTIMER counter when core is halted
130 \arg DBG_I2C0_HOLD: hold I2C0 SMBUS when core is halted
131 \arg DBG_I2C1_HOLD: hold I2C1 SMBUS when core is halted
132 \arg DBG_I2C2_HOLD: hold I2C2 SMBUS when core is halted
133 \arg DBG_RTC_HOLD: hold RTC calendar and wakeup counter when core is halted
134 \param[out] none
135 \retval none
136 */
dbg_periph_disable(dbg_periph_enum dbg_periph)137 void dbg_periph_disable(dbg_periph_enum dbg_periph)
138 {
139 DBG_REG_VAL(dbg_periph) &= ~BIT(DBG_BIT_POS(dbg_periph));
140 }
141
