1 /*!
2 \file gd32f4xx_fwdgt.c
3 \brief FWDGT driver
4
5 \version 2016-08-15, V1.0.0, firmware for GD32F4xx
6 \version 2018-12-12, V2.0.0, firmware for GD32F4xx
7 \version 2020-09-30, V2.1.0, firmware for GD32F4xx
8 \version 2022-03-09, V3.0.0, firmware for GD32F4xx
9 */
10
11 /*
12 Copyright (c) 2022, GigaDevice Semiconductor Inc.
13
14 Redistribution and use in source and binary forms, with or without modification,
15 are permitted provided that the following conditions are met:
16
17 1. Redistributions of source code must retain the above copyright notice, this
18 list of conditions and the following disclaimer.
19 2. Redistributions in binary form must reproduce the above copyright notice,
20 this list of conditions and the following disclaimer in the documentation
21 and/or other materials provided with the distribution.
22 3. Neither the name of the copyright holder nor the names of its contributors
23 may be used to endorse or promote products derived from this software without
24 specific prior written permission.
25
26 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
28 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
30 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
31 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
32 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
33 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
35 OF SUCH DAMAGE.
36 */
37
38 #include "gd32f4xx_fwdgt.h"
39
40 /* write value to FWDGT_CTL_CMD bit field */
41 #define CTL_CMD(regval) (BITS(0,15) & ((uint32_t)(regval) << 0))
42 /* write value to FWDGT_RLD_RLD bit field */
43 #define RLD_RLD(regval) (BITS(0,11) & ((uint32_t)(regval) << 0))
44
45 /*!
46 \brief enable write access to FWDGT_PSC and FWDGT_RLD
47 \param[in] none
48 \param[out] none
49 \retval none
50 */
fwdgt_write_enable(void)51 void fwdgt_write_enable(void)
52 {
53 FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
54 }
55
56 /*!
57 \brief disable write access to FWDGT_PSC and FWDGT_RLD
58 \param[in] none
59 \param[out] none
60 \retval none
61 */
fwdgt_write_disable(void)62 void fwdgt_write_disable(void)
63 {
64 FWDGT_CTL = FWDGT_WRITEACCESS_DISABLE;
65 }
66
67 /*!
68 \brief start the free watchdog timer counter
69 \param[in] none
70 \param[out] none
71 \retval none
72 */
fwdgt_enable(void)73 void fwdgt_enable(void)
74 {
75 FWDGT_CTL = FWDGT_KEY_ENABLE;
76 }
77
78 /*!
79 \brief reload the counter of FWDGT
80 \param[in] none
81 \param[out] none
82 \retval none
83 */
fwdgt_counter_reload(void)84 void fwdgt_counter_reload(void)
85 {
86 FWDGT_CTL = FWDGT_KEY_RELOAD;
87 }
88
89 /*!
90 \brief configure counter reload value, and prescaler divider value
91 \param[in] reload_value: specify reload value(0x0000 - 0x0FFF)
92 \param[in] prescaler_div: FWDGT prescaler value
93 only one parameter can be selected which is shown as below:
94 \arg FWDGT_PSC_DIV4: FWDGT prescaler set to 4
95 \arg FWDGT_PSC_DIV8: FWDGT prescaler set to 8
96 \arg FWDGT_PSC_DIV16: FWDGT prescaler set to 16
97 \arg FWDGT_PSC_DIV32: FWDGT prescaler set to 32
98 \arg FWDGT_PSC_DIV64: FWDGT prescaler set to 64
99 \arg FWDGT_PSC_DIV128: FWDGT prescaler set to 128
100 \arg FWDGT_PSC_DIV256: FWDGT prescaler set to 256
101 \param[out] none
102 \retval ErrStatus: ERROR or SUCCESS
103 */
fwdgt_config(uint16_t reload_value,uint8_t prescaler_div)104 ErrStatus fwdgt_config(uint16_t reload_value, uint8_t prescaler_div)
105 {
106 uint32_t timeout = FWDGT_PSC_TIMEOUT;
107 uint32_t flag_status = RESET;
108
109 /* enable write access to FWDGT_PSC,and FWDGT_RLD */
110 FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
111
112 /* wait until the PUD flag to be reset */
113 do{
114 flag_status = FWDGT_STAT & FWDGT_STAT_PUD;
115 }while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
116
117 if ((uint32_t)RESET != flag_status){
118 return ERROR;
119 }
120
121 /* configure FWDGT */
122 FWDGT_PSC = (uint32_t)prescaler_div;
123
124 timeout = FWDGT_RLD_TIMEOUT;
125 /* wait until the RUD flag to be reset */
126 do{
127 flag_status = FWDGT_STAT & FWDGT_STAT_RUD;
128 }while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
129
130 if ((uint32_t)RESET != flag_status){
131 return ERROR;
132 }
133
134 FWDGT_RLD = RLD_RLD(reload_value);
135
136 /* reload the counter */
137 FWDGT_CTL = FWDGT_KEY_RELOAD;
138
139 return SUCCESS;
140 }
141
142 /*!
143 \brief get flag state of FWDGT
144 \param[in] flag: flag to get
145 only one parameter can be selected which is shown as below:
146 \arg FWDGT_STAT_PUD: a write operation to FWDGT_PSC register is on going
147 \arg FWDGT_STAT_RUD: a write operation to FWDGT_RLD register is on going
148 \param[out] none
149 \retval FlagStatus: SET or RESET
150 */
fwdgt_flag_get(uint16_t flag)151 FlagStatus fwdgt_flag_get(uint16_t flag)
152 {
153 if(RESET != (FWDGT_STAT & flag)){
154 return SET;
155 }
156
157 return RESET;
158 }
159
