1 /*! 2 \file gd32e50x_crc.h 3 \brief definitions for the CRC 4 5 \version 2020-03-10, V1.0.0, firmware for GD32E50x 6 \version 2020-08-26, V1.1.0, firmware for GD32E50x 7 \version 2021-03-23, V1.2.0, firmware for GD32E50x 8 */ 9 10 /* 11 Copyright (c) 2021, GigaDevice Semiconductor Inc. 12 13 Redistribution and use in source and binary forms, with or without modification, 14 are permitted provided that the following conditions are met: 15 16 1. Redistributions of source code must retain the above copyright notice, this 17 list of conditions and the following disclaimer. 18 2. Redistributions in binary form must reproduce the above copyright notice, 19 this list of conditions and the following disclaimer in the documentation 20 and/or other materials provided with the distribution. 21 3. Neither the name of the copyright holder nor the names of its contributors 22 may be used to endorse or promote products derived from this software without 23 specific prior written permission. 24 25 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 27 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 31 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 34 OF SUCH DAMAGE. 35 */ 36 37 #ifndef GD32E50X_CRC_H 38 #define GD32E50X_CRC_H 39 40 #include "gd32e50x.h" 41 42 /* CRC definitions */ 43 #define CRC CRC_BASE /*!< CRC base address */ 44 45 /* registers definitions */ 46 #define CRC_DATA REG32((CRC) + 0x00000000U) /*!< CRC data register */ 47 #define CRC_FDATA REG32((CRC) + 0x00000004U) /*!< CRC free data register */ 48 #define CRC_CTL REG32((CRC) + 0x00000008U) /*!< CRC control register */ 49 #define CRC_IDATA REG32((CRC) + 0x00000010U) /*!< CRC initialization data register */ 50 #define CRC_POLY REG32((CRC) + 0x00000014U) /*!< CRC polynomial register */ 51 52 /* bits definitions */ 53 /* CRC_DATA */ 54 #define CRC_DATA_DATA BITS(0, 31) /*!< CRC data */ 55 56 /* CRC_FDATA */ 57 #define CRC_FDATA_FDATA BITS(0, 7) /*!< CRC free data */ 58 59 /* CRC_CTL */ 60 #define CRC_CTL_RST BIT(0) /*!< CRC reset */ 61 #define CRC_CTL_PS BITS(3, 4) /*!< size of polynomial */ 62 #define CRC_CTL_REV_I BITS(5, 6) /*!< input data reverse */ 63 #define CRC_CTL_REV_O BIT(7) /*!< output data reverse */ 64 65 /* CRC_IDATA */ 66 #define CRC_IDATA_IDATA BITS(0, 31) /*!< CRC initialization data */ 67 68 /* CRC_POLY */ 69 #define CRC_POLY_POLY BITS(0, 31) /*!< CRC polynomial value */ 70 71 /* constants definitions */ 72 /* size of polynomial function */ 73 #define CTL_PS(regval) (BITS(3, 4) & ((regval) << 3)) 74 #define CRC_CTL_PS_32 CTL_PS(0) /*!< 32-bit polynomial for CRC calculation */ 75 #define CRC_CTL_PS_16 CTL_PS(1) /*!< 16-bit polynomial for CRC calculation */ 76 #define CRC_CTL_PS_8 CTL_PS(2) /*!< 8-bit polynomial for CRC calculation */ 77 #define CRC_CTL_PS_7 CTL_PS(3) /*!< 7-bit polynomial for CRC calculation */ 78 79 /* input data reverse function */ 80 #define CTL_REV_I(regval) (BITS(5, 6) & ((regval) << 5)) 81 #define CRC_INPUT_DATA_NOT CTL_REV_I(0) /*!< input data not reverse */ 82 #define CRC_INPUT_DATA_BYTE CTL_REV_I(1) /*!< input data reversed by byte type */ 83 #define CRC_INPUT_DATA_HALFWORD CTL_REV_I(2) /*!< input data reversed by half-word type */ 84 #define CRC_INPUT_DATA_WORD CTL_REV_I(3) /*!< input data reversed by word type */ 85 86 /* input data format */ 87 #define INPUT_FORMAT_WORD 0U /*!< input data in word format */ 88 #define INPUT_FORMAT_HALFWORD 1U /*!< input data in half-word format */ 89 #define INPUT_FORMAT_BYTE 2U /*!< input data in byte format */ 90 91 /* function declarations */ 92 /* deinitialize CRC calculation unit */ 93 void crc_deinit(void); 94 /* reset data register to the value of initializaiton data register */ 95 void crc_data_register_reset(void); 96 97 /* enable the reverse operation of output data */ 98 void crc_reverse_output_data_enable(void); 99 /* disable the reverse operation of output data */ 100 void crc_reverse_output_data_disable(void); 101 /* configure the CRC input data function */ 102 void crc_input_data_reverse_config(uint32_t data_reverse); 103 104 /* read the data register */ 105 uint32_t crc_data_register_read(void); 106 107 /* read the free data register */ 108 uint8_t crc_free_data_register_read(void); 109 /* write the free data register */ 110 void crc_free_data_register_write(uint8_t free_data); 111 112 /* write the initializaiton data register */ 113 void crc_init_data_register_write(uint32_t init_data); 114 115 /* configure the CRC size of polynomial function */ 116 void crc_polynomial_size_set(uint32_t poly_size); 117 /* configure the CRC polynomial value function */ 118 void crc_polynomial_set(uint32_t poly); 119 120 /* CRC calculate single data */ 121 uint32_t crc_single_data_calculate(uint32_t sdata, uint8_t data_format); 122 /* CRC calculate a data array */ 123 uint32_t crc_block_data_calculate(void *array, uint32_t size, uint8_t data_format); 124 125 #endif /* GD32E50X_CRC_H */ 126
