1 /*! 2 \file gd32e10x_crc.h 3 \brief definitions for the CRC 4 5 \version 2017-12-26, V1.0.0, firmware for GD32E10x 6 \version 2020-09-30, V1.1.0, firmware for GD32E10x 7 \version 2020-12-31, V1.2.0, firmware for GD32E10x 8 \version 2022-06-30, V1.3.0, firmware for GD32E10x 9 */ 10 11 /* 12 Copyright (c) 2022, GigaDevice Semiconductor Inc. 13 14 Redistribution and use in source and binary forms, with or without modification, 15 are permitted provided that the following conditions are met: 16 17 1. Redistributions of source code must retain the above copyright notice, this 18 list of conditions and the following disclaimer. 19 2. Redistributions in binary form must reproduce the above copyright notice, 20 this list of conditions and the following disclaimer in the documentation 21 and/or other materials provided with the distribution. 22 3. Neither the name of the copyright holder nor the names of its contributors 23 may be used to endorse or promote products derived from this software without 24 specific prior written permission. 25 26 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 27 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 28 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 30 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 31 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 32 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 33 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 35 OF SUCH DAMAGE. 36 */ 37 38 #ifndef GD32E10X_CRC_H 39 #define GD32E10X_CRC_H 40 41 #include "gd32e10x.h" 42 43 /* CRC definitions */ 44 #define CRC CRC_BASE 45 46 /* registers definitions */ 47 #define CRC_DATA REG32(CRC + 0x00U) /*!< CRC data register */ 48 #define CRC_FDATA REG32(CRC + 0x04U) /*!< CRC free data register */ 49 #define CRC_CTL REG32(CRC + 0x08U) /*!< CRC control register */ 50 51 /* bits definitions */ 52 /* CRC_DATA */ 53 #define CRC_DATA_DATA BITS(0,31) /*!< CRC calculation result bits */ 54 55 /* CRC_FDATA */ 56 #define CRC_FDATA_FDATA BITS(0,7) /*!< CRC free data bits */ 57 58 /* CRC_CTL */ 59 #define CRC_CTL_RST BIT(0) /*!< CRC reset CRC_DATA register bit */ 60 61 62 /* function declarations */ 63 /* deinit CRC calculation unit */ 64 void crc_deinit(void); 65 66 /* reset data register(CRC_DATA) to the value of 0xFFFFFFFF */ 67 void crc_data_register_reset(void); 68 /* read the value of the data register */ 69 uint32_t crc_data_register_read(void); 70 71 /* read the value of the free data register */ 72 uint8_t crc_free_data_register_read(void); 73 /* write data to the free data register */ 74 void crc_free_data_register_write(uint8_t free_data); 75 76 /* calculate the CRC value of a 32-bit data */ 77 uint32_t crc_single_data_calculate(uint32_t sdata); 78 /* calculate the CRC value of an array of 32-bit values */ 79 uint32_t crc_block_data_calculate(const uint32_t *array, uint32_t size); 80 81 #endif /* GD32E10X_CRC_H */ 82
