1/*
2 * Copyright 2024 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include "frdm_rw612-pinctrl.dtsi"
8
9/ {
10	model = "nxp,frdm_rw612";
11
12	aliases {
13		led0 = &green_led;
14		watchdog0 = &wwdt;
15		usart-0 = &flexcomm3;
16		i2c-0 = &flexcomm2;
17		pwm-0 = &sctimer;
18	};
19
20	chosen {
21		zephyr,sram = &sram_data;
22		zephyr,flash = &w25q512jvfiq;
23		zephyr,console = &flexcomm3;
24		zephyr,shell-uart = &flexcomm3;
25	};
26
27	leds {
28		compatible = "gpio-leds";
29		green_led: led_1 {
30			gpios = <&hsgpio0 12 0>;
31		};
32	};
33};
34
35&flexcomm3 {
36	compatible = "nxp,lpc-usart";
37	status = "okay";
38	current-speed = <115200>;
39	pinctrl-0 = <&pinmux_flexcomm3_usart>;
40	pinctrl-names = "default";
41};
42
43&flexcomm0 {
44	compatible = "nxp,lpc-usart";
45	status = "disabled";
46	current-speed = <115200>;
47	pinctrl-0 = <&pinmux_flexcomm0_usart>;
48	pinctrl-names = "default";
49};
50
51&hsgpio0 {
52	status = "okay";
53};
54
55&flexspi {
56	status = "okay";
57	ahb-bufferable;
58	ahb-prefetch;
59	ahb-cacheable;
60	ahb-read-addr-opt;
61	ahb-boundary = "1024";
62	rx-clock-source = <1>;
63	rx-clock-source-b = <1>;
64	/* Winbond external flash */
65	w25q512jvfiq: w25q512jvfiq@0 {
66		compatible = "nxp,imx-flexspi-nor";
67		reg = <0>;
68		size = <DT_SIZE_M(64 * 8)>;
69		status = "okay";
70		erase-block-size = <4096>;
71		write-block-size = <1>;
72		spi-max-frequency = <104000000>;
73
74		partitions {
75			compatible = "fixed-partitions";
76			#address-cells = <1>;
77			#size-cells = <1>;
78
79			boot_partition: partition@0 {
80				label = "mcuboot";
81				reg = <0x00000000 DT_SIZE_K(128)>;
82			};
83			/* The MCUBoot swap-move algorithm uses the last 2 sectors
84			 * of the primary slot0 for swap status and move.
85			 */
86			slot0_partition: partition@20000 {
87				label = "image-0";
88				reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(2 * 4))>;
89			};
90			slot1_partition: partition@323000 {
91				label = "image-1";
92				reg = <0x00323000 DT_SIZE_M(3)>;
93			};
94			storage_partition: partition@623000 {
95				label = "storage";
96				reg = <0x00623000 (DT_SIZE_M(58) - DT_SIZE_K(136))>;
97			};
98		};
99	};
100	aps6404l: aps6404l@2 {
101			compatible = "nxp,imx-flexspi-aps6404l";
102			/* APS6404L is 8MB, 64MBit pSRAM */
103			size = <DT_SIZE_M(8 * 8)>;
104			reg = <2>;
105			spi-max-frequency = <109000000>;
106			/* PSRAM cannot be enabled while board is in default XIP
107			 * configuration, as it will conflict with flash chip.
108			 */
109			status = "disabled";
110			cs-interval-unit = <1>;
111			cs-interval = <2>;
112			cs-hold-time = <3>;
113			cs-setup-time = <3>;
114			data-valid-time = <6>;
115			column-space = <0>;
116			ahb-write-wait-unit = <2>;
117			ahb-write-wait-interval = <0>;
118	};
119};
120
121&hci {
122	status = "okay";
123	wakeup-source;
124};
125
126&enet_mac {
127	status = "okay";
128	pinctrl-0 = <&pinmux_enet>;
129	pinctrl-names = "default";
130	phy-handle = <&phy>;
131	zephyr,random-mac-address;
132	phy-connection-type = "rmii";
133};
134
135&enet_mdio {
136	status = "okay";
137	pinctrl-0 = <&pinmux_mdio>;
138	pinctrl-names = "default";
139	phy: phy@2 {
140		compatible = "microchip,ksz8081";
141		reg = <2>;
142		status = "okay";
143		reset-gpios = <&hsgpio1 23 GPIO_ACTIVE_HIGH>;
144		int-gpios = <&hsgpio0 21 GPIO_ACTIVE_HIGH>;
145		microchip,interface-type = "rmii";
146	};
147};
148
149&wwdt {
150	status = "okay";
151};
152
153&dma0 {
154	status = "okay";
155};
156
157&mrt0_channel0 {
158	status = "okay";
159};
160
161&ctimer0 {
162	status = "okay";
163};
164
165&pmu {
166	reset-causes-en = <PMU_RESET_CM33_LOCKUP>,
167			  <PMU_RESET_ITRC>,
168			  <PMU_RESET_AP_RESET>;
169};
170
171/* OS Timer is the wakeup source for PM mode 2 */
172&os_timer {
173	status = "okay";
174	wakeup-source;
175};
176
177&systick {
178	status = "disabled";
179};
180
181&adc0 {
182	status = "okay";
183};
184
185&dac0 {
186	status = "okay";
187};
188
189&sctimer {
190	status = "okay";
191	pinctrl-0 = <&pinmux_pwm0>;
192	pinctrl-names = "default";
193};
194
195&nbu {
196	status = "okay";
197	wakeup-source;
198};
199
200zephyr_udc0: &usb_otg {
201	status = "okay";
202};
203
204/*
205 * the default resistors on the board breaks out the MOSI/MISO
206 * pins to the nets labelled "UART" which go to J1 2 and 4,
207 * but we are using it for spi mosi and miso here.
208 * SCK is on J2 6 as labelled.
209 */
210&flexcomm1 {
211	compatible = "nxp,lpc-spi";
212	pinctrl-0 = <&pinmux_flexcomm1_spi>;
213	pinctrl-names = "default";
214	status = "okay";
215	#address-cells = <1>;
216	#size-cells = <0>;
217};
218
219arduino_i2c: &flexcomm2 {
220	compatible = "nxp,lpc-i2c";
221	status = "okay";
222	clock-frequency = <I2C_BITRATE_FAST>;
223	#address-cells = <1>;
224	#size-cells = <0>;
225	pinctrl-0 = <&pinmux_flexcomm2_i2c>;
226	pinctrl-names = "default";
227};
228