1/* 2 * Copyright 2024 NXP 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6 7#include <nxp/mcx/MCXN947VDF-pinctrl.h> 8 9&pinctrl { 10 pinmux_flexcomm1_lpspi: pinmux_flexcomm1_lpspi { 11 group0 { 12 pinmux = <FC1_P0_PIO0_24>, 13 <FC1_P1_PIO0_25>, 14 <FC1_P2_PIO0_26>, 15 <FC1_P3_PIO0_27>; 16 slew-rate = "fast"; 17 drive-strength = "low"; 18 input-enable; 19 }; 20 }; 21 22 pinmux_flexcomm2_lpi2c: pinmux_flexcomm2_lpi2c { 23 group0 { 24 pinmux = <FC2_P0_PIO4_0>, 25 <FC2_P1_PIO4_1>; 26 slew-rate = "fast"; 27 drive-strength = "low"; 28 input-enable; 29 bias-pull-up; 30 drive-open-drain; 31 }; 32 }; 33 34 pinmux_flexcomm7_lpi2c: pimux_flexcomm7_lpi2c { 35 group0 { 36 pinmux = <FC7_P0_PIO3_2>, 37 <FC7_P1_PIO3_3>; 38 slew-rate = "fast"; 39 drive-strength = "low"; 40 input-enable; 41 bias-pull-up; 42 drive-open-drain; 43 }; 44 }; 45 46 pinmux_flexcomm2_lpuart: pinmux_flexcomm2_lpuart { 47 group0 { 48 pinmux = <FC2_P2_PIO4_2>, 49 <FC2_P3_PIO4_3>; 50 slew-rate = "fast"; 51 drive-strength = "low"; 52 input-enable; 53 }; 54 }; 55 56 pinmux_flexcomm4_lpuart: pinmux_flexcomm4_lpuart { 57 group0 { 58 pinmux = <FC4_P0_PIO1_8>, 59 <FC4_P1_PIO1_9>; 60 slew-rate = "fast"; 61 drive-strength = "low"; 62 input-enable; 63 }; 64 }; 65 66 pinmux_flexspi: pinmux_flexspi { 67 group0 { 68 pinmux = <FLEXSPI0_A_SS0_b_PIO3_0>, 69 <FLEXSPI0_A_SCLK_PIO3_7>, 70 <FLEXSPI0_A_DQS_PIO3_6>, 71 <FLEXSPI0_A_DATA0_PIO3_8>, 72 <FLEXSPI0_A_DATA1_PIO3_9>; 73 input-enable; 74 slew-rate = "fast"; 75 drive-strength = "low"; 76 }; 77 group1 { 78 pinmux = <FLEXSPI0_A_DATA2_PIO3_10>, 79 <FLEXSPI0_A_DATA3_PIO3_11>; 80 input-enable; 81 slew-rate = "fast"; 82 drive-strength = "low"; 83 bias-pull-up; 84 }; 85 }; 86 87 pinmux_dac0: pinmux_dac0 { 88 group0 { 89 pinmux = <DAC0_OUT_PIO4_2>; 90 drive-strength = "low"; 91 slew-rate = "fast"; 92 }; 93 }; 94 95 pinmux_enet_qos: pinmux_enet_qos { 96 mdio_group { 97 pinmux = <ENET0_MDC_PIO1_20>, 98 <ENET0_MDIO_PIO1_21>; 99 slew-rate = "fast"; 100 drive-strength = "low"; 101 input-enable; 102 }; 103 mac_group { 104 pinmux = <ENET0_RXDV_PIO1_13>, 105 <ENET0_RXD0_PIO1_14>, 106 <ENET0_RXD1_PIO1_15>, 107 <ENET0_TX_CLK_PIO1_4>, 108 <ENET0_TXEN_PIO1_5>, 109 <ENET0_TXD0_PIO1_6>, 110 <ENET0_TXD1_PIO1_7>; 111 slew-rate = "fast"; 112 drive-strength = "low"; 113 input-enable; 114 }; 115 }; 116 117 pinmux_flexpwm1_pwm0: pinmux_flexpwm1_pwm0 { 118 group0 { 119 pinmux = <PWM1_A0_PIO2_6>, 120 <PWM1_B0_PIO2_7>; 121 slew-rate = "fast"; 122 drive-strength = "low"; 123 }; 124 }; 125 126 pinmux_flexpwm1_pwm1: pinmux_flexpwm1_pwm1 { 127 group0 { 128 pinmux = <PWM1_A1_PIO2_4>, 129 <PWM1_B1_PIO2_5>; 130 slew-rate = "fast"; 131 drive-strength = "low"; 132 }; 133 }; 134 135 pinmux_flexpwm1_pwm2: pinmux_flexpwm1_pwm2 { 136 group0 { 137 pinmux = <PWM1_A2_PIO2_2>, 138 <PWM1_B2_PIO2_3>; 139 slew-rate = "fast"; 140 drive-strength = "low"; 141 }; 142 }; 143 144 pinmux_smartdma_camera: pinmux_smartdma_camera { 145 group0 { 146 /* 147 * SmartDMA pinmux is not defined by SOC header, so 148 * we encode it manually 149 */ 150 pinmux = <N9X_MUX('1',4,7)>, 151 <N9X_MUX('1',5,7)>, 152 <N9X_MUX('1',6,7)>, 153 <N9X_MUX('1',7,7)>, 154 <N9X_MUX('3',4,7)>, 155 <N9X_MUX('3',5,7)>, 156 <N9X_MUX('1',10,7)>, 157 <N9X_MUX('1',11,7)>, 158 <PIO0_4>, 159 <PIO0_5>, 160 <PIO0_11>, 161 <CLKOUT_PIO2_2>, 162 <CLKOUT_PIO0_6>; 163 drive-strength = "low"; 164 slew-rate = "fast"; 165 input-enable; 166 }; 167 }; 168 169 pinmux_usdhc0: pinmux_usdhc0 { 170 group0 { 171 pinmux = <SDHC0_CMD_PIO2_5>, 172 <SDHC0_D0_PIO2_3>, 173 <SDHC0_D1_PIO2_2>, 174 <SDHC0_D2_PIO2_7>, 175 <SDHC0_D3_PIO2_6>; 176 slew-rate = "fast"; 177 drive-strength = "low"; 178 bias-pull-up; 179 input-enable; 180 }; 181 group1 { 182 pinmux = <SDHC0_CLK_PIO2_4>; 183 slew-rate = "fast"; 184 drive-strength = "low"; 185 input-enable; 186 }; 187 }; 188 189 pinmux_lpadc0: pinmux_lpadc0 { 190 group0 { 191 pinmux = <ADC0_A2_PIO4_23>, 192 <ADC0_A1_PIO4_15>, 193 <ADC0_B1_PIO4_19>; 194 slew-rate = "fast"; 195 drive-strength = "low"; 196 }; 197 }; 198 199 pinmux_lpcmp0: pinmux_lpcmp0 { 200 group0 { 201 pinmux = <CMP0_IN0_PIO1_0>; 202 drive-strength = "low"; 203 slew-rate = "fast"; 204 bias-pull-up; 205 }; 206 }; 207 208 pinmux_flexcan0: pinmux_flexcan0 { 209 group0 { 210 pinmux = <CAN0_TXD_PIO1_10>, 211 <CAN0_RXD_PIO1_11>; 212 slew-rate = "fast"; 213 drive-strength = "low"; 214 input-enable; 215 }; 216 }; 217 218 pinmux_i3c1: pinmux_i3c1 { 219 group0 { 220 pinmux = <I3C1_SDA_PIO1_16>, 221 <I3C1_SCL_PIO1_17>; 222 slew-rate = "fast"; 223 drive-strength = "low"; 224 input-enable; 225 bias-pull-up; 226 }; 227 group1 { 228 pinmux = <I3C1_PUR_PIO1_11>; 229 slew-rate = "fast"; 230 drive-strength = "low"; 231 input-enable; 232 }; 233 }; 234 235 pinmux_sctimer: pinmux_sctimer { 236 group0 { 237 pinmux = <SCT0_OUT0_PIO2_2>; 238 slew-rate = "fast"; 239 drive-strength = "low"; 240 input-enable; 241 }; 242 }; 243 244 pinmux_flexio_lcd: pinmux_flexio_lcd { 245 group0 { 246 pinmux = <FLEXIO0_D16_PIO2_8>, 247 <FLEXIO0_D17_PIO2_9>, 248 <FLEXIO0_D18_PIO2_10>, 249 <FLEXIO0_D19_PIO2_11>, 250 <FLEXIO0_D20_PIO4_12>, 251 <FLEXIO0_D21_PIO4_13>, 252 <FLEXIO0_D22_PIO4_14>, 253 <FLEXIO0_D23_PIO4_15>, 254 <FLEXIO0_D24_PIO4_16>, 255 <FLEXIO0_D25_PIO4_17>, 256 <FLEXIO0_D26_PIO4_18>, 257 <FLEXIO0_D27_PIO4_19>, 258 <FLEXIO0_D28_PIO4_20>, 259 <FLEXIO0_D29_PIO4_21>, 260 <FLEXIO0_D30_PIO4_22>, 261 <FLEXIO0_D31_PIO4_23>, 262 <PIO0_7>, 263 <PIO0_12>, 264 <PIO4_7>; 265 slew-rate = "fast"; 266 drive-strength = "low"; 267 input-enable; 268 }; 269 group1 { 270 pinmux = <FLEXIO0_D0_PIO0_8>; 271 slew-rate = "fast"; 272 drive-strength = "low"; 273 input-enable; 274 bias-pull-up; 275 }; 276 group2 { 277 pinmux = <FLEXIO0_D1_PIO0_9>; 278 slew-rate = "slow"; 279 drive-strength = "low"; 280 input-enable; 281 bias-pull-up; 282 }; 283 }; 284}; 285