1/*
2 * Copyright 2024 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7
8#include <nxp/mcx/MCXC242VLH-pinctrl.h>
9
10&pinctrl {
11	pinmux_lpuart0: pinmux_lpuart0 {
12		group0 {
13			pinmux = <LPUART0_RX_PTA1>,
14				<LPUART0_TX_PTA2>;
15			drive-strength = "low";
16			slew-rate = "slow";
17		};
18	};
19	pinmux_uart2: pinmux_uart2 {
20		group0 {
21			pinmux = <UART2_RX_PTD2>,
22				<UART2_TX_PTD3>;
23			drive-strength = "low";
24			slew-rate = "slow";
25		};
26	};
27	pinmux_i2c1: pinmux_i2c1 {
28		group0 {
29			pinmux = <I2C1_SCL_PTD7>,
30				<I2C1_SDA_PTD6>;
31			drive-strength = "low";
32			drive-open-drain;
33			slew-rate = "fast";
34		};
35	};
36	pinmux_tpm1: pinmux_tpm1 {
37		group0 {
38			pinmux = <TPM1_CH0_PTA12>,
39				<TPM1_CH1_PTA13>;
40			drive-strength = "low";
41			slew-rate = "slow";
42		};
43	};
44	pinmux_tpm2: pinmux_tpm2 {
45		group0 {
46			pinmux = <TPM2_CH0_PTB18>,
47				<TPM2_CH1_PTB19>;
48			drive-strength = "low";
49			slew-rate = "slow";
50		};
51	};
52	pinmux_adc0: pinmux_adc0 {
53		group0 {
54			pinmux = <ADC0_SE0_PTE20>,
55				<ADC0_SE1_PTE16>;
56			drive-strength = "low";
57			slew-rate = "slow";
58		};
59	};
60};
61