1/*******************************************************************************
2* \file cyw20829_ns_ram_cbus.icf
3* \version 1.1.0
4*
5* Linker file for the IAR compiler.
6*
7* The main purpose of the linker script is to describe how the sections in the
8* input files should be mapped into the output file, and to control the memory
9* layout of the output file.
10*
11* \note The entry point is fixed and starts at 0x20004200. The valid application
12* image should be placed there.
13*
14* \note The linker files included with the PDL template projects must be generic
15* and handle all common use cases. Your project may not use every section
16* defined in the linker files. In that case you may see warnings during the
17* build process. In your project, you can simply comment out or remove the
18* relevant code in the linker file.
19*
20********************************************************************************
21* \copyright
22* Copyright 2016-2021 Cypress Semiconductor Corporation
23* SPDX-License-Identifier: Apache-2.0
24*
25* Licensed under the Apache License, Version 2.0 (the "License");
26* you may not use this file except in compliance with the License.
27* You may obtain a copy of the License at
28*
29*     http://www.apache.org/licenses/LICENSE-2.0
30*
31* Unless required by applicable law or agreed to in writing, software
32* distributed under the License is distributed on an "AS IS" BASIS,
33* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
34* See the License for the specific language governing permissions and
35* limitations under the License.
36*******************************************************************************/
37
38define symbol CODE_ROM_NS_CBUS_START = 0x00000000;
39define symbol CODE_ROM_NS_CBUS_SIZE = 0x00010000;
40define symbol CODE_SRAM0_NS_CBUS_START = 0x04004200;
41define symbol CODE_SRAM0_NS_CBUS_SIZE = 0x0001E000;
42define symbol CODE_XIP_NS_CBUS_START = 0x08000000;
43define symbol CODE_XIP_NS_CBUS_SIZE = 0x08000000;
44
45define symbol DATA_ROM_NS_SAHB_START = 0x00000000;
46define symbol DATA_ROM_NS_SAHB_SIZE  = 0x00000000;
47define symbol BSS_ROM_NS_SAHB_START = 0x00000000;
48define symbol BSS_ROM_NS_SAHB_SIZE = 0x00000000;
49define symbol DATA_SRAM0_NS_SAHB_START = 0x20022200;
50define symbol DATA_SRAM0_NS_SAHB_SIZE  = 0x0001DE00;
51define symbol BSS_SRAM0_NS_SAHB_START = 0x20000000;
52define symbol BSS_SRAM0_NS_SAHB_SIZE = 0x00000000;
53define symbol DATA_XIP_NS_SAHB_START = 0x60000000;
54define symbol DATA_XIP_NS_SAHB_SIZE  = 0x00000000;
55define symbol BSS_XIP_NS_SAHB_START = 0x60000000;
56define symbol BSS_XIP_NS_SAHB_SIZE = 0x00000000;
57
58/* Load address */
59define symbol CODE_SRAM0_NS_LOAD_ADDRESS = 0x20004200;
60
61/* The size of the stack section at the end of CM33 SRAM */
62define symbol STACK_SIZE = 0x1000;
63define symbol HEAP_SIZE = 0x0400;
64
65/* The symbols below define the location and size of blocks of memory in the target.
66 * Use these symbols to specify the memory regions available for allocation.
67 */
68
69/*-Sizes-*/
70if (!isdefinedsymbol(__STACK_SIZE)) {
71  define symbol __size_cstack__ = STACK_SIZE;
72} else {
73  define symbol __size_cstack__ = __STACK_SIZE;
74}
75define symbol __size_proc_stack__ = 0x0;
76
77/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */
78if (!isdefinedsymbol(__HEAP_SIZE)) {
79    define symbol __size_heap__ = HEAP_SIZE;
80} else {
81  define symbol __size_heap__ = __HEAP_SIZE;
82}
83
84define memory mem with size = 4G;
85define region IROM_region = mem:[from CODE_SRAM0_NS_LOAD_ADDRESS size CODE_SRAM0_NS_CBUS_SIZE];
86define region IRAM_region = mem:[from DATA_SRAM0_NS_SAHB_START size DATA_SRAM0_NS_SAHB_SIZE];
87define region EROM_region = mem:[from CODE_XIP_NS_CBUS_START size CODE_XIP_NS_CBUS_SIZE];
88
89define block CSTACK     with alignment = 8, size = __size_cstack__     { };
90define block PROC_STACK with alignment = 8, size = __size_proc_stack__ { };
91define block HEAP       with expanding size, alignment = 8, minimum size = __size_heap__ { };
92define block HSTACK {block HEAP, block PROC_STACK, last block CSTACK};
93define block RO     {first section .intvec, readonly};
94
95define block cy_xip { section .cy_xip };
96
97/*-Initializations-*/
98initialize by copy { readwrite };
99do not initialize  { section .noinit, section .intvec_ram };
100
101/*-Placement-*/
102
103/* Execute in Place (XIP). See the smif driver documentation for details. */
104"cy_xip" : place at start of EROM_region  { block cy_xip };
105
106/* CODE */
107place at address CODE_SRAM0_NS_LOAD_ADDRESS  { block RO };
108
109/* RAM */
110place at start of IRAM_region  { readwrite section .intvec_ram};
111place in          IRAM_region  { readwrite };
112place at end   of IRAM_region  { block HSTACK };
113
114keep {  section .intvec  };
115keep {  section .cy_xip  };
116
117/* EOF */
118