1/*******************************************************************************
2* \file cy8c6xx4_cm4.icf
3* \version 2.95.1
4*
5* Linker file for the IAR compiler.
6*
7* The main purpose of the linker script is to describe how the sections in the
8* input files should be mapped into the output file, and to control the memory
9* layout of the output file.
10*
11* \note The entry point is fixed and starts at 0x10000000. The valid application
12* image should be placed there.
13*
14* \note The linker files included with the PDL template projects must be generic
15* and handle all common use cases. Your project may not use every section
16* defined in the linker files. In that case you may see warnings during the
17* build process. In your project, you can simply comment out or remove the
18* relevant code in the linker file.
19*
20********************************************************************************
21* \copyright
22* Copyright 2016-2021 Cypress Semiconductor Corporation
23* SPDX-License-Identifier: Apache-2.0
24*
25* Licensed under the Apache License, Version 2.0 (the "License");
26* you may not use this file except in compliance with the License.
27* You may obtain a copy of the License at
28*
29*     http://www.apache.org/licenses/LICENSE-2.0
30*
31* Unless required by applicable law or agreed to in writing, software
32* distributed under the License is distributed on an "AS IS" BASIS,
33* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
34* See the License for the specific language governing permissions and
35* limitations under the License.
36*******************************************************************************/
37
38/*###ICF### Section handled by ICF editor, don't touch! ****/
39/*-Editor annotation file-*/
40/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_4.xml" */
41/*-Specials-*/
42define symbol __ICFEDIT_intvec_start__ = 0x00000000;
43
44/* The symbols below define the location and size of blocks of memory in the target.
45 * Use these symbols to specify the memory regions available for allocation.
46 * Note that 2176 bytes of RAM (at the end of the SRAM) are reserved for system use.
47 * Using this memory region for other purposes will lead to unexpected behavior.
48 */
49
50/* RAM */
51define symbol __ICFEDIT_region_IRAM1_start__ = 0x08000000;
52define symbol __ICFEDIT_region_IRAM1_end__   = 0x0801F77F;
53
54/* Flash */
55define symbol __ICFEDIT_region_IROM1_start__ = 0x10000000;
56define symbol __ICFEDIT_region_IROM1_end__   = 0x1003FFFF;
57
58/* The following symbols define a 32K flash region used for EEPROM emulation.
59 * This region can also be used as the general purpose flash.
60 * You can assign sections to this memory region for only one of the cores.
61 * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
62 * Therefore, repurposing this memory region will prevent such middleware from operation.
63 */
64define symbol __ICFEDIT_region_IROM2_start__ = 0x14000000;
65define symbol __ICFEDIT_region_IROM2_end__   = 0x14007FFF;
66
67/* The following symbols define device specific memory regions and must not be changed. */
68/* Supervisory FLASH - User Data */
69define symbol __ICFEDIT_region_IROM3_start__ = 0x16000800;
70define symbol __ICFEDIT_region_IROM3_end__   = 0x16000FFF;
71
72/* Supervisory FLASH - Normal Access Restrictions (NAR) */
73define symbol __ICFEDIT_region_IROM4_start__ = 0x16001A00;
74define symbol __ICFEDIT_region_IROM4_end__   = 0x16001BFF;
75
76/* Supervisory FLASH - Public Key */
77define symbol __ICFEDIT_region_IROM5_start__ = 0x16005A00;
78define symbol __ICFEDIT_region_IROM5_end__   = 0x160065FF;
79
80/* Supervisory FLASH - Table of Content # 2 */
81define symbol __ICFEDIT_region_IROM6_start__ = 0x16007C00;
82define symbol __ICFEDIT_region_IROM6_end__   = 0x16007DFF;
83
84/* Supervisory FLASH - Table of Content # 2 Copy */
85define symbol __ICFEDIT_region_IROM7_start__ = 0x16007E00;
86define symbol __ICFEDIT_region_IROM7_end__   = 0x16007FFF;
87
88/* eFuse */
89define symbol __ICFEDIT_region_IROM8_start__ = 0x90700000;
90define symbol __ICFEDIT_region_IROM8_end__   = 0x907FFFFF;
91
92/* XIP */
93define symbol __ICFEDIT_region_EROM1_start__ = 0x18000000;
94define symbol __ICFEDIT_region_EROM1_end__   = 0x1FFFFFFF;
95
96define symbol __ICFEDIT_region_EROM2_start__ = 0x0;
97define symbol __ICFEDIT_region_EROM2_end__   = 0x0;
98define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
99define symbol __ICFEDIT_region_EROM3_end__   = 0x0;
100
101
102define symbol __ICFEDIT_region_IRAM2_start__ = 0x0;
103define symbol __ICFEDIT_region_IRAM2_end__   = 0x0;
104define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
105define symbol __ICFEDIT_region_ERAM1_end__   = 0x0;
106define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
107define symbol __ICFEDIT_region_ERAM2_end__   = 0x0;
108define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
109define symbol __ICFEDIT_region_ERAM3_end__   = 0x0;
110/*-Sizes-*/
111if (!isdefinedsymbol(__STACK_SIZE)) {
112  define symbol __ICFEDIT_size_cstack__ = 0x1000;
113} else {
114  define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE;
115}
116define symbol __ICFEDIT_size_proc_stack__ = 0x0;
117
118/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */
119if (!isdefinedsymbol(__HEAP_SIZE)) {
120    define symbol __ICFEDIT_size_heap__ = 0x0400;
121} else {
122  define symbol __ICFEDIT_size_heap__ = __HEAP_SIZE;
123}
124/**** End of ICF editor section. ###ICF###*/
125
126
127define memory mem with size = 4G;
128define region IROM1_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__];
129define region IROM2_region = mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__];
130define region IROM3_region = mem:[from __ICFEDIT_region_IROM3_start__ to __ICFEDIT_region_IROM3_end__];
131define region IROM4_region = mem:[from __ICFEDIT_region_IROM4_start__ to __ICFEDIT_region_IROM4_end__];
132define region IROM5_region = mem:[from __ICFEDIT_region_IROM5_start__ to __ICFEDIT_region_IROM5_end__];
133define region IROM6_region = mem:[from __ICFEDIT_region_IROM6_start__ to __ICFEDIT_region_IROM6_end__];
134define region IROM7_region = mem:[from __ICFEDIT_region_IROM7_start__ to __ICFEDIT_region_IROM7_end__];
135define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFEDIT_region_IROM8_end__];
136define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
137define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
138
139define block CSTACK     with alignment = 8, size = __ICFEDIT_size_cstack__     { };
140define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
141define block HEAP       with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
142define block HSTACK {block HEAP, block PROC_STACK, last block CSTACK};
143
144define block RO                          { first section .intvec, readonly   };
145
146define block cy_xip { section .cy_xip };
147
148
149/*-Initializations-*/
150initialize by copy { readwrite };
151do not initialize  { section .noinit, section .intvec_ram };
152
153/*-Placement-*/
154
155/* Flash - Cortex-M4 application */
156place at start of IROM1_region  { block RO };
157
158/* Used for the digital signature of the secure application and the Bootloader SDK application. */
159".cy_app_signature" : place at address (__ICFEDIT_region_IROM1_end__ - 0x200) { section .cy_app_signature };
160
161
162/* Supervisory Flash - User Data */
163".cy_sflash_user_data" : place at start of IROM3_region  { section .cy_sflash_user_data };
164
165/* Supervisory Flash - NAR */
166".cy_sflash_nar" : place at start of IROM4_region  { section .cy_sflash_nar };
167
168/* Supervisory Flash - Public Key */
169".cy_sflash_public_key" : place at start of IROM5_region  { section .cy_sflash_public_key };
170
171/* Supervisory Flash - TOC2 */
172".cy_toc_part2" : place at start of IROM6_region  { section .cy_toc_part2 };
173
174/* Supervisory Flash - RTOC2 */
175".cy_rtoc_part2" : place at start of IROM7_region  { section .cy_rtoc_part2 };
176
177/* eFuse */
178".cy_efuse" : place at start of IROM8_region  { section .cy_efuse };
179
180/* Execute in Place (XIP). See the smif driver documentation for details. */
181"cy_xip" : place at start of EROM1_region  { block cy_xip };
182
183/* RAM */
184place at start of IRAM1_region  { readwrite section .intvec_ram};
185place in          IRAM1_region  { readwrite };
186place at end   of IRAM1_region  { block HSTACK };
187
188/* These sections are used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage. */
189".cymeta" : place at address mem : 0x90500000 { readonly section .cymeta };
190
191
192keep {  section .cy_app_signature,
193        section .cy_sflash_user_data,
194        section .cy_sflash_nar,
195        section .cy_sflash_public_key,
196        section .cy_toc_part2,
197        section .cy_rtoc_part2,
198        section .cy_efuse,
199        section .cy_xip,
200        section .cymeta,
201         };
202
203
204/* The following symbols used by the cymcuelftool. */
205/* Flash */
206define exported symbol __cy_memory_0_start    = 0x10000000;
207define exported symbol __cy_memory_0_length   = 0x00040000;
208define exported symbol __cy_memory_0_row_size = 0x200;
209
210
211/* Supervisory Flash */
212define exported symbol __cy_memory_2_start    = 0x16000000;
213define exported symbol __cy_memory_2_length   = 0x8000;
214define exported symbol __cy_memory_2_row_size = 0x200;
215
216/* XIP */
217define exported symbol __cy_memory_3_start    = 0x18000000;
218define exported symbol __cy_memory_3_length   = 0x08000000;
219define exported symbol __cy_memory_3_row_size = 0x200;
220
221/* eFuse */
222define exported symbol __cy_memory_4_start    = 0x90700000;
223define exported symbol __cy_memory_4_length   = 0x100000;
224define exported symbol __cy_memory_4_row_size = 1;
225
226/* EOF */
227