1/***************************************************************************//**
2* \file cyb06xx7_cm4.ld
3* \version 2.95.1
4*
5* Linker file for the GNU C compiler.
6*
7* The main purpose of the linker script is to describe how the sections in the
8* input files should be mapped into the output file, and to control the memory
9* layout of the output file.
10*
11* \note The entry point location is fixed and starts at 0x10060000. The valid
12* application image should be placed there.
13*
14* \note The linker files included with the PDL template projects must be generic
15* and handle all common use cases. Your project may not use every section
16* defined in the linker files. In that case you may see warnings during the
17* build process. In your project, you can simply comment out or remove the
18* relevant code in the linker file.
19*
20********************************************************************************
21* \copyright
22* Copyright 2016-2021 Cypress Semiconductor Corporation
23* SPDX-License-Identifier: Apache-2.0
24*
25* Licensed under the Apache License, Version 2.0 (the "License");
26* you may not use this file except in compliance with the License.
27* You may obtain a copy of the License at
28*
29*     http://www.apache.org/licenses/LICENSE-2.0
30*
31* Unless required by applicable law or agreed to in writing, software
32* distributed under the License is distributed on an "AS IS" BASIS,
33* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
34* See the License for the specific language governing permissions and
35* limitations under the License.
36*******************************************************************************/
37
38OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
39SEARCH_DIR(.)
40GROUP(-lgcc -lc -lnosys)
41ENTRY(Reset_Handler)
42
43/* The size of the stack section at the end of CM4 SRAM */
44STACK_SIZE = 0x1000;
45
46/* The size of the MCU boot header area at the start of FLASH */
47BOOT_HEADER_SIZE = 0x400;
48
49/* Force symbol to be entered in the output file as an undefined symbol. Doing
50* this may, for example, trigger linking of additional modules from standard
51* libraries. You may list several symbols for each EXTERN, and you may use
52* EXTERN multiple times. This command has the same effect as the -u command-line
53* option.
54*/
55EXTERN(Reset_Handler)
56
57/* The MEMORY section below describes the location and size of blocks of memory in the target.
58* Use this section to specify the memory regions available for allocation.
59*/
60MEMORY
61{
62    /* The ram and flash regions control RAM and flash memory allocation for the CM4 core.
63     */
64    ram               (rwx)   : ORIGIN = 0x08001800, LENGTH = 0x1E800
65    flash             (rx)    : ORIGIN = 0x10060000, LENGTH = 0x30000
66
67    /* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
68     * You can assign sections to this memory region for only one of the cores.
69     * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
70     * Therefore, repurposing this memory region will prevent such middleware from operation.
71     */
72    em_eeprom         (rx)    : ORIGIN = 0x14000000, LENGTH = 0x8000       /*  32 KB */
73
74    /* The following regions define device specific memory regions and must not be changed. */
75    xip               (rx)    : ORIGIN = 0x18000000, LENGTH = 0x8000000    /* 128 MB */
76}
77
78/* Library configurations */
79GROUP(libgcc.a libc.a libm.a libnosys.a)
80
81/* Linker script to place sections and symbol values. Should be used together
82 * with other linker script that defines memory regions FLASH and RAM.
83 * It references following symbols, which must be defined in code:
84 *   Reset_Handler : Entry of reset handler
85 *
86 * It defines following symbols, which code can use without definition:
87 *   __exidx_start
88 *   __exidx_end
89 *   __copy_table_start__
90 *   __copy_table_end__
91 *   __zero_table_start__
92 *   __zero_table_end__
93 *   __etext
94 *   __data_start__
95 *   __preinit_array_start
96 *   __preinit_array_end
97 *   __init_array_start
98 *   __init_array_end
99 *   __fini_array_start
100 *   __fini_array_end
101 *   __data_end__
102 *   __bss_start__
103 *   __bss_end__
104 *   __end__
105 *   end
106 *   __HeapLimit
107 *   __StackLimit
108 *   __StackTop
109 *   __stack
110 *   __Vectors_End
111 *   __Vectors_Size
112 */
113
114
115SECTIONS
116{
117    /* Cortex-M4 application flash area */
118    .text ORIGIN(flash) + BOOT_HEADER_SIZE :
119    {
120        /* Cortex-M4 flash vector table */
121        . = ALIGN(4);
122        __Vectors = . ;
123        KEEP(*(.vectors))
124        . = ALIGN(4);
125        __Vectors_End = .;
126        __Vectors_Size = __Vectors_End - __Vectors;
127        __end__ = .;
128
129        . = ALIGN(4);
130        *(.text*)
131
132        KEEP(*(.init))
133        KEEP(*(.fini))
134
135        /* .ctors */
136        *crtbegin.o(.ctors)
137        *crtbegin?.o(.ctors)
138        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
139        *(SORT(.ctors.*))
140        *(.ctors)
141
142        /* .dtors */
143        *crtbegin.o(.dtors)
144        *crtbegin?.o(.dtors)
145        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
146        *(SORT(.dtors.*))
147        *(.dtors)
148
149        /* Read-only code (constants). */
150        *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
151
152        KEEP(*(.eh_frame*))
153    } > flash
154
155
156    .ARM.extab :
157    {
158        *(.ARM.extab* .gnu.linkonce.armextab.*)
159    } > flash
160
161    __exidx_start = .;
162
163    .ARM.exidx :
164    {
165        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
166    } > flash
167    __exidx_end = .;
168
169
170    /* To copy multiple ROM to RAM sections,
171     * uncomment .copy.table section and,
172     * define __STARTUP_COPY_MULTIPLE in startup_psoc6_01_cm4.S */
173    .copy.table :
174    {
175        . = ALIGN(4);
176        __copy_table_start__ = .;
177
178        /* Copy interrupt vectors from flash to RAM */
179        LONG (__Vectors)                                    /* From */
180        LONG (__ram_vectors_start__)                        /* To   */
181        LONG (__Vectors_End - __Vectors)                    /* Size */
182
183        /* Copy data section to RAM */
184        LONG (__etext)                                      /* From */
185        LONG (__data_start__)                               /* To   */
186        LONG (__data_end__ - __data_start__)                /* Size */
187
188        __copy_table_end__ = .;
189    } > flash
190
191
192    /* To clear multiple BSS sections,
193     * uncomment .zero.table section and,
194     * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_psoc6_01_cm4.S */
195    .zero.table :
196    {
197        . = ALIGN(4);
198        __zero_table_start__ = .;
199        LONG (__bss_start__)
200        LONG (__bss_end__ - __bss_start__)
201        __zero_table_end__ = .;
202    } > flash
203
204    __etext =  . ;
205
206
207    .ramVectors (NOLOAD) : ALIGN(8)
208    {
209        __ram_vectors_start__ = .;
210        KEEP(*(.ram_vectors))
211        __ram_vectors_end__   = .;
212    } > ram
213
214
215    .data __ram_vectors_end__ :
216    {
217        . = ALIGN(4);
218        __data_start__ = .;
219
220        *(vtable)
221        *(.data*)
222
223        . = ALIGN(4);
224        /* preinit data */
225        PROVIDE_HIDDEN (__preinit_array_start = .);
226        KEEP(*(.preinit_array))
227        PROVIDE_HIDDEN (__preinit_array_end = .);
228
229        . = ALIGN(4);
230        /* init data */
231        PROVIDE_HIDDEN (__init_array_start = .);
232        KEEP(*(SORT(.init_array.*)))
233        KEEP(*(.init_array))
234        PROVIDE_HIDDEN (__init_array_end = .);
235
236        . = ALIGN(4);
237        /* finit data */
238        PROVIDE_HIDDEN (__fini_array_start = .);
239        KEEP(*(SORT(.fini_array.*)))
240        KEEP(*(.fini_array))
241        PROVIDE_HIDDEN (__fini_array_end = .);
242
243        KEEP(*(.jcr*))
244        . = ALIGN(4);
245
246        KEEP(*(.cy_ramfunc*))
247        . = ALIGN(4);
248
249        __data_end__ = .;
250
251    } > ram AT>flash
252
253
254    /* Place variables in the section that should not be initialized during the
255    *  device startup.
256    */
257    .noinit (NOLOAD) : ALIGN(8)
258    {
259      KEEP(*(.noinit))
260    } > ram
261
262
263    /* The uninitialized global or static variables are placed in this section.
264    *
265    * The NOLOAD attribute tells linker that .bss section does not consume
266    * any space in the image. The NOLOAD attribute changes the .bss type to
267    * NOBITS, and that  makes linker to A) not allocate section in memory, and
268    * A) put information to clear the section with all zeros during application
269    * loading.
270    *
271    * Without the NOLOAD attribute, the .bss section might get PROGBITS type.
272    * This  makes linker to A) allocate zeroed section in memory, and B) copy
273    * this section to RAM during application loading.
274    */
275    .bss (NOLOAD):
276    {
277        . = ALIGN(4);
278        __bss_start__ = .;
279        *(.bss*)
280        *(COMMON)
281        . = ALIGN(4);
282        __bss_end__ = .;
283    } > ram
284
285
286    .heap (NOLOAD):
287    {
288        __HeapBase = .;
289        __end__ = .;
290        end = __end__;
291        KEEP(*(.heap*))
292        . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
293        __HeapLimit = .;
294    } > ram
295
296
297    /* .stack_dummy section doesn't contains any symbols. It is only
298     * used for linker to calculate size of stack sections, and assign
299     * values to stack symbols later */
300    .stack_dummy (NOLOAD):
301    {
302        KEEP(*(.stack*))
303    } > ram
304
305
306    /* Set stack top to end of RAM, and stack limit move down by
307     * size of stack_dummy section */
308    __StackTop = ORIGIN(ram) + LENGTH(ram);
309    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
310    PROVIDE(__stack = __StackTop);
311
312    /* Check if data + heap + stack exceeds RAM limit */
313    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
314
315
316    /* Used for the digital signature of the secure application and the Bootloader SDK application.
317    * The size of the section depends on the required data size. */
318    .cy_app_signature ORIGIN(flash) + LENGTH(flash) - 256 :
319    {
320        KEEP(*(.cy_app_signature))
321    } > flash
322
323
324    /* Emulated EEPROM Flash area */
325    .cy_em_eeprom :
326    {
327        KEEP(*(.cy_em_eeprom))
328    } > em_eeprom
329
330
331    /* Places the code in the Execute in Place (XIP) section. See the smif driver
332    *  documentation for details.
333    */
334    cy_xip :
335    {
336        __cy_xip_start = .;
337        KEEP(*(.cy_xip))
338        __cy_xip_end = .;
339    } > xip
340
341
342}
343
344
345/* EOF */
346