1/***************************************************************************//**
2* \file cyb06xx5_cm4_dual.ld
3* \version 2.95.1
4*
5* Linker file for the GNU C compiler.
6*
7* The main purpose of the linker script is to describe how the sections in the
8* input files should be mapped into the output file, and to control the memory
9* layout of the output file.
10*
11* \note The entry point location is fixed and starts at 0x10000000. The valid
12* application image should be placed there.
13*
14* \note The linker files included with the PDL template projects must be generic
15* and handle all common use cases. Your project may not use every section
16* defined in the linker files. In that case you may see warnings during the
17* build process. In your project, you can simply comment out or remove the
18* relevant code in the linker file.
19*
20********************************************************************************
21* \copyright
22* Copyright 2016-2021 Cypress Semiconductor Corporation
23* SPDX-License-Identifier: Apache-2.0
24*
25* Licensed under the Apache License, Version 2.0 (the "License");
26* you may not use this file except in compliance with the License.
27* You may obtain a copy of the License at
28*
29*     http://www.apache.org/licenses/LICENSE-2.0
30*
31* Unless required by applicable law or agreed to in writing, software
32* distributed under the License is distributed on an "AS IS" BASIS,
33* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
34* See the License for the specific language governing permissions and
35* limitations under the License.
36*******************************************************************************/
37
38OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
39SEARCH_DIR(.)
40GROUP(-lgcc -lc -lnosys)
41ENTRY(Reset_Handler)
42
43/* The size of the stack section at the end of CM4 SRAM */
44STACK_SIZE = 0x1000;
45
46/* The size of the MCU boot header area at the start of FLASH */
47BOOT_HEADER_SIZE = 0x400;
48
49/* The size of the Cortex-M0+ application image (including MCU boot header area) */
50FLASH_CM0P_SIZE  = 0x10000;
51
52/* Force symbol to be entered in the output file as an undefined symbol. Doing
53* this may, for example, trigger linking of additional modules from standard
54* libraries. You may list several symbols for each EXTERN, and you may use
55* EXTERN multiple times. This command has the same effect as the -u command-line
56* option.
57*/
58EXTERN(Reset_Handler)
59
60/* The MEMORY section below describes the location and size of blocks of memory in the target.
61* Use this section to specify the memory regions available for allocation.
62*/
63MEMORY
64{
65    /* The ram and flash regions control RAM and flash memory allocation for the CM4 core.
66     * You can change the memory allocation by editing the 'ram' and 'flash' regions.
67     * Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld',
68     * where 'xx' is the device group; for example, 'cyb06xx7_cm0plus.ld'.
69     */
70    ram               (rwx)   : ORIGIN = 0x08000800, LENGTH = 0x1F800
71    flash             (rx)    : ORIGIN = 0x10000000, LENGTH = 0x30000
72
73
74    /* The following regions define device specific memory regions and must not be changed. */
75    xip               (rx)    : ORIGIN = 0x18000000, LENGTH = 0x8000000    /* 128 MB */
76}
77
78/* Library configurations */
79GROUP(libgcc.a libc.a libm.a libnosys.a)
80
81/* Linker script to place sections and symbol values. Should be used together
82 * with other linker script that defines memory regions FLASH and RAM.
83 * It references following symbols, which must be defined in code:
84 *   Reset_Handler : Entry of reset handler
85 *
86 * It defines following symbols, which code can use without definition:
87 *   __exidx_start
88 *   __exidx_end
89 *   __copy_table_start__
90 *   __copy_table_end__
91 *   __zero_table_start__
92 *   __zero_table_end__
93 *   __etext
94 *   __data_start__
95 *   __preinit_array_start
96 *   __preinit_array_end
97 *   __init_array_start
98 *   __init_array_end
99 *   __fini_array_start
100 *   __fini_array_end
101 *   __data_end__
102 *   __bss_start__
103 *   __bss_end__
104 *   __end__
105 *   end
106 *   __HeapLimit
107 *   __StackLimit
108 *   __StackTop
109 *   __stack
110 *   __Vectors_End
111 *   __Vectors_Size
112 */
113
114
115SECTIONS
116{
117     /* Cortex-M0+ application flash image area */
118    .cy_m0p_image ORIGIN(flash) + BOOT_HEADER_SIZE :
119    {
120        . = ALIGN(4);
121        __cy_m0p_code_start = . ;
122        KEEP(*(.cy_m0p_image))
123        __cy_m0p_code_end = . ;
124    } > flash
125
126    /* Check if .cy_m0p_image size exceeds FLASH_CM0P_SIZE */
127    ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4, increase FLASH_CM0P_SIZE")
128
129    /* Cortex-M4 application flash area */
130    .text ORIGIN(flash) + FLASH_CM0P_SIZE :
131    {
132        . = ALIGN(4);
133        __Vectors = . ;
134        KEEP(*(.vectors))
135        . = ALIGN(4);
136        __Vectors_End = .;
137        __Vectors_Size = __Vectors_End - __Vectors;
138        __end__ = .;
139
140        . = ALIGN(4);
141        *(.text*)
142
143        KEEP(*(.init))
144        KEEP(*(.fini))
145
146        /* .ctors */
147        *crtbegin.o(.ctors)
148        *crtbegin?.o(.ctors)
149        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
150        *(SORT(.ctors.*))
151        *(.ctors)
152
153        /* .dtors */
154        *crtbegin.o(.dtors)
155        *crtbegin?.o(.dtors)
156        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
157        *(SORT(.dtors.*))
158        *(.dtors)
159
160        /* Read-only code (constants). */
161        *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
162
163        KEEP(*(.eh_frame*))
164    } > flash
165
166
167    .ARM.extab :
168    {
169        *(.ARM.extab* .gnu.linkonce.armextab.*)
170    } > flash
171
172    __exidx_start = .;
173
174    .ARM.exidx :
175    {
176        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
177    } > flash
178    __exidx_end = .;
179
180
181    /* To copy multiple ROM to RAM sections,
182     * uncomment .copy.table section and,
183     * define __STARTUP_COPY_MULTIPLE in startup_psoc6_03_cm4.S */
184    .copy.table :
185    {
186        . = ALIGN(4);
187        __copy_table_start__ = .;
188
189        /* Copy interrupt vectors from flash to RAM */
190        LONG (__Vectors)                                    /* From */
191        LONG (__ram_vectors_start__)                        /* To   */
192        LONG (__Vectors_End - __Vectors)                    /* Size */
193
194        /* Copy data section to RAM */
195        LONG (__etext)                                      /* From */
196        LONG (__data_start__)                               /* To   */
197        LONG (__data_end__ - __data_start__)                /* Size */
198
199        __copy_table_end__ = .;
200    } > flash
201
202
203    /* To clear multiple BSS sections,
204     * uncomment .zero.table section and,
205     * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_psoc6_03_cm4.S */
206    .zero.table :
207    {
208        . = ALIGN(4);
209        __zero_table_start__ = .;
210        LONG (__bss_start__)
211        LONG (__bss_end__ - __bss_start__)
212        __zero_table_end__ = .;
213    } > flash
214
215    __etext =  . ;
216
217
218    .ramVectors (NOLOAD) : ALIGN(8)
219    {
220        __ram_vectors_start__ = .;
221        KEEP(*(.ram_vectors))
222        __ram_vectors_end__   = .;
223    } > ram
224
225
226    .data __ram_vectors_end__ :
227    {
228        . = ALIGN(4);
229        __data_start__ = .;
230
231        *(vtable)
232        *(.data*)
233
234        . = ALIGN(4);
235        /* preinit data */
236        PROVIDE_HIDDEN (__preinit_array_start = .);
237        KEEP(*(.preinit_array))
238        PROVIDE_HIDDEN (__preinit_array_end = .);
239
240        . = ALIGN(4);
241        /* init data */
242        PROVIDE_HIDDEN (__init_array_start = .);
243        KEEP(*(SORT(.init_array.*)))
244        KEEP(*(.init_array))
245        PROVIDE_HIDDEN (__init_array_end = .);
246
247        . = ALIGN(4);
248        /* finit data */
249        PROVIDE_HIDDEN (__fini_array_start = .);
250        KEEP(*(SORT(.fini_array.*)))
251        KEEP(*(.fini_array))
252        PROVIDE_HIDDEN (__fini_array_end = .);
253
254        KEEP(*(.jcr*))
255        . = ALIGN(4);
256
257        KEEP(*(.cy_ramfunc*))
258        . = ALIGN(4);
259
260        __data_end__ = .;
261
262    } > ram AT>flash
263
264
265    /* Place variables in the section that should not be initialized during the
266    *  device startup.
267    */
268    .noinit (NOLOAD) : ALIGN(8)
269    {
270      KEEP(*(.noinit))
271    } > ram
272
273
274    /* The uninitialized global or static variables are placed in this section.
275    *
276    * The NOLOAD attribute tells linker that .bss section does not consume
277    * any space in the image. The NOLOAD attribute changes the .bss type to
278    * NOBITS, and that  makes linker to A) not allocate section in memory, and
279    * A) put information to clear the section with all zeros during application
280    * loading.
281    *
282    * Without the NOLOAD attribute, the .bss section might get PROGBITS type.
283    * This  makes linker to A) allocate zeroed section in memory, and B) copy
284    * this section to RAM during application loading.
285    */
286    .bss (NOLOAD):
287    {
288        . = ALIGN(4);
289        __bss_start__ = .;
290        *(.bss*)
291        *(COMMON)
292        . = ALIGN(4);
293        __bss_end__ = .;
294    } > ram
295
296
297    .heap (NOLOAD):
298    {
299        __HeapBase = .;
300        __end__ = .;
301        end = __end__;
302        KEEP(*(.heap*))
303        . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
304        __HeapLimit = .;
305    } > ram
306
307
308    /* .stack_dummy section doesn't contains any symbols. It is only
309     * used for linker to calculate size of stack sections, and assign
310     * values to stack symbols later */
311    .stack_dummy (NOLOAD):
312    {
313        KEEP(*(.stack*))
314    } > ram
315
316
317    /* Set stack top to end of RAM, and stack limit move down by
318     * size of stack_dummy section */
319    __StackTop = ORIGIN(ram) + LENGTH(ram);
320    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
321    PROVIDE(__stack = __StackTop);
322
323    /* Check if data + heap + stack exceeds RAM limit */
324    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
325
326
327    /* Used for the digital signature of the secure application and the Bootloader SDK application.
328    * The size of the section depends on the required data size. */
329    .cy_app_signature ORIGIN(flash) + LENGTH(flash) - 256 :
330    {
331        KEEP(*(.cy_app_signature))
332    } > flash
333
334
335
336
337
338    /* Places the code in the Execute in Place (XIP) section. See the smif driver
339    *  documentation for details.
340    */
341    cy_xip :
342    {
343        __cy_xip_start = .;
344        KEEP(*(.cy_xip))
345        __cy_xip_end = .;
346    } > xip
347
348}
349
350/* EOF */
351