1#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m4
2; The first line specifies a preprocessor command that the linker invokes
3; to pass a scatter file through a C preprocessor.
4
5;*******************************************************************************
6;* \file cyb06xx7_cm4.sct
7;* \version 2.95.1
8;*
9;* Linker file for the ARMCC.
10;*
11;* The main purpose of the linker script is to describe how the sections in the
12;* input files should be mapped into the output file, and to control the memory
13;* layout of the output file.
14;*
15;* \note The entry point location is fixed and starts at 0x10060000. The valid
16;* application image should be placed there.
17;*
18;* \note The linker files included with the PDL template projects must be
19;* generic and handle all common use cases. Your project may not use every
20;* section defined in the linker files. In that case you may see the warnings
21;* during the build process: L6314W (no section matches pattern) and/or L6329W
22;* (pattern only matches removed unused sections). In your project, you can
23;* suppress the warning by passing the "--diag_suppress=L6314W,L6329W" option to
24;* the linker, simply comment out or remove the relevant code in the linker
25;* file.
26;*
27;*******************************************************************************
28;* \copyright
29;* Copyright 2016-2021 Cypress Semiconductor Corporation
30;* SPDX-License-Identifier: Apache-2.0
31;*
32;* Licensed under the Apache License, Version 2.0 (the "License");
33;* you may not use this file except in compliance with the License.
34;* You may obtain a copy of the License at
35;*
36;*     http://www.apache.org/licenses/LICENSE-2.0
37;*
38;* Unless required by applicable law or agreed to in writing, software
39;* distributed under the License is distributed on an "AS IS" BASIS,
40;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
41;* See the License for the specific language governing permissions and
42;* limitations under the License.
43;******************************************************************************/
44
45; The defines below describe the location and size of blocks of memory in the target.
46; Use these defines to specify the memory regions available for allocation.
47
48; The following defines control RAM and flash memory allocation for the CM4 core.
49; RAM
50#define RAM_START               0x08001800
51#define RAM_SIZE                0x0001E800
52; Flash
53#define FLASH_START             0x10060000
54#define FLASH_SIZE              0x00030000
55
56; The size of the stack section at the end of CM4 SRAM
57#define STACK_SIZE              0x00001000
58
59; The size of the MCU boot header area at the start of FLASH
60#define BOOT_HEADER_SIZE        0x00000400
61
62; The following defines describe a 32K flash region used for EEPROM emulation.
63; This region can also be used as the general purpose flash.
64; You can assign sections to this memory region for only one of the cores.
65; Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
66; Therefore, repurposing this memory region will prevent such middleware from operation.
67#define EM_EEPROM_START         0x14000000
68#define EM_EEPROM_SIZE          0x8000
69
70; The following defines describe device specific memory regions and must not be changed.
71; External memory
72#define XIP_START               0x18000000
73#define XIP_SIZE                0x08000000
74
75
76
77; Cortex-M4 application flash area
78LR_IROM1 (FLASH_START + BOOT_HEADER_SIZE) (FLASH_SIZE - BOOT_HEADER_SIZE)
79{
80    ER_FLASH_VECTORS +0
81    {
82        * (RESET, +FIRST)
83    }
84
85    ER_FLASH_CODE +0 FIXED
86    {
87        * (InRoot$$Sections)
88        * (+RO)
89    }
90
91    ER_RAM_VECTORS RAM_START UNINIT
92    {
93        * (RESET_RAM, +FIRST)
94    }
95
96    RW_RAM_DATA +0
97    {
98        * (.cy_ramfunc)
99        * (+RW, +ZI)
100    }
101
102    ; Place variables in the section that should not be initialized during the
103    ; device startup.
104    RW_IRAM1 +0 UNINIT
105    {
106        * (.noinit)
107        * (.bss.noinit)
108    }
109
110    ; Application heap area (HEAP)
111    ARM_LIB_HEAP  +0 EMPTY ((RAM_START+RAM_SIZE)-AlignExpr(ImageLimit(RW_IRAM1), 8)-STACK_SIZE)
112    {
113    }
114
115    ; Stack region growing down
116    ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE
117    {
118    }
119
120    ; Used for the digital signature of the secure application and the
121    ; Bootloader SDK application. The size of the section depends on the required
122    ; data size.
123    .cy_app_signature (FLASH_START + FLASH_SIZE - 256) 256
124    {
125        * (.cy_app_signature)
126    }
127}
128
129
130; Emulated EEPROM Flash area
131LR_EM_EEPROM EM_EEPROM_START EM_EEPROM_SIZE
132{
133    .cy_em_eeprom +0
134    {
135        * (.cy_em_eeprom)
136    }
137}
138
139; Places the code in the Execute in Place (XIP) section. See the smif driver documentation for details.
140LR_EROM XIP_START XIP_SIZE
141{
142    cy_xip +0
143    {
144        * (.cy_xip)
145    }
146}
147
148
149/* [] END OF FILE */
150