1;/**************************************************************************//** 2; * @file startup_psoc6_01_cm0plus.s 3; * @brief CMSIS Core Device Startup File for 4; * ARMCM0plus Device Series 5; * @version V5.00 6; * @date 08. March 2016 7; ******************************************************************************/ 8;/* 9; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. 10; * 11; * SPDX-License-Identifier: Apache-2.0 12; * 13; * Licensed under the Apache License, Version 2.0 (the License); you may 14; * not use this file except in compliance with the License. 15; * You may obtain a copy of the License at 16; * 17; * www.apache.org/licenses/LICENSE-2.0 18; * 19; * Unless required by applicable law or agreed to in writing, software 20; * distributed under the License is distributed on an AS IS BASIS, WITHOUT 21; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22; * See the License for the specific language governing permissions and 23; * limitations under the License. 24; */ 25 26; 27; The modules in this file are included in the libraries, and may be replaced 28; by any user-defined modules that define the PUBLIC symbol _program_start or 29; a user defined start symbol. 30; To override the cstartup defined in the library, simply add your modified 31; version to the workbench project. 32; 33; The vector table is normally located at address 0. 34; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. 35; The name "__vector_table" has special meaning for C-SPY: 36; it is where the SP start value is found, and the NVIC vector 37; table register (VTOR) is initialized to this address if != 0. 38; 39; Cortex-M version 40; 41 42 MODULE ?cstartup 43 44 ;; Forward declaration of sections. 45 SECTION CSTACK:DATA:NOROOT(3) 46 SECTION .intvec_ram:DATA:NOROOT(2) 47 SECTION .intvec:CODE:NOROOT(2) 48 49 EXTERN __iar_program_start 50 EXTERN SystemInit 51 EXTERN __iar_data_init3 52 EXTERN __iar_dynamic_initialization 53 PUBLIC __vector_table 54 PUBLIC __vector_table_0x1c 55 PUBLIC __Vectors 56 PUBLIC __Vectors_End 57 PUBLIC __Vectors_Size 58 PUBLIC __ramVectors 59 60 DATA 61 62__vector_table 63 DCD sfe(CSTACK) 64 DCD Reset_Handler 65 66 DCD 0x0000000D ; NMI_Handler is defined in ROM code 67 DCD HardFault_Handler 68 DCD 0 69 DCD 0 70 DCD 0 71__vector_table_0x1c 72 DCD 0 73 DCD 0 74 DCD 0 75 DCD 0 76 DCD SVC_Handler 77 DCD 0 78 DCD 0 79 DCD PendSV_Handler 80 DCD SysTick_Handler 81 82 ; External interrupts Description 83 DCD NvicMux0_IRQHandler ; CM0+ NVIC Mux input 0 84 DCD NvicMux1_IRQHandler ; CM0+ NVIC Mux input 1 85 DCD NvicMux2_IRQHandler ; CM0+ NVIC Mux input 2 86 DCD NvicMux3_IRQHandler ; CM0+ NVIC Mux input 3 87 DCD NvicMux4_IRQHandler ; CM0+ NVIC Mux input 4 88 DCD NvicMux5_IRQHandler ; CM0+ NVIC Mux input 5 89 DCD NvicMux6_IRQHandler ; CM0+ NVIC Mux input 6 90 DCD NvicMux7_IRQHandler ; CM0+ NVIC Mux input 7 91 DCD NvicMux8_IRQHandler ; CM0+ NVIC Mux input 8 92 DCD NvicMux9_IRQHandler ; CM0+ NVIC Mux input 9 93 DCD NvicMux10_IRQHandler ; CM0+ NVIC Mux input 10 94 DCD NvicMux11_IRQHandler ; CM0+ NVIC Mux input 11 95 DCD NvicMux12_IRQHandler ; CM0+ NVIC Mux input 12 96 DCD NvicMux13_IRQHandler ; CM0+ NVIC Mux input 13 97 DCD NvicMux14_IRQHandler ; CM0+ NVIC Mux input 14 98 DCD NvicMux15_IRQHandler ; CM0+ NVIC Mux input 15 99 DCD NvicMux16_IRQHandler ; CM0+ NVIC Mux input 16 100 DCD NvicMux17_IRQHandler ; CM0+ NVIC Mux input 17 101 DCD NvicMux18_IRQHandler ; CM0+ NVIC Mux input 18 102 DCD NvicMux19_IRQHandler ; CM0+ NVIC Mux input 19 103 DCD NvicMux20_IRQHandler ; CM0+ NVIC Mux input 20 104 DCD NvicMux21_IRQHandler ; CM0+ NVIC Mux input 21 105 DCD NvicMux22_IRQHandler ; CM0+ NVIC Mux input 22 106 DCD NvicMux23_IRQHandler ; CM0+ NVIC Mux input 23 107 DCD NvicMux24_IRQHandler ; CM0+ NVIC Mux input 24 108 DCD NvicMux25_IRQHandler ; CM0+ NVIC Mux input 25 109 DCD NvicMux26_IRQHandler ; CM0+ NVIC Mux input 26 110 DCD NvicMux27_IRQHandler ; CM0+ NVIC Mux input 27 111 DCD NvicMux28_IRQHandler ; CM0+ NVIC Mux input 28 112 DCD NvicMux29_IRQHandler ; CM0+ NVIC Mux input 29 113 DCD NvicMux30_IRQHandler ; CM0+ NVIC Mux input 30 114 DCD NvicMux31_IRQHandler ; CM0+ NVIC Mux input 31 115 116__Vectors_End 117 118__Vectors EQU __vector_table 119__Vectors_Size EQU __Vectors_End - __Vectors 120 121 SECTION .intvec_ram:DATA:REORDER:NOROOT(2) 122__ramVectors 123 DS8 __Vectors_Size 124 125 126 THUMB 127 128;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 129;; 130;; Default handlers 131;; 132 PUBWEAK Default_Handler 133 SECTION .text:CODE:REORDER:NOROOT(2) 134Default_Handler 135 B Default_Handler 136 137 138;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 139;; 140;; Weak function for startup customization 141;; 142;; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) 143;; because this function is executed as the first instruction in the ResetHandler. 144;; The PDL is also not initialized to use the proper register offsets. 145;; The user of this function is responsible for initializing the PDL and resources before using them. 146;; 147 PUBWEAK Cy_OnResetUser 148 SECTION .text:CODE:REORDER:NOROOT(2) 149Cy_OnResetUser 150 BX LR 151 152;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 153;; 154;; Define strong version to return zero for 155;; __iar_program_start to skip data sections 156;; initialization. 157;; 158 PUBLIC __low_level_init 159 SECTION .text:CODE:REORDER:NOROOT(2) 160__low_level_init 161 MOVS R0, #0 162 BX LR 163 164;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 165;; 166;; Default interrupt handlers. 167;; 168 THUMB 169 PUBWEAK Reset_Handler 170 SECTION .text:CODE:REORDER:NOROOT(2) 171Reset_Handler 172 173 ; Define strong function for startup customization 174 LDR R0, =Cy_OnResetUser 175 BLX R0 176 177 ; Disable global interrupts 178 CPSID I 179 180 ; Copy vectors from ROM to RAM 181 LDR r1, =__vector_table 182 LDR r0, =__ramVectors 183 LDR r2, =__Vectors_Size 184intvec_copy 185 LDR r3, [r1] 186 STR r3, [r0] 187 ADDS r0, r0, #4 188 ADDS r1, r1, #4 189 SUBS r2, r2, #4 190 CMP r2, #0 191 BNE intvec_copy 192 193 ; Update Vector Table Offset Register 194 LDR r0, =__ramVectors 195 LDR r1, =0xE000ED08 196 STR r0, [r1] 197 dsb 198 199 ; Initialize data sections 200 LDR R0, =__iar_data_init3 201 BLX R0 202 203 ; --manual_dynamic_initialization 204 BL __iar_dynamic_initialization 205 206 LDR R0, =SystemInit 207 BLX R0 208 209 LDR R0, =__iar_program_start 210 BLX R0 211 212; Should never get here 213Cy_Main_Exited 214 B Cy_Main_Exited 215 216 217 PUBWEAK NMI_Handler 218 SECTION .text:CODE:REORDER:NOROOT(1) 219NMI_Handler 220 B NMI_Handler 221 222 223 PUBWEAK Cy_SysLib_FaultHandler 224 SECTION .text:CODE:REORDER:NOROOT(1) 225Cy_SysLib_FaultHandler 226 B Cy_SysLib_FaultHandler 227 228 PUBWEAK HardFault_Handler 229 SECTION .text:CODE:REORDER:NOROOT(1) 230HardFault_Handler 231 IMPORT Cy_SysLib_FaultHandler 232 movs r0, #4 233 mov r1, LR 234 tst r0, r1 235 beq L_MSP 236 mrs r0, PSP 237 b L_API_call 238L_MSP 239 mrs r0, MSP 240L_API_call 241 ; Storing LR content for Creator call stack trace 242 push {LR} 243 bl Cy_SysLib_FaultHandler 244 245 246 PUBWEAK SVC_Handler 247 SECTION .text:CODE:REORDER:NOROOT(1) 248SVC_Handler 249 B SVC_Handler 250 251 PUBWEAK PendSV_Handler 252 SECTION .text:CODE:REORDER:NOROOT(1) 253PendSV_Handler 254 B PendSV_Handler 255 256 PUBWEAK SysTick_Handler 257 SECTION .text:CODE:REORDER:NOROOT(1) 258SysTick_Handler 259 B SysTick_Handler 260 261 262 ; External interrupts 263 PUBWEAK NvicMux0_IRQHandler 264 SECTION .text:CODE:REORDER:NOROOT(1) 265NvicMux0_IRQHandler 266 B NvicMux0_IRQHandler 267 268 PUBWEAK NvicMux1_IRQHandler 269 SECTION .text:CODE:REORDER:NOROOT(1) 270NvicMux1_IRQHandler 271 B NvicMux1_IRQHandler 272 273 PUBWEAK NvicMux2_IRQHandler 274 SECTION .text:CODE:REORDER:NOROOT(1) 275NvicMux2_IRQHandler 276 B NvicMux2_IRQHandler 277 278 PUBWEAK NvicMux3_IRQHandler 279 SECTION .text:CODE:REORDER:NOROOT(1) 280NvicMux3_IRQHandler 281 B NvicMux3_IRQHandler 282 283 PUBWEAK NvicMux4_IRQHandler 284 SECTION .text:CODE:REORDER:NOROOT(1) 285NvicMux4_IRQHandler 286 B NvicMux4_IRQHandler 287 288 PUBWEAK NvicMux5_IRQHandler 289 SECTION .text:CODE:REORDER:NOROOT(1) 290NvicMux5_IRQHandler 291 B NvicMux5_IRQHandler 292 293 PUBWEAK NvicMux6_IRQHandler 294 SECTION .text:CODE:REORDER:NOROOT(1) 295NvicMux6_IRQHandler 296 B NvicMux6_IRQHandler 297 298 PUBWEAK NvicMux7_IRQHandler 299 SECTION .text:CODE:REORDER:NOROOT(1) 300NvicMux7_IRQHandler 301 B NvicMux7_IRQHandler 302 303 PUBWEAK NvicMux8_IRQHandler 304 SECTION .text:CODE:REORDER:NOROOT(1) 305NvicMux8_IRQHandler 306 B NvicMux8_IRQHandler 307 308 PUBWEAK NvicMux9_IRQHandler 309 SECTION .text:CODE:REORDER:NOROOT(1) 310NvicMux9_IRQHandler 311 B NvicMux9_IRQHandler 312 313 PUBWEAK NvicMux10_IRQHandler 314 SECTION .text:CODE:REORDER:NOROOT(1) 315NvicMux10_IRQHandler 316 B NvicMux10_IRQHandler 317 318 PUBWEAK NvicMux11_IRQHandler 319 SECTION .text:CODE:REORDER:NOROOT(1) 320NvicMux11_IRQHandler 321 B NvicMux11_IRQHandler 322 323 PUBWEAK NvicMux12_IRQHandler 324 SECTION .text:CODE:REORDER:NOROOT(1) 325NvicMux12_IRQHandler 326 B NvicMux12_IRQHandler 327 328 PUBWEAK NvicMux13_IRQHandler 329 SECTION .text:CODE:REORDER:NOROOT(1) 330NvicMux13_IRQHandler 331 B NvicMux13_IRQHandler 332 333 PUBWEAK NvicMux14_IRQHandler 334 SECTION .text:CODE:REORDER:NOROOT(1) 335NvicMux14_IRQHandler 336 B NvicMux14_IRQHandler 337 338 PUBWEAK NvicMux15_IRQHandler 339 SECTION .text:CODE:REORDER:NOROOT(1) 340NvicMux15_IRQHandler 341 B NvicMux15_IRQHandler 342 343 PUBWEAK NvicMux16_IRQHandler 344 SECTION .text:CODE:REORDER:NOROOT(1) 345NvicMux16_IRQHandler 346 B NvicMux16_IRQHandler 347 348 PUBWEAK NvicMux17_IRQHandler 349 SECTION .text:CODE:REORDER:NOROOT(1) 350NvicMux17_IRQHandler 351 B NvicMux17_IRQHandler 352 353 PUBWEAK NvicMux18_IRQHandler 354 SECTION .text:CODE:REORDER:NOROOT(1) 355NvicMux18_IRQHandler 356 B NvicMux18_IRQHandler 357 358 PUBWEAK NvicMux19_IRQHandler 359 SECTION .text:CODE:REORDER:NOROOT(1) 360NvicMux19_IRQHandler 361 B NvicMux19_IRQHandler 362 363 PUBWEAK NvicMux20_IRQHandler 364 SECTION .text:CODE:REORDER:NOROOT(1) 365NvicMux20_IRQHandler 366 B NvicMux20_IRQHandler 367 368 PUBWEAK NvicMux21_IRQHandler 369 SECTION .text:CODE:REORDER:NOROOT(1) 370NvicMux21_IRQHandler 371 B NvicMux21_IRQHandler 372 373 PUBWEAK NvicMux22_IRQHandler 374 SECTION .text:CODE:REORDER:NOROOT(1) 375NvicMux22_IRQHandler 376 B NvicMux22_IRQHandler 377 378 PUBWEAK NvicMux23_IRQHandler 379 SECTION .text:CODE:REORDER:NOROOT(1) 380NvicMux23_IRQHandler 381 B NvicMux23_IRQHandler 382 383 PUBWEAK NvicMux24_IRQHandler 384 SECTION .text:CODE:REORDER:NOROOT(1) 385NvicMux24_IRQHandler 386 B NvicMux24_IRQHandler 387 388 PUBWEAK NvicMux25_IRQHandler 389 SECTION .text:CODE:REORDER:NOROOT(1) 390NvicMux25_IRQHandler 391 B NvicMux25_IRQHandler 392 393 PUBWEAK NvicMux26_IRQHandler 394 SECTION .text:CODE:REORDER:NOROOT(1) 395NvicMux26_IRQHandler 396 B NvicMux26_IRQHandler 397 398 PUBWEAK NvicMux27_IRQHandler 399 SECTION .text:CODE:REORDER:NOROOT(1) 400NvicMux27_IRQHandler 401 B NvicMux27_IRQHandler 402 403 PUBWEAK NvicMux28_IRQHandler 404 SECTION .text:CODE:REORDER:NOROOT(1) 405NvicMux28_IRQHandler 406 B NvicMux28_IRQHandler 407 408 PUBWEAK NvicMux29_IRQHandler 409 SECTION .text:CODE:REORDER:NOROOT(1) 410NvicMux29_IRQHandler 411 B NvicMux29_IRQHandler 412 413 PUBWEAK NvicMux30_IRQHandler 414 SECTION .text:CODE:REORDER:NOROOT(1) 415NvicMux30_IRQHandler 416 B NvicMux30_IRQHandler 417 418 PUBWEAK NvicMux31_IRQHandler 419 SECTION .text:CODE:REORDER:NOROOT(1) 420NvicMux31_IRQHandler 421 B NvicMux31_IRQHandler 422 423 424 END 425 426 427; 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