1/***************************************************************************//**
2* \file cyb06xx5_cm0plus.ld
3* \version 2.95.1
4*
5* Linker file for the GNU C compiler.
6*
7* The main purpose of the linker script is to describe how the sections in the
8* input files should be mapped into the output file, and to control the memory
9* layout of the output file.
10*
11* \note The entry point location is fixed and starts at 0x10000000. The valid
12* application image should be placed there.
13*
14* \note The linker files included with the PDL template projects must be generic
15* and handle all common use cases. Your project may not use every section
16* defined in the linker files. In that case you may see warnings during the
17* build process. In your project, you can simply comment out or remove the
18* relevant code in the linker file.
19*
20********************************************************************************
21* \copyright
22* Copyright 2016-2021 Cypress Semiconductor Corporation
23* SPDX-License-Identifier: Apache-2.0
24*
25* Licensed under the Apache License, Version 2.0 (the "License");
26* you may not use this file except in compliance with the License.
27* You may obtain a copy of the License at
28*
29*     http://www.apache.org/licenses/LICENSE-2.0
30*
31* Unless required by applicable law or agreed to in writing, software
32* distributed under the License is distributed on an "AS IS" BASIS,
33* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
34* See the License for the specific language governing permissions and
35* limitations under the License.
36*******************************************************************************/
37
38OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
39SEARCH_DIR(.)
40GROUP(-lgcc -lc -lnosys)
41ENTRY(Reset_Handler)
42
43/* The size of the stack section at the end of CM0+ SRAM */
44STACK_SIZE = 0x1000;
45
46/* The size of the MCU boot header area at the start of FLASH */
47BOOT_HEADER_SIZE = 0x400;
48
49/* The size of the unprotected public RAM to place an objects that require a full access from both cores */
50PUBLIC_RAM_SIZE = 0x800;
51
52/* Force symbol to be entered in the output file as an undefined symbol. Doing
53* this may, for example, trigger linking of additional modules from standard
54* libraries. You may list several symbols for each EXTERN, and you may use
55* EXTERN multiple times. This command has the same effect as the -u command-line
56* option.
57*/
58EXTERN(Reset_Handler)
59
60/* The MEMORY section below describes the location and size of blocks of memory in the target.
61* Use this section to specify the memory regions available for allocation.
62*/
63MEMORY
64{
65    /* The ram and flash regions control RAM and flash memory allocation for the CM0+ core.
66     * You can change the memory allocation by editing the 'ram' and 'flash' regions.
67     * Your changes must be aligned with the corresponding memory regions for the CM4 core in 'xx_cm4_dual.ld',
68     * where 'xx' is the device group; for example, 'cyb06xx7_cm4_dual.ld'.
69     */
70    public_ram        (rw)    : ORIGIN = 0x08000000, LENGTH = PUBLIC_RAM_SIZE
71    ram               (rwx)   : ORIGIN = 0x08020000, LENGTH = 0xC000
72    flash             (rx)    : ORIGIN = 0x10000000, LENGTH = 0x10000
73
74
75    /* The following regions define device specific memory regions and must not be changed. */
76    sflash_user_data  (rx)    : ORIGIN = 0x16000800, LENGTH = 0x800        /* Supervisory flash: User data */
77    sflash_nar        (rx)    : ORIGIN = 0x16001A00, LENGTH = 0x200        /* Supervisory flash: Normal Access Restrictions (NAR) */
78    sflash_public_key (rx)    : ORIGIN = 0x16005A00, LENGTH = 0xC00        /* Supervisory flash: Public Key */
79    sflash_toc_2      (rx)    : ORIGIN = 0x16007C00, LENGTH = 0x200        /* Supervisory flash: Table of Content # 2 */
80    sflash_rtoc_2     (rx)    : ORIGIN = 0x16007E00, LENGTH = 0x200        /* Supervisory flash: Table of Content # 2 Copy */
81    xip               (rx)    : ORIGIN = 0x18000000, LENGTH = 0x8000000    /* 128 MB */
82    efuse             (r)     : ORIGIN = 0x90700000, LENGTH = 0x100000     /*   1 MB */
83}
84
85/* Library configurations */
86GROUP(libgcc.a libc.a libm.a libnosys.a)
87
88/* Linker script to place sections and symbol values. Should be used together
89 * with other linker script that defines memory regions FLASH and RAM.
90 * It references following symbols, which must be defined in code:
91 *   Reset_Handler : Entry of reset handler
92 *
93 * It defines following symbols, which code can use without definition:
94 *   __exidx_start
95 *   __exidx_end
96 *   __copy_table_start__
97 *   __copy_table_end__
98 *   __zero_table_start__
99 *   __zero_table_end__
100 *   __etext
101 *   __data_start__
102 *   __preinit_array_start
103 *   __preinit_array_end
104 *   __init_array_start
105 *   __init_array_end
106 *   __fini_array_start
107 *   __fini_array_end
108 *   __data_end__
109 *   __bss_start__
110 *   __bss_end__
111 *   __end__
112 *   end
113 *   __HeapLimit
114 *   __StackLimit
115 *   __StackTop
116 *   __stack
117 *   __Vectors_End
118 *   __Vectors_Size
119 */
120
121
122SECTIONS
123{
124    .cy_app_header :
125    {
126        KEEP(*(.cy_app_header))
127    } > flash
128
129    /* Cortex-M0+ application flash area */
130    .text ORIGIN(flash) + BOOT_HEADER_SIZE :
131    {
132        . = ALIGN(4);
133        __Vectors = . ;
134        KEEP(*(.vectors))
135        . = ALIGN(4);
136        __Vectors_End = .;
137        __Vectors_Size = __Vectors_End - __Vectors;
138        __end__ = .;
139
140        . = ALIGN(4);
141        *(.text*)
142
143        KEEP(*(.init))
144        KEEP(*(.fini))
145
146        /* .ctors */
147        *crtbegin.o(.ctors)
148        *crtbegin?.o(.ctors)
149        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
150        *(SORT(.ctors.*))
151        *(.ctors)
152
153        /* .dtors */
154        *crtbegin.o(.dtors)
155        *crtbegin?.o(.dtors)
156        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
157        *(SORT(.dtors.*))
158        *(.dtors)
159
160        /* Read-only code (constants). */
161        *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
162
163        KEEP(*(.eh_frame*))
164    } > flash
165
166
167    .ARM.extab :
168    {
169        *(.ARM.extab* .gnu.linkonce.armextab.*)
170    } > flash
171
172    __exidx_start = .;
173
174    .ARM.exidx :
175    {
176        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
177    } > flash
178    __exidx_end = .;
179
180
181    /* To copy multiple ROM to RAM sections,
182     * uncomment .copy.table section and,
183     * define __STARTUP_COPY_MULTIPLE in startup_psoc6_03_cm0plus.S */
184    .copy.table :
185    {
186        . = ALIGN(4);
187        __copy_table_start__ = .;
188
189        /* Copy interrupt vectors from flash to RAM */
190        LONG (__Vectors)                                    /* From */
191        LONG (__ram_vectors_start__)                        /* To   */
192        LONG (__Vectors_End - __Vectors)                    /* Size */
193
194        /* Copy data section to RAM */
195        LONG (__etext)                                      /* From */
196        LONG (__data_start__)                               /* To   */
197        LONG (__data_end__ - __data_start__)                /* Size */
198
199        __copy_table_end__ = .;
200    } > flash
201
202
203    /* To clear multiple BSS sections,
204     * uncomment .zero.table section and,
205     * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_psoc6_03_cm0plus.S */
206    .zero.table :
207    {
208        . = ALIGN(4);
209        __zero_table_start__ = .;
210        LONG (__bss_start__)
211        LONG (__bss_end__ - __bss_start__)
212        __zero_table_end__ = .;
213    } > flash
214
215    __etext =  . ;
216
217
218    .ramVectors (NOLOAD) : ALIGN(8)
219    {
220        __ram_vectors_start__ = .;
221        KEEP(*(.ram_vectors))
222        __ram_vectors_end__   = .;
223    } > ram
224
225
226    .data __ram_vectors_end__ :
227    {
228        . = ALIGN(4);
229        __data_start__ = .;
230
231        *(vtable)
232        __sdata_start__ = .;
233        *(.data*)
234        __sdata_end__ = .;
235
236        . = ALIGN(4);
237        /* preinit data */
238        PROVIDE_HIDDEN (__preinit_array_start = .);
239        KEEP(*(.preinit_array))
240        PROVIDE_HIDDEN (__preinit_array_end = .);
241
242        . = ALIGN(4);
243        /* init data */
244        PROVIDE_HIDDEN (__init_array_start = .);
245        KEEP(*(SORT(.init_array.*)))
246        KEEP(*(.init_array))
247        PROVIDE_HIDDEN (__init_array_end = .);
248
249        . = ALIGN(4);
250        /* finit data */
251        PROVIDE_HIDDEN (__fini_array_start = .);
252        KEEP(*(SORT(.fini_array.*)))
253        KEEP(*(.fini_array))
254        PROVIDE_HIDDEN (__fini_array_end = .);
255
256        KEEP(*(.jcr*))
257        . = ALIGN(4);
258
259        KEEP(*(.cy_ramfunc*))
260        . = ALIGN(4);
261
262        __data_end__ = .;
263
264    } > ram AT>flash
265
266
267    /* Place variables in the section that should not be initialized during the
268    *  device startup.
269    */
270    .noinit (NOLOAD) : ALIGN(8)
271    {
272      KEEP(*(.noinit))
273    } > ram
274
275
276    /* The uninitialized global or static variables are placed in this section.
277    *
278    * The NOLOAD attribute tells linker that .bss section does not consume
279    * any space in the image. The NOLOAD attribute changes the .bss type to
280    * NOBITS, and that  makes linker to A) not allocate section in memory, and
281    * A) put information to clear the section with all zeros during application
282    * loading.
283    *
284    * Without the NOLOAD attribute, the .bss section might get PROGBITS type.
285    * This  makes linker to A) allocate zeroed section in memory, and B) copy
286    * this section to RAM during application loading.
287    */
288    .bss (NOLOAD):
289    {
290        . = ALIGN(4);
291        __bss_start__ = .;
292        *(.bss*)
293        *(COMMON)
294        . = ALIGN(4);
295        __bss_end__ = .;
296    } > ram
297
298
299    .heap (NOLOAD):
300    {
301        __HeapBase = .;
302        __end__ = .;
303        end = __end__;
304        KEEP(*(.heap*))
305        . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
306        __HeapLimit = .;
307    } > ram
308
309
310    /* Unprotected public RAM */
311    .cy_sharedmem (NOLOAD):
312    {
313        . = ALIGN(4);
314        __public_ram_start__ = .;
315        KEEP(*(.cy_sharedmem))
316        . = ALIGN(4);
317        __public_ram_end__ = .;
318    } > public_ram
319
320
321    /* .stack_dummy section doesn't contains any symbols. It is only
322     * used for linker to calculate size of stack sections, and assign
323     * values to stack symbols later */
324    .stack_dummy (NOLOAD):
325    {
326        KEEP(*(.stack*))
327    } > ram
328
329
330    /* Set stack top to end of RAM, and stack limit move down by
331     * size of stack_dummy section */
332    __StackTop = ORIGIN(ram) + LENGTH(ram);
333    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
334    PROVIDE(__stack = __StackTop);
335
336    /* Check if data + heap + stack exceeds RAM limit */
337    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
338
339
340
341
342    /* Supervisory Flash: User data */
343    .cy_sflash_user_data :
344    {
345        KEEP(*(.cy_sflash_user_data))
346    } > sflash_user_data
347
348
349    /* Supervisory Flash: Normal Access Restrictions (NAR) */
350    .cy_sflash_nar :
351    {
352        KEEP(*(.cy_sflash_nar))
353    } > sflash_nar
354
355
356    /* Supervisory Flash: Public Key */
357    .cy_sflash_public_key :
358    {
359        KEEP(*(.cy_sflash_public_key))
360    } > sflash_public_key
361
362
363    /* Supervisory Flash: Table of Content # 2 */
364    .cy_toc_part2 :
365    {
366        KEEP(*(.cy_toc_part2))
367    } > sflash_toc_2
368
369
370    /* Supervisory Flash: Table of Content # 2 Copy */
371    .cy_rtoc_part2 :
372    {
373        KEEP(*(.cy_rtoc_part2))
374    } > sflash_rtoc_2
375
376
377    /* Places the code in the Execute in Place (XIP) section. See the smif driver
378    *  documentation for details.
379    */
380    cy_xip :
381    {
382        __cy_xip_start = .;
383        KEEP(*(.cy_xip))
384        __cy_xip_end = .;
385    } > xip
386
387
388    /* eFuse */
389    .cy_efuse :
390    {
391        KEEP(*(.cy_efuse))
392    } > efuse
393
394
395    /* These sections are used for additional metadata (silicon revision,
396    *  Silicon/JTAG ID, etc.) storage.
397    */
398    .cymeta         0x90500000 : { KEEP(*(.cymeta)) } :NONE
399}
400
401
402/* The following symbols used by the cymcuelftool. */
403/* Flash */
404__cy_memory_0_start    = 0x10000000;
405__cy_memory_0_length   = 0x00070000;
406__cy_memory_0_row_size = 0x200;
407
408
409/* Supervisory Flash */
410__cy_memory_2_start    = 0x16000000;
411__cy_memory_2_length   = 0x8000;
412__cy_memory_2_row_size = 0x200;
413
414/* XIP */
415__cy_memory_3_start    = 0x18000000;
416__cy_memory_3_length   = 0x08000000;
417__cy_memory_3_row_size = 0x200;
418
419/* eFuse */
420__cy_memory_4_start    = 0x90700000;
421__cy_memory_4_length   = 0x100000;
422__cy_memory_4_row_size = 1;
423
424/* EOF */
425