1;/**************************************************************************//** 2; * @file startup_psoc6_03_cm0plus.s 3; * @brief CMSIS Core Device Startup File for 4; * ARMCM0plus Device Series 5; * @version V5.00 6; * @date 02. March 2016 7; ******************************************************************************/ 8;/* 9; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. 10; * 11; * SPDX-License-Identifier: Apache-2.0 12; * 13; * Licensed under the Apache License, Version 2.0 (the License); you may 14; * not use this file except in compliance with the License. 15; * You may obtain a copy of the License at 16; * 17; * www.apache.org/licenses/LICENSE-2.0 18; * 19; * Unless required by applicable law or agreed to in writing, software 20; * distributed under the License is distributed on an AS IS BASIS, WITHOUT 21; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22; * See the License for the specific language governing permissions and 23; * limitations under the License. 24; */ 25 26 PRESERVE8 27 THUMB 28 29; Vector Table Mapped to Address 0 at Reset 30 31 AREA RESET, DATA, READONLY 32 EXPORT __Vectors 33 EXPORT __Vectors_End 34 EXPORT __Vectors_Size 35 36 IMPORT |Image$$ARM_LIB_STACK$$ZI$$Base| 37 IMPORT |Image$$ARM_LIB_STACK$$ZI$$Length| 38 39__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Base| + |Image$$ARM_LIB_STACK$$ZI$$Length| ; Top of Stack 40 41 DCD Reset_Handler ; Reset Handler 42 43 DCD 0x0000000D ; NMI Handler located at ROM code 44 DCD HardFault_Handler ; Hard Fault Handler 45 DCD 0 ; Reserved 46 DCD 0 ; Reserved 47 DCD 0 ; Reserved 48 DCD 0 ; Reserved 49 DCD 0 ; Reserved 50 DCD 0 ; Reserved 51 DCD 0 ; Reserved 52 DCD SVC_Handler ; SVCall Handler 53 DCD 0 ; Reserved 54 DCD 0 ; Reserved 55 DCD PendSV_Handler ; PendSV Handler 56 DCD SysTick_Handler ; SysTick Handler 57 58 ; External interrupts Description 59 DCD NvicMux0_IRQHandler ; CPU User Interrupt #0 60 DCD NvicMux1_IRQHandler ; CPU User Interrupt #1 61 DCD NvicMux2_IRQHandler ; CPU User Interrupt #2 62 DCD NvicMux3_IRQHandler ; CPU User Interrupt #3 63 DCD NvicMux4_IRQHandler ; CPU User Interrupt #4 64 DCD NvicMux5_IRQHandler ; CPU User Interrupt #5 65 DCD NvicMux6_IRQHandler ; CPU User Interrupt #6 66 DCD NvicMux7_IRQHandler ; CPU User Interrupt #7 67 DCD Internal0_IRQHandler ; Internal SW Interrupt #0 68 DCD Internal1_IRQHandler ; Internal SW Interrupt #1 69 DCD Internal2_IRQHandler ; Internal SW Interrupt #2 70 DCD Internal3_IRQHandler ; Internal SW Interrupt #3 71 DCD Internal4_IRQHandler ; Internal SW Interrupt #4 72 DCD Internal5_IRQHandler ; Internal SW Interrupt #5 73 DCD Internal6_IRQHandler ; Internal SW Interrupt #6 74 DCD Internal7_IRQHandler ; Internal SW Interrupt #7 75 76__Vectors_End 77 78__Vectors_Size EQU __Vectors_End - __Vectors 79 EXPORT __ramVectors 80 AREA RESET_RAM, READWRITE, NOINIT 81__ramVectors SPACE __Vectors_Size 82 83 84 AREA |.text|, CODE, READONLY 85 86 87; Weak function for startup customization 88; 89; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) 90; because this function is executed as the first instruction in the ResetHandler. 91; The PDL is also not initialized to use the proper register offsets. 92; The user of this function is responsible for initializing the PDL and resources before using them. 93; 94Cy_OnResetUser PROC 95 EXPORT Cy_OnResetUser [WEAK] 96 BX LR 97 ENDP 98 99; Reset Handler 100Reset_Handler PROC 101 EXPORT Reset_Handler [WEAK] 102 IMPORT __main 103 104 ; Define strong function for startup customization 105 BL Cy_OnResetUser 106 107 ; Disable global interrupts 108 CPSID I 109 110 ; Copy vectors from ROM to RAM 111 LDR r1, =__Vectors 112 LDR r0, =__ramVectors 113 LDR r2, =__Vectors_Size 114Vectors_Copy 115 LDR r3, [r1] 116 STR r3, [r0] 117 ADDS r0, r0, #4 118 ADDS r1, r1, #4 119 SUBS r2, r2, #4 120 CMP r2, #0 121 BNE Vectors_Copy 122 123 ; Update Vector Table Offset Register. */ 124 LDR r0, =__ramVectors 125 LDR r1, =0xE000ED08 126 STR r0, [r1] 127 dsb 0xF 128 129 LDR R0, =__main 130 BLX R0 131 132 ; Should never get here 133 B . 134 135 ENDP 136 137; Dummy Exception Handlers (infinite loops which can be modified) 138NMI_Handler PROC 139 EXPORT NMI_Handler [WEAK] 140 B . 141 ENDP 142 143Cy_SysLib_FaultHandler PROC 144 EXPORT Cy_SysLib_FaultHandler [WEAK] 145 B . 146 ENDP 147 148HardFault_Handler PROC 149 EXPORT HardFault_Handler [WEAK] 150 movs r0, #4 151 mov r1, LR 152 tst r0, r1 153 beq L_MSP 154 mrs r0, PSP 155 bl L_API_call 156L_MSP 157 mrs r0, MSP 158L_API_call 159 bl Cy_SysLib_FaultHandler 160 ENDP 161 162SVC_Handler PROC 163 EXPORT SVC_Handler [WEAK] 164 B . 165 ENDP 166PendSV_Handler PROC 167 EXPORT PendSV_Handler [WEAK] 168 B . 169 ENDP 170SysTick_Handler PROC 171 EXPORT SysTick_Handler [WEAK] 172 B . 173 ENDP 174 175Default_Handler PROC 176 EXPORT Default_Handler [WEAK] 177 EXPORT NvicMux0_IRQHandler [WEAK] 178 EXPORT NvicMux1_IRQHandler [WEAK] 179 EXPORT NvicMux2_IRQHandler [WEAK] 180 EXPORT NvicMux3_IRQHandler [WEAK] 181 EXPORT NvicMux4_IRQHandler [WEAK] 182 EXPORT NvicMux5_IRQHandler [WEAK] 183 EXPORT NvicMux6_IRQHandler [WEAK] 184 EXPORT NvicMux7_IRQHandler [WEAK] 185 EXPORT Internal0_IRQHandler [WEAK] 186 EXPORT Internal1_IRQHandler [WEAK] 187 EXPORT Internal2_IRQHandler [WEAK] 188 EXPORT Internal3_IRQHandler [WEAK] 189 EXPORT Internal4_IRQHandler [WEAK] 190 EXPORT Internal5_IRQHandler [WEAK] 191 EXPORT Internal6_IRQHandler [WEAK] 192 EXPORT Internal7_IRQHandler [WEAK] 193 194NvicMux0_IRQHandler 195NvicMux1_IRQHandler 196NvicMux2_IRQHandler 197NvicMux3_IRQHandler 198NvicMux4_IRQHandler 199NvicMux5_IRQHandler 200NvicMux6_IRQHandler 201NvicMux7_IRQHandler 202Internal0_IRQHandler 203Internal1_IRQHandler 204Internal2_IRQHandler 205Internal3_IRQHandler 206Internal4_IRQHandler 207Internal5_IRQHandler 208Internal6_IRQHandler 209Internal7_IRQHandler 210 211 B . 212 ENDP 213 214 ALIGN 215 216 217; User Initial Stack & Heap 218 IMPORT __use_two_region_memory 219 220 END 221 222 223; [] END OF FILE 224