1 /*
2  * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #pragma once
8 
9 #ifdef __cplusplus
10 extern "C" {
11 #endif
12 
13 /**
14  * @brief initialize cache invalid access interrupt
15  *
16  * This function enables cache invalid access interrupt source and connects it
17  * to interrupt input number. It is called from the startup code.
18  *
19  * On ESP32, the interrupt input number is ETS_MEMACCESS_ERR_INUM. On other targets
20  * it is ETS_CACHEERR_INUM. See soc/soc.h for more information.
21  */
22 void esp_cache_err_int_init(void);
23 
24 
25 /**
26  * @brief get the CPU which caused cache invalid access interrupt. Helper function in
27  * panic handling.
28  * @return
29  *  - PRO_CPU_NUM, if PRO_CPU has caused cache IA interrupt
30  *  - APP_CPU_NUM, if APP_CPU has caused cache IA interrupt
31  *  - (-1) otherwise
32  */
33 int esp_cache_err_get_cpuid(void);
34 
35 #ifdef __cplusplus
36 }
37 #endif
38