1 // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 // The HAL layer for RTC CNTL (common part)
16
17 #include "soc/soc_caps.h"
18 #include "soc/lldesc.h"
19 #include "hal/dma_types.h"
20 #include "hal/rtc_hal.h"
21 #include "hal/assert.h"
22 #include "esp_attr.h"
23
24 #define RTC_CNTL_HAL_LINK_BUF_SIZE_MIN (SOC_RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE) /* The minimum size of dma link buffer */
25
26 typedef struct rtc_cntl_link_buf_conf {
27 uint32_t cfg[4]; /* 4 word for dma link buffer configuration */
28 } rtc_cntl_link_buf_conf_t;
29
rtc_cntl_hal_dma_link_init(void * elem,void * buff,int size,void * next)30 void * rtc_cntl_hal_dma_link_init(void *elem, void *buff, int size, void *next)
31 {
32 HAL_ASSERT(elem != NULL);
33 HAL_ASSERT(buff != NULL);
34 HAL_ASSERT(size >= RTC_CNTL_HAL_LINK_BUF_SIZE_MIN);
35
36 lldesc_t *plink = (lldesc_t *)elem;
37
38 plink->eof = next ? 0 : 1;
39 plink->owner = DMA_DESCRIPTOR_BUFFER_OWNER_DMA;
40 plink->size = size >> 4; /* in unit of 16 bytes */
41 plink->length = size >> 4;
42 plink->buf = buff;
43 plink->offset = 0;
44 plink->sosf = 0;
45 STAILQ_NEXT(plink, qe) = next;
46 return (void *)plink;
47 }
48
49 #if SOC_PM_SUPPORT_CPU_PD
50
rtc_cntl_hal_enable_cpu_retention(void * addr)51 void rtc_cntl_hal_enable_cpu_retention(void *addr)
52 {
53 rtc_cntl_sleep_retent_t *retent = (rtc_cntl_sleep_retent_t *)addr;
54
55 if (addr) {
56 if (retent->cpu_pd_mem) {
57 lldesc_t *plink = (lldesc_t *)retent->cpu_pd_mem;
58
59 /* dma link buffer configure */
60 rtc_cntl_link_buf_conf_t *pbuf = (rtc_cntl_link_buf_conf_t *)plink->buf;
61 pbuf->cfg[0] = 0;
62 pbuf->cfg[1] = 0;
63 pbuf->cfg[2] = 0;
64 pbuf->cfg[3] = (uint32_t)-1;
65
66 rtc_cntl_ll_set_cpu_retention_link_addr((uint32_t)plink);
67 rtc_cntl_ll_enable_cpu_retention_clock();
68 rtc_cntl_ll_enable_cpu_retention();
69 }
70 }
71 }
72
rtc_cntl_hal_disable_cpu_retention(void * addr)73 void IRAM_ATTR rtc_cntl_hal_disable_cpu_retention(void *addr)
74 {
75 rtc_cntl_sleep_retent_t *retent = (rtc_cntl_sleep_retent_t *)addr;
76
77 if (addr) {
78 if (retent->cpu_pd_mem) {
79 rtc_cntl_ll_disable_cpu_retention();
80 }
81 }
82 }
83
84 #endif // SOC_PM_SUPPORT_CPU_PD
85
