1 /**************************************************************************//** 2 * @file 3 * @brief EFR32MG24 SCRATCHPAD register and bit field definitions 4 ****************************************************************************** 5 * # License 6 * <b>Copyright 2024 Silicon Laboratories, Inc. www.silabs.com</b> 7 ****************************************************************************** 8 * 9 * SPDX-License-Identifier: Zlib 10 * 11 * The licensor of this software is Silicon Laboratories Inc. 12 * 13 * This software is provided 'as-is', without any express or implied 14 * warranty. In no event will the authors be held liable for any damages 15 * arising from the use of this software. 16 * 17 * Permission is granted to anyone to use this software for any purpose, 18 * including commercial applications, and to alter it and redistribute it 19 * freely, subject to the following restrictions: 20 * 21 * 1. The origin of this software must not be misrepresented; you must not 22 * claim that you wrote the original software. If you use this software 23 * in a product, an acknowledgment in the product documentation would be 24 * appreciated but is not required. 25 * 2. Altered source versions must be plainly marked as such, and must not be 26 * misrepresented as being the original software. 27 * 3. This notice may not be removed or altered from any source distribution. 28 * 29 *****************************************************************************/ 30 #ifndef EFR32MG24_SCRATCHPAD_H 31 #define EFR32MG24_SCRATCHPAD_H 32 #define SCRATCHPAD_HAS_SET_CLEAR 33 34 /**************************************************************************//** 35 * @addtogroup Parts 36 * @{ 37 ******************************************************************************/ 38 /**************************************************************************//** 39 * @defgroup EFR32MG24_SCRATCHPAD SCRATCHPAD 40 * @{ 41 * @brief EFR32MG24 SCRATCHPAD Register Declaration. 42 *****************************************************************************/ 43 44 /** SCRATCHPAD Register Declaration. */ 45 typedef struct scratchpad_typedef{ 46 __IOM uint32_t SREG0; /**< Scratchpad Register 0 */ 47 __IOM uint32_t SREG1; /**< Scratchpad Register 1 */ 48 uint32_t RESERVED0[1022U]; /**< Reserved for future use */ 49 __IOM uint32_t SREG0_SET; /**< Scratchpad Register 0 */ 50 __IOM uint32_t SREG1_SET; /**< Scratchpad Register 1 */ 51 uint32_t RESERVED1[1022U]; /**< Reserved for future use */ 52 __IOM uint32_t SREG0_CLR; /**< Scratchpad Register 0 */ 53 __IOM uint32_t SREG1_CLR; /**< Scratchpad Register 1 */ 54 uint32_t RESERVED2[1022U]; /**< Reserved for future use */ 55 __IOM uint32_t SREG0_TGL; /**< Scratchpad Register 0 */ 56 __IOM uint32_t SREG1_TGL; /**< Scratchpad Register 1 */ 57 } SCRATCHPAD_TypeDef; 58 /** @} End of group EFR32MG24_SCRATCHPAD */ 59 60 /**************************************************************************//** 61 * @addtogroup EFR32MG24_SCRATCHPAD 62 * @{ 63 * @defgroup EFR32MG24_SCRATCHPAD_BitFields SCRATCHPAD Bit Fields 64 * @{ 65 *****************************************************************************/ 66 67 /* Bit fields for SCRATCHPAD SREG0 */ 68 #define _SCRATCHPAD_SREG0_RESETVALUE 0x00000000UL /**< Default value for SCRATCHPAD_SREG0 */ 69 #define _SCRATCHPAD_SREG0_MASK 0xFFFFFFFFUL /**< Mask for SCRATCHPAD_SREG0 */ 70 #define _SCRATCHPAD_SREG0_SCRATCH_SHIFT 0 /**< Shift value for SCRATCHPAD_SCRATCH */ 71 #define _SCRATCHPAD_SREG0_SCRATCH_MASK 0xFFFFFFFFUL /**< Bit mask for SCRATCHPAD_SCRATCH */ 72 #define _SCRATCHPAD_SREG0_SCRATCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for SCRATCHPAD_SREG0 */ 73 #define SCRATCHPAD_SREG0_SCRATCH_DEFAULT (_SCRATCHPAD_SREG0_SCRATCH_DEFAULT << 0) /**< Shifted mode DEFAULT for SCRATCHPAD_SREG0 */ 74 75 /* Bit fields for SCRATCHPAD SREG1 */ 76 #define _SCRATCHPAD_SREG1_RESETVALUE 0x00000000UL /**< Default value for SCRATCHPAD_SREG1 */ 77 #define _SCRATCHPAD_SREG1_MASK 0xFFFFFFFFUL /**< Mask for SCRATCHPAD_SREG1 */ 78 #define _SCRATCHPAD_SREG1_SCRATCH_SHIFT 0 /**< Shift value for SCRATCHPAD_SCRATCH */ 79 #define _SCRATCHPAD_SREG1_SCRATCH_MASK 0xFFFFFFFFUL /**< Bit mask for SCRATCHPAD_SCRATCH */ 80 #define _SCRATCHPAD_SREG1_SCRATCH_DEFAULT 0x00000000UL /**< Mode DEFAULT for SCRATCHPAD_SREG1 */ 81 #define SCRATCHPAD_SREG1_SCRATCH_DEFAULT (_SCRATCHPAD_SREG1_SCRATCH_DEFAULT << 0) /**< Shifted mode DEFAULT for SCRATCHPAD_SREG1 */ 82 83 /** @} End of group EFR32MG24_SCRATCHPAD_BitFields */ 84 /** @} End of group EFR32MG24_SCRATCHPAD */ 85 /** @} End of group Parts */ 86 87 #endif // EFR32MG24_SCRATCHPAD_H 88
