1 /**************************************************************************//** 2 * @file 3 * @brief EFR32MG21 PRS register signal bit field definitions 4 ****************************************************************************** 5 * # License 6 * <b>Copyright 2024 Silicon Laboratories, Inc. www.silabs.com</b> 7 ****************************************************************************** 8 * 9 * SPDX-License-Identifier: Zlib 10 * 11 * The licensor of this software is Silicon Laboratories Inc. 12 * 13 * This software is provided 'as-is', without any express or implied 14 * warranty. In no event will the authors be held liable for any damages 15 * arising from the use of this software. 16 * 17 * Permission is granted to anyone to use this software for any purpose, 18 * including commercial applications, and to alter it and redistribute it 19 * freely, subject to the following restrictions: 20 * 21 * 1. The origin of this software must not be misrepresented; you must not 22 * claim that you wrote the original software. If you use this software 23 * in a product, an acknowledgment in the product documentation would be 24 * appreciated but is not required. 25 * 2. Altered source versions must be plainly marked as such, and must not be 26 * misrepresented as being the original software. 27 * 3. This notice may not be removed or altered from any source distribution. 28 * 29 *****************************************************************************/ 30 #ifndef EFR32MG21_PRS_SIGNALS_H 31 #define EFR32MG21_PRS_SIGNALS_H 32 33 /** Synchronous signal sources enumeration: */ 34 #define _PRS_SYNC_CH_CTRL_SOURCESEL_NONE (0x00000000UL) 35 #define _PRS_SYNC_CH_CTRL_SOURCESEL_TIMER0 (0x00000001UL) 36 #define _PRS_SYNC_CH_CTRL_SOURCESEL_TIMER1 (0x00000002UL) 37 #define _PRS_SYNC_CH_CTRL_SOURCESEL_IADC0 (0x00000003UL) 38 #define _PRS_SYNC_CH_CTRL_SOURCESEL_TIMER2 (0x00000004UL) 39 #define _PRS_SYNC_CH_CTRL_SOURCESEL_TIMER3 (0x00000005UL) 40 41 /** Synchronous signal sources enumeration aligned with register bit field: */ 42 #define PRS_SYNC_CH_CTRL_SOURCESEL_NONE (_PRS_SYNC_CH_CTRL_SOURCESEL_NONE << 8) 43 #define PRS_SYNC_CH_CTRL_SOURCESEL_TIMER0 (_PRS_SYNC_CH_CTRL_SOURCESEL_TIMER0 << 8) 44 #define PRS_SYNC_CH_CTRL_SOURCESEL_TIMER1 (_PRS_SYNC_CH_CTRL_SOURCESEL_TIMER1 << 8) 45 #define PRS_SYNC_CH_CTRL_SOURCESEL_IADC0 (_PRS_SYNC_CH_CTRL_SOURCESEL_IADC0 << 8) 46 #define PRS_SYNC_CH_CTRL_SOURCESEL_TIMER2 (_PRS_SYNC_CH_CTRL_SOURCESEL_TIMER2 << 8) 47 #define PRS_SYNC_CH_CTRL_SOURCESEL_TIMER3 (_PRS_SYNC_CH_CTRL_SOURCESEL_TIMER3 << 8) 48 49 /** Synchronous signals enumeration: */ 50 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER0UF (0x00000000UL) 51 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER0OF (0x00000001UL) 52 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER0CC0 (0x00000002UL) 53 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER0CC1 (0x00000003UL) 54 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER0CC2 (0x00000004UL) 55 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER1UF (0x00000000UL) 56 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER1OF (0x00000001UL) 57 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER1CC0 (0x00000002UL) 58 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER1CC1 (0x00000003UL) 59 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER1CC2 (0x00000004UL) 60 #define _PRS_SYNC_CH_CTRL_SIGSEL_IADC0SCANENTRYDONE (0x00000000UL) 61 #define _PRS_SYNC_CH_CTRL_SIGSEL_IADC0SCANTABLEDONE (0x00000001UL) 62 #define _PRS_SYNC_CH_CTRL_SIGSEL_IADC0SINGLEDONE (0x00000002UL) 63 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER2CC0 (0x00000000UL) 64 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER2CC1 (0x00000001UL) 65 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER2CC2 (0x00000002UL) 66 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER2UF (0x00000003UL) 67 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER2OF (0x00000004UL) 68 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER3CC0 (0x00000000UL) 69 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER3CC1 (0x00000001UL) 70 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER3CC2 (0x00000002UL) 71 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER3UF (0x00000003UL) 72 #define _PRS_SYNC_CH_CTRL_SIGSEL_TIMER3OF (0x00000004UL) 73 74 /** Synchronous signals enumeration aligned with register bit field: */ 75 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER0UF (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER0UF << 0) 76 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER0OF (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER0OF << 0) 77 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER0CC0 (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER0CC0 << 0) 78 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER0CC1 (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER0CC1 << 0) 79 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER0CC2 (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER0CC2 << 0) 80 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER1UF (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER1UF << 0) 81 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER1OF (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER1OF << 0) 82 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER1CC0 (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER1CC0 << 0) 83 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER1CC1 (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER1CC1 << 0) 84 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER1CC2 (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER1CC2 << 0) 85 #define PRS_SYNC_CH_CTRL_SIGSEL_IADC0SCANENTRYDONE (_PRS_SYNC_CH_CTRL_SIGSEL_IADC0SCANENTRYDONE << 0) 86 #define PRS_SYNC_CH_CTRL_SIGSEL_IADC0SCANTABLEDONE (_PRS_SYNC_CH_CTRL_SIGSEL_IADC0SCANTABLEDONE << 0) 87 #define PRS_SYNC_CH_CTRL_SIGSEL_IADC0SINGLEDONE (_PRS_SYNC_CH_CTRL_SIGSEL_IADC0SINGLEDONE << 0) 88 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER2CC0 (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER2CC0 << 0) 89 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER2CC1 (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER2CC1 << 0) 90 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER2CC2 (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER2CC2 << 0) 91 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER2UF (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER2UF << 0) 92 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER2OF (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER2OF << 0) 93 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER3CC0 (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER3CC0 << 0) 94 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER3CC1 (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER3CC1 << 0) 95 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER3CC2 (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER3CC2 << 0) 96 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER3UF (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER3UF << 0) 97 #define PRS_SYNC_CH_CTRL_SIGSEL_TIMER3OF (_PRS_SYNC_CH_CTRL_SIGSEL_TIMER3OF << 0) 98 99 /** Synchronous signals and sources combined and aligned with register bit fields: */ 100 #define PRS_SYNC_TIMER0_UF (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER0 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER0UF) 101 #define PRS_SYNC_TIMER0_OF (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER0 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER0OF) 102 #define PRS_SYNC_TIMER0_CC0 (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER0 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER0CC0) 103 #define PRS_SYNC_TIMER0_CC1 (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER0 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER0CC1) 104 #define PRS_SYNC_TIMER0_CC2 (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER0 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER0CC2) 105 #define PRS_SYNC_TIMER1_UF (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER1 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER1UF) 106 #define PRS_SYNC_TIMER1_OF (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER1 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER1OF) 107 #define PRS_SYNC_TIMER1_CC0 (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER1 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER1CC0) 108 #define PRS_SYNC_TIMER1_CC1 (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER1 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER1CC1) 109 #define PRS_SYNC_TIMER1_CC2 (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER1 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER1CC2) 110 #define PRS_SYNC_IADC0_SCAN_ENTRY_DONE (PRS_SYNC_CH_CTRL_SOURCESEL_IADC0 | PRS_SYNC_CH_CTRL_SIGSEL_IADC0SCANENTRYDONE) 111 #define PRS_SYNC_IADC0_SCAN_TABLE_DONE (PRS_SYNC_CH_CTRL_SOURCESEL_IADC0 | PRS_SYNC_CH_CTRL_SIGSEL_IADC0SCANTABLEDONE) 112 #define PRS_SYNC_IADC0_SINGLE_DONE (PRS_SYNC_CH_CTRL_SOURCESEL_IADC0 | PRS_SYNC_CH_CTRL_SIGSEL_IADC0SINGLEDONE) 113 #define PRS_SYNC_TIMER2_CC0 (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER2 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER2CC0) 114 #define PRS_SYNC_TIMER2_CC1 (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER2 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER2CC1) 115 #define PRS_SYNC_TIMER2_CC2 (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER2 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER2CC2) 116 #define PRS_SYNC_TIMER2_UF (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER2 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER2UF) 117 #define PRS_SYNC_TIMER2_OF (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER2 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER2OF) 118 #define PRS_SYNC_TIMER3_CC0 (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER3 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER3CC0) 119 #define PRS_SYNC_TIMER3_CC1 (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER3 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER3CC1) 120 #define PRS_SYNC_TIMER3_CC2 (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER3 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER3CC2) 121 #define PRS_SYNC_TIMER3_UF (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER3 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER3UF) 122 #define PRS_SYNC_TIMER3_OF (PRS_SYNC_CH_CTRL_SOURCESEL_TIMER3 | PRS_SYNC_CH_CTRL_SIGSEL_TIMER3OF) 123 124 /** Asynchronous signal sources enumeration: */ 125 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_NONE (0x00000000UL) 126 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_IADC0 (0x00000001UL) 127 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_LETIMER0 (0x00000002UL) 128 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_RTCC (0x00000003UL) 129 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_BURTC (0x00000004UL) 130 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO (0x00000005UL) 131 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_ACMP0 (0x00000006UL) 132 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_ACMP1 (0x00000007UL) 133 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_CMUL (0x00000008UL) 134 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_CMU (0x00000009UL) 135 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_CMUH (0x0000000aUL) 136 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_PRORTC (0x0000000bUL) 137 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_HFRCOEM23 (0x0000000cUL) 138 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_EMUL (0x0000000dUL) 139 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_EMU (0x0000000eUL) 140 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_LVGD (0x0000000fUL) 141 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_SE (0x00000010UL) 142 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_USART0 (0x00000020UL) 143 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_USART1 (0x00000021UL) 144 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_USART2 (0x00000022UL) 145 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (0x00000023UL) 146 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (0x00000024UL) 147 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER2 (0x00000025UL) 148 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER3 (0x00000026UL) 149 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_CORE (0x00000027UL) 150 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_AGCL (0x00000028UL) 151 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_AGC (0x00000029UL) 152 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_BUFC (0x0000002aUL) 153 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_MODEML (0x0000002bUL) 154 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_MODEM (0x0000002cUL) 155 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_MODEMH (0x0000002dUL) 156 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_FRC (0x0000002eUL) 157 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMERL (0x0000002fUL) 158 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMER (0x00000030UL) 159 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_RAC (0x00000031UL) 160 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_SYNTH (0x00000032UL) 161 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_SYSCFG (0x00000033UL) 162 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_DMEM (0x00000034UL) 163 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_HFXO0 (0x00000035UL) 164 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_HFRCO0 (0x00000036UL) 165 166 /** Asynchronous signal sources enumeration aligned with register bit field: */ 167 #define PRS_ASYNC_CH_CTRL_SOURCESEL_NONE (_PRS_ASYNC_CH_CTRL_SOURCESEL_NONE << 8) 168 #define PRS_ASYNC_CH_CTRL_SOURCESEL_USART0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_USART0 << 8) 169 #define PRS_ASYNC_CH_CTRL_SOURCESEL_USART1 (_PRS_ASYNC_CH_CTRL_SOURCESEL_USART1 << 8) 170 #define PRS_ASYNC_CH_CTRL_SOURCESEL_USART2 (_PRS_ASYNC_CH_CTRL_SOURCESEL_USART2 << 8) 171 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 << 8) 172 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 << 8) 173 #define PRS_ASYNC_CH_CTRL_SOURCESEL_IADC0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_IADC0 << 8) 174 #define PRS_ASYNC_CH_CTRL_SOURCESEL_LETIMER0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_LETIMER0 << 8) 175 #define PRS_ASYNC_CH_CTRL_SOURCESEL_RTCC (_PRS_ASYNC_CH_CTRL_SOURCESEL_RTCC << 8) 176 #define PRS_ASYNC_CH_CTRL_SOURCESEL_BURTC (_PRS_ASYNC_CH_CTRL_SOURCESEL_BURTC << 8) 177 #define PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO (_PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO << 8) 178 #define PRS_ASYNC_CH_CTRL_SOURCESEL_ACMP0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_ACMP0 << 8) 179 #define PRS_ASYNC_CH_CTRL_SOURCESEL_ACMP1 (_PRS_ASYNC_CH_CTRL_SOURCESEL_ACMP1 << 8) 180 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER2 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER2 << 8) 181 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER3 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER3 << 8) 182 #define PRS_ASYNC_CH_CTRL_SOURCESEL_CORE (_PRS_ASYNC_CH_CTRL_SOURCESEL_CORE << 8) 183 #define PRS_ASYNC_CH_CTRL_SOURCESEL_CMUL (_PRS_ASYNC_CH_CTRL_SOURCESEL_CMUL << 8) 184 #define PRS_ASYNC_CH_CTRL_SOURCESEL_CMU (_PRS_ASYNC_CH_CTRL_SOURCESEL_CMU << 8) 185 #define PRS_ASYNC_CH_CTRL_SOURCESEL_CMUH (_PRS_ASYNC_CH_CTRL_SOURCESEL_CMUH << 8) 186 #define PRS_ASYNC_CH_CTRL_SOURCESEL_AGCL (_PRS_ASYNC_CH_CTRL_SOURCESEL_AGCL << 8) 187 #define PRS_ASYNC_CH_CTRL_SOURCESEL_AGC (_PRS_ASYNC_CH_CTRL_SOURCESEL_AGC << 8) 188 #define PRS_ASYNC_CH_CTRL_SOURCESEL_BUFC (_PRS_ASYNC_CH_CTRL_SOURCESEL_BUFC << 8) 189 #define PRS_ASYNC_CH_CTRL_SOURCESEL_MODEML (_PRS_ASYNC_CH_CTRL_SOURCESEL_MODEML << 8) 190 #define PRS_ASYNC_CH_CTRL_SOURCESEL_MODEM (_PRS_ASYNC_CH_CTRL_SOURCESEL_MODEM << 8) 191 #define PRS_ASYNC_CH_CTRL_SOURCESEL_MODEMH (_PRS_ASYNC_CH_CTRL_SOURCESEL_MODEMH << 8) 192 #define PRS_ASYNC_CH_CTRL_SOURCESEL_FRC (_PRS_ASYNC_CH_CTRL_SOURCESEL_FRC << 8) 193 #define PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMERL (_PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMERL << 8) 194 #define PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMER (_PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMER << 8) 195 #define PRS_ASYNC_CH_CTRL_SOURCESEL_RAC (_PRS_ASYNC_CH_CTRL_SOURCESEL_RAC << 8) 196 #define PRS_ASYNC_CH_CTRL_SOURCESEL_SYNTH (_PRS_ASYNC_CH_CTRL_SOURCESEL_SYNTH << 8) 197 #define PRS_ASYNC_CH_CTRL_SOURCESEL_PRORTC (_PRS_ASYNC_CH_CTRL_SOURCESEL_PRORTC << 8) 198 #define PRS_ASYNC_CH_CTRL_SOURCESEL_SYSCFG (_PRS_ASYNC_CH_CTRL_SOURCESEL_SYSCFG << 8) 199 #define PRS_ASYNC_CH_CTRL_SOURCESEL_DMEM (_PRS_ASYNC_CH_CTRL_SOURCESEL_DMEM << 8) 200 #define PRS_ASYNC_CH_CTRL_SOURCESEL_HFXO0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_HFXO0 << 8) 201 #define PRS_ASYNC_CH_CTRL_SOURCESEL_HFRCO0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_HFRCO0 << 8) 202 #define PRS_ASYNC_CH_CTRL_SOURCESEL_HFRCOEM23 (_PRS_ASYNC_CH_CTRL_SOURCESEL_HFRCOEM23 << 8) 203 #define PRS_ASYNC_CH_CTRL_SOURCESEL_EMUL (_PRS_ASYNC_CH_CTRL_SOURCESEL_EMUL << 8) 204 #define PRS_ASYNC_CH_CTRL_SOURCESEL_EMU (_PRS_ASYNC_CH_CTRL_SOURCESEL_EMU << 8) 205 #define PRS_ASYNC_CH_CTRL_SOURCESEL_LVGD (_PRS_ASYNC_CH_CTRL_SOURCESEL_LVGD << 8) 206 #define PRS_ASYNC_CH_CTRL_SOURCESEL_SE (_PRS_ASYNC_CH_CTRL_SOURCESEL_SE << 8) 207 208 /** Asynchronous signals enumeration: */ 209 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART0CS (0x00000000UL) 210 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART0IRTX (0x00000001UL) 211 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART0RTS (0x00000002UL) 212 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART0RXDATA (0x00000003UL) 213 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART0TX (0x00000004UL) 214 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART0TXC (0x00000005UL) 215 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART1CS (0x00000000UL) 216 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART1IRTX (0x00000001UL) 217 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART1RTS (0x00000002UL) 218 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART1RXDATA (0x00000003UL) 219 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART1TX (0x00000004UL) 220 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART1TXC (0x00000005UL) 221 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART2CS (0x00000000UL) 222 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART2IRTX (0x00000001UL) 223 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART2RTS (0x00000002UL) 224 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART2RXDATA (0x00000003UL) 225 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART2TX (0x00000004UL) 226 #define _PRS_ASYNC_CH_CTRL_SIGSEL_USART2TXC (0x00000005UL) 227 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF (0x00000000UL) 228 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0OF (0x00000001UL) 229 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0CC0 (0x00000002UL) 230 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0CC1 (0x00000003UL) 231 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0CC2 (0x00000004UL) 232 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1UF (0x00000000UL) 233 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1OF (0x00000001UL) 234 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1CC0 (0x00000002UL) 235 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1CC1 (0x00000003UL) 236 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1CC2 (0x00000004UL) 237 #define _PRS_ASYNC_CH_CTRL_SIGSEL_IADC0SCANENTRYDONE (0x00000000UL) 238 #define _PRS_ASYNC_CH_CTRL_SIGSEL_IADC0SCANTABLEDONE (0x00000001UL) 239 #define _PRS_ASYNC_CH_CTRL_SIGSEL_IADC0SINGLEDONE (0x00000002UL) 240 #define _PRS_ASYNC_CH_CTRL_SIGSEL_LETIMER0CH0 (0x00000000UL) 241 #define _PRS_ASYNC_CH_CTRL_SIGSEL_LETIMER0CH1 (0x00000001UL) 242 #define _PRS_ASYNC_CH_CTRL_SIGSEL_RTCCCCV0 (0x00000000UL) 243 #define _PRS_ASYNC_CH_CTRL_SIGSEL_RTCCCCV1 (0x00000001UL) 244 #define _PRS_ASYNC_CH_CTRL_SIGSEL_RTCCCCV2 (0x00000002UL) 245 #define _PRS_ASYNC_CH_CTRL_SIGSEL_BURTCCOMP (0x00000000UL) 246 #define _PRS_ASYNC_CH_CTRL_SIGSEL_BURTCOVERFLOW (0x00000001UL) 247 #define _PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN0 (0x00000000UL) 248 #define _PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN1 (0x00000001UL) 249 #define _PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN2 (0x00000002UL) 250 #define _PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN3 (0x00000003UL) 251 #define _PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN4 (0x00000004UL) 252 #define _PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN5 (0x00000005UL) 253 #define _PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN6 (0x00000006UL) 254 #define _PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN7 (0x00000007UL) 255 #define _PRS_ASYNC_CH_CTRL_SIGSEL_ACMP0OUT (0x00000000UL) 256 #define _PRS_ASYNC_CH_CTRL_SIGSEL_ACMP1OUT (0x00000000UL) 257 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2UF (0x00000000UL) 258 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2OF (0x00000001UL) 259 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2CC0 (0x00000002UL) 260 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2CC1 (0x00000003UL) 261 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2CC2 (0x00000004UL) 262 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3UF (0x00000000UL) 263 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3OF (0x00000001UL) 264 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3CC0 (0x00000002UL) 265 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3CC1 (0x00000003UL) 266 #define _PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3CC2 (0x00000004UL) 267 #define _PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT0 (0x00000000UL) 268 #define _PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT1 (0x00000001UL) 269 #define _PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT2 (0x00000002UL) 270 #define _PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT3 (0x00000003UL) 271 #define _PRS_ASYNC_CH_CTRL_SIGSEL_CMULCLKOUT0 (0x00000000UL) 272 #define _PRS_ASYNC_CH_CTRL_SIGSEL_CMULCLKOUT1 (0x00000001UL) 273 #define _PRS_ASYNC_CH_CTRL_SIGSEL_CMULCLKOUT2 (0x00000002UL) 274 #define _PRS_ASYNC_CH_CTRL_SIGSEL_AGCLCCA (0x00000000UL) 275 #define _PRS_ASYNC_CH_CTRL_SIGSEL_AGCLCCAREQ (0x00000001UL) 276 #define _PRS_ASYNC_CH_CTRL_SIGSEL_AGCLGAINADJUST (0x00000002UL) 277 #define _PRS_ASYNC_CH_CTRL_SIGSEL_AGCLGAINOK (0x00000003UL) 278 #define _PRS_ASYNC_CH_CTRL_SIGSEL_AGCLGAINREDUCED (0x00000004UL) 279 #define _PRS_ASYNC_CH_CTRL_SIGSEL_AGCLIFPKI1 (0x00000005UL) 280 #define _PRS_ASYNC_CH_CTRL_SIGSEL_AGCLIFPKQ2 (0x00000006UL) 281 #define _PRS_ASYNC_CH_CTRL_SIGSEL_AGCLIFPKRST (0x00000007UL) 282 #define _PRS_ASYNC_CH_CTRL_SIGSEL_AGCPEAKDET (0x00000000UL) 283 #define _PRS_ASYNC_CH_CTRL_SIGSEL_AGCPROPAGATED (0x00000001UL) 284 #define _PRS_ASYNC_CH_CTRL_SIGSEL_AGCRSSIDONE (0x00000002UL) 285 #define _PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR0 (0x00000000UL) 286 #define _PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR1 (0x00000001UL) 287 #define _PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR2 (0x00000002UL) 288 #define _PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR3 (0x00000003UL) 289 #define _PRS_ASYNC_CH_CTRL_SIGSEL_BUFCCNT0 (0x00000004UL) 290 #define _PRS_ASYNC_CH_CTRL_SIGSEL_BUFCCNT1 (0x00000005UL) 291 #define _PRS_ASYNC_CH_CTRL_SIGSEL_BUFCFULL (0x00000006UL) 292 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLADVANCE (0x00000000UL) 293 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLANT0 (0x00000001UL) 294 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLANT1 (0x00000002UL) 295 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLCOHDSADET (0x00000003UL) 296 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLCOHDSALIVE (0x00000004UL) 297 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLDCLK (0x00000005UL) 298 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLDOUT (0x00000006UL) 299 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLFRAMEDET (0x00000007UL) 300 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMFRAMESENT (0x00000000UL) 301 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLOWCORR (0x00000001UL) 302 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLRDSADET (0x00000002UL) 303 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLRDSALIVE (0x00000003UL) 304 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMNEWSYMBOL (0x00000004UL) 305 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMNEWWND (0x00000005UL) 306 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMPOSTPONE (0x00000006UL) 307 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMPREDET (0x00000007UL) 308 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHPRESENT (0x00000000UL) 309 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHRSSIJUMP (0x00000001UL) 310 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHSYNCSENT (0x00000002UL) 311 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHTIMDET (0x00000003UL) 312 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHWEAK (0x00000004UL) 313 #define _PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHEOF (0x00000005UL) 314 #define _PRS_ASYNC_CH_CTRL_SIGSEL_FRCDCLK (0x00000000UL) 315 #define _PRS_ASYNC_CH_CTRL_SIGSEL_FRCDOUT (0x00000001UL) 316 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLBOF (0x00000000UL) 317 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC0 (0x00000001UL) 318 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC1 (0x00000002UL) 319 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC2 (0x00000003UL) 320 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC3 (0x00000004UL) 321 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC4 (0x00000005UL) 322 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLLBTF (0x00000006UL) 323 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLLBTR (0x00000007UL) 324 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLBTS (0x00000000UL) 325 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERPOF (0x00000001UL) 326 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT0MATCH (0x00000002UL) 327 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT0UF (0x00000003UL) 328 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT1MATCH (0x00000004UL) 329 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT1UF (0x00000005UL) 330 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERWOF (0x00000006UL) 331 #define _PRS_ASYNC_CH_CTRL_SIGSEL_RACACTIVE (0x00000000UL) 332 #define _PRS_ASYNC_CH_CTRL_SIGSEL_RACLNAEN (0x00000001UL) 333 #define _PRS_ASYNC_CH_CTRL_SIGSEL_RACPAEN (0x00000002UL) 334 #define _PRS_ASYNC_CH_CTRL_SIGSEL_RACRX (0x00000003UL) 335 #define _PRS_ASYNC_CH_CTRL_SIGSEL_RACTX (0x00000004UL) 336 #define _PRS_ASYNC_CH_CTRL_SIGSEL_SYNTHMUX0 (0x00000000UL) 337 #define _PRS_ASYNC_CH_CTRL_SIGSEL_SYNTHMUX1 (0x00000001UL) 338 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PRORTCCCV0 (0x00000000UL) 339 #define _PRS_ASYNC_CH_CTRL_SIGSEL_PRORTCCCV1 (0x00000001UL) 340 341 /** Asynchronous signals enumeration aligned with register bit field: */ 342 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART0CS (_PRS_ASYNC_CH_CTRL_SIGSEL_USART0CS << 0) 343 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART0IRTX (_PRS_ASYNC_CH_CTRL_SIGSEL_USART0IRTX << 0) 344 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART0RTS (_PRS_ASYNC_CH_CTRL_SIGSEL_USART0RTS << 0) 345 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART0RXDATA (_PRS_ASYNC_CH_CTRL_SIGSEL_USART0RXDATA << 0) 346 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART0TX (_PRS_ASYNC_CH_CTRL_SIGSEL_USART0TX << 0) 347 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART0TXC (_PRS_ASYNC_CH_CTRL_SIGSEL_USART0TXC << 0) 348 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART1CS (_PRS_ASYNC_CH_CTRL_SIGSEL_USART1CS << 0) 349 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART1IRTX (_PRS_ASYNC_CH_CTRL_SIGSEL_USART1IRTX << 0) 350 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART1RTS (_PRS_ASYNC_CH_CTRL_SIGSEL_USART1RTS << 0) 351 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART1RXDATA (_PRS_ASYNC_CH_CTRL_SIGSEL_USART1RXDATA << 0) 352 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART1TX (_PRS_ASYNC_CH_CTRL_SIGSEL_USART1TX << 0) 353 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART1TXC (_PRS_ASYNC_CH_CTRL_SIGSEL_USART1TXC << 0) 354 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART2CS (_PRS_ASYNC_CH_CTRL_SIGSEL_USART2CS << 0) 355 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART2IRTX (_PRS_ASYNC_CH_CTRL_SIGSEL_USART2IRTX << 0) 356 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART2RTS (_PRS_ASYNC_CH_CTRL_SIGSEL_USART2RTS << 0) 357 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART2RXDATA (_PRS_ASYNC_CH_CTRL_SIGSEL_USART2RXDATA << 0) 358 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART2TX (_PRS_ASYNC_CH_CTRL_SIGSEL_USART2TX << 0) 359 #define PRS_ASYNC_CH_CTRL_SIGSEL_USART2TXC (_PRS_ASYNC_CH_CTRL_SIGSEL_USART2TXC << 0) 360 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF << 0) 361 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0OF (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0OF << 0) 362 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0CC0 (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0CC0 << 0) 363 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0CC1 (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0CC1 << 0) 364 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0CC2 (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0CC2 << 0) 365 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1UF (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1UF << 0) 366 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1OF (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1OF << 0) 367 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1CC0 (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1CC0 << 0) 368 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1CC1 (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1CC1 << 0) 369 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1CC2 (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1CC2 << 0) 370 #define PRS_ASYNC_CH_CTRL_SIGSEL_IADC0SCANENTRYDONE (_PRS_ASYNC_CH_CTRL_SIGSEL_IADC0SCANENTRYDONE << 0) 371 #define PRS_ASYNC_CH_CTRL_SIGSEL_IADC0SCANTABLEDONE (_PRS_ASYNC_CH_CTRL_SIGSEL_IADC0SCANTABLEDONE << 0) 372 #define PRS_ASYNC_CH_CTRL_SIGSEL_IADC0SINGLEDONE (_PRS_ASYNC_CH_CTRL_SIGSEL_IADC0SINGLEDONE << 0) 373 #define PRS_ASYNC_CH_CTRL_SIGSEL_LETIMER0CH0 (_PRS_ASYNC_CH_CTRL_SIGSEL_LETIMER0CH0 << 0) 374 #define PRS_ASYNC_CH_CTRL_SIGSEL_LETIMER0CH1 (_PRS_ASYNC_CH_CTRL_SIGSEL_LETIMER0CH1 << 0) 375 #define PRS_ASYNC_CH_CTRL_SIGSEL_RTCCCCV0 (_PRS_ASYNC_CH_CTRL_SIGSEL_RTCCCCV0 << 0) 376 #define PRS_ASYNC_CH_CTRL_SIGSEL_RTCCCCV1 (_PRS_ASYNC_CH_CTRL_SIGSEL_RTCCCCV1 << 0) 377 #define PRS_ASYNC_CH_CTRL_SIGSEL_RTCCCCV2 (_PRS_ASYNC_CH_CTRL_SIGSEL_RTCCCCV2 << 0) 378 #define PRS_ASYNC_CH_CTRL_SIGSEL_BURTCCOMP (_PRS_ASYNC_CH_CTRL_SIGSEL_BURTCCOMP << 0) 379 #define PRS_ASYNC_CH_CTRL_SIGSEL_BURTCOVERFLOW (_PRS_ASYNC_CH_CTRL_SIGSEL_BURTCOVERFLOW << 0) 380 #define PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN0 (_PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN0 << 0) 381 #define PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN1 (_PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN1 << 0) 382 #define PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN2 (_PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN2 << 0) 383 #define PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN3 (_PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN3 << 0) 384 #define PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN4 (_PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN4 << 0) 385 #define PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN5 (_PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN5 << 0) 386 #define PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN6 (_PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN6 << 0) 387 #define PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN7 (_PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN7 << 0) 388 #define PRS_ASYNC_CH_CTRL_SIGSEL_ACMP0OUT (_PRS_ASYNC_CH_CTRL_SIGSEL_ACMP0OUT << 0) 389 #define PRS_ASYNC_CH_CTRL_SIGSEL_ACMP1OUT (_PRS_ASYNC_CH_CTRL_SIGSEL_ACMP1OUT << 0) 390 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2UF (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2UF << 0) 391 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2OF (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2OF << 0) 392 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2CC0 (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2CC0 << 0) 393 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2CC1 (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2CC1 << 0) 394 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2CC2 (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2CC2 << 0) 395 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3UF (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3UF << 0) 396 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3OF (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3OF << 0) 397 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3CC0 (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3CC0 << 0) 398 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3CC1 (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3CC1 << 0) 399 #define PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3CC2 (_PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3CC2 << 0) 400 #define PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT0 (_PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT0 << 0) 401 #define PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT1 (_PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT1 << 0) 402 #define PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT2 (_PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT2 << 0) 403 #define PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT3 (_PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT3 << 0) 404 #define PRS_ASYNC_CH_CTRL_SIGSEL_CMULCLKOUT0 (_PRS_ASYNC_CH_CTRL_SIGSEL_CMULCLKOUT0 << 0) 405 #define PRS_ASYNC_CH_CTRL_SIGSEL_CMULCLKOUT1 (_PRS_ASYNC_CH_CTRL_SIGSEL_CMULCLKOUT1 << 0) 406 #define PRS_ASYNC_CH_CTRL_SIGSEL_CMULCLKOUT2 (_PRS_ASYNC_CH_CTRL_SIGSEL_CMULCLKOUT2 << 0) 407 #define PRS_ASYNC_CH_CTRL_SIGSEL_AGCLCCA (_PRS_ASYNC_CH_CTRL_SIGSEL_AGCLCCA << 0) 408 #define PRS_ASYNC_CH_CTRL_SIGSEL_AGCLCCAREQ (_PRS_ASYNC_CH_CTRL_SIGSEL_AGCLCCAREQ << 0) 409 #define PRS_ASYNC_CH_CTRL_SIGSEL_AGCLGAINADJUST (_PRS_ASYNC_CH_CTRL_SIGSEL_AGCLGAINADJUST << 0) 410 #define PRS_ASYNC_CH_CTRL_SIGSEL_AGCLGAINOK (_PRS_ASYNC_CH_CTRL_SIGSEL_AGCLGAINOK << 0) 411 #define PRS_ASYNC_CH_CTRL_SIGSEL_AGCLGAINREDUCED (_PRS_ASYNC_CH_CTRL_SIGSEL_AGCLGAINREDUCED << 0) 412 #define PRS_ASYNC_CH_CTRL_SIGSEL_AGCLIFPKI1 (_PRS_ASYNC_CH_CTRL_SIGSEL_AGCLIFPKI1 << 0) 413 #define PRS_ASYNC_CH_CTRL_SIGSEL_AGCLIFPKQ2 (_PRS_ASYNC_CH_CTRL_SIGSEL_AGCLIFPKQ2 << 0) 414 #define PRS_ASYNC_CH_CTRL_SIGSEL_AGCLIFPKRST (_PRS_ASYNC_CH_CTRL_SIGSEL_AGCLIFPKRST << 0) 415 #define PRS_ASYNC_CH_CTRL_SIGSEL_AGCPEAKDET (_PRS_ASYNC_CH_CTRL_SIGSEL_AGCPEAKDET << 0) 416 #define PRS_ASYNC_CH_CTRL_SIGSEL_AGCPROPAGATED (_PRS_ASYNC_CH_CTRL_SIGSEL_AGCPROPAGATED << 0) 417 #define PRS_ASYNC_CH_CTRL_SIGSEL_AGCRSSIDONE (_PRS_ASYNC_CH_CTRL_SIGSEL_AGCRSSIDONE << 0) 418 #define PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR0 (_PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR0 << 0) 419 #define PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR1 (_PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR1 << 0) 420 #define PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR2 (_PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR2 << 0) 421 #define PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR3 (_PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR3 << 0) 422 #define PRS_ASYNC_CH_CTRL_SIGSEL_BUFCCNT0 (_PRS_ASYNC_CH_CTRL_SIGSEL_BUFCCNT0 << 0) 423 #define PRS_ASYNC_CH_CTRL_SIGSEL_BUFCCNT1 (_PRS_ASYNC_CH_CTRL_SIGSEL_BUFCCNT1 << 0) 424 #define PRS_ASYNC_CH_CTRL_SIGSEL_BUFCFULL (_PRS_ASYNC_CH_CTRL_SIGSEL_BUFCFULL << 0) 425 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLADVANCE (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLADVANCE << 0) 426 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLANT0 (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLANT0 << 0) 427 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLANT1 (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLANT1 << 0) 428 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLCOHDSADET (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLCOHDSADET << 0) 429 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLCOHDSALIVE (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLCOHDSALIVE << 0) 430 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLDCLK (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLDCLK << 0) 431 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLDOUT (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLDOUT << 0) 432 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLFRAMEDET (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLFRAMEDET << 0) 433 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMFRAMESENT (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMFRAMESENT << 0) 434 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLOWCORR (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLOWCORR << 0) 435 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLRDSADET (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLRDSADET << 0) 436 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLRDSALIVE (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLRDSALIVE << 0) 437 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMNEWSYMBOL (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMNEWSYMBOL << 0) 438 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMNEWWND (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMNEWWND << 0) 439 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMPOSTPONE (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMPOSTPONE << 0) 440 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMPREDET (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMPREDET << 0) 441 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHPRESENT (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHPRESENT << 0) 442 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHRSSIJUMP (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHRSSIJUMP << 0) 443 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHSYNCSENT (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHSYNCSENT << 0) 444 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHTIMDET (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHTIMDET << 0) 445 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHWEAK (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHWEAK << 0) 446 #define PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHEOF (_PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHEOF << 0) 447 #define PRS_ASYNC_CH_CTRL_SIGSEL_FRCDCLK (_PRS_ASYNC_CH_CTRL_SIGSEL_FRCDCLK << 0) 448 #define PRS_ASYNC_CH_CTRL_SIGSEL_FRCDOUT (_PRS_ASYNC_CH_CTRL_SIGSEL_FRCDOUT << 0) 449 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLBOF (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLBOF << 0) 450 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC0 (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC0 << 0) 451 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC1 (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC1 << 0) 452 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC2 (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC2 << 0) 453 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC3 (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC3 << 0) 454 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC4 (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC4 << 0) 455 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLLBTF (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLLBTF << 0) 456 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLLBTR (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLLBTR << 0) 457 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLBTS (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLBTS << 0) 458 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERPOF (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERPOF << 0) 459 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT0MATCH (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT0MATCH << 0) 460 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT0UF (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT0UF << 0) 461 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT1MATCH (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT1MATCH << 0) 462 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT1UF (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT1UF << 0) 463 #define PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERWOF (_PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERWOF << 0) 464 #define PRS_ASYNC_CH_CTRL_SIGSEL_RACACTIVE (_PRS_ASYNC_CH_CTRL_SIGSEL_RACACTIVE << 0) 465 #define PRS_ASYNC_CH_CTRL_SIGSEL_RACLNAEN (_PRS_ASYNC_CH_CTRL_SIGSEL_RACLNAEN << 0) 466 #define PRS_ASYNC_CH_CTRL_SIGSEL_RACPAEN (_PRS_ASYNC_CH_CTRL_SIGSEL_RACPAEN << 0) 467 #define PRS_ASYNC_CH_CTRL_SIGSEL_RACRX (_PRS_ASYNC_CH_CTRL_SIGSEL_RACRX << 0) 468 #define PRS_ASYNC_CH_CTRL_SIGSEL_RACTX (_PRS_ASYNC_CH_CTRL_SIGSEL_RACTX << 0) 469 #define PRS_ASYNC_CH_CTRL_SIGSEL_SYNTHMUX0 (_PRS_ASYNC_CH_CTRL_SIGSEL_SYNTHMUX0 << 0) 470 #define PRS_ASYNC_CH_CTRL_SIGSEL_SYNTHMUX1 (_PRS_ASYNC_CH_CTRL_SIGSEL_SYNTHMUX1 << 0) 471 #define PRS_ASYNC_CH_CTRL_SIGSEL_PRORTCCCV0 (_PRS_ASYNC_CH_CTRL_SIGSEL_PRORTCCCV0 << 0) 472 #define PRS_ASYNC_CH_CTRL_SIGSEL_PRORTCCCV1 (_PRS_ASYNC_CH_CTRL_SIGSEL_PRORTCCCV1 << 0) 473 474 /** Asynchronous signals and sources combined and aligned with register bit fields: */ 475 #define PRS_ASYNC_USART0_CS (PRS_ASYNC_CH_CTRL_SOURCESEL_USART0 | PRS_ASYNC_CH_CTRL_SIGSEL_USART0CS) 476 #define PRS_ASYNC_USART0_IRTX (PRS_ASYNC_CH_CTRL_SOURCESEL_USART0 | PRS_ASYNC_CH_CTRL_SIGSEL_USART0IRTX) 477 #define PRS_ASYNC_USART0_RTS (PRS_ASYNC_CH_CTRL_SOURCESEL_USART0 | PRS_ASYNC_CH_CTRL_SIGSEL_USART0RTS) 478 #define PRS_ASYNC_USART0_RXDATA (PRS_ASYNC_CH_CTRL_SOURCESEL_USART0 | PRS_ASYNC_CH_CTRL_SIGSEL_USART0RXDATA) 479 #define PRS_ASYNC_USART0_TX (PRS_ASYNC_CH_CTRL_SOURCESEL_USART0 | PRS_ASYNC_CH_CTRL_SIGSEL_USART0TX) 480 #define PRS_ASYNC_USART0_TXC (PRS_ASYNC_CH_CTRL_SOURCESEL_USART0 | PRS_ASYNC_CH_CTRL_SIGSEL_USART0TXC) 481 #define PRS_ASYNC_USART1_CS (PRS_ASYNC_CH_CTRL_SOURCESEL_USART1 | PRS_ASYNC_CH_CTRL_SIGSEL_USART1CS) 482 #define PRS_ASYNC_USART1_IRTX (PRS_ASYNC_CH_CTRL_SOURCESEL_USART1 | PRS_ASYNC_CH_CTRL_SIGSEL_USART1IRTX) 483 #define PRS_ASYNC_USART1_RTS (PRS_ASYNC_CH_CTRL_SOURCESEL_USART1 | PRS_ASYNC_CH_CTRL_SIGSEL_USART1RTS) 484 #define PRS_ASYNC_USART1_RXDATA (PRS_ASYNC_CH_CTRL_SOURCESEL_USART1 | PRS_ASYNC_CH_CTRL_SIGSEL_USART1RXDATA) 485 #define PRS_ASYNC_USART1_TX (PRS_ASYNC_CH_CTRL_SOURCESEL_USART1 | PRS_ASYNC_CH_CTRL_SIGSEL_USART1TX) 486 #define PRS_ASYNC_USART1_TXC (PRS_ASYNC_CH_CTRL_SOURCESEL_USART1 | PRS_ASYNC_CH_CTRL_SIGSEL_USART1TXC) 487 #define PRS_ASYNC_USART2_CS (PRS_ASYNC_CH_CTRL_SOURCESEL_USART2 | PRS_ASYNC_CH_CTRL_SIGSEL_USART2CS) 488 #define PRS_ASYNC_USART2_IRTX (PRS_ASYNC_CH_CTRL_SOURCESEL_USART2 | PRS_ASYNC_CH_CTRL_SIGSEL_USART2IRTX) 489 #define PRS_ASYNC_USART2_RTS (PRS_ASYNC_CH_CTRL_SOURCESEL_USART2 | PRS_ASYNC_CH_CTRL_SIGSEL_USART2RTS) 490 #define PRS_ASYNC_USART2_RXDATA (PRS_ASYNC_CH_CTRL_SOURCESEL_USART2 | PRS_ASYNC_CH_CTRL_SIGSEL_USART2RXDATA) 491 #define PRS_ASYNC_USART2_TX (PRS_ASYNC_CH_CTRL_SOURCESEL_USART2 | PRS_ASYNC_CH_CTRL_SIGSEL_USART2TX) 492 #define PRS_ASYNC_USART2_TXC (PRS_ASYNC_CH_CTRL_SOURCESEL_USART2 | PRS_ASYNC_CH_CTRL_SIGSEL_USART2TXC) 493 #define PRS_ASYNC_TIMER0_UF (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0UF) 494 #define PRS_ASYNC_TIMER0_OF (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0OF) 495 #define PRS_ASYNC_TIMER0_CC0 (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0CC0) 496 #define PRS_ASYNC_TIMER0_CC1 (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0CC1) 497 #define PRS_ASYNC_TIMER0_CC2 (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER0CC2) 498 #define PRS_ASYNC_TIMER1_UF (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1UF) 499 #define PRS_ASYNC_TIMER1_OF (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1OF) 500 #define PRS_ASYNC_TIMER1_CC0 (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1CC0) 501 #define PRS_ASYNC_TIMER1_CC1 (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1CC1) 502 #define PRS_ASYNC_TIMER1_CC2 (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER1CC2) 503 #define PRS_ASYNC_IADC0_SCANENTRYDONE (PRS_ASYNC_CH_CTRL_SOURCESEL_IADC0 | PRS_ASYNC_CH_CTRL_SIGSEL_IADC0SCANENTRYDONE) 504 #define PRS_ASYNC_IADC0_SCANTABLEDONE (PRS_ASYNC_CH_CTRL_SOURCESEL_IADC0 | PRS_ASYNC_CH_CTRL_SIGSEL_IADC0SCANTABLEDONE) 505 #define PRS_ASYNC_IADC0_SINGLEDONE (PRS_ASYNC_CH_CTRL_SOURCESEL_IADC0 | PRS_ASYNC_CH_CTRL_SIGSEL_IADC0SINGLEDONE) 506 #define PRS_ASYNC_LETIMER0_CH0 (PRS_ASYNC_CH_CTRL_SOURCESEL_LETIMER0 | PRS_ASYNC_CH_CTRL_SIGSEL_LETIMER0CH0) 507 #define PRS_ASYNC_LETIMER0_CH1 (PRS_ASYNC_CH_CTRL_SOURCESEL_LETIMER0 | PRS_ASYNC_CH_CTRL_SIGSEL_LETIMER0CH1) 508 #define PRS_ASYNC_RTCC_CCV0 (PRS_ASYNC_CH_CTRL_SOURCESEL_RTCC | PRS_ASYNC_CH_CTRL_SIGSEL_RTCCCCV0) 509 #define PRS_ASYNC_RTCC_CCV1 (PRS_ASYNC_CH_CTRL_SOURCESEL_RTCC | PRS_ASYNC_CH_CTRL_SIGSEL_RTCCCCV1) 510 #define PRS_ASYNC_RTCC_CCV2 (PRS_ASYNC_CH_CTRL_SOURCESEL_RTCC | PRS_ASYNC_CH_CTRL_SIGSEL_RTCCCCV2) 511 #define PRS_ASYNC_BURTC_COMP (PRS_ASYNC_CH_CTRL_SOURCESEL_BURTC | PRS_ASYNC_CH_CTRL_SIGSEL_BURTCCOMP) 512 #define PRS_ASYNC_BURTC_OVERFLOW (PRS_ASYNC_CH_CTRL_SOURCESEL_BURTC | PRS_ASYNC_CH_CTRL_SIGSEL_BURTCOVERFLOW) 513 #define PRS_ASYNC_GPIO_PIN0 (PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO | PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN0) 514 #define PRS_ASYNC_GPIO_PIN1 (PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO | PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN1) 515 #define PRS_ASYNC_GPIO_PIN2 (PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO | PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN2) 516 #define PRS_ASYNC_GPIO_PIN3 (PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO | PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN3) 517 #define PRS_ASYNC_GPIO_PIN4 (PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO | PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN4) 518 #define PRS_ASYNC_GPIO_PIN5 (PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO | PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN5) 519 #define PRS_ASYNC_GPIO_PIN6 (PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO | PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN6) 520 #define PRS_ASYNC_GPIO_PIN7 (PRS_ASYNC_CH_CTRL_SOURCESEL_GPIO | PRS_ASYNC_CH_CTRL_SIGSEL_GPIOPIN7) 521 #define PRS_ASYNC_ACMP0_OUT (PRS_ASYNC_CH_CTRL_SOURCESEL_ACMP0 | PRS_ASYNC_CH_CTRL_SIGSEL_ACMP0OUT) 522 #define PRS_ASYNC_ACMP1_OUT (PRS_ASYNC_CH_CTRL_SOURCESEL_ACMP1 | PRS_ASYNC_CH_CTRL_SIGSEL_ACMP1OUT) 523 #define PRS_ASYNC_TIMER2_UF (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER2 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2UF) 524 #define PRS_ASYNC_TIMER2_OF (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER2 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2OF) 525 #define PRS_ASYNC_TIMER2_CC0 (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER2 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2CC0) 526 #define PRS_ASYNC_TIMER2_CC1 (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER2 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2CC1) 527 #define PRS_ASYNC_TIMER2_CC2 (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER2 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER2CC2) 528 #define PRS_ASYNC_TIMER3_UF (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER3 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3UF) 529 #define PRS_ASYNC_TIMER3_OF (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER3 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3OF) 530 #define PRS_ASYNC_TIMER3_CC0 (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER3 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3CC0) 531 #define PRS_ASYNC_TIMER3_CC1 (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER3 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3CC1) 532 #define PRS_ASYNC_TIMER3_CC2 (PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER3 | PRS_ASYNC_CH_CTRL_SIGSEL_TIMER3CC2) 533 #define PRS_ASYNC_CORE_CTIOUT0 (PRS_ASYNC_CH_CTRL_SOURCESEL_CORE | PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT0) 534 #define PRS_ASYNC_CORE_CTIOUT1 (PRS_ASYNC_CH_CTRL_SOURCESEL_CORE | PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT1) 535 #define PRS_ASYNC_CORE_CTIOUT2 (PRS_ASYNC_CH_CTRL_SOURCESEL_CORE | PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT2) 536 #define PRS_ASYNC_CORE_CTIOUT3 (PRS_ASYNC_CH_CTRL_SOURCESEL_CORE | PRS_ASYNC_CH_CTRL_SIGSEL_CORECTIOUT3) 537 #define PRS_ASYNC_CMUL_CLKOUT0 (PRS_ASYNC_CH_CTRL_SOURCESEL_CMUL | PRS_ASYNC_CH_CTRL_SIGSEL_CMULCLKOUT0) 538 #define PRS_ASYNC_CMUL_CLKOUT1 (PRS_ASYNC_CH_CTRL_SOURCESEL_CMUL | PRS_ASYNC_CH_CTRL_SIGSEL_CMULCLKOUT1) 539 #define PRS_ASYNC_CMUL_CLKOUT2 (PRS_ASYNC_CH_CTRL_SOURCESEL_CMUL | PRS_ASYNC_CH_CTRL_SIGSEL_CMULCLKOUT2) 540 #define PRS_ASYNC_AGCL_CCA (PRS_ASYNC_CH_CTRL_SOURCESEL_AGCL | PRS_ASYNC_CH_CTRL_SIGSEL_AGCLCCA) 541 #define PRS_ASYNC_AGCL_CCAREQ (PRS_ASYNC_CH_CTRL_SOURCESEL_AGCL | PRS_ASYNC_CH_CTRL_SIGSEL_AGCLCCAREQ) 542 #define PRS_ASYNC_AGCL_GAINADJUST (PRS_ASYNC_CH_CTRL_SOURCESEL_AGCL | PRS_ASYNC_CH_CTRL_SIGSEL_AGCLGAINADJUST) 543 #define PRS_ASYNC_AGCL_GAINOK (PRS_ASYNC_CH_CTRL_SOURCESEL_AGCL | PRS_ASYNC_CH_CTRL_SIGSEL_AGCLGAINOK) 544 #define PRS_ASYNC_AGCL_GAINREDUCED (PRS_ASYNC_CH_CTRL_SOURCESEL_AGCL | PRS_ASYNC_CH_CTRL_SIGSEL_AGCLGAINREDUCED) 545 #define PRS_ASYNC_AGCL_IFPKI1 (PRS_ASYNC_CH_CTRL_SOURCESEL_AGCL | PRS_ASYNC_CH_CTRL_SIGSEL_AGCLIFPKI1) 546 #define PRS_ASYNC_AGCL_IFPKQ2 (PRS_ASYNC_CH_CTRL_SOURCESEL_AGCL | PRS_ASYNC_CH_CTRL_SIGSEL_AGCLIFPKQ2) 547 #define PRS_ASYNC_AGCL_IFPKRST (PRS_ASYNC_CH_CTRL_SOURCESEL_AGCL | PRS_ASYNC_CH_CTRL_SIGSEL_AGCLIFPKRST) 548 #define PRS_ASYNC_AGC_PEAKDET (PRS_ASYNC_CH_CTRL_SOURCESEL_AGC | PRS_ASYNC_CH_CTRL_SIGSEL_AGCPEAKDET) 549 #define PRS_ASYNC_AGC_PROPAGATED (PRS_ASYNC_CH_CTRL_SOURCESEL_AGC | PRS_ASYNC_CH_CTRL_SIGSEL_AGCPROPAGATED) 550 #define PRS_ASYNC_AGC_RSSIDONE (PRS_ASYNC_CH_CTRL_SOURCESEL_AGC | PRS_ASYNC_CH_CTRL_SIGSEL_AGCRSSIDONE) 551 #define PRS_ASYNC_BUFC_THR0 (PRS_ASYNC_CH_CTRL_SOURCESEL_BUFC | PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR0) 552 #define PRS_ASYNC_BUFC_THR1 (PRS_ASYNC_CH_CTRL_SOURCESEL_BUFC | PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR1) 553 #define PRS_ASYNC_BUFC_THR2 (PRS_ASYNC_CH_CTRL_SOURCESEL_BUFC | PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR2) 554 #define PRS_ASYNC_BUFC_THR3 (PRS_ASYNC_CH_CTRL_SOURCESEL_BUFC | PRS_ASYNC_CH_CTRL_SIGSEL_BUFCTHR3) 555 #define PRS_ASYNC_BUFC_CNT0 (PRS_ASYNC_CH_CTRL_SOURCESEL_BUFC | PRS_ASYNC_CH_CTRL_SIGSEL_BUFCCNT0) 556 #define PRS_ASYNC_BUFC_CNT1 (PRS_ASYNC_CH_CTRL_SOURCESEL_BUFC | PRS_ASYNC_CH_CTRL_SIGSEL_BUFCCNT1) 557 #define PRS_ASYNC_BUFC_FULL (PRS_ASYNC_CH_CTRL_SOURCESEL_BUFC | PRS_ASYNC_CH_CTRL_SIGSEL_BUFCFULL) 558 #define PRS_ASYNC_MODEML_ADVANCE (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEML | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLADVANCE) 559 #define PRS_ASYNC_MODEML_ANT0 (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEML | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLANT0) 560 #define PRS_ASYNC_MODEML_ANT1 (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEML | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLANT1) 561 #define PRS_ASYNC_MODEML_COHDSADET (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEML | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLCOHDSADET) 562 #define PRS_ASYNC_MODEML_COHDSALIVE (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEML | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLCOHDSALIVE) 563 #define PRS_ASYNC_MODEML_DCLK (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEML | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLDCLK) 564 #define PRS_ASYNC_MODEML_DOUT (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEML | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLDOUT) 565 #define PRS_ASYNC_MODEML_FRAMEDET (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEML | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLFRAMEDET) 566 #define PRS_ASYNC_MODEM_FRAMESENT (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEM | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMFRAMESENT) 567 #define PRS_ASYNC_MODEM_LOWCORR (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEM | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLOWCORR) 568 #define PRS_ASYNC_MODEM_LRDSADET (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEM | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLRDSADET) 569 #define PRS_ASYNC_MODEM_LRDSALIVE (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEM | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMLRDSALIVE) 570 #define PRS_ASYNC_MODEM_NEWSYMBOL (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEM | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMNEWSYMBOL) 571 #define PRS_ASYNC_MODEM_NEWWND (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEM | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMNEWWND) 572 #define PRS_ASYNC_MODEM_POSTPONE (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEM | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMPOSTPONE) 573 #define PRS_ASYNC_MODEM_PREDET (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEM | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMPREDET) 574 #define PRS_ASYNC_MODEMH_PRESENT (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEMH | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHPRESENT) 575 #define PRS_ASYNC_MODEMH_RSSIJUMP (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEMH | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHRSSIJUMP) 576 #define PRS_ASYNC_MODEMH_SYNCSENT (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEMH | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHSYNCSENT) 577 #define PRS_ASYNC_MODEMH_TIMDET (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEMH | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHTIMDET) 578 #define PRS_ASYNC_MODEMH_WEAK (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEMH | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHWEAK) 579 #define PRS_ASYNC_MODEMH_EOF (PRS_ASYNC_CH_CTRL_SOURCESEL_MODEMH | PRS_ASYNC_CH_CTRL_SIGSEL_MODEMHEOF) 580 #define PRS_ASYNC_FRC_DCLK (PRS_ASYNC_CH_CTRL_SOURCESEL_FRC | PRS_ASYNC_CH_CTRL_SIGSEL_FRCDCLK) 581 #define PRS_ASYNC_FRC_DOUT (PRS_ASYNC_CH_CTRL_SOURCESEL_FRC | PRS_ASYNC_CH_CTRL_SIGSEL_FRCDOUT) 582 #define PRS_ASYNC_PROTIMERL_BOF (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMERL | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLBOF) 583 #define PRS_ASYNC_PROTIMERL_CC0 (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMERL | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC0) 584 #define PRS_ASYNC_PROTIMERL_CC1 (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMERL | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC1) 585 #define PRS_ASYNC_PROTIMERL_CC2 (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMERL | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC2) 586 #define PRS_ASYNC_PROTIMERL_CC3 (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMERL | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC3) 587 #define PRS_ASYNC_PROTIMERL_CC4 (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMERL | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLCC4) 588 #define PRS_ASYNC_PROTIMERL_LBTF (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMERL | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLLBTF) 589 #define PRS_ASYNC_PROTIMERL_LBTR (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMERL | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLLBTR) 590 #define PRS_ASYNC_PROTIMER_LBTS (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMER | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERLBTS) 591 #define PRS_ASYNC_PROTIMER_POF (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMER | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERPOF) 592 #define PRS_ASYNC_PROTIMER_T0MATCH (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMER | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT0MATCH) 593 #define PRS_ASYNC_PROTIMER_T0UF (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMER | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT0UF) 594 #define PRS_ASYNC_PROTIMER_T1MATCH (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMER | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT1MATCH) 595 #define PRS_ASYNC_PROTIMER_T1UF (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMER | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERT1UF) 596 #define PRS_ASYNC_PROTIMER_WOF (PRS_ASYNC_CH_CTRL_SOURCESEL_PROTIMER | PRS_ASYNC_CH_CTRL_SIGSEL_PROTIMERWOF) 597 #define PRS_ASYNC_RAC_ACTIVE (PRS_ASYNC_CH_CTRL_SOURCESEL_RAC | PRS_ASYNC_CH_CTRL_SIGSEL_RACACTIVE) 598 #define PRS_ASYNC_RAC_LNAEN (PRS_ASYNC_CH_CTRL_SOURCESEL_RAC | PRS_ASYNC_CH_CTRL_SIGSEL_RACLNAEN) 599 #define PRS_ASYNC_RAC_PAEN (PRS_ASYNC_CH_CTRL_SOURCESEL_RAC | PRS_ASYNC_CH_CTRL_SIGSEL_RACPAEN) 600 #define PRS_ASYNC_RAC_RX (PRS_ASYNC_CH_CTRL_SOURCESEL_RAC | PRS_ASYNC_CH_CTRL_SIGSEL_RACRX) 601 #define PRS_ASYNC_RAC_TX (PRS_ASYNC_CH_CTRL_SOURCESEL_RAC | PRS_ASYNC_CH_CTRL_SIGSEL_RACTX) 602 #define PRS_ASYNC_SYNTH_MUX0 (PRS_ASYNC_CH_CTRL_SOURCESEL_SYNTH | PRS_ASYNC_CH_CTRL_SIGSEL_SYNTHMUX0) 603 #define PRS_ASYNC_SYNTH_MUX1 (PRS_ASYNC_CH_CTRL_SOURCESEL_SYNTH | PRS_ASYNC_CH_CTRL_SIGSEL_SYNTHMUX1) 604 #define PRS_ASYNC_PRORTC_CCV0 (PRS_ASYNC_CH_CTRL_SOURCESEL_PRORTC | PRS_ASYNC_CH_CTRL_SIGSEL_PRORTCCCV0) 605 #define PRS_ASYNC_PRORTC_CCV1 (PRS_ASYNC_CH_CTRL_SOURCESEL_PRORTC | PRS_ASYNC_CH_CTRL_SIGSEL_PRORTCCCV1) 606 607 /** 608 * Asynchronous signals and sources combined and aligned with register bit fields 609 * without the '_ASYNCH_' infix in order for backward compatibility: 610 */ 611 #define PRS_USART0_CS (PRS_ASYNC_USART0_CS) 612 #define PRS_USART0_IRTX (PRS_ASYNC_USART0_IRTX) 613 #define PRS_USART0_RTS (PRS_ASYNC_USART0_RTS) 614 #define PRS_USART0_RXDATA (PRS_ASYNC_USART0_RXDATA) 615 #define PRS_USART0_TX (PRS_ASYNC_USART0_TX) 616 #define PRS_USART0_TXC (PRS_ASYNC_USART0_TXC) 617 #define PRS_USART1_CS (PRS_ASYNC_USART1_CS) 618 #define PRS_USART1_IRTX (PRS_ASYNC_USART1_IRTX) 619 #define PRS_USART1_RTS (PRS_ASYNC_USART1_RTS) 620 #define PRS_USART1_RXDATA (PRS_ASYNC_USART1_RXDATA) 621 #define PRS_USART1_TX (PRS_ASYNC_USART1_TX) 622 #define PRS_USART1_TXC (PRS_ASYNC_USART1_TXC) 623 #define PRS_USART2_CS (PRS_ASYNC_USART2_CS) 624 #define PRS_USART2_IRTX (PRS_ASYNC_USART2_IRTX) 625 #define PRS_USART2_RTS (PRS_ASYNC_USART2_RTS) 626 #define PRS_USART2_RXDATA (PRS_ASYNC_USART2_RXDATA) 627 #define PRS_USART2_TX (PRS_ASYNC_USART2_TX) 628 #define PRS_USART2_TXC (PRS_ASYNC_USART2_TXC) 629 #define PRS_TIMER0_UF (PRS_ASYNC_TIMER0_UF) 630 #define PRS_TIMER0_OF (PRS_ASYNC_TIMER0_OF) 631 #define PRS_TIMER0_CC0 (PRS_ASYNC_TIMER0_CC0) 632 #define PRS_TIMER0_CC1 (PRS_ASYNC_TIMER0_CC1) 633 #define PRS_TIMER0_CC2 (PRS_ASYNC_TIMER0_CC2) 634 #define PRS_TIMER1_UF (PRS_ASYNC_TIMER1_UF) 635 #define PRS_TIMER1_OF (PRS_ASYNC_TIMER1_OF) 636 #define PRS_TIMER1_CC0 (PRS_ASYNC_TIMER1_CC0) 637 #define PRS_TIMER1_CC1 (PRS_ASYNC_TIMER1_CC1) 638 #define PRS_TIMER1_CC2 (PRS_ASYNC_TIMER1_CC2) 639 #define PRS_IADC0_SCANENTRYDONE (PRS_ASYNC_IADC0_SCANENTRYDONE) 640 #define PRS_IADC0_SCANTABLEDONE (PRS_ASYNC_IADC0_SCANTABLEDONE) 641 #define PRS_IADC0_SINGLEDONE (PRS_ASYNC_IADC0_SINGLEDONE) 642 #define PRS_LETIMER0_CH0 (PRS_ASYNC_LETIMER0_CH0) 643 #define PRS_LETIMER0_CH1 (PRS_ASYNC_LETIMER0_CH1) 644 #define PRS_RTCC_CCV0 (PRS_ASYNC_RTCC_CCV0) 645 #define PRS_RTCC_CCV1 (PRS_ASYNC_RTCC_CCV1) 646 #define PRS_RTCC_CCV2 (PRS_ASYNC_RTCC_CCV2) 647 #define PRS_BURTC_COMP (PRS_ASYNC_BURTC_COMP) 648 #define PRS_BURTC_OVERFLOW (PRS_ASYNC_BURTC_OVERFLOW) 649 #define PRS_GPIO_PIN0 (PRS_ASYNC_GPIO_PIN0) 650 #define PRS_GPIO_PIN1 (PRS_ASYNC_GPIO_PIN1) 651 #define PRS_GPIO_PIN2 (PRS_ASYNC_GPIO_PIN2) 652 #define PRS_GPIO_PIN3 (PRS_ASYNC_GPIO_PIN3) 653 #define PRS_GPIO_PIN4 (PRS_ASYNC_GPIO_PIN4) 654 #define PRS_GPIO_PIN5 (PRS_ASYNC_GPIO_PIN5) 655 #define PRS_GPIO_PIN6 (PRS_ASYNC_GPIO_PIN6) 656 #define PRS_GPIO_PIN7 (PRS_ASYNC_GPIO_PIN7) 657 #define PRS_ACMP0_OUT (PRS_ASYNC_ACMP0_OUT) 658 #define PRS_ACMP1_OUT (PRS_ASYNC_ACMP1_OUT) 659 #define PRS_TIMER2_UF (PRS_ASYNC_TIMER2_UF) 660 #define PRS_TIMER2_OF (PRS_ASYNC_TIMER2_OF) 661 #define PRS_TIMER2_CC0 (PRS_ASYNC_TIMER2_CC0) 662 #define PRS_TIMER2_CC1 (PRS_ASYNC_TIMER2_CC1) 663 #define PRS_TIMER2_CC2 (PRS_ASYNC_TIMER2_CC2) 664 #define PRS_TIMER3_UF (PRS_ASYNC_TIMER3_UF) 665 #define PRS_TIMER3_OF (PRS_ASYNC_TIMER3_OF) 666 #define PRS_TIMER3_CC0 (PRS_ASYNC_TIMER3_CC0) 667 #define PRS_TIMER3_CC1 (PRS_ASYNC_TIMER3_CC1) 668 #define PRS_TIMER3_CC2 (PRS_ASYNC_TIMER3_CC2) 669 #define PRS_CORE_CTIOUT0 (PRS_ASYNC_CORE_CTIOUT0) 670 #define PRS_CORE_CTIOUT1 (PRS_ASYNC_CORE_CTIOUT1) 671 #define PRS_CORE_CTIOUT2 (PRS_ASYNC_CORE_CTIOUT2) 672 #define PRS_CORE_CTIOUT3 (PRS_ASYNC_CORE_CTIOUT3) 673 #define PRS_CMUL_CLKOUT0 (PRS_ASYNC_CMUL_CLKOUT0) 674 #define PRS_CMUL_CLKOUT1 (PRS_ASYNC_CMUL_CLKOUT1) 675 #define PRS_CMUL_CLKOUT2 (PRS_ASYNC_CMUL_CLKOUT2) 676 #define PRS_AGCL_CCA (PRS_ASYNC_AGCL_CCA) 677 #define PRS_AGCL_CCAREQ (PRS_ASYNC_AGCL_CCAREQ) 678 #define PRS_AGCL_GAINADJUST (PRS_ASYNC_AGCL_GAINADJUST) 679 #define PRS_AGCL_GAINOK (PRS_ASYNC_AGCL_GAINOK) 680 #define PRS_AGCL_GAINREDUCED (PRS_ASYNC_AGCL_GAINREDUCED) 681 #define PRS_AGCL_IFPKI1 (PRS_ASYNC_AGCL_IFPKI1) 682 #define PRS_AGCL_IFPKQ2 (PRS_ASYNC_AGCL_IFPKQ2) 683 #define PRS_AGCL_IFPKRST (PRS_ASYNC_AGCL_IFPKRST) 684 #define PRS_AGC_PEAKDET (PRS_ASYNC_AGC_PEAKDET) 685 #define PRS_AGC_PROPAGATED (PRS_ASYNC_AGC_PROPAGATED) 686 #define PRS_AGC_RSSIDONE (PRS_ASYNC_AGC_RSSIDONE) 687 #define PRS_BUFC_THR0 (PRS_ASYNC_BUFC_THR0) 688 #define PRS_BUFC_THR1 (PRS_ASYNC_BUFC_THR1) 689 #define PRS_BUFC_THR2 (PRS_ASYNC_BUFC_THR2) 690 #define PRS_BUFC_THR3 (PRS_ASYNC_BUFC_THR3) 691 #define PRS_BUFC_CNT0 (PRS_ASYNC_BUFC_CNT0) 692 #define PRS_BUFC_CNT1 (PRS_ASYNC_BUFC_CNT1) 693 #define PRS_BUFC_FULL (PRS_ASYNC_BUFC_FULL) 694 #define PRS_MODEML_ADVANCE (PRS_ASYNC_MODEML_ADVANCE) 695 #define PRS_MODEML_ANT0 (PRS_ASYNC_MODEML_ANT0) 696 #define PRS_MODEML_ANT1 (PRS_ASYNC_MODEML_ANT1) 697 #define PRS_MODEML_COHDSADET (PRS_ASYNC_MODEML_COHDSADET) 698 #define PRS_MODEML_COHDSALIVE (PRS_ASYNC_MODEML_COHDSALIVE) 699 #define PRS_MODEML_DCLK (PRS_ASYNC_MODEML_DCLK) 700 #define PRS_MODEML_DOUT (PRS_ASYNC_MODEML_DOUT) 701 #define PRS_MODEML_FRAMEDET (PRS_ASYNC_MODEML_FRAMEDET) 702 #define PRS_MODEM_FRAMESENT (PRS_ASYNC_MODEM_FRAMESENT) 703 #define PRS_MODEM_LOWCORR (PRS_ASYNC_MODEM_LOWCORR) 704 #define PRS_MODEM_LRDSADET (PRS_ASYNC_MODEM_LRDSADET) 705 #define PRS_MODEM_LRDSALIVE (PRS_ASYNC_MODEM_LRDSALIVE) 706 #define PRS_MODEM_NEWSYMBOL (PRS_ASYNC_MODEM_NEWSYMBOL) 707 #define PRS_MODEM_NEWWND (PRS_ASYNC_MODEM_NEWWND) 708 #define PRS_MODEM_POSTPONE (PRS_ASYNC_MODEM_POSTPONE) 709 #define PRS_MODEM_PREDET (PRS_ASYNC_MODEM_PREDET) 710 #define PRS_MODEMH_PRESENT (PRS_ASYNC_MODEMH_PRESENT) 711 #define PRS_MODEMH_RSSIJUMP (PRS_ASYNC_MODEMH_RSSIJUMP) 712 #define PRS_MODEMH_SYNCSENT (PRS_ASYNC_MODEMH_SYNCSENT) 713 #define PRS_MODEMH_TIMDET (PRS_ASYNC_MODEMH_TIMDET) 714 #define PRS_MODEMH_WEAK (PRS_ASYNC_MODEMH_WEAK) 715 #define PRS_MODEMH_EOF (PRS_ASYNC_MODEMH_EOF) 716 #define PRS_FRC_DCLK (PRS_ASYNC_FRC_DCLK) 717 #define PRS_FRC_DOUT (PRS_ASYNC_FRC_DOUT) 718 #define PRS_PROTIMERL_BOF (PRS_ASYNC_PROTIMERL_BOF) 719 #define PRS_PROTIMERL_CC0 (PRS_ASYNC_PROTIMERL_CC0) 720 #define PRS_PROTIMERL_CC1 (PRS_ASYNC_PROTIMERL_CC1) 721 #define PRS_PROTIMERL_CC2 (PRS_ASYNC_PROTIMERL_CC2) 722 #define PRS_PROTIMERL_CC3 (PRS_ASYNC_PROTIMERL_CC3) 723 #define PRS_PROTIMERL_CC4 (PRS_ASYNC_PROTIMERL_CC4) 724 #define PRS_PROTIMERL_LBTF (PRS_ASYNC_PROTIMERL_LBTF) 725 #define PRS_PROTIMERL_LBTR (PRS_ASYNC_PROTIMERL_LBTR) 726 #define PRS_PROTIMER_LBTS (PRS_ASYNC_PROTIMER_LBTS) 727 #define PRS_PROTIMER_POF (PRS_ASYNC_PROTIMER_POF) 728 #define PRS_PROTIMER_T0MATCH (PRS_ASYNC_PROTIMER_T0MATCH) 729 #define PRS_PROTIMER_T0UF (PRS_ASYNC_PROTIMER_T0UF) 730 #define PRS_PROTIMER_T1MATCH (PRS_ASYNC_PROTIMER_T1MATCH) 731 #define PRS_PROTIMER_T1UF (PRS_ASYNC_PROTIMER_T1UF) 732 #define PRS_PROTIMER_WOF (PRS_ASYNC_PROTIMER_WOF) 733 #define PRS_RAC_ACTIVE (PRS_ASYNC_RAC_ACTIVE) 734 #define PRS_RAC_LNAEN (PRS_ASYNC_RAC_LNAEN) 735 #define PRS_RAC_PAEN (PRS_ASYNC_RAC_PAEN) 736 #define PRS_RAC_RX (PRS_ASYNC_RAC_RX) 737 #define PRS_RAC_TX (PRS_ASYNC_RAC_TX) 738 #define PRS_SYNTH_MUX0 (PRS_ASYNC_SYNTH_MUX0) 739 #define PRS_SYNTH_MUX1 (PRS_ASYNC_SYNTH_MUX1) 740 #define PRS_PRORTC_CCV0 (PRS_ASYNC_PRORTC_CCV0) 741 #define PRS_PRORTC_CCV1 (PRS_ASYNC_PRORTC_CCV1) 742 743 #endif // EFR32MG21_PRS_SIGNALS_H 744
