1 /***************************************************************************//**
2  * @file
3  * @brief EFR32FG13P_I2C register and bit field definitions
4  *******************************************************************************
5  * # License
6  * <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
7  *******************************************************************************
8  *
9  * SPDX-License-Identifier: Zlib
10  *
11  * The licensor of this software is Silicon Laboratories Inc.
12  *
13  * This software is provided 'as-is', without any express or implied
14  * warranty. In no event will the authors be held liable for any damages
15  * arising from the use of this software.
16  *
17  * Permission is granted to anyone to use this software for any purpose,
18  * including commercial applications, and to alter it and redistribute it
19  * freely, subject to the following restrictions:
20  *
21  * 1. The origin of this software must not be misrepresented; you must not
22  *    claim that you wrote the original software. If you use this software
23  *    in a product, an acknowledgment in the product documentation would be
24  *    appreciated but is not required.
25  * 2. Altered source versions must be plainly marked as such, and must not be
26  *    misrepresented as being the original software.
27  * 3. This notice may not be removed or altered from any source distribution.
28  *
29  ******************************************************************************/
30 
31 #if defined(__ICCARM__)
32 #pragma system_include       /* Treat file as system include file. */
33 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
34 #pragma clang system_header  /* Treat file as system include file. */
35 #endif
36 
37 /***************************************************************************//**
38  * @addtogroup Parts
39  * @{
40  ******************************************************************************/
41 /***************************************************************************//**
42  * @defgroup EFR32FG13P_I2C I2C
43  * @{
44  * @brief EFR32FG13P_I2C Register Declaration
45  ******************************************************************************/
46 /** I2C Register Declaration */
47 typedef struct {
48   __IOM uint32_t CTRL;      /**< Control Register  */
49   __IOM uint32_t CMD;       /**< Command Register  */
50   __IM uint32_t  STATE;     /**< State Register  */
51   __IM uint32_t  STATUS;    /**< Status Register  */
52   __IOM uint32_t CLKDIV;    /**< Clock Division Register  */
53   __IOM uint32_t SADDR;     /**< Slave Address Register  */
54   __IOM uint32_t SADDRMASK; /**< Slave Address Mask Register  */
55   __IM uint32_t  RXDATA;    /**< Receive Buffer Data Register  */
56   __IM uint32_t  RXDOUBLE;  /**< Receive Buffer Double Data Register  */
57   __IM uint32_t  RXDATAP;   /**< Receive Buffer Data Peek Register  */
58   __IM uint32_t  RXDOUBLEP; /**< Receive Buffer Double Data Peek Register  */
59   __IOM uint32_t TXDATA;    /**< Transmit Buffer Data Register  */
60   __IOM uint32_t TXDOUBLE;  /**< Transmit Buffer Double Data Register  */
61   __IM uint32_t  IF;        /**< Interrupt Flag Register  */
62   __IOM uint32_t IFS;       /**< Interrupt Flag Set Register  */
63   __IOM uint32_t IFC;       /**< Interrupt Flag Clear Register  */
64   __IOM uint32_t IEN;       /**< Interrupt Enable Register  */
65   __IOM uint32_t ROUTEPEN;  /**< I/O Routing Pin Enable Register  */
66   __IOM uint32_t ROUTELOC0; /**< I/O Routing Location Register  */
67 } I2C_TypeDef;              /** @} */
68 
69 /***************************************************************************//**
70  * @addtogroup EFR32FG13P_I2C
71  * @{
72  * @defgroup EFR32FG13P_I2C_BitFields  I2C Bit Fields
73  * @{
74  ******************************************************************************/
75 
76 /* Bit fields for I2C CTRL */
77 #define _I2C_CTRL_RESETVALUE               0x00000000UL                     /**< Default value for I2C_CTRL */
78 #define _I2C_CTRL_MASK                     0x0007B3FFUL                     /**< Mask for I2C_CTRL */
79 #define I2C_CTRL_EN                        (0x1UL << 0)                     /**< I2C Enable */
80 #define _I2C_CTRL_EN_SHIFT                 0                                /**< Shift value for I2C_EN */
81 #define _I2C_CTRL_EN_MASK                  0x1UL                            /**< Bit mask for I2C_EN */
82 #define _I2C_CTRL_EN_DEFAULT               0x00000000UL                     /**< Mode DEFAULT for I2C_CTRL */
83 #define I2C_CTRL_EN_DEFAULT                (_I2C_CTRL_EN_DEFAULT << 0)      /**< Shifted mode DEFAULT for I2C_CTRL */
84 #define I2C_CTRL_SLAVE                     (0x1UL << 1)                     /**< Addressable as Slave */
85 #define _I2C_CTRL_SLAVE_SHIFT              1                                /**< Shift value for I2C_SLAVE */
86 #define _I2C_CTRL_SLAVE_MASK               0x2UL                            /**< Bit mask for I2C_SLAVE */
87 #define _I2C_CTRL_SLAVE_DEFAULT            0x00000000UL                     /**< Mode DEFAULT for I2C_CTRL */
88 #define I2C_CTRL_SLAVE_DEFAULT             (_I2C_CTRL_SLAVE_DEFAULT << 1)   /**< Shifted mode DEFAULT for I2C_CTRL */
89 #define I2C_CTRL_AUTOACK                   (0x1UL << 2)                     /**< Automatic Acknowledge */
90 #define _I2C_CTRL_AUTOACK_SHIFT            2                                /**< Shift value for I2C_AUTOACK */
91 #define _I2C_CTRL_AUTOACK_MASK             0x4UL                            /**< Bit mask for I2C_AUTOACK */
92 #define _I2C_CTRL_AUTOACK_DEFAULT          0x00000000UL                     /**< Mode DEFAULT for I2C_CTRL */
93 #define I2C_CTRL_AUTOACK_DEFAULT           (_I2C_CTRL_AUTOACK_DEFAULT << 2) /**< Shifted mode DEFAULT for I2C_CTRL */
94 #define I2C_CTRL_AUTOSE                    (0x1UL << 3)                     /**< Automatic STOP When Empty */
95 #define _I2C_CTRL_AUTOSE_SHIFT             3                                /**< Shift value for I2C_AUTOSE */
96 #define _I2C_CTRL_AUTOSE_MASK              0x8UL                            /**< Bit mask for I2C_AUTOSE */
97 #define _I2C_CTRL_AUTOSE_DEFAULT           0x00000000UL                     /**< Mode DEFAULT for I2C_CTRL */
98 #define I2C_CTRL_AUTOSE_DEFAULT            (_I2C_CTRL_AUTOSE_DEFAULT << 3)  /**< Shifted mode DEFAULT for I2C_CTRL */
99 #define I2C_CTRL_AUTOSN                    (0x1UL << 4)                     /**< Automatic STOP on NACK */
100 #define _I2C_CTRL_AUTOSN_SHIFT             4                                /**< Shift value for I2C_AUTOSN */
101 #define _I2C_CTRL_AUTOSN_MASK              0x10UL                           /**< Bit mask for I2C_AUTOSN */
102 #define _I2C_CTRL_AUTOSN_DEFAULT           0x00000000UL                     /**< Mode DEFAULT for I2C_CTRL */
103 #define I2C_CTRL_AUTOSN_DEFAULT            (_I2C_CTRL_AUTOSN_DEFAULT << 4)  /**< Shifted mode DEFAULT for I2C_CTRL */
104 #define I2C_CTRL_ARBDIS                    (0x1UL << 5)                     /**< Arbitration Disable */
105 #define _I2C_CTRL_ARBDIS_SHIFT             5                                /**< Shift value for I2C_ARBDIS */
106 #define _I2C_CTRL_ARBDIS_MASK              0x20UL                           /**< Bit mask for I2C_ARBDIS */
107 #define _I2C_CTRL_ARBDIS_DEFAULT           0x00000000UL                     /**< Mode DEFAULT for I2C_CTRL */
108 #define I2C_CTRL_ARBDIS_DEFAULT            (_I2C_CTRL_ARBDIS_DEFAULT << 5)  /**< Shifted mode DEFAULT for I2C_CTRL */
109 #define I2C_CTRL_GCAMEN                    (0x1UL << 6)                     /**< General Call Address Match Enable */
110 #define _I2C_CTRL_GCAMEN_SHIFT             6                                /**< Shift value for I2C_GCAMEN */
111 #define _I2C_CTRL_GCAMEN_MASK              0x40UL                           /**< Bit mask for I2C_GCAMEN */
112 #define _I2C_CTRL_GCAMEN_DEFAULT           0x00000000UL                     /**< Mode DEFAULT for I2C_CTRL */
113 #define I2C_CTRL_GCAMEN_DEFAULT            (_I2C_CTRL_GCAMEN_DEFAULT << 6)  /**< Shifted mode DEFAULT for I2C_CTRL */
114 #define I2C_CTRL_TXBIL                     (0x1UL << 7)                     /**< TX Buffer Interrupt Level */
115 #define _I2C_CTRL_TXBIL_SHIFT              7                                /**< Shift value for I2C_TXBIL */
116 #define _I2C_CTRL_TXBIL_MASK               0x80UL                           /**< Bit mask for I2C_TXBIL */
117 #define _I2C_CTRL_TXBIL_DEFAULT            0x00000000UL                     /**< Mode DEFAULT for I2C_CTRL */
118 #define _I2C_CTRL_TXBIL_EMPTY              0x00000000UL                     /**< Mode EMPTY for I2C_CTRL */
119 #define _I2C_CTRL_TXBIL_HALFFULL           0x00000001UL                     /**< Mode HALFFULL for I2C_CTRL */
120 #define I2C_CTRL_TXBIL_DEFAULT             (_I2C_CTRL_TXBIL_DEFAULT << 7)   /**< Shifted mode DEFAULT for I2C_CTRL */
121 #define I2C_CTRL_TXBIL_EMPTY               (_I2C_CTRL_TXBIL_EMPTY << 7)     /**< Shifted mode EMPTY for I2C_CTRL */
122 #define I2C_CTRL_TXBIL_HALFFULL            (_I2C_CTRL_TXBIL_HALFFULL << 7)  /**< Shifted mode HALFFULL for I2C_CTRL */
123 #define _I2C_CTRL_CLHR_SHIFT               8                                /**< Shift value for I2C_CLHR */
124 #define _I2C_CTRL_CLHR_MASK                0x300UL                          /**< Bit mask for I2C_CLHR */
125 #define _I2C_CTRL_CLHR_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_CTRL */
126 #define _I2C_CTRL_CLHR_STANDARD            0x00000000UL                     /**< Mode STANDARD for I2C_CTRL */
127 #define _I2C_CTRL_CLHR_ASYMMETRIC          0x00000001UL                     /**< Mode ASYMMETRIC for I2C_CTRL */
128 #define _I2C_CTRL_CLHR_FAST                0x00000002UL                     /**< Mode FAST for I2C_CTRL */
129 #define I2C_CTRL_CLHR_DEFAULT              (_I2C_CTRL_CLHR_DEFAULT << 8)    /**< Shifted mode DEFAULT for I2C_CTRL */
130 #define I2C_CTRL_CLHR_STANDARD             (_I2C_CTRL_CLHR_STANDARD << 8)   /**< Shifted mode STANDARD for I2C_CTRL */
131 #define I2C_CTRL_CLHR_ASYMMETRIC           (_I2C_CTRL_CLHR_ASYMMETRIC << 8) /**< Shifted mode ASYMMETRIC for I2C_CTRL */
132 #define I2C_CTRL_CLHR_FAST                 (_I2C_CTRL_CLHR_FAST << 8)       /**< Shifted mode FAST for I2C_CTRL */
133 #define _I2C_CTRL_BITO_SHIFT               12                               /**< Shift value for I2C_BITO */
134 #define _I2C_CTRL_BITO_MASK                0x3000UL                         /**< Bit mask for I2C_BITO */
135 #define _I2C_CTRL_BITO_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_CTRL */
136 #define _I2C_CTRL_BITO_OFF                 0x00000000UL                     /**< Mode OFF for I2C_CTRL */
137 #define _I2C_CTRL_BITO_40PCC               0x00000001UL                     /**< Mode 40PCC for I2C_CTRL */
138 #define _I2C_CTRL_BITO_80PCC               0x00000002UL                     /**< Mode 80PCC for I2C_CTRL */
139 #define _I2C_CTRL_BITO_160PCC              0x00000003UL                     /**< Mode 160PCC for I2C_CTRL */
140 #define I2C_CTRL_BITO_DEFAULT              (_I2C_CTRL_BITO_DEFAULT << 12)   /**< Shifted mode DEFAULT for I2C_CTRL */
141 #define I2C_CTRL_BITO_OFF                  (_I2C_CTRL_BITO_OFF << 12)       /**< Shifted mode OFF for I2C_CTRL */
142 #define I2C_CTRL_BITO_40PCC                (_I2C_CTRL_BITO_40PCC << 12)     /**< Shifted mode 40PCC for I2C_CTRL */
143 #define I2C_CTRL_BITO_80PCC                (_I2C_CTRL_BITO_80PCC << 12)     /**< Shifted mode 80PCC for I2C_CTRL */
144 #define I2C_CTRL_BITO_160PCC               (_I2C_CTRL_BITO_160PCC << 12)    /**< Shifted mode 160PCC for I2C_CTRL */
145 #define I2C_CTRL_GIBITO                    (0x1UL << 15)                    /**< Go Idle on Bus Idle Timeout */
146 #define _I2C_CTRL_GIBITO_SHIFT             15                               /**< Shift value for I2C_GIBITO */
147 #define _I2C_CTRL_GIBITO_MASK              0x8000UL                         /**< Bit mask for I2C_GIBITO */
148 #define _I2C_CTRL_GIBITO_DEFAULT           0x00000000UL                     /**< Mode DEFAULT for I2C_CTRL */
149 #define I2C_CTRL_GIBITO_DEFAULT            (_I2C_CTRL_GIBITO_DEFAULT << 15) /**< Shifted mode DEFAULT for I2C_CTRL */
150 #define _I2C_CTRL_CLTO_SHIFT               16                               /**< Shift value for I2C_CLTO */
151 #define _I2C_CTRL_CLTO_MASK                0x70000UL                        /**< Bit mask for I2C_CLTO */
152 #define _I2C_CTRL_CLTO_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_CTRL */
153 #define _I2C_CTRL_CLTO_OFF                 0x00000000UL                     /**< Mode OFF for I2C_CTRL */
154 #define _I2C_CTRL_CLTO_40PCC               0x00000001UL                     /**< Mode 40PCC for I2C_CTRL */
155 #define _I2C_CTRL_CLTO_80PCC               0x00000002UL                     /**< Mode 80PCC for I2C_CTRL */
156 #define _I2C_CTRL_CLTO_160PCC              0x00000003UL                     /**< Mode 160PCC for I2C_CTRL */
157 #define _I2C_CTRL_CLTO_320PCC              0x00000004UL                     /**< Mode 320PCC for I2C_CTRL */
158 #define _I2C_CTRL_CLTO_1024PCC             0x00000005UL                     /**< Mode 1024PCC for I2C_CTRL */
159 #define I2C_CTRL_CLTO_DEFAULT              (_I2C_CTRL_CLTO_DEFAULT << 16)   /**< Shifted mode DEFAULT for I2C_CTRL */
160 #define I2C_CTRL_CLTO_OFF                  (_I2C_CTRL_CLTO_OFF << 16)       /**< Shifted mode OFF for I2C_CTRL */
161 #define I2C_CTRL_CLTO_40PCC                (_I2C_CTRL_CLTO_40PCC << 16)     /**< Shifted mode 40PCC for I2C_CTRL */
162 #define I2C_CTRL_CLTO_80PCC                (_I2C_CTRL_CLTO_80PCC << 16)     /**< Shifted mode 80PCC for I2C_CTRL */
163 #define I2C_CTRL_CLTO_160PCC               (_I2C_CTRL_CLTO_160PCC << 16)    /**< Shifted mode 160PCC for I2C_CTRL */
164 #define I2C_CTRL_CLTO_320PCC               (_I2C_CTRL_CLTO_320PCC << 16)    /**< Shifted mode 320PCC for I2C_CTRL */
165 #define I2C_CTRL_CLTO_1024PCC              (_I2C_CTRL_CLTO_1024PCC << 16)   /**< Shifted mode 1024PCC for I2C_CTRL */
166 
167 /* Bit fields for I2C CMD */
168 #define _I2C_CMD_RESETVALUE                0x00000000UL                    /**< Default value for I2C_CMD */
169 #define _I2C_CMD_MASK                      0x000000FFUL                    /**< Mask for I2C_CMD */
170 #define I2C_CMD_START                      (0x1UL << 0)                    /**< Send Start Condition */
171 #define _I2C_CMD_START_SHIFT               0                               /**< Shift value for I2C_START */
172 #define _I2C_CMD_START_MASK                0x1UL                           /**< Bit mask for I2C_START */
173 #define _I2C_CMD_START_DEFAULT             0x00000000UL                    /**< Mode DEFAULT for I2C_CMD */
174 #define I2C_CMD_START_DEFAULT              (_I2C_CMD_START_DEFAULT << 0)   /**< Shifted mode DEFAULT for I2C_CMD */
175 #define I2C_CMD_STOP                       (0x1UL << 1)                    /**< Send Stop Condition */
176 #define _I2C_CMD_STOP_SHIFT                1                               /**< Shift value for I2C_STOP */
177 #define _I2C_CMD_STOP_MASK                 0x2UL                           /**< Bit mask for I2C_STOP */
178 #define _I2C_CMD_STOP_DEFAULT              0x00000000UL                    /**< Mode DEFAULT for I2C_CMD */
179 #define I2C_CMD_STOP_DEFAULT               (_I2C_CMD_STOP_DEFAULT << 1)    /**< Shifted mode DEFAULT for I2C_CMD */
180 #define I2C_CMD_ACK                        (0x1UL << 2)                    /**< Send ACK */
181 #define _I2C_CMD_ACK_SHIFT                 2                               /**< Shift value for I2C_ACK */
182 #define _I2C_CMD_ACK_MASK                  0x4UL                           /**< Bit mask for I2C_ACK */
183 #define _I2C_CMD_ACK_DEFAULT               0x00000000UL                    /**< Mode DEFAULT for I2C_CMD */
184 #define I2C_CMD_ACK_DEFAULT                (_I2C_CMD_ACK_DEFAULT << 2)     /**< Shifted mode DEFAULT for I2C_CMD */
185 #define I2C_CMD_NACK                       (0x1UL << 3)                    /**< Send NACK */
186 #define _I2C_CMD_NACK_SHIFT                3                               /**< Shift value for I2C_NACK */
187 #define _I2C_CMD_NACK_MASK                 0x8UL                           /**< Bit mask for I2C_NACK */
188 #define _I2C_CMD_NACK_DEFAULT              0x00000000UL                    /**< Mode DEFAULT for I2C_CMD */
189 #define I2C_CMD_NACK_DEFAULT               (_I2C_CMD_NACK_DEFAULT << 3)    /**< Shifted mode DEFAULT for I2C_CMD */
190 #define I2C_CMD_CONT                       (0x1UL << 4)                    /**< Continue Transmission */
191 #define _I2C_CMD_CONT_SHIFT                4                               /**< Shift value for I2C_CONT */
192 #define _I2C_CMD_CONT_MASK                 0x10UL                          /**< Bit mask for I2C_CONT */
193 #define _I2C_CMD_CONT_DEFAULT              0x00000000UL                    /**< Mode DEFAULT for I2C_CMD */
194 #define I2C_CMD_CONT_DEFAULT               (_I2C_CMD_CONT_DEFAULT << 4)    /**< Shifted mode DEFAULT for I2C_CMD */
195 #define I2C_CMD_ABORT                      (0x1UL << 5)                    /**< Abort Transmission */
196 #define _I2C_CMD_ABORT_SHIFT               5                               /**< Shift value for I2C_ABORT */
197 #define _I2C_CMD_ABORT_MASK                0x20UL                          /**< Bit mask for I2C_ABORT */
198 #define _I2C_CMD_ABORT_DEFAULT             0x00000000UL                    /**< Mode DEFAULT for I2C_CMD */
199 #define I2C_CMD_ABORT_DEFAULT              (_I2C_CMD_ABORT_DEFAULT << 5)   /**< Shifted mode DEFAULT for I2C_CMD */
200 #define I2C_CMD_CLEARTX                    (0x1UL << 6)                    /**< Clear TX */
201 #define _I2C_CMD_CLEARTX_SHIFT             6                               /**< Shift value for I2C_CLEARTX */
202 #define _I2C_CMD_CLEARTX_MASK              0x40UL                          /**< Bit mask for I2C_CLEARTX */
203 #define _I2C_CMD_CLEARTX_DEFAULT           0x00000000UL                    /**< Mode DEFAULT for I2C_CMD */
204 #define I2C_CMD_CLEARTX_DEFAULT            (_I2C_CMD_CLEARTX_DEFAULT << 6) /**< Shifted mode DEFAULT for I2C_CMD */
205 #define I2C_CMD_CLEARPC                    (0x1UL << 7)                    /**< Clear Pending Commands */
206 #define _I2C_CMD_CLEARPC_SHIFT             7                               /**< Shift value for I2C_CLEARPC */
207 #define _I2C_CMD_CLEARPC_MASK              0x80UL                          /**< Bit mask for I2C_CLEARPC */
208 #define _I2C_CMD_CLEARPC_DEFAULT           0x00000000UL                    /**< Mode DEFAULT for I2C_CMD */
209 #define I2C_CMD_CLEARPC_DEFAULT            (_I2C_CMD_CLEARPC_DEFAULT << 7) /**< Shifted mode DEFAULT for I2C_CMD */
210 
211 /* Bit fields for I2C STATE */
212 #define _I2C_STATE_RESETVALUE              0x00000001UL                          /**< Default value for I2C_STATE */
213 #define _I2C_STATE_MASK                    0x000000FFUL                          /**< Mask for I2C_STATE */
214 #define I2C_STATE_BUSY                     (0x1UL << 0)                          /**< Bus Busy */
215 #define _I2C_STATE_BUSY_SHIFT              0                                     /**< Shift value for I2C_BUSY */
216 #define _I2C_STATE_BUSY_MASK               0x1UL                                 /**< Bit mask for I2C_BUSY */
217 #define _I2C_STATE_BUSY_DEFAULT            0x00000001UL                          /**< Mode DEFAULT for I2C_STATE */
218 #define I2C_STATE_BUSY_DEFAULT             (_I2C_STATE_BUSY_DEFAULT << 0)        /**< Shifted mode DEFAULT for I2C_STATE */
219 #define I2C_STATE_MASTER                   (0x1UL << 1)                          /**< Master */
220 #define _I2C_STATE_MASTER_SHIFT            1                                     /**< Shift value for I2C_MASTER */
221 #define _I2C_STATE_MASTER_MASK             0x2UL                                 /**< Bit mask for I2C_MASTER */
222 #define _I2C_STATE_MASTER_DEFAULT          0x00000000UL                          /**< Mode DEFAULT for I2C_STATE */
223 #define I2C_STATE_MASTER_DEFAULT           (_I2C_STATE_MASTER_DEFAULT << 1)      /**< Shifted mode DEFAULT for I2C_STATE */
224 #define I2C_STATE_TRANSMITTER              (0x1UL << 2)                          /**< Transmitter */
225 #define _I2C_STATE_TRANSMITTER_SHIFT       2                                     /**< Shift value for I2C_TRANSMITTER */
226 #define _I2C_STATE_TRANSMITTER_MASK        0x4UL                                 /**< Bit mask for I2C_TRANSMITTER */
227 #define _I2C_STATE_TRANSMITTER_DEFAULT     0x00000000UL                          /**< Mode DEFAULT for I2C_STATE */
228 #define I2C_STATE_TRANSMITTER_DEFAULT      (_I2C_STATE_TRANSMITTER_DEFAULT << 2) /**< Shifted mode DEFAULT for I2C_STATE */
229 #define I2C_STATE_NACKED                   (0x1UL << 3)                          /**< Nack Received */
230 #define _I2C_STATE_NACKED_SHIFT            3                                     /**< Shift value for I2C_NACKED */
231 #define _I2C_STATE_NACKED_MASK             0x8UL                                 /**< Bit mask for I2C_NACKED */
232 #define _I2C_STATE_NACKED_DEFAULT          0x00000000UL                          /**< Mode DEFAULT for I2C_STATE */
233 #define I2C_STATE_NACKED_DEFAULT           (_I2C_STATE_NACKED_DEFAULT << 3)      /**< Shifted mode DEFAULT for I2C_STATE */
234 #define I2C_STATE_BUSHOLD                  (0x1UL << 4)                          /**< Bus Held */
235 #define _I2C_STATE_BUSHOLD_SHIFT           4                                     /**< Shift value for I2C_BUSHOLD */
236 #define _I2C_STATE_BUSHOLD_MASK            0x10UL                                /**< Bit mask for I2C_BUSHOLD */
237 #define _I2C_STATE_BUSHOLD_DEFAULT         0x00000000UL                          /**< Mode DEFAULT for I2C_STATE */
238 #define I2C_STATE_BUSHOLD_DEFAULT          (_I2C_STATE_BUSHOLD_DEFAULT << 4)     /**< Shifted mode DEFAULT for I2C_STATE */
239 #define _I2C_STATE_STATE_SHIFT             5                                     /**< Shift value for I2C_STATE */
240 #define _I2C_STATE_STATE_MASK              0xE0UL                                /**< Bit mask for I2C_STATE */
241 #define _I2C_STATE_STATE_DEFAULT           0x00000000UL                          /**< Mode DEFAULT for I2C_STATE */
242 #define _I2C_STATE_STATE_IDLE              0x00000000UL                          /**< Mode IDLE for I2C_STATE */
243 #define _I2C_STATE_STATE_WAIT              0x00000001UL                          /**< Mode WAIT for I2C_STATE */
244 #define _I2C_STATE_STATE_START             0x00000002UL                          /**< Mode START for I2C_STATE */
245 #define _I2C_STATE_STATE_ADDR              0x00000003UL                          /**< Mode ADDR for I2C_STATE */
246 #define _I2C_STATE_STATE_ADDRACK           0x00000004UL                          /**< Mode ADDRACK for I2C_STATE */
247 #define _I2C_STATE_STATE_DATA              0x00000005UL                          /**< Mode DATA for I2C_STATE */
248 #define _I2C_STATE_STATE_DATAACK           0x00000006UL                          /**< Mode DATAACK for I2C_STATE */
249 #define I2C_STATE_STATE_DEFAULT            (_I2C_STATE_STATE_DEFAULT << 5)       /**< Shifted mode DEFAULT for I2C_STATE */
250 #define I2C_STATE_STATE_IDLE               (_I2C_STATE_STATE_IDLE << 5)          /**< Shifted mode IDLE for I2C_STATE */
251 #define I2C_STATE_STATE_WAIT               (_I2C_STATE_STATE_WAIT << 5)          /**< Shifted mode WAIT for I2C_STATE */
252 #define I2C_STATE_STATE_START              (_I2C_STATE_STATE_START << 5)         /**< Shifted mode START for I2C_STATE */
253 #define I2C_STATE_STATE_ADDR               (_I2C_STATE_STATE_ADDR << 5)          /**< Shifted mode ADDR for I2C_STATE */
254 #define I2C_STATE_STATE_ADDRACK            (_I2C_STATE_STATE_ADDRACK << 5)       /**< Shifted mode ADDRACK for I2C_STATE */
255 #define I2C_STATE_STATE_DATA               (_I2C_STATE_STATE_DATA << 5)          /**< Shifted mode DATA for I2C_STATE */
256 #define I2C_STATE_STATE_DATAACK            (_I2C_STATE_STATE_DATAACK << 5)       /**< Shifted mode DATAACK for I2C_STATE */
257 
258 /* Bit fields for I2C STATUS */
259 #define _I2C_STATUS_RESETVALUE             0x00000080UL                       /**< Default value for I2C_STATUS */
260 #define _I2C_STATUS_MASK                   0x000003FFUL                       /**< Mask for I2C_STATUS */
261 #define I2C_STATUS_PSTART                  (0x1UL << 0)                       /**< Pending START */
262 #define _I2C_STATUS_PSTART_SHIFT           0                                  /**< Shift value for I2C_PSTART */
263 #define _I2C_STATUS_PSTART_MASK            0x1UL                              /**< Bit mask for I2C_PSTART */
264 #define _I2C_STATUS_PSTART_DEFAULT         0x00000000UL                       /**< Mode DEFAULT for I2C_STATUS */
265 #define I2C_STATUS_PSTART_DEFAULT          (_I2C_STATUS_PSTART_DEFAULT << 0)  /**< Shifted mode DEFAULT for I2C_STATUS */
266 #define I2C_STATUS_PSTOP                   (0x1UL << 1)                       /**< Pending STOP */
267 #define _I2C_STATUS_PSTOP_SHIFT            1                                  /**< Shift value for I2C_PSTOP */
268 #define _I2C_STATUS_PSTOP_MASK             0x2UL                              /**< Bit mask for I2C_PSTOP */
269 #define _I2C_STATUS_PSTOP_DEFAULT          0x00000000UL                       /**< Mode DEFAULT for I2C_STATUS */
270 #define I2C_STATUS_PSTOP_DEFAULT           (_I2C_STATUS_PSTOP_DEFAULT << 1)   /**< Shifted mode DEFAULT for I2C_STATUS */
271 #define I2C_STATUS_PACK                    (0x1UL << 2)                       /**< Pending ACK */
272 #define _I2C_STATUS_PACK_SHIFT             2                                  /**< Shift value for I2C_PACK */
273 #define _I2C_STATUS_PACK_MASK              0x4UL                              /**< Bit mask for I2C_PACK */
274 #define _I2C_STATUS_PACK_DEFAULT           0x00000000UL                       /**< Mode DEFAULT for I2C_STATUS */
275 #define I2C_STATUS_PACK_DEFAULT            (_I2C_STATUS_PACK_DEFAULT << 2)    /**< Shifted mode DEFAULT for I2C_STATUS */
276 #define I2C_STATUS_PNACK                   (0x1UL << 3)                       /**< Pending NACK */
277 #define _I2C_STATUS_PNACK_SHIFT            3                                  /**< Shift value for I2C_PNACK */
278 #define _I2C_STATUS_PNACK_MASK             0x8UL                              /**< Bit mask for I2C_PNACK */
279 #define _I2C_STATUS_PNACK_DEFAULT          0x00000000UL                       /**< Mode DEFAULT for I2C_STATUS */
280 #define I2C_STATUS_PNACK_DEFAULT           (_I2C_STATUS_PNACK_DEFAULT << 3)   /**< Shifted mode DEFAULT for I2C_STATUS */
281 #define I2C_STATUS_PCONT                   (0x1UL << 4)                       /**< Pending Continue */
282 #define _I2C_STATUS_PCONT_SHIFT            4                                  /**< Shift value for I2C_PCONT */
283 #define _I2C_STATUS_PCONT_MASK             0x10UL                             /**< Bit mask for I2C_PCONT */
284 #define _I2C_STATUS_PCONT_DEFAULT          0x00000000UL                       /**< Mode DEFAULT for I2C_STATUS */
285 #define I2C_STATUS_PCONT_DEFAULT           (_I2C_STATUS_PCONT_DEFAULT << 4)   /**< Shifted mode DEFAULT for I2C_STATUS */
286 #define I2C_STATUS_PABORT                  (0x1UL << 5)                       /**< Pending Abort */
287 #define _I2C_STATUS_PABORT_SHIFT           5                                  /**< Shift value for I2C_PABORT */
288 #define _I2C_STATUS_PABORT_MASK            0x20UL                             /**< Bit mask for I2C_PABORT */
289 #define _I2C_STATUS_PABORT_DEFAULT         0x00000000UL                       /**< Mode DEFAULT for I2C_STATUS */
290 #define I2C_STATUS_PABORT_DEFAULT          (_I2C_STATUS_PABORT_DEFAULT << 5)  /**< Shifted mode DEFAULT for I2C_STATUS */
291 #define I2C_STATUS_TXC                     (0x1UL << 6)                       /**< TX Complete */
292 #define _I2C_STATUS_TXC_SHIFT              6                                  /**< Shift value for I2C_TXC */
293 #define _I2C_STATUS_TXC_MASK               0x40UL                             /**< Bit mask for I2C_TXC */
294 #define _I2C_STATUS_TXC_DEFAULT            0x00000000UL                       /**< Mode DEFAULT for I2C_STATUS */
295 #define I2C_STATUS_TXC_DEFAULT             (_I2C_STATUS_TXC_DEFAULT << 6)     /**< Shifted mode DEFAULT for I2C_STATUS */
296 #define I2C_STATUS_TXBL                    (0x1UL << 7)                       /**< TX Buffer Level */
297 #define _I2C_STATUS_TXBL_SHIFT             7                                  /**< Shift value for I2C_TXBL */
298 #define _I2C_STATUS_TXBL_MASK              0x80UL                             /**< Bit mask for I2C_TXBL */
299 #define _I2C_STATUS_TXBL_DEFAULT           0x00000001UL                       /**< Mode DEFAULT for I2C_STATUS */
300 #define I2C_STATUS_TXBL_DEFAULT            (_I2C_STATUS_TXBL_DEFAULT << 7)    /**< Shifted mode DEFAULT for I2C_STATUS */
301 #define I2C_STATUS_RXDATAV                 (0x1UL << 8)                       /**< RX Data Valid */
302 #define _I2C_STATUS_RXDATAV_SHIFT          8                                  /**< Shift value for I2C_RXDATAV */
303 #define _I2C_STATUS_RXDATAV_MASK           0x100UL                            /**< Bit mask for I2C_RXDATAV */
304 #define _I2C_STATUS_RXDATAV_DEFAULT        0x00000000UL                       /**< Mode DEFAULT for I2C_STATUS */
305 #define I2C_STATUS_RXDATAV_DEFAULT         (_I2C_STATUS_RXDATAV_DEFAULT << 8) /**< Shifted mode DEFAULT for I2C_STATUS */
306 #define I2C_STATUS_RXFULL                  (0x1UL << 9)                       /**< RX FIFO Full */
307 #define _I2C_STATUS_RXFULL_SHIFT           9                                  /**< Shift value for I2C_RXFULL */
308 #define _I2C_STATUS_RXFULL_MASK            0x200UL                            /**< Bit mask for I2C_RXFULL */
309 #define _I2C_STATUS_RXFULL_DEFAULT         0x00000000UL                       /**< Mode DEFAULT for I2C_STATUS */
310 #define I2C_STATUS_RXFULL_DEFAULT          (_I2C_STATUS_RXFULL_DEFAULT << 9)  /**< Shifted mode DEFAULT for I2C_STATUS */
311 
312 /* Bit fields for I2C CLKDIV */
313 #define _I2C_CLKDIV_RESETVALUE             0x00000000UL                   /**< Default value for I2C_CLKDIV */
314 #define _I2C_CLKDIV_MASK                   0x000001FFUL                   /**< Mask for I2C_CLKDIV */
315 #define _I2C_CLKDIV_DIV_SHIFT              0                              /**< Shift value for I2C_DIV */
316 #define _I2C_CLKDIV_DIV_MASK               0x1FFUL                        /**< Bit mask for I2C_DIV */
317 #define _I2C_CLKDIV_DIV_DEFAULT            0x00000000UL                   /**< Mode DEFAULT for I2C_CLKDIV */
318 #define I2C_CLKDIV_DIV_DEFAULT             (_I2C_CLKDIV_DIV_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_CLKDIV */
319 
320 /* Bit fields for I2C SADDR */
321 #define _I2C_SADDR_RESETVALUE              0x00000000UL                   /**< Default value for I2C_SADDR */
322 #define _I2C_SADDR_MASK                    0x000000FEUL                   /**< Mask for I2C_SADDR */
323 #define _I2C_SADDR_ADDR_SHIFT              1                              /**< Shift value for I2C_ADDR */
324 #define _I2C_SADDR_ADDR_MASK               0xFEUL                         /**< Bit mask for I2C_ADDR */
325 #define _I2C_SADDR_ADDR_DEFAULT            0x00000000UL                   /**< Mode DEFAULT for I2C_SADDR */
326 #define I2C_SADDR_ADDR_DEFAULT             (_I2C_SADDR_ADDR_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_SADDR */
327 
328 /* Bit fields for I2C SADDRMASK */
329 #define _I2C_SADDRMASK_RESETVALUE          0x00000000UL                       /**< Default value for I2C_SADDRMASK */
330 #define _I2C_SADDRMASK_MASK                0x000000FEUL                       /**< Mask for I2C_SADDRMASK */
331 #define _I2C_SADDRMASK_MASK_SHIFT          1                                  /**< Shift value for I2C_MASK */
332 #define _I2C_SADDRMASK_MASK_MASK           0xFEUL                             /**< Bit mask for I2C_MASK */
333 #define _I2C_SADDRMASK_MASK_DEFAULT        0x00000000UL                       /**< Mode DEFAULT for I2C_SADDRMASK */
334 #define I2C_SADDRMASK_MASK_DEFAULT         (_I2C_SADDRMASK_MASK_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_SADDRMASK */
335 
336 /* Bit fields for I2C RXDATA */
337 #define _I2C_RXDATA_RESETVALUE             0x00000000UL                      /**< Default value for I2C_RXDATA */
338 #define _I2C_RXDATA_MASK                   0x000000FFUL                      /**< Mask for I2C_RXDATA */
339 #define _I2C_RXDATA_RXDATA_SHIFT           0                                 /**< Shift value for I2C_RXDATA */
340 #define _I2C_RXDATA_RXDATA_MASK            0xFFUL                            /**< Bit mask for I2C_RXDATA */
341 #define _I2C_RXDATA_RXDATA_DEFAULT         0x00000000UL                      /**< Mode DEFAULT for I2C_RXDATA */
342 #define I2C_RXDATA_RXDATA_DEFAULT          (_I2C_RXDATA_RXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_RXDATA */
343 
344 /* Bit fields for I2C RXDOUBLE */
345 #define _I2C_RXDOUBLE_RESETVALUE           0x00000000UL                         /**< Default value for I2C_RXDOUBLE */
346 #define _I2C_RXDOUBLE_MASK                 0x0000FFFFUL                         /**< Mask for I2C_RXDOUBLE */
347 #define _I2C_RXDOUBLE_RXDATA0_SHIFT        0                                    /**< Shift value for I2C_RXDATA0 */
348 #define _I2C_RXDOUBLE_RXDATA0_MASK         0xFFUL                               /**< Bit mask for I2C_RXDATA0 */
349 #define _I2C_RXDOUBLE_RXDATA0_DEFAULT      0x00000000UL                         /**< Mode DEFAULT for I2C_RXDOUBLE */
350 #define I2C_RXDOUBLE_RXDATA0_DEFAULT       (_I2C_RXDOUBLE_RXDATA0_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_RXDOUBLE */
351 #define _I2C_RXDOUBLE_RXDATA1_SHIFT        8                                    /**< Shift value for I2C_RXDATA1 */
352 #define _I2C_RXDOUBLE_RXDATA1_MASK         0xFF00UL                             /**< Bit mask for I2C_RXDATA1 */
353 #define _I2C_RXDOUBLE_RXDATA1_DEFAULT      0x00000000UL                         /**< Mode DEFAULT for I2C_RXDOUBLE */
354 #define I2C_RXDOUBLE_RXDATA1_DEFAULT       (_I2C_RXDOUBLE_RXDATA1_DEFAULT << 8) /**< Shifted mode DEFAULT for I2C_RXDOUBLE */
355 
356 /* Bit fields for I2C RXDATAP */
357 #define _I2C_RXDATAP_RESETVALUE            0x00000000UL                        /**< Default value for I2C_RXDATAP */
358 #define _I2C_RXDATAP_MASK                  0x000000FFUL                        /**< Mask for I2C_RXDATAP */
359 #define _I2C_RXDATAP_RXDATAP_SHIFT         0                                   /**< Shift value for I2C_RXDATAP */
360 #define _I2C_RXDATAP_RXDATAP_MASK          0xFFUL                              /**< Bit mask for I2C_RXDATAP */
361 #define _I2C_RXDATAP_RXDATAP_DEFAULT       0x00000000UL                        /**< Mode DEFAULT for I2C_RXDATAP */
362 #define I2C_RXDATAP_RXDATAP_DEFAULT        (_I2C_RXDATAP_RXDATAP_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_RXDATAP */
363 
364 /* Bit fields for I2C RXDOUBLEP */
365 #define _I2C_RXDOUBLEP_RESETVALUE          0x00000000UL                           /**< Default value for I2C_RXDOUBLEP */
366 #define _I2C_RXDOUBLEP_MASK                0x0000FFFFUL                           /**< Mask for I2C_RXDOUBLEP */
367 #define _I2C_RXDOUBLEP_RXDATAP0_SHIFT      0                                      /**< Shift value for I2C_RXDATAP0 */
368 #define _I2C_RXDOUBLEP_RXDATAP0_MASK       0xFFUL                                 /**< Bit mask for I2C_RXDATAP0 */
369 #define _I2C_RXDOUBLEP_RXDATAP0_DEFAULT    0x00000000UL                           /**< Mode DEFAULT for I2C_RXDOUBLEP */
370 #define I2C_RXDOUBLEP_RXDATAP0_DEFAULT     (_I2C_RXDOUBLEP_RXDATAP0_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_RXDOUBLEP */
371 #define _I2C_RXDOUBLEP_RXDATAP1_SHIFT      8                                      /**< Shift value for I2C_RXDATAP1 */
372 #define _I2C_RXDOUBLEP_RXDATAP1_MASK       0xFF00UL                               /**< Bit mask for I2C_RXDATAP1 */
373 #define _I2C_RXDOUBLEP_RXDATAP1_DEFAULT    0x00000000UL                           /**< Mode DEFAULT for I2C_RXDOUBLEP */
374 #define I2C_RXDOUBLEP_RXDATAP1_DEFAULT     (_I2C_RXDOUBLEP_RXDATAP1_DEFAULT << 8) /**< Shifted mode DEFAULT for I2C_RXDOUBLEP */
375 
376 /* Bit fields for I2C TXDATA */
377 #define _I2C_TXDATA_RESETVALUE             0x00000000UL                      /**< Default value for I2C_TXDATA */
378 #define _I2C_TXDATA_MASK                   0x000000FFUL                      /**< Mask for I2C_TXDATA */
379 #define _I2C_TXDATA_TXDATA_SHIFT           0                                 /**< Shift value for I2C_TXDATA */
380 #define _I2C_TXDATA_TXDATA_MASK            0xFFUL                            /**< Bit mask for I2C_TXDATA */
381 #define _I2C_TXDATA_TXDATA_DEFAULT         0x00000000UL                      /**< Mode DEFAULT for I2C_TXDATA */
382 #define I2C_TXDATA_TXDATA_DEFAULT          (_I2C_TXDATA_TXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_TXDATA */
383 
384 /* Bit fields for I2C TXDOUBLE */
385 #define _I2C_TXDOUBLE_RESETVALUE           0x00000000UL                         /**< Default value for I2C_TXDOUBLE */
386 #define _I2C_TXDOUBLE_MASK                 0x0000FFFFUL                         /**< Mask for I2C_TXDOUBLE */
387 #define _I2C_TXDOUBLE_TXDATA0_SHIFT        0                                    /**< Shift value for I2C_TXDATA0 */
388 #define _I2C_TXDOUBLE_TXDATA0_MASK         0xFFUL                               /**< Bit mask for I2C_TXDATA0 */
389 #define _I2C_TXDOUBLE_TXDATA0_DEFAULT      0x00000000UL                         /**< Mode DEFAULT for I2C_TXDOUBLE */
390 #define I2C_TXDOUBLE_TXDATA0_DEFAULT       (_I2C_TXDOUBLE_TXDATA0_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_TXDOUBLE */
391 #define _I2C_TXDOUBLE_TXDATA1_SHIFT        8                                    /**< Shift value for I2C_TXDATA1 */
392 #define _I2C_TXDOUBLE_TXDATA1_MASK         0xFF00UL                             /**< Bit mask for I2C_TXDATA1 */
393 #define _I2C_TXDOUBLE_TXDATA1_DEFAULT      0x00000000UL                         /**< Mode DEFAULT for I2C_TXDOUBLE */
394 #define I2C_TXDOUBLE_TXDATA1_DEFAULT       (_I2C_TXDOUBLE_TXDATA1_DEFAULT << 8) /**< Shifted mode DEFAULT for I2C_TXDOUBLE */
395 
396 /* Bit fields for I2C IF */
397 #define _I2C_IF_RESETVALUE                 0x00000010UL                    /**< Default value for I2C_IF */
398 #define _I2C_IF_MASK                       0x0007FFFFUL                    /**< Mask for I2C_IF */
399 #define I2C_IF_START                       (0x1UL << 0)                    /**< START Condition Interrupt Flag */
400 #define _I2C_IF_START_SHIFT                0                               /**< Shift value for I2C_START */
401 #define _I2C_IF_START_MASK                 0x1UL                           /**< Bit mask for I2C_START */
402 #define _I2C_IF_START_DEFAULT              0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
403 #define I2C_IF_START_DEFAULT               (_I2C_IF_START_DEFAULT << 0)    /**< Shifted mode DEFAULT for I2C_IF */
404 #define I2C_IF_RSTART                      (0x1UL << 1)                    /**< Repeated START Condition Interrupt Flag */
405 #define _I2C_IF_RSTART_SHIFT               1                               /**< Shift value for I2C_RSTART */
406 #define _I2C_IF_RSTART_MASK                0x2UL                           /**< Bit mask for I2C_RSTART */
407 #define _I2C_IF_RSTART_DEFAULT             0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
408 #define I2C_IF_RSTART_DEFAULT              (_I2C_IF_RSTART_DEFAULT << 1)   /**< Shifted mode DEFAULT for I2C_IF */
409 #define I2C_IF_ADDR                        (0x1UL << 2)                    /**< Address Interrupt Flag */
410 #define _I2C_IF_ADDR_SHIFT                 2                               /**< Shift value for I2C_ADDR */
411 #define _I2C_IF_ADDR_MASK                  0x4UL                           /**< Bit mask for I2C_ADDR */
412 #define _I2C_IF_ADDR_DEFAULT               0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
413 #define I2C_IF_ADDR_DEFAULT                (_I2C_IF_ADDR_DEFAULT << 2)     /**< Shifted mode DEFAULT for I2C_IF */
414 #define I2C_IF_TXC                         (0x1UL << 3)                    /**< Transfer Completed Interrupt Flag */
415 #define _I2C_IF_TXC_SHIFT                  3                               /**< Shift value for I2C_TXC */
416 #define _I2C_IF_TXC_MASK                   0x8UL                           /**< Bit mask for I2C_TXC */
417 #define _I2C_IF_TXC_DEFAULT                0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
418 #define I2C_IF_TXC_DEFAULT                 (_I2C_IF_TXC_DEFAULT << 3)      /**< Shifted mode DEFAULT for I2C_IF */
419 #define I2C_IF_TXBL                        (0x1UL << 4)                    /**< Transmit Buffer Level Interrupt Flag */
420 #define _I2C_IF_TXBL_SHIFT                 4                               /**< Shift value for I2C_TXBL */
421 #define _I2C_IF_TXBL_MASK                  0x10UL                          /**< Bit mask for I2C_TXBL */
422 #define _I2C_IF_TXBL_DEFAULT               0x00000001UL                    /**< Mode DEFAULT for I2C_IF */
423 #define I2C_IF_TXBL_DEFAULT                (_I2C_IF_TXBL_DEFAULT << 4)     /**< Shifted mode DEFAULT for I2C_IF */
424 #define I2C_IF_RXDATAV                     (0x1UL << 5)                    /**< Receive Data Valid Interrupt Flag */
425 #define _I2C_IF_RXDATAV_SHIFT              5                               /**< Shift value for I2C_RXDATAV */
426 #define _I2C_IF_RXDATAV_MASK               0x20UL                          /**< Bit mask for I2C_RXDATAV */
427 #define _I2C_IF_RXDATAV_DEFAULT            0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
428 #define I2C_IF_RXDATAV_DEFAULT             (_I2C_IF_RXDATAV_DEFAULT << 5)  /**< Shifted mode DEFAULT for I2C_IF */
429 #define I2C_IF_ACK                         (0x1UL << 6)                    /**< Acknowledge Received Interrupt Flag */
430 #define _I2C_IF_ACK_SHIFT                  6                               /**< Shift value for I2C_ACK */
431 #define _I2C_IF_ACK_MASK                   0x40UL                          /**< Bit mask for I2C_ACK */
432 #define _I2C_IF_ACK_DEFAULT                0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
433 #define I2C_IF_ACK_DEFAULT                 (_I2C_IF_ACK_DEFAULT << 6)      /**< Shifted mode DEFAULT for I2C_IF */
434 #define I2C_IF_NACK                        (0x1UL << 7)                    /**< Not Acknowledge Received Interrupt Flag */
435 #define _I2C_IF_NACK_SHIFT                 7                               /**< Shift value for I2C_NACK */
436 #define _I2C_IF_NACK_MASK                  0x80UL                          /**< Bit mask for I2C_NACK */
437 #define _I2C_IF_NACK_DEFAULT               0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
438 #define I2C_IF_NACK_DEFAULT                (_I2C_IF_NACK_DEFAULT << 7)     /**< Shifted mode DEFAULT for I2C_IF */
439 #define I2C_IF_MSTOP                       (0x1UL << 8)                    /**< Master STOP Condition Interrupt Flag */
440 #define _I2C_IF_MSTOP_SHIFT                8                               /**< Shift value for I2C_MSTOP */
441 #define _I2C_IF_MSTOP_MASK                 0x100UL                         /**< Bit mask for I2C_MSTOP */
442 #define _I2C_IF_MSTOP_DEFAULT              0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
443 #define I2C_IF_MSTOP_DEFAULT               (_I2C_IF_MSTOP_DEFAULT << 8)    /**< Shifted mode DEFAULT for I2C_IF */
444 #define I2C_IF_ARBLOST                     (0x1UL << 9)                    /**< Arbitration Lost Interrupt Flag */
445 #define _I2C_IF_ARBLOST_SHIFT              9                               /**< Shift value for I2C_ARBLOST */
446 #define _I2C_IF_ARBLOST_MASK               0x200UL                         /**< Bit mask for I2C_ARBLOST */
447 #define _I2C_IF_ARBLOST_DEFAULT            0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
448 #define I2C_IF_ARBLOST_DEFAULT             (_I2C_IF_ARBLOST_DEFAULT << 9)  /**< Shifted mode DEFAULT for I2C_IF */
449 #define I2C_IF_BUSERR                      (0x1UL << 10)                   /**< Bus Error Interrupt Flag */
450 #define _I2C_IF_BUSERR_SHIFT               10                              /**< Shift value for I2C_BUSERR */
451 #define _I2C_IF_BUSERR_MASK                0x400UL                         /**< Bit mask for I2C_BUSERR */
452 #define _I2C_IF_BUSERR_DEFAULT             0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
453 #define I2C_IF_BUSERR_DEFAULT              (_I2C_IF_BUSERR_DEFAULT << 10)  /**< Shifted mode DEFAULT for I2C_IF */
454 #define I2C_IF_BUSHOLD                     (0x1UL << 11)                   /**< Bus Held Interrupt Flag */
455 #define _I2C_IF_BUSHOLD_SHIFT              11                              /**< Shift value for I2C_BUSHOLD */
456 #define _I2C_IF_BUSHOLD_MASK               0x800UL                         /**< Bit mask for I2C_BUSHOLD */
457 #define _I2C_IF_BUSHOLD_DEFAULT            0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
458 #define I2C_IF_BUSHOLD_DEFAULT             (_I2C_IF_BUSHOLD_DEFAULT << 11) /**< Shifted mode DEFAULT for I2C_IF */
459 #define I2C_IF_TXOF                        (0x1UL << 12)                   /**< Transmit Buffer Overflow Interrupt Flag */
460 #define _I2C_IF_TXOF_SHIFT                 12                              /**< Shift value for I2C_TXOF */
461 #define _I2C_IF_TXOF_MASK                  0x1000UL                        /**< Bit mask for I2C_TXOF */
462 #define _I2C_IF_TXOF_DEFAULT               0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
463 #define I2C_IF_TXOF_DEFAULT                (_I2C_IF_TXOF_DEFAULT << 12)    /**< Shifted mode DEFAULT for I2C_IF */
464 #define I2C_IF_RXUF                        (0x1UL << 13)                   /**< Receive Buffer Underflow Interrupt Flag */
465 #define _I2C_IF_RXUF_SHIFT                 13                              /**< Shift value for I2C_RXUF */
466 #define _I2C_IF_RXUF_MASK                  0x2000UL                        /**< Bit mask for I2C_RXUF */
467 #define _I2C_IF_RXUF_DEFAULT               0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
468 #define I2C_IF_RXUF_DEFAULT                (_I2C_IF_RXUF_DEFAULT << 13)    /**< Shifted mode DEFAULT for I2C_IF */
469 #define I2C_IF_BITO                        (0x1UL << 14)                   /**< Bus Idle Timeout Interrupt Flag */
470 #define _I2C_IF_BITO_SHIFT                 14                              /**< Shift value for I2C_BITO */
471 #define _I2C_IF_BITO_MASK                  0x4000UL                        /**< Bit mask for I2C_BITO */
472 #define _I2C_IF_BITO_DEFAULT               0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
473 #define I2C_IF_BITO_DEFAULT                (_I2C_IF_BITO_DEFAULT << 14)    /**< Shifted mode DEFAULT for I2C_IF */
474 #define I2C_IF_CLTO                        (0x1UL << 15)                   /**< Clock Low Timeout Interrupt Flag */
475 #define _I2C_IF_CLTO_SHIFT                 15                              /**< Shift value for I2C_CLTO */
476 #define _I2C_IF_CLTO_MASK                  0x8000UL                        /**< Bit mask for I2C_CLTO */
477 #define _I2C_IF_CLTO_DEFAULT               0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
478 #define I2C_IF_CLTO_DEFAULT                (_I2C_IF_CLTO_DEFAULT << 15)    /**< Shifted mode DEFAULT for I2C_IF */
479 #define I2C_IF_SSTOP                       (0x1UL << 16)                   /**< Slave STOP Condition Interrupt Flag */
480 #define _I2C_IF_SSTOP_SHIFT                16                              /**< Shift value for I2C_SSTOP */
481 #define _I2C_IF_SSTOP_MASK                 0x10000UL                       /**< Bit mask for I2C_SSTOP */
482 #define _I2C_IF_SSTOP_DEFAULT              0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
483 #define I2C_IF_SSTOP_DEFAULT               (_I2C_IF_SSTOP_DEFAULT << 16)   /**< Shifted mode DEFAULT for I2C_IF */
484 #define I2C_IF_RXFULL                      (0x1UL << 17)                   /**< Receive Buffer Full Interrupt Flag */
485 #define _I2C_IF_RXFULL_SHIFT               17                              /**< Shift value for I2C_RXFULL */
486 #define _I2C_IF_RXFULL_MASK                0x20000UL                       /**< Bit mask for I2C_RXFULL */
487 #define _I2C_IF_RXFULL_DEFAULT             0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
488 #define I2C_IF_RXFULL_DEFAULT              (_I2C_IF_RXFULL_DEFAULT << 17)  /**< Shifted mode DEFAULT for I2C_IF */
489 #define I2C_IF_CLERR                       (0x1UL << 18)                   /**< Clock Low Error Interrupt Flag */
490 #define _I2C_IF_CLERR_SHIFT                18                              /**< Shift value for I2C_CLERR */
491 #define _I2C_IF_CLERR_MASK                 0x40000UL                       /**< Bit mask for I2C_CLERR */
492 #define _I2C_IF_CLERR_DEFAULT              0x00000000UL                    /**< Mode DEFAULT for I2C_IF */
493 #define I2C_IF_CLERR_DEFAULT               (_I2C_IF_CLERR_DEFAULT << 18)   /**< Shifted mode DEFAULT for I2C_IF */
494 
495 /* Bit fields for I2C IFS */
496 #define _I2C_IFS_RESETVALUE                0x00000000UL                     /**< Default value for I2C_IFS */
497 #define _I2C_IFS_MASK                      0x0007FFCFUL                     /**< Mask for I2C_IFS */
498 #define I2C_IFS_START                      (0x1UL << 0)                     /**< Set START Interrupt Flag */
499 #define _I2C_IFS_START_SHIFT               0                                /**< Shift value for I2C_START */
500 #define _I2C_IFS_START_MASK                0x1UL                            /**< Bit mask for I2C_START */
501 #define _I2C_IFS_START_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
502 #define I2C_IFS_START_DEFAULT              (_I2C_IFS_START_DEFAULT << 0)    /**< Shifted mode DEFAULT for I2C_IFS */
503 #define I2C_IFS_RSTART                     (0x1UL << 1)                     /**< Set RSTART Interrupt Flag */
504 #define _I2C_IFS_RSTART_SHIFT              1                                /**< Shift value for I2C_RSTART */
505 #define _I2C_IFS_RSTART_MASK               0x2UL                            /**< Bit mask for I2C_RSTART */
506 #define _I2C_IFS_RSTART_DEFAULT            0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
507 #define I2C_IFS_RSTART_DEFAULT             (_I2C_IFS_RSTART_DEFAULT << 1)   /**< Shifted mode DEFAULT for I2C_IFS */
508 #define I2C_IFS_ADDR                       (0x1UL << 2)                     /**< Set ADDR Interrupt Flag */
509 #define _I2C_IFS_ADDR_SHIFT                2                                /**< Shift value for I2C_ADDR */
510 #define _I2C_IFS_ADDR_MASK                 0x4UL                            /**< Bit mask for I2C_ADDR */
511 #define _I2C_IFS_ADDR_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
512 #define I2C_IFS_ADDR_DEFAULT               (_I2C_IFS_ADDR_DEFAULT << 2)     /**< Shifted mode DEFAULT for I2C_IFS */
513 #define I2C_IFS_TXC                        (0x1UL << 3)                     /**< Set TXC Interrupt Flag */
514 #define _I2C_IFS_TXC_SHIFT                 3                                /**< Shift value for I2C_TXC */
515 #define _I2C_IFS_TXC_MASK                  0x8UL                            /**< Bit mask for I2C_TXC */
516 #define _I2C_IFS_TXC_DEFAULT               0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
517 #define I2C_IFS_TXC_DEFAULT                (_I2C_IFS_TXC_DEFAULT << 3)      /**< Shifted mode DEFAULT for I2C_IFS */
518 #define I2C_IFS_ACK                        (0x1UL << 6)                     /**< Set ACK Interrupt Flag */
519 #define _I2C_IFS_ACK_SHIFT                 6                                /**< Shift value for I2C_ACK */
520 #define _I2C_IFS_ACK_MASK                  0x40UL                           /**< Bit mask for I2C_ACK */
521 #define _I2C_IFS_ACK_DEFAULT               0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
522 #define I2C_IFS_ACK_DEFAULT                (_I2C_IFS_ACK_DEFAULT << 6)      /**< Shifted mode DEFAULT for I2C_IFS */
523 #define I2C_IFS_NACK                       (0x1UL << 7)                     /**< Set NACK Interrupt Flag */
524 #define _I2C_IFS_NACK_SHIFT                7                                /**< Shift value for I2C_NACK */
525 #define _I2C_IFS_NACK_MASK                 0x80UL                           /**< Bit mask for I2C_NACK */
526 #define _I2C_IFS_NACK_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
527 #define I2C_IFS_NACK_DEFAULT               (_I2C_IFS_NACK_DEFAULT << 7)     /**< Shifted mode DEFAULT for I2C_IFS */
528 #define I2C_IFS_MSTOP                      (0x1UL << 8)                     /**< Set MSTOP Interrupt Flag */
529 #define _I2C_IFS_MSTOP_SHIFT               8                                /**< Shift value for I2C_MSTOP */
530 #define _I2C_IFS_MSTOP_MASK                0x100UL                          /**< Bit mask for I2C_MSTOP */
531 #define _I2C_IFS_MSTOP_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
532 #define I2C_IFS_MSTOP_DEFAULT              (_I2C_IFS_MSTOP_DEFAULT << 8)    /**< Shifted mode DEFAULT for I2C_IFS */
533 #define I2C_IFS_ARBLOST                    (0x1UL << 9)                     /**< Set ARBLOST Interrupt Flag */
534 #define _I2C_IFS_ARBLOST_SHIFT             9                                /**< Shift value for I2C_ARBLOST */
535 #define _I2C_IFS_ARBLOST_MASK              0x200UL                          /**< Bit mask for I2C_ARBLOST */
536 #define _I2C_IFS_ARBLOST_DEFAULT           0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
537 #define I2C_IFS_ARBLOST_DEFAULT            (_I2C_IFS_ARBLOST_DEFAULT << 9)  /**< Shifted mode DEFAULT for I2C_IFS */
538 #define I2C_IFS_BUSERR                     (0x1UL << 10)                    /**< Set BUSERR Interrupt Flag */
539 #define _I2C_IFS_BUSERR_SHIFT              10                               /**< Shift value for I2C_BUSERR */
540 #define _I2C_IFS_BUSERR_MASK               0x400UL                          /**< Bit mask for I2C_BUSERR */
541 #define _I2C_IFS_BUSERR_DEFAULT            0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
542 #define I2C_IFS_BUSERR_DEFAULT             (_I2C_IFS_BUSERR_DEFAULT << 10)  /**< Shifted mode DEFAULT for I2C_IFS */
543 #define I2C_IFS_BUSHOLD                    (0x1UL << 11)                    /**< Set BUSHOLD Interrupt Flag */
544 #define _I2C_IFS_BUSHOLD_SHIFT             11                               /**< Shift value for I2C_BUSHOLD */
545 #define _I2C_IFS_BUSHOLD_MASK              0x800UL                          /**< Bit mask for I2C_BUSHOLD */
546 #define _I2C_IFS_BUSHOLD_DEFAULT           0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
547 #define I2C_IFS_BUSHOLD_DEFAULT            (_I2C_IFS_BUSHOLD_DEFAULT << 11) /**< Shifted mode DEFAULT for I2C_IFS */
548 #define I2C_IFS_TXOF                       (0x1UL << 12)                    /**< Set TXOF Interrupt Flag */
549 #define _I2C_IFS_TXOF_SHIFT                12                               /**< Shift value for I2C_TXOF */
550 #define _I2C_IFS_TXOF_MASK                 0x1000UL                         /**< Bit mask for I2C_TXOF */
551 #define _I2C_IFS_TXOF_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
552 #define I2C_IFS_TXOF_DEFAULT               (_I2C_IFS_TXOF_DEFAULT << 12)    /**< Shifted mode DEFAULT for I2C_IFS */
553 #define I2C_IFS_RXUF                       (0x1UL << 13)                    /**< Set RXUF Interrupt Flag */
554 #define _I2C_IFS_RXUF_SHIFT                13                               /**< Shift value for I2C_RXUF */
555 #define _I2C_IFS_RXUF_MASK                 0x2000UL                         /**< Bit mask for I2C_RXUF */
556 #define _I2C_IFS_RXUF_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
557 #define I2C_IFS_RXUF_DEFAULT               (_I2C_IFS_RXUF_DEFAULT << 13)    /**< Shifted mode DEFAULT for I2C_IFS */
558 #define I2C_IFS_BITO                       (0x1UL << 14)                    /**< Set BITO Interrupt Flag */
559 #define _I2C_IFS_BITO_SHIFT                14                               /**< Shift value for I2C_BITO */
560 #define _I2C_IFS_BITO_MASK                 0x4000UL                         /**< Bit mask for I2C_BITO */
561 #define _I2C_IFS_BITO_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
562 #define I2C_IFS_BITO_DEFAULT               (_I2C_IFS_BITO_DEFAULT << 14)    /**< Shifted mode DEFAULT for I2C_IFS */
563 #define I2C_IFS_CLTO                       (0x1UL << 15)                    /**< Set CLTO Interrupt Flag */
564 #define _I2C_IFS_CLTO_SHIFT                15                               /**< Shift value for I2C_CLTO */
565 #define _I2C_IFS_CLTO_MASK                 0x8000UL                         /**< Bit mask for I2C_CLTO */
566 #define _I2C_IFS_CLTO_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
567 #define I2C_IFS_CLTO_DEFAULT               (_I2C_IFS_CLTO_DEFAULT << 15)    /**< Shifted mode DEFAULT for I2C_IFS */
568 #define I2C_IFS_SSTOP                      (0x1UL << 16)                    /**< Set SSTOP Interrupt Flag */
569 #define _I2C_IFS_SSTOP_SHIFT               16                               /**< Shift value for I2C_SSTOP */
570 #define _I2C_IFS_SSTOP_MASK                0x10000UL                        /**< Bit mask for I2C_SSTOP */
571 #define _I2C_IFS_SSTOP_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
572 #define I2C_IFS_SSTOP_DEFAULT              (_I2C_IFS_SSTOP_DEFAULT << 16)   /**< Shifted mode DEFAULT for I2C_IFS */
573 #define I2C_IFS_RXFULL                     (0x1UL << 17)                    /**< Set RXFULL Interrupt Flag */
574 #define _I2C_IFS_RXFULL_SHIFT              17                               /**< Shift value for I2C_RXFULL */
575 #define _I2C_IFS_RXFULL_MASK               0x20000UL                        /**< Bit mask for I2C_RXFULL */
576 #define _I2C_IFS_RXFULL_DEFAULT            0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
577 #define I2C_IFS_RXFULL_DEFAULT             (_I2C_IFS_RXFULL_DEFAULT << 17)  /**< Shifted mode DEFAULT for I2C_IFS */
578 #define I2C_IFS_CLERR                      (0x1UL << 18)                    /**< Set CLERR Interrupt Flag */
579 #define _I2C_IFS_CLERR_SHIFT               18                               /**< Shift value for I2C_CLERR */
580 #define _I2C_IFS_CLERR_MASK                0x40000UL                        /**< Bit mask for I2C_CLERR */
581 #define _I2C_IFS_CLERR_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_IFS */
582 #define I2C_IFS_CLERR_DEFAULT              (_I2C_IFS_CLERR_DEFAULT << 18)   /**< Shifted mode DEFAULT for I2C_IFS */
583 
584 /* Bit fields for I2C IFC */
585 #define _I2C_IFC_RESETVALUE                0x00000000UL                     /**< Default value for I2C_IFC */
586 #define _I2C_IFC_MASK                      0x0007FFCFUL                     /**< Mask for I2C_IFC */
587 #define I2C_IFC_START                      (0x1UL << 0)                     /**< Clear START Interrupt Flag */
588 #define _I2C_IFC_START_SHIFT               0                                /**< Shift value for I2C_START */
589 #define _I2C_IFC_START_MASK                0x1UL                            /**< Bit mask for I2C_START */
590 #define _I2C_IFC_START_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
591 #define I2C_IFC_START_DEFAULT              (_I2C_IFC_START_DEFAULT << 0)    /**< Shifted mode DEFAULT for I2C_IFC */
592 #define I2C_IFC_RSTART                     (0x1UL << 1)                     /**< Clear RSTART Interrupt Flag */
593 #define _I2C_IFC_RSTART_SHIFT              1                                /**< Shift value for I2C_RSTART */
594 #define _I2C_IFC_RSTART_MASK               0x2UL                            /**< Bit mask for I2C_RSTART */
595 #define _I2C_IFC_RSTART_DEFAULT            0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
596 #define I2C_IFC_RSTART_DEFAULT             (_I2C_IFC_RSTART_DEFAULT << 1)   /**< Shifted mode DEFAULT for I2C_IFC */
597 #define I2C_IFC_ADDR                       (0x1UL << 2)                     /**< Clear ADDR Interrupt Flag */
598 #define _I2C_IFC_ADDR_SHIFT                2                                /**< Shift value for I2C_ADDR */
599 #define _I2C_IFC_ADDR_MASK                 0x4UL                            /**< Bit mask for I2C_ADDR */
600 #define _I2C_IFC_ADDR_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
601 #define I2C_IFC_ADDR_DEFAULT               (_I2C_IFC_ADDR_DEFAULT << 2)     /**< Shifted mode DEFAULT for I2C_IFC */
602 #define I2C_IFC_TXC                        (0x1UL << 3)                     /**< Clear TXC Interrupt Flag */
603 #define _I2C_IFC_TXC_SHIFT                 3                                /**< Shift value for I2C_TXC */
604 #define _I2C_IFC_TXC_MASK                  0x8UL                            /**< Bit mask for I2C_TXC */
605 #define _I2C_IFC_TXC_DEFAULT               0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
606 #define I2C_IFC_TXC_DEFAULT                (_I2C_IFC_TXC_DEFAULT << 3)      /**< Shifted mode DEFAULT for I2C_IFC */
607 #define I2C_IFC_ACK                        (0x1UL << 6)                     /**< Clear ACK Interrupt Flag */
608 #define _I2C_IFC_ACK_SHIFT                 6                                /**< Shift value for I2C_ACK */
609 #define _I2C_IFC_ACK_MASK                  0x40UL                           /**< Bit mask for I2C_ACK */
610 #define _I2C_IFC_ACK_DEFAULT               0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
611 #define I2C_IFC_ACK_DEFAULT                (_I2C_IFC_ACK_DEFAULT << 6)      /**< Shifted mode DEFAULT for I2C_IFC */
612 #define I2C_IFC_NACK                       (0x1UL << 7)                     /**< Clear NACK Interrupt Flag */
613 #define _I2C_IFC_NACK_SHIFT                7                                /**< Shift value for I2C_NACK */
614 #define _I2C_IFC_NACK_MASK                 0x80UL                           /**< Bit mask for I2C_NACK */
615 #define _I2C_IFC_NACK_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
616 #define I2C_IFC_NACK_DEFAULT               (_I2C_IFC_NACK_DEFAULT << 7)     /**< Shifted mode DEFAULT for I2C_IFC */
617 #define I2C_IFC_MSTOP                      (0x1UL << 8)                     /**< Clear MSTOP Interrupt Flag */
618 #define _I2C_IFC_MSTOP_SHIFT               8                                /**< Shift value for I2C_MSTOP */
619 #define _I2C_IFC_MSTOP_MASK                0x100UL                          /**< Bit mask for I2C_MSTOP */
620 #define _I2C_IFC_MSTOP_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
621 #define I2C_IFC_MSTOP_DEFAULT              (_I2C_IFC_MSTOP_DEFAULT << 8)    /**< Shifted mode DEFAULT for I2C_IFC */
622 #define I2C_IFC_ARBLOST                    (0x1UL << 9)                     /**< Clear ARBLOST Interrupt Flag */
623 #define _I2C_IFC_ARBLOST_SHIFT             9                                /**< Shift value for I2C_ARBLOST */
624 #define _I2C_IFC_ARBLOST_MASK              0x200UL                          /**< Bit mask for I2C_ARBLOST */
625 #define _I2C_IFC_ARBLOST_DEFAULT           0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
626 #define I2C_IFC_ARBLOST_DEFAULT            (_I2C_IFC_ARBLOST_DEFAULT << 9)  /**< Shifted mode DEFAULT for I2C_IFC */
627 #define I2C_IFC_BUSERR                     (0x1UL << 10)                    /**< Clear BUSERR Interrupt Flag */
628 #define _I2C_IFC_BUSERR_SHIFT              10                               /**< Shift value for I2C_BUSERR */
629 #define _I2C_IFC_BUSERR_MASK               0x400UL                          /**< Bit mask for I2C_BUSERR */
630 #define _I2C_IFC_BUSERR_DEFAULT            0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
631 #define I2C_IFC_BUSERR_DEFAULT             (_I2C_IFC_BUSERR_DEFAULT << 10)  /**< Shifted mode DEFAULT for I2C_IFC */
632 #define I2C_IFC_BUSHOLD                    (0x1UL << 11)                    /**< Clear BUSHOLD Interrupt Flag */
633 #define _I2C_IFC_BUSHOLD_SHIFT             11                               /**< Shift value for I2C_BUSHOLD */
634 #define _I2C_IFC_BUSHOLD_MASK              0x800UL                          /**< Bit mask for I2C_BUSHOLD */
635 #define _I2C_IFC_BUSHOLD_DEFAULT           0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
636 #define I2C_IFC_BUSHOLD_DEFAULT            (_I2C_IFC_BUSHOLD_DEFAULT << 11) /**< Shifted mode DEFAULT for I2C_IFC */
637 #define I2C_IFC_TXOF                       (0x1UL << 12)                    /**< Clear TXOF Interrupt Flag */
638 #define _I2C_IFC_TXOF_SHIFT                12                               /**< Shift value for I2C_TXOF */
639 #define _I2C_IFC_TXOF_MASK                 0x1000UL                         /**< Bit mask for I2C_TXOF */
640 #define _I2C_IFC_TXOF_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
641 #define I2C_IFC_TXOF_DEFAULT               (_I2C_IFC_TXOF_DEFAULT << 12)    /**< Shifted mode DEFAULT for I2C_IFC */
642 #define I2C_IFC_RXUF                       (0x1UL << 13)                    /**< Clear RXUF Interrupt Flag */
643 #define _I2C_IFC_RXUF_SHIFT                13                               /**< Shift value for I2C_RXUF */
644 #define _I2C_IFC_RXUF_MASK                 0x2000UL                         /**< Bit mask for I2C_RXUF */
645 #define _I2C_IFC_RXUF_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
646 #define I2C_IFC_RXUF_DEFAULT               (_I2C_IFC_RXUF_DEFAULT << 13)    /**< Shifted mode DEFAULT for I2C_IFC */
647 #define I2C_IFC_BITO                       (0x1UL << 14)                    /**< Clear BITO Interrupt Flag */
648 #define _I2C_IFC_BITO_SHIFT                14                               /**< Shift value for I2C_BITO */
649 #define _I2C_IFC_BITO_MASK                 0x4000UL                         /**< Bit mask for I2C_BITO */
650 #define _I2C_IFC_BITO_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
651 #define I2C_IFC_BITO_DEFAULT               (_I2C_IFC_BITO_DEFAULT << 14)    /**< Shifted mode DEFAULT for I2C_IFC */
652 #define I2C_IFC_CLTO                       (0x1UL << 15)                    /**< Clear CLTO Interrupt Flag */
653 #define _I2C_IFC_CLTO_SHIFT                15                               /**< Shift value for I2C_CLTO */
654 #define _I2C_IFC_CLTO_MASK                 0x8000UL                         /**< Bit mask for I2C_CLTO */
655 #define _I2C_IFC_CLTO_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
656 #define I2C_IFC_CLTO_DEFAULT               (_I2C_IFC_CLTO_DEFAULT << 15)    /**< Shifted mode DEFAULT for I2C_IFC */
657 #define I2C_IFC_SSTOP                      (0x1UL << 16)                    /**< Clear SSTOP Interrupt Flag */
658 #define _I2C_IFC_SSTOP_SHIFT               16                               /**< Shift value for I2C_SSTOP */
659 #define _I2C_IFC_SSTOP_MASK                0x10000UL                        /**< Bit mask for I2C_SSTOP */
660 #define _I2C_IFC_SSTOP_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
661 #define I2C_IFC_SSTOP_DEFAULT              (_I2C_IFC_SSTOP_DEFAULT << 16)   /**< Shifted mode DEFAULT for I2C_IFC */
662 #define I2C_IFC_RXFULL                     (0x1UL << 17)                    /**< Clear RXFULL Interrupt Flag */
663 #define _I2C_IFC_RXFULL_SHIFT              17                               /**< Shift value for I2C_RXFULL */
664 #define _I2C_IFC_RXFULL_MASK               0x20000UL                        /**< Bit mask for I2C_RXFULL */
665 #define _I2C_IFC_RXFULL_DEFAULT            0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
666 #define I2C_IFC_RXFULL_DEFAULT             (_I2C_IFC_RXFULL_DEFAULT << 17)  /**< Shifted mode DEFAULT for I2C_IFC */
667 #define I2C_IFC_CLERR                      (0x1UL << 18)                    /**< Clear CLERR Interrupt Flag */
668 #define _I2C_IFC_CLERR_SHIFT               18                               /**< Shift value for I2C_CLERR */
669 #define _I2C_IFC_CLERR_MASK                0x40000UL                        /**< Bit mask for I2C_CLERR */
670 #define _I2C_IFC_CLERR_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_IFC */
671 #define I2C_IFC_CLERR_DEFAULT              (_I2C_IFC_CLERR_DEFAULT << 18)   /**< Shifted mode DEFAULT for I2C_IFC */
672 
673 /* Bit fields for I2C IEN */
674 #define _I2C_IEN_RESETVALUE                0x00000000UL                     /**< Default value for I2C_IEN */
675 #define _I2C_IEN_MASK                      0x0007FFFFUL                     /**< Mask for I2C_IEN */
676 #define I2C_IEN_START                      (0x1UL << 0)                     /**< START Interrupt Enable */
677 #define _I2C_IEN_START_SHIFT               0                                /**< Shift value for I2C_START */
678 #define _I2C_IEN_START_MASK                0x1UL                            /**< Bit mask for I2C_START */
679 #define _I2C_IEN_START_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
680 #define I2C_IEN_START_DEFAULT              (_I2C_IEN_START_DEFAULT << 0)    /**< Shifted mode DEFAULT for I2C_IEN */
681 #define I2C_IEN_RSTART                     (0x1UL << 1)                     /**< RSTART Interrupt Enable */
682 #define _I2C_IEN_RSTART_SHIFT              1                                /**< Shift value for I2C_RSTART */
683 #define _I2C_IEN_RSTART_MASK               0x2UL                            /**< Bit mask for I2C_RSTART */
684 #define _I2C_IEN_RSTART_DEFAULT            0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
685 #define I2C_IEN_RSTART_DEFAULT             (_I2C_IEN_RSTART_DEFAULT << 1)   /**< Shifted mode DEFAULT for I2C_IEN */
686 #define I2C_IEN_ADDR                       (0x1UL << 2)                     /**< ADDR Interrupt Enable */
687 #define _I2C_IEN_ADDR_SHIFT                2                                /**< Shift value for I2C_ADDR */
688 #define _I2C_IEN_ADDR_MASK                 0x4UL                            /**< Bit mask for I2C_ADDR */
689 #define _I2C_IEN_ADDR_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
690 #define I2C_IEN_ADDR_DEFAULT               (_I2C_IEN_ADDR_DEFAULT << 2)     /**< Shifted mode DEFAULT for I2C_IEN */
691 #define I2C_IEN_TXC                        (0x1UL << 3)                     /**< TXC Interrupt Enable */
692 #define _I2C_IEN_TXC_SHIFT                 3                                /**< Shift value for I2C_TXC */
693 #define _I2C_IEN_TXC_MASK                  0x8UL                            /**< Bit mask for I2C_TXC */
694 #define _I2C_IEN_TXC_DEFAULT               0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
695 #define I2C_IEN_TXC_DEFAULT                (_I2C_IEN_TXC_DEFAULT << 3)      /**< Shifted mode DEFAULT for I2C_IEN */
696 #define I2C_IEN_TXBL                       (0x1UL << 4)                     /**< TXBL Interrupt Enable */
697 #define _I2C_IEN_TXBL_SHIFT                4                                /**< Shift value for I2C_TXBL */
698 #define _I2C_IEN_TXBL_MASK                 0x10UL                           /**< Bit mask for I2C_TXBL */
699 #define _I2C_IEN_TXBL_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
700 #define I2C_IEN_TXBL_DEFAULT               (_I2C_IEN_TXBL_DEFAULT << 4)     /**< Shifted mode DEFAULT for I2C_IEN */
701 #define I2C_IEN_RXDATAV                    (0x1UL << 5)                     /**< RXDATAV Interrupt Enable */
702 #define _I2C_IEN_RXDATAV_SHIFT             5                                /**< Shift value for I2C_RXDATAV */
703 #define _I2C_IEN_RXDATAV_MASK              0x20UL                           /**< Bit mask for I2C_RXDATAV */
704 #define _I2C_IEN_RXDATAV_DEFAULT           0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
705 #define I2C_IEN_RXDATAV_DEFAULT            (_I2C_IEN_RXDATAV_DEFAULT << 5)  /**< Shifted mode DEFAULT for I2C_IEN */
706 #define I2C_IEN_ACK                        (0x1UL << 6)                     /**< ACK Interrupt Enable */
707 #define _I2C_IEN_ACK_SHIFT                 6                                /**< Shift value for I2C_ACK */
708 #define _I2C_IEN_ACK_MASK                  0x40UL                           /**< Bit mask for I2C_ACK */
709 #define _I2C_IEN_ACK_DEFAULT               0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
710 #define I2C_IEN_ACK_DEFAULT                (_I2C_IEN_ACK_DEFAULT << 6)      /**< Shifted mode DEFAULT for I2C_IEN */
711 #define I2C_IEN_NACK                       (0x1UL << 7)                     /**< NACK Interrupt Enable */
712 #define _I2C_IEN_NACK_SHIFT                7                                /**< Shift value for I2C_NACK */
713 #define _I2C_IEN_NACK_MASK                 0x80UL                           /**< Bit mask for I2C_NACK */
714 #define _I2C_IEN_NACK_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
715 #define I2C_IEN_NACK_DEFAULT               (_I2C_IEN_NACK_DEFAULT << 7)     /**< Shifted mode DEFAULT for I2C_IEN */
716 #define I2C_IEN_MSTOP                      (0x1UL << 8)                     /**< MSTOP Interrupt Enable */
717 #define _I2C_IEN_MSTOP_SHIFT               8                                /**< Shift value for I2C_MSTOP */
718 #define _I2C_IEN_MSTOP_MASK                0x100UL                          /**< Bit mask for I2C_MSTOP */
719 #define _I2C_IEN_MSTOP_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
720 #define I2C_IEN_MSTOP_DEFAULT              (_I2C_IEN_MSTOP_DEFAULT << 8)    /**< Shifted mode DEFAULT for I2C_IEN */
721 #define I2C_IEN_ARBLOST                    (0x1UL << 9)                     /**< ARBLOST Interrupt Enable */
722 #define _I2C_IEN_ARBLOST_SHIFT             9                                /**< Shift value for I2C_ARBLOST */
723 #define _I2C_IEN_ARBLOST_MASK              0x200UL                          /**< Bit mask for I2C_ARBLOST */
724 #define _I2C_IEN_ARBLOST_DEFAULT           0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
725 #define I2C_IEN_ARBLOST_DEFAULT            (_I2C_IEN_ARBLOST_DEFAULT << 9)  /**< Shifted mode DEFAULT for I2C_IEN */
726 #define I2C_IEN_BUSERR                     (0x1UL << 10)                    /**< BUSERR Interrupt Enable */
727 #define _I2C_IEN_BUSERR_SHIFT              10                               /**< Shift value for I2C_BUSERR */
728 #define _I2C_IEN_BUSERR_MASK               0x400UL                          /**< Bit mask for I2C_BUSERR */
729 #define _I2C_IEN_BUSERR_DEFAULT            0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
730 #define I2C_IEN_BUSERR_DEFAULT             (_I2C_IEN_BUSERR_DEFAULT << 10)  /**< Shifted mode DEFAULT for I2C_IEN */
731 #define I2C_IEN_BUSHOLD                    (0x1UL << 11)                    /**< BUSHOLD Interrupt Enable */
732 #define _I2C_IEN_BUSHOLD_SHIFT             11                               /**< Shift value for I2C_BUSHOLD */
733 #define _I2C_IEN_BUSHOLD_MASK              0x800UL                          /**< Bit mask for I2C_BUSHOLD */
734 #define _I2C_IEN_BUSHOLD_DEFAULT           0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
735 #define I2C_IEN_BUSHOLD_DEFAULT            (_I2C_IEN_BUSHOLD_DEFAULT << 11) /**< Shifted mode DEFAULT for I2C_IEN */
736 #define I2C_IEN_TXOF                       (0x1UL << 12)                    /**< TXOF Interrupt Enable */
737 #define _I2C_IEN_TXOF_SHIFT                12                               /**< Shift value for I2C_TXOF */
738 #define _I2C_IEN_TXOF_MASK                 0x1000UL                         /**< Bit mask for I2C_TXOF */
739 #define _I2C_IEN_TXOF_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
740 #define I2C_IEN_TXOF_DEFAULT               (_I2C_IEN_TXOF_DEFAULT << 12)    /**< Shifted mode DEFAULT for I2C_IEN */
741 #define I2C_IEN_RXUF                       (0x1UL << 13)                    /**< RXUF Interrupt Enable */
742 #define _I2C_IEN_RXUF_SHIFT                13                               /**< Shift value for I2C_RXUF */
743 #define _I2C_IEN_RXUF_MASK                 0x2000UL                         /**< Bit mask for I2C_RXUF */
744 #define _I2C_IEN_RXUF_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
745 #define I2C_IEN_RXUF_DEFAULT               (_I2C_IEN_RXUF_DEFAULT << 13)    /**< Shifted mode DEFAULT for I2C_IEN */
746 #define I2C_IEN_BITO                       (0x1UL << 14)                    /**< BITO Interrupt Enable */
747 #define _I2C_IEN_BITO_SHIFT                14                               /**< Shift value for I2C_BITO */
748 #define _I2C_IEN_BITO_MASK                 0x4000UL                         /**< Bit mask for I2C_BITO */
749 #define _I2C_IEN_BITO_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
750 #define I2C_IEN_BITO_DEFAULT               (_I2C_IEN_BITO_DEFAULT << 14)    /**< Shifted mode DEFAULT for I2C_IEN */
751 #define I2C_IEN_CLTO                       (0x1UL << 15)                    /**< CLTO Interrupt Enable */
752 #define _I2C_IEN_CLTO_SHIFT                15                               /**< Shift value for I2C_CLTO */
753 #define _I2C_IEN_CLTO_MASK                 0x8000UL                         /**< Bit mask for I2C_CLTO */
754 #define _I2C_IEN_CLTO_DEFAULT              0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
755 #define I2C_IEN_CLTO_DEFAULT               (_I2C_IEN_CLTO_DEFAULT << 15)    /**< Shifted mode DEFAULT for I2C_IEN */
756 #define I2C_IEN_SSTOP                      (0x1UL << 16)                    /**< SSTOP Interrupt Enable */
757 #define _I2C_IEN_SSTOP_SHIFT               16                               /**< Shift value for I2C_SSTOP */
758 #define _I2C_IEN_SSTOP_MASK                0x10000UL                        /**< Bit mask for I2C_SSTOP */
759 #define _I2C_IEN_SSTOP_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
760 #define I2C_IEN_SSTOP_DEFAULT              (_I2C_IEN_SSTOP_DEFAULT << 16)   /**< Shifted mode DEFAULT for I2C_IEN */
761 #define I2C_IEN_RXFULL                     (0x1UL << 17)                    /**< RXFULL Interrupt Enable */
762 #define _I2C_IEN_RXFULL_SHIFT              17                               /**< Shift value for I2C_RXFULL */
763 #define _I2C_IEN_RXFULL_MASK               0x20000UL                        /**< Bit mask for I2C_RXFULL */
764 #define _I2C_IEN_RXFULL_DEFAULT            0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
765 #define I2C_IEN_RXFULL_DEFAULT             (_I2C_IEN_RXFULL_DEFAULT << 17)  /**< Shifted mode DEFAULT for I2C_IEN */
766 #define I2C_IEN_CLERR                      (0x1UL << 18)                    /**< CLERR Interrupt Enable */
767 #define _I2C_IEN_CLERR_SHIFT               18                               /**< Shift value for I2C_CLERR */
768 #define _I2C_IEN_CLERR_MASK                0x40000UL                        /**< Bit mask for I2C_CLERR */
769 #define _I2C_IEN_CLERR_DEFAULT             0x00000000UL                     /**< Mode DEFAULT for I2C_IEN */
770 #define I2C_IEN_CLERR_DEFAULT              (_I2C_IEN_CLERR_DEFAULT << 18)   /**< Shifted mode DEFAULT for I2C_IEN */
771 
772 /* Bit fields for I2C ROUTEPEN */
773 #define _I2C_ROUTEPEN_RESETVALUE           0x00000000UL                        /**< Default value for I2C_ROUTEPEN */
774 #define _I2C_ROUTEPEN_MASK                 0x00000003UL                        /**< Mask for I2C_ROUTEPEN */
775 #define I2C_ROUTEPEN_SDAPEN                (0x1UL << 0)                        /**< SDA Pin Enable */
776 #define _I2C_ROUTEPEN_SDAPEN_SHIFT         0                                   /**< Shift value for I2C_SDAPEN */
777 #define _I2C_ROUTEPEN_SDAPEN_MASK          0x1UL                               /**< Bit mask for I2C_SDAPEN */
778 #define _I2C_ROUTEPEN_SDAPEN_DEFAULT       0x00000000UL                        /**< Mode DEFAULT for I2C_ROUTEPEN */
779 #define I2C_ROUTEPEN_SDAPEN_DEFAULT        (_I2C_ROUTEPEN_SDAPEN_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_ROUTEPEN */
780 #define I2C_ROUTEPEN_SCLPEN                (0x1UL << 1)                        /**< SCL Pin Enable */
781 #define _I2C_ROUTEPEN_SCLPEN_SHIFT         1                                   /**< Shift value for I2C_SCLPEN */
782 #define _I2C_ROUTEPEN_SCLPEN_MASK          0x2UL                               /**< Bit mask for I2C_SCLPEN */
783 #define _I2C_ROUTEPEN_SCLPEN_DEFAULT       0x00000000UL                        /**< Mode DEFAULT for I2C_ROUTEPEN */
784 #define I2C_ROUTEPEN_SCLPEN_DEFAULT        (_I2C_ROUTEPEN_SCLPEN_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_ROUTEPEN */
785 
786 /* Bit fields for I2C ROUTELOC0 */
787 #define _I2C_ROUTELOC0_RESETVALUE          0x00000000UL                         /**< Default value for I2C_ROUTELOC0 */
788 #define _I2C_ROUTELOC0_MASK                0x00001F1FUL                         /**< Mask for I2C_ROUTELOC0 */
789 #define _I2C_ROUTELOC0_SDALOC_SHIFT        0                                    /**< Shift value for I2C_SDALOC */
790 #define _I2C_ROUTELOC0_SDALOC_MASK         0x1FUL                               /**< Bit mask for I2C_SDALOC */
791 #define _I2C_ROUTELOC0_SDALOC_LOC0         0x00000000UL                         /**< Mode LOC0 for I2C_ROUTELOC0 */
792 #define _I2C_ROUTELOC0_SDALOC_DEFAULT      0x00000000UL                         /**< Mode DEFAULT for I2C_ROUTELOC0 */
793 #define _I2C_ROUTELOC0_SDALOC_LOC1         0x00000001UL                         /**< Mode LOC1 for I2C_ROUTELOC0 */
794 #define _I2C_ROUTELOC0_SDALOC_LOC2         0x00000002UL                         /**< Mode LOC2 for I2C_ROUTELOC0 */
795 #define _I2C_ROUTELOC0_SDALOC_LOC3         0x00000003UL                         /**< Mode LOC3 for I2C_ROUTELOC0 */
796 #define _I2C_ROUTELOC0_SDALOC_LOC4         0x00000004UL                         /**< Mode LOC4 for I2C_ROUTELOC0 */
797 #define _I2C_ROUTELOC0_SDALOC_LOC5         0x00000005UL                         /**< Mode LOC5 for I2C_ROUTELOC0 */
798 #define _I2C_ROUTELOC0_SDALOC_LOC6         0x00000006UL                         /**< Mode LOC6 for I2C_ROUTELOC0 */
799 #define _I2C_ROUTELOC0_SDALOC_LOC7         0x00000007UL                         /**< Mode LOC7 for I2C_ROUTELOC0 */
800 #define _I2C_ROUTELOC0_SDALOC_LOC8         0x00000008UL                         /**< Mode LOC8 for I2C_ROUTELOC0 */
801 #define _I2C_ROUTELOC0_SDALOC_LOC9         0x00000009UL                         /**< Mode LOC9 for I2C_ROUTELOC0 */
802 #define _I2C_ROUTELOC0_SDALOC_LOC10        0x0000000AUL                         /**< Mode LOC10 for I2C_ROUTELOC0 */
803 #define _I2C_ROUTELOC0_SDALOC_LOC11        0x0000000BUL                         /**< Mode LOC11 for I2C_ROUTELOC0 */
804 #define _I2C_ROUTELOC0_SDALOC_LOC12        0x0000000CUL                         /**< Mode LOC12 for I2C_ROUTELOC0 */
805 #define _I2C_ROUTELOC0_SDALOC_LOC13        0x0000000DUL                         /**< Mode LOC13 for I2C_ROUTELOC0 */
806 #define _I2C_ROUTELOC0_SDALOC_LOC14        0x0000000EUL                         /**< Mode LOC14 for I2C_ROUTELOC0 */
807 #define _I2C_ROUTELOC0_SDALOC_LOC15        0x0000000FUL                         /**< Mode LOC15 for I2C_ROUTELOC0 */
808 #define _I2C_ROUTELOC0_SDALOC_LOC16        0x00000010UL                         /**< Mode LOC16 for I2C_ROUTELOC0 */
809 #define _I2C_ROUTELOC0_SDALOC_LOC17        0x00000011UL                         /**< Mode LOC17 for I2C_ROUTELOC0 */
810 #define _I2C_ROUTELOC0_SDALOC_LOC18        0x00000012UL                         /**< Mode LOC18 for I2C_ROUTELOC0 */
811 #define _I2C_ROUTELOC0_SDALOC_LOC19        0x00000013UL                         /**< Mode LOC19 for I2C_ROUTELOC0 */
812 #define _I2C_ROUTELOC0_SDALOC_LOC20        0x00000014UL                         /**< Mode LOC20 for I2C_ROUTELOC0 */
813 #define _I2C_ROUTELOC0_SDALOC_LOC21        0x00000015UL                         /**< Mode LOC21 for I2C_ROUTELOC0 */
814 #define _I2C_ROUTELOC0_SDALOC_LOC22        0x00000016UL                         /**< Mode LOC22 for I2C_ROUTELOC0 */
815 #define _I2C_ROUTELOC0_SDALOC_LOC23        0x00000017UL                         /**< Mode LOC23 for I2C_ROUTELOC0 */
816 #define _I2C_ROUTELOC0_SDALOC_LOC24        0x00000018UL                         /**< Mode LOC24 for I2C_ROUTELOC0 */
817 #define _I2C_ROUTELOC0_SDALOC_LOC25        0x00000019UL                         /**< Mode LOC25 for I2C_ROUTELOC0 */
818 #define _I2C_ROUTELOC0_SDALOC_LOC26        0x0000001AUL                         /**< Mode LOC26 for I2C_ROUTELOC0 */
819 #define _I2C_ROUTELOC0_SDALOC_LOC27        0x0000001BUL                         /**< Mode LOC27 for I2C_ROUTELOC0 */
820 #define _I2C_ROUTELOC0_SDALOC_LOC28        0x0000001CUL                         /**< Mode LOC28 for I2C_ROUTELOC0 */
821 #define _I2C_ROUTELOC0_SDALOC_LOC29        0x0000001DUL                         /**< Mode LOC29 for I2C_ROUTELOC0 */
822 #define _I2C_ROUTELOC0_SDALOC_LOC30        0x0000001EUL                         /**< Mode LOC30 for I2C_ROUTELOC0 */
823 #define _I2C_ROUTELOC0_SDALOC_LOC31        0x0000001FUL                         /**< Mode LOC31 for I2C_ROUTELOC0 */
824 #define I2C_ROUTELOC0_SDALOC_LOC0          (_I2C_ROUTELOC0_SDALOC_LOC0 << 0)    /**< Shifted mode LOC0 for I2C_ROUTELOC0 */
825 #define I2C_ROUTELOC0_SDALOC_DEFAULT       (_I2C_ROUTELOC0_SDALOC_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_ROUTELOC0 */
826 #define I2C_ROUTELOC0_SDALOC_LOC1          (_I2C_ROUTELOC0_SDALOC_LOC1 << 0)    /**< Shifted mode LOC1 for I2C_ROUTELOC0 */
827 #define I2C_ROUTELOC0_SDALOC_LOC2          (_I2C_ROUTELOC0_SDALOC_LOC2 << 0)    /**< Shifted mode LOC2 for I2C_ROUTELOC0 */
828 #define I2C_ROUTELOC0_SDALOC_LOC3          (_I2C_ROUTELOC0_SDALOC_LOC3 << 0)    /**< Shifted mode LOC3 for I2C_ROUTELOC0 */
829 #define I2C_ROUTELOC0_SDALOC_LOC4          (_I2C_ROUTELOC0_SDALOC_LOC4 << 0)    /**< Shifted mode LOC4 for I2C_ROUTELOC0 */
830 #define I2C_ROUTELOC0_SDALOC_LOC5          (_I2C_ROUTELOC0_SDALOC_LOC5 << 0)    /**< Shifted mode LOC5 for I2C_ROUTELOC0 */
831 #define I2C_ROUTELOC0_SDALOC_LOC6          (_I2C_ROUTELOC0_SDALOC_LOC6 << 0)    /**< Shifted mode LOC6 for I2C_ROUTELOC0 */
832 #define I2C_ROUTELOC0_SDALOC_LOC7          (_I2C_ROUTELOC0_SDALOC_LOC7 << 0)    /**< Shifted mode LOC7 for I2C_ROUTELOC0 */
833 #define I2C_ROUTELOC0_SDALOC_LOC8          (_I2C_ROUTELOC0_SDALOC_LOC8 << 0)    /**< Shifted mode LOC8 for I2C_ROUTELOC0 */
834 #define I2C_ROUTELOC0_SDALOC_LOC9          (_I2C_ROUTELOC0_SDALOC_LOC9 << 0)    /**< Shifted mode LOC9 for I2C_ROUTELOC0 */
835 #define I2C_ROUTELOC0_SDALOC_LOC10         (_I2C_ROUTELOC0_SDALOC_LOC10 << 0)   /**< Shifted mode LOC10 for I2C_ROUTELOC0 */
836 #define I2C_ROUTELOC0_SDALOC_LOC11         (_I2C_ROUTELOC0_SDALOC_LOC11 << 0)   /**< Shifted mode LOC11 for I2C_ROUTELOC0 */
837 #define I2C_ROUTELOC0_SDALOC_LOC12         (_I2C_ROUTELOC0_SDALOC_LOC12 << 0)   /**< Shifted mode LOC12 for I2C_ROUTELOC0 */
838 #define I2C_ROUTELOC0_SDALOC_LOC13         (_I2C_ROUTELOC0_SDALOC_LOC13 << 0)   /**< Shifted mode LOC13 for I2C_ROUTELOC0 */
839 #define I2C_ROUTELOC0_SDALOC_LOC14         (_I2C_ROUTELOC0_SDALOC_LOC14 << 0)   /**< Shifted mode LOC14 for I2C_ROUTELOC0 */
840 #define I2C_ROUTELOC0_SDALOC_LOC15         (_I2C_ROUTELOC0_SDALOC_LOC15 << 0)   /**< Shifted mode LOC15 for I2C_ROUTELOC0 */
841 #define I2C_ROUTELOC0_SDALOC_LOC16         (_I2C_ROUTELOC0_SDALOC_LOC16 << 0)   /**< Shifted mode LOC16 for I2C_ROUTELOC0 */
842 #define I2C_ROUTELOC0_SDALOC_LOC17         (_I2C_ROUTELOC0_SDALOC_LOC17 << 0)   /**< Shifted mode LOC17 for I2C_ROUTELOC0 */
843 #define I2C_ROUTELOC0_SDALOC_LOC18         (_I2C_ROUTELOC0_SDALOC_LOC18 << 0)   /**< Shifted mode LOC18 for I2C_ROUTELOC0 */
844 #define I2C_ROUTELOC0_SDALOC_LOC19         (_I2C_ROUTELOC0_SDALOC_LOC19 << 0)   /**< Shifted mode LOC19 for I2C_ROUTELOC0 */
845 #define I2C_ROUTELOC0_SDALOC_LOC20         (_I2C_ROUTELOC0_SDALOC_LOC20 << 0)   /**< Shifted mode LOC20 for I2C_ROUTELOC0 */
846 #define I2C_ROUTELOC0_SDALOC_LOC21         (_I2C_ROUTELOC0_SDALOC_LOC21 << 0)   /**< Shifted mode LOC21 for I2C_ROUTELOC0 */
847 #define I2C_ROUTELOC0_SDALOC_LOC22         (_I2C_ROUTELOC0_SDALOC_LOC22 << 0)   /**< Shifted mode LOC22 for I2C_ROUTELOC0 */
848 #define I2C_ROUTELOC0_SDALOC_LOC23         (_I2C_ROUTELOC0_SDALOC_LOC23 << 0)   /**< Shifted mode LOC23 for I2C_ROUTELOC0 */
849 #define I2C_ROUTELOC0_SDALOC_LOC24         (_I2C_ROUTELOC0_SDALOC_LOC24 << 0)   /**< Shifted mode LOC24 for I2C_ROUTELOC0 */
850 #define I2C_ROUTELOC0_SDALOC_LOC25         (_I2C_ROUTELOC0_SDALOC_LOC25 << 0)   /**< Shifted mode LOC25 for I2C_ROUTELOC0 */
851 #define I2C_ROUTELOC0_SDALOC_LOC26         (_I2C_ROUTELOC0_SDALOC_LOC26 << 0)   /**< Shifted mode LOC26 for I2C_ROUTELOC0 */
852 #define I2C_ROUTELOC0_SDALOC_LOC27         (_I2C_ROUTELOC0_SDALOC_LOC27 << 0)   /**< Shifted mode LOC27 for I2C_ROUTELOC0 */
853 #define I2C_ROUTELOC0_SDALOC_LOC28         (_I2C_ROUTELOC0_SDALOC_LOC28 << 0)   /**< Shifted mode LOC28 for I2C_ROUTELOC0 */
854 #define I2C_ROUTELOC0_SDALOC_LOC29         (_I2C_ROUTELOC0_SDALOC_LOC29 << 0)   /**< Shifted mode LOC29 for I2C_ROUTELOC0 */
855 #define I2C_ROUTELOC0_SDALOC_LOC30         (_I2C_ROUTELOC0_SDALOC_LOC30 << 0)   /**< Shifted mode LOC30 for I2C_ROUTELOC0 */
856 #define I2C_ROUTELOC0_SDALOC_LOC31         (_I2C_ROUTELOC0_SDALOC_LOC31 << 0)   /**< Shifted mode LOC31 for I2C_ROUTELOC0 */
857 #define _I2C_ROUTELOC0_SCLLOC_SHIFT        8                                    /**< Shift value for I2C_SCLLOC */
858 #define _I2C_ROUTELOC0_SCLLOC_MASK         0x1F00UL                             /**< Bit mask for I2C_SCLLOC */
859 #define _I2C_ROUTELOC0_SCLLOC_LOC0         0x00000000UL                         /**< Mode LOC0 for I2C_ROUTELOC0 */
860 #define _I2C_ROUTELOC0_SCLLOC_DEFAULT      0x00000000UL                         /**< Mode DEFAULT for I2C_ROUTELOC0 */
861 #define _I2C_ROUTELOC0_SCLLOC_LOC1         0x00000001UL                         /**< Mode LOC1 for I2C_ROUTELOC0 */
862 #define _I2C_ROUTELOC0_SCLLOC_LOC2         0x00000002UL                         /**< Mode LOC2 for I2C_ROUTELOC0 */
863 #define _I2C_ROUTELOC0_SCLLOC_LOC3         0x00000003UL                         /**< Mode LOC3 for I2C_ROUTELOC0 */
864 #define _I2C_ROUTELOC0_SCLLOC_LOC4         0x00000004UL                         /**< Mode LOC4 for I2C_ROUTELOC0 */
865 #define _I2C_ROUTELOC0_SCLLOC_LOC5         0x00000005UL                         /**< Mode LOC5 for I2C_ROUTELOC0 */
866 #define _I2C_ROUTELOC0_SCLLOC_LOC6         0x00000006UL                         /**< Mode LOC6 for I2C_ROUTELOC0 */
867 #define _I2C_ROUTELOC0_SCLLOC_LOC7         0x00000007UL                         /**< Mode LOC7 for I2C_ROUTELOC0 */
868 #define _I2C_ROUTELOC0_SCLLOC_LOC8         0x00000008UL                         /**< Mode LOC8 for I2C_ROUTELOC0 */
869 #define _I2C_ROUTELOC0_SCLLOC_LOC9         0x00000009UL                         /**< Mode LOC9 for I2C_ROUTELOC0 */
870 #define _I2C_ROUTELOC0_SCLLOC_LOC10        0x0000000AUL                         /**< Mode LOC10 for I2C_ROUTELOC0 */
871 #define _I2C_ROUTELOC0_SCLLOC_LOC11        0x0000000BUL                         /**< Mode LOC11 for I2C_ROUTELOC0 */
872 #define _I2C_ROUTELOC0_SCLLOC_LOC12        0x0000000CUL                         /**< Mode LOC12 for I2C_ROUTELOC0 */
873 #define _I2C_ROUTELOC0_SCLLOC_LOC13        0x0000000DUL                         /**< Mode LOC13 for I2C_ROUTELOC0 */
874 #define _I2C_ROUTELOC0_SCLLOC_LOC14        0x0000000EUL                         /**< Mode LOC14 for I2C_ROUTELOC0 */
875 #define _I2C_ROUTELOC0_SCLLOC_LOC15        0x0000000FUL                         /**< Mode LOC15 for I2C_ROUTELOC0 */
876 #define _I2C_ROUTELOC0_SCLLOC_LOC16        0x00000010UL                         /**< Mode LOC16 for I2C_ROUTELOC0 */
877 #define _I2C_ROUTELOC0_SCLLOC_LOC17        0x00000011UL                         /**< Mode LOC17 for I2C_ROUTELOC0 */
878 #define _I2C_ROUTELOC0_SCLLOC_LOC18        0x00000012UL                         /**< Mode LOC18 for I2C_ROUTELOC0 */
879 #define _I2C_ROUTELOC0_SCLLOC_LOC19        0x00000013UL                         /**< Mode LOC19 for I2C_ROUTELOC0 */
880 #define _I2C_ROUTELOC0_SCLLOC_LOC20        0x00000014UL                         /**< Mode LOC20 for I2C_ROUTELOC0 */
881 #define _I2C_ROUTELOC0_SCLLOC_LOC21        0x00000015UL                         /**< Mode LOC21 for I2C_ROUTELOC0 */
882 #define _I2C_ROUTELOC0_SCLLOC_LOC22        0x00000016UL                         /**< Mode LOC22 for I2C_ROUTELOC0 */
883 #define _I2C_ROUTELOC0_SCLLOC_LOC23        0x00000017UL                         /**< Mode LOC23 for I2C_ROUTELOC0 */
884 #define _I2C_ROUTELOC0_SCLLOC_LOC24        0x00000018UL                         /**< Mode LOC24 for I2C_ROUTELOC0 */
885 #define _I2C_ROUTELOC0_SCLLOC_LOC25        0x00000019UL                         /**< Mode LOC25 for I2C_ROUTELOC0 */
886 #define _I2C_ROUTELOC0_SCLLOC_LOC26        0x0000001AUL                         /**< Mode LOC26 for I2C_ROUTELOC0 */
887 #define _I2C_ROUTELOC0_SCLLOC_LOC27        0x0000001BUL                         /**< Mode LOC27 for I2C_ROUTELOC0 */
888 #define _I2C_ROUTELOC0_SCLLOC_LOC28        0x0000001CUL                         /**< Mode LOC28 for I2C_ROUTELOC0 */
889 #define _I2C_ROUTELOC0_SCLLOC_LOC29        0x0000001DUL                         /**< Mode LOC29 for I2C_ROUTELOC0 */
890 #define _I2C_ROUTELOC0_SCLLOC_LOC30        0x0000001EUL                         /**< Mode LOC30 for I2C_ROUTELOC0 */
891 #define _I2C_ROUTELOC0_SCLLOC_LOC31        0x0000001FUL                         /**< Mode LOC31 for I2C_ROUTELOC0 */
892 #define I2C_ROUTELOC0_SCLLOC_LOC0          (_I2C_ROUTELOC0_SCLLOC_LOC0 << 8)    /**< Shifted mode LOC0 for I2C_ROUTELOC0 */
893 #define I2C_ROUTELOC0_SCLLOC_DEFAULT       (_I2C_ROUTELOC0_SCLLOC_DEFAULT << 8) /**< Shifted mode DEFAULT for I2C_ROUTELOC0 */
894 #define I2C_ROUTELOC0_SCLLOC_LOC1          (_I2C_ROUTELOC0_SCLLOC_LOC1 << 8)    /**< Shifted mode LOC1 for I2C_ROUTELOC0 */
895 #define I2C_ROUTELOC0_SCLLOC_LOC2          (_I2C_ROUTELOC0_SCLLOC_LOC2 << 8)    /**< Shifted mode LOC2 for I2C_ROUTELOC0 */
896 #define I2C_ROUTELOC0_SCLLOC_LOC3          (_I2C_ROUTELOC0_SCLLOC_LOC3 << 8)    /**< Shifted mode LOC3 for I2C_ROUTELOC0 */
897 #define I2C_ROUTELOC0_SCLLOC_LOC4          (_I2C_ROUTELOC0_SCLLOC_LOC4 << 8)    /**< Shifted mode LOC4 for I2C_ROUTELOC0 */
898 #define I2C_ROUTELOC0_SCLLOC_LOC5          (_I2C_ROUTELOC0_SCLLOC_LOC5 << 8)    /**< Shifted mode LOC5 for I2C_ROUTELOC0 */
899 #define I2C_ROUTELOC0_SCLLOC_LOC6          (_I2C_ROUTELOC0_SCLLOC_LOC6 << 8)    /**< Shifted mode LOC6 for I2C_ROUTELOC0 */
900 #define I2C_ROUTELOC0_SCLLOC_LOC7          (_I2C_ROUTELOC0_SCLLOC_LOC7 << 8)    /**< Shifted mode LOC7 for I2C_ROUTELOC0 */
901 #define I2C_ROUTELOC0_SCLLOC_LOC8          (_I2C_ROUTELOC0_SCLLOC_LOC8 << 8)    /**< Shifted mode LOC8 for I2C_ROUTELOC0 */
902 #define I2C_ROUTELOC0_SCLLOC_LOC9          (_I2C_ROUTELOC0_SCLLOC_LOC9 << 8)    /**< Shifted mode LOC9 for I2C_ROUTELOC0 */
903 #define I2C_ROUTELOC0_SCLLOC_LOC10         (_I2C_ROUTELOC0_SCLLOC_LOC10 << 8)   /**< Shifted mode LOC10 for I2C_ROUTELOC0 */
904 #define I2C_ROUTELOC0_SCLLOC_LOC11         (_I2C_ROUTELOC0_SCLLOC_LOC11 << 8)   /**< Shifted mode LOC11 for I2C_ROUTELOC0 */
905 #define I2C_ROUTELOC0_SCLLOC_LOC12         (_I2C_ROUTELOC0_SCLLOC_LOC12 << 8)   /**< Shifted mode LOC12 for I2C_ROUTELOC0 */
906 #define I2C_ROUTELOC0_SCLLOC_LOC13         (_I2C_ROUTELOC0_SCLLOC_LOC13 << 8)   /**< Shifted mode LOC13 for I2C_ROUTELOC0 */
907 #define I2C_ROUTELOC0_SCLLOC_LOC14         (_I2C_ROUTELOC0_SCLLOC_LOC14 << 8)   /**< Shifted mode LOC14 for I2C_ROUTELOC0 */
908 #define I2C_ROUTELOC0_SCLLOC_LOC15         (_I2C_ROUTELOC0_SCLLOC_LOC15 << 8)   /**< Shifted mode LOC15 for I2C_ROUTELOC0 */
909 #define I2C_ROUTELOC0_SCLLOC_LOC16         (_I2C_ROUTELOC0_SCLLOC_LOC16 << 8)   /**< Shifted mode LOC16 for I2C_ROUTELOC0 */
910 #define I2C_ROUTELOC0_SCLLOC_LOC17         (_I2C_ROUTELOC0_SCLLOC_LOC17 << 8)   /**< Shifted mode LOC17 for I2C_ROUTELOC0 */
911 #define I2C_ROUTELOC0_SCLLOC_LOC18         (_I2C_ROUTELOC0_SCLLOC_LOC18 << 8)   /**< Shifted mode LOC18 for I2C_ROUTELOC0 */
912 #define I2C_ROUTELOC0_SCLLOC_LOC19         (_I2C_ROUTELOC0_SCLLOC_LOC19 << 8)   /**< Shifted mode LOC19 for I2C_ROUTELOC0 */
913 #define I2C_ROUTELOC0_SCLLOC_LOC20         (_I2C_ROUTELOC0_SCLLOC_LOC20 << 8)   /**< Shifted mode LOC20 for I2C_ROUTELOC0 */
914 #define I2C_ROUTELOC0_SCLLOC_LOC21         (_I2C_ROUTELOC0_SCLLOC_LOC21 << 8)   /**< Shifted mode LOC21 for I2C_ROUTELOC0 */
915 #define I2C_ROUTELOC0_SCLLOC_LOC22         (_I2C_ROUTELOC0_SCLLOC_LOC22 << 8)   /**< Shifted mode LOC22 for I2C_ROUTELOC0 */
916 #define I2C_ROUTELOC0_SCLLOC_LOC23         (_I2C_ROUTELOC0_SCLLOC_LOC23 << 8)   /**< Shifted mode LOC23 for I2C_ROUTELOC0 */
917 #define I2C_ROUTELOC0_SCLLOC_LOC24         (_I2C_ROUTELOC0_SCLLOC_LOC24 << 8)   /**< Shifted mode LOC24 for I2C_ROUTELOC0 */
918 #define I2C_ROUTELOC0_SCLLOC_LOC25         (_I2C_ROUTELOC0_SCLLOC_LOC25 << 8)   /**< Shifted mode LOC25 for I2C_ROUTELOC0 */
919 #define I2C_ROUTELOC0_SCLLOC_LOC26         (_I2C_ROUTELOC0_SCLLOC_LOC26 << 8)   /**< Shifted mode LOC26 for I2C_ROUTELOC0 */
920 #define I2C_ROUTELOC0_SCLLOC_LOC27         (_I2C_ROUTELOC0_SCLLOC_LOC27 << 8)   /**< Shifted mode LOC27 for I2C_ROUTELOC0 */
921 #define I2C_ROUTELOC0_SCLLOC_LOC28         (_I2C_ROUTELOC0_SCLLOC_LOC28 << 8)   /**< Shifted mode LOC28 for I2C_ROUTELOC0 */
922 #define I2C_ROUTELOC0_SCLLOC_LOC29         (_I2C_ROUTELOC0_SCLLOC_LOC29 << 8)   /**< Shifted mode LOC29 for I2C_ROUTELOC0 */
923 #define I2C_ROUTELOC0_SCLLOC_LOC30         (_I2C_ROUTELOC0_SCLLOC_LOC30 << 8)   /**< Shifted mode LOC30 for I2C_ROUTELOC0 */
924 #define I2C_ROUTELOC0_SCLLOC_LOC31         (_I2C_ROUTELOC0_SCLLOC_LOC31 << 8)   /**< Shifted mode LOC31 for I2C_ROUTELOC0 */
925 
926 /** @} */
927 /** @} End of group EFR32FG13P_I2C */
928 /** @} End of group Parts */
929