1 /***************************************************************************//** 2 * @file 3 * @brief EFM32PG1B_ACMP register and bit field definitions 4 ******************************************************************************* 5 * # License 6 * <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b> 7 ******************************************************************************* 8 * 9 * SPDX-License-Identifier: Zlib 10 * 11 * The licensor of this software is Silicon Laboratories Inc. 12 * 13 * This software is provided 'as-is', without any express or implied 14 * warranty. In no event will the authors be held liable for any damages 15 * arising from the use of this software. 16 * 17 * Permission is granted to anyone to use this software for any purpose, 18 * including commercial applications, and to alter it and redistribute it 19 * freely, subject to the following restrictions: 20 * 21 * 1. The origin of this software must not be misrepresented; you must not 22 * claim that you wrote the original software. If you use this software 23 * in a product, an acknowledgment in the product documentation would be 24 * appreciated but is not required. 25 * 2. Altered source versions must be plainly marked as such, and must not be 26 * misrepresented as being the original software. 27 * 3. This notice may not be removed or altered from any source distribution. 28 * 29 ******************************************************************************/ 30 31 #if defined(__ICCARM__) 32 #pragma system_include /* Treat file as system include file. */ 33 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 34 #pragma clang system_header /* Treat file as system include file. */ 35 #endif 36 37 /***************************************************************************//** 38 * @addtogroup Parts 39 * @{ 40 ******************************************************************************/ 41 /***************************************************************************//** 42 * @defgroup EFM32PG1B_ACMP ACMP 43 * @{ 44 * @brief EFM32PG1B_ACMP Register Declaration 45 ******************************************************************************/ 46 /** ACMP Register Declaration */ 47 typedef struct { 48 __IOM uint32_t CTRL; /**< Control Register */ 49 __IOM uint32_t INPUTSEL; /**< Input Selection Register */ 50 __IM uint32_t STATUS; /**< Status Register */ 51 __IM uint32_t IF; /**< Interrupt Flag Register */ 52 __IOM uint32_t IFS; /**< Interrupt Flag Set Register */ 53 __IOM uint32_t IFC; /**< Interrupt Flag Clear Register */ 54 __IOM uint32_t IEN; /**< Interrupt Enable Register */ 55 uint32_t RESERVED0[1U]; /**< Reserved for future use **/ 56 __IM uint32_t APORTREQ; /**< APORT Request Status Register */ 57 __IM uint32_t APORTCONFLICT; /**< APORT Conflict Status Register */ 58 __IOM uint32_t HYSTERESIS0; /**< Hysteresis 0 Register */ 59 __IOM uint32_t HYSTERESIS1; /**< Hysteresis 1 Register */ 60 61 uint32_t RESERVED1[4U]; /**< Reserved for future use **/ 62 __IOM uint32_t ROUTEPEN; /**< I/O Routing Pine Enable Register */ 63 __IOM uint32_t ROUTELOC0; /**< I/O Routing Location Register */ 64 } ACMP_TypeDef; /** @} */ 65 66 /***************************************************************************//** 67 * @addtogroup EFM32PG1B_ACMP 68 * @{ 69 * @defgroup EFM32PG1B_ACMP_BitFields ACMP Bit Fields 70 * @{ 71 ******************************************************************************/ 72 73 /* Bit fields for ACMP CTRL */ 74 #define _ACMP_CTRL_RESETVALUE 0x07000000UL /**< Default value for ACMP_CTRL */ 75 #define _ACMP_CTRL_MASK 0xBF3CF70DUL /**< Mask for ACMP_CTRL */ 76 #define ACMP_CTRL_EN (0x1UL << 0) /**< Analog Comparator Enable */ 77 #define _ACMP_CTRL_EN_SHIFT 0 /**< Shift value for ACMP_EN */ 78 #define _ACMP_CTRL_EN_MASK 0x1UL /**< Bit mask for ACMP_EN */ 79 #define _ACMP_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */ 80 #define ACMP_CTRL_EN_DEFAULT (_ACMP_CTRL_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_CTRL */ 81 #define ACMP_CTRL_INACTVAL (0x1UL << 2) /**< Inactive Value */ 82 #define _ACMP_CTRL_INACTVAL_SHIFT 2 /**< Shift value for ACMP_INACTVAL */ 83 #define _ACMP_CTRL_INACTVAL_MASK 0x4UL /**< Bit mask for ACMP_INACTVAL */ 84 #define _ACMP_CTRL_INACTVAL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */ 85 #define _ACMP_CTRL_INACTVAL_LOW 0x00000000UL /**< Mode LOW for ACMP_CTRL */ 86 #define _ACMP_CTRL_INACTVAL_HIGH 0x00000001UL /**< Mode HIGH for ACMP_CTRL */ 87 #define ACMP_CTRL_INACTVAL_DEFAULT (_ACMP_CTRL_INACTVAL_DEFAULT << 2) /**< Shifted mode DEFAULT for ACMP_CTRL */ 88 #define ACMP_CTRL_INACTVAL_LOW (_ACMP_CTRL_INACTVAL_LOW << 2) /**< Shifted mode LOW for ACMP_CTRL */ 89 #define ACMP_CTRL_INACTVAL_HIGH (_ACMP_CTRL_INACTVAL_HIGH << 2) /**< Shifted mode HIGH for ACMP_CTRL */ 90 #define ACMP_CTRL_GPIOINV (0x1UL << 3) /**< Comparator GPIO Output Invert */ 91 #define _ACMP_CTRL_GPIOINV_SHIFT 3 /**< Shift value for ACMP_GPIOINV */ 92 #define _ACMP_CTRL_GPIOINV_MASK 0x8UL /**< Bit mask for ACMP_GPIOINV */ 93 #define _ACMP_CTRL_GPIOINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */ 94 #define _ACMP_CTRL_GPIOINV_NOTINV 0x00000000UL /**< Mode NOTINV for ACMP_CTRL */ 95 #define _ACMP_CTRL_GPIOINV_INV 0x00000001UL /**< Mode INV for ACMP_CTRL */ 96 #define ACMP_CTRL_GPIOINV_DEFAULT (_ACMP_CTRL_GPIOINV_DEFAULT << 3) /**< Shifted mode DEFAULT for ACMP_CTRL */ 97 #define ACMP_CTRL_GPIOINV_NOTINV (_ACMP_CTRL_GPIOINV_NOTINV << 3) /**< Shifted mode NOTINV for ACMP_CTRL */ 98 #define ACMP_CTRL_GPIOINV_INV (_ACMP_CTRL_GPIOINV_INV << 3) /**< Shifted mode INV for ACMP_CTRL */ 99 #define ACMP_CTRL_APORTXMASTERDIS (0x1UL << 8) /**< APORT Bus X Master Disable */ 100 #define _ACMP_CTRL_APORTXMASTERDIS_SHIFT 8 /**< Shift value for ACMP_APORTXMASTERDIS */ 101 #define _ACMP_CTRL_APORTXMASTERDIS_MASK 0x100UL /**< Bit mask for ACMP_APORTXMASTERDIS */ 102 #define _ACMP_CTRL_APORTXMASTERDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */ 103 #define ACMP_CTRL_APORTXMASTERDIS_DEFAULT (_ACMP_CTRL_APORTXMASTERDIS_DEFAULT << 8) /**< Shifted mode DEFAULT for ACMP_CTRL */ 104 #define ACMP_CTRL_APORTYMASTERDIS (0x1UL << 9) /**< APORT Bus Y Master Disable */ 105 #define _ACMP_CTRL_APORTYMASTERDIS_SHIFT 9 /**< Shift value for ACMP_APORTYMASTERDIS */ 106 #define _ACMP_CTRL_APORTYMASTERDIS_MASK 0x200UL /**< Bit mask for ACMP_APORTYMASTERDIS */ 107 #define _ACMP_CTRL_APORTYMASTERDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */ 108 #define ACMP_CTRL_APORTYMASTERDIS_DEFAULT (_ACMP_CTRL_APORTYMASTERDIS_DEFAULT << 9) /**< Shifted mode DEFAULT for ACMP_CTRL */ 109 #define ACMP_CTRL_APORTVMASTERDIS (0x1UL << 10) /**< APORT Bus Master Disable for Bus Selected By VASEL */ 110 #define _ACMP_CTRL_APORTVMASTERDIS_SHIFT 10 /**< Shift value for ACMP_APORTVMASTERDIS */ 111 #define _ACMP_CTRL_APORTVMASTERDIS_MASK 0x400UL /**< Bit mask for ACMP_APORTVMASTERDIS */ 112 #define _ACMP_CTRL_APORTVMASTERDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */ 113 #define ACMP_CTRL_APORTVMASTERDIS_DEFAULT (_ACMP_CTRL_APORTVMASTERDIS_DEFAULT << 10) /**< Shifted mode DEFAULT for ACMP_CTRL */ 114 #define _ACMP_CTRL_PWRSEL_SHIFT 12 /**< Shift value for ACMP_PWRSEL */ 115 #define _ACMP_CTRL_PWRSEL_MASK 0x7000UL /**< Bit mask for ACMP_PWRSEL */ 116 #define _ACMP_CTRL_PWRSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */ 117 #define _ACMP_CTRL_PWRSEL_AVDD 0x00000000UL /**< Mode AVDD for ACMP_CTRL */ 118 #define _ACMP_CTRL_PWRSEL_DVDD 0x00000001UL /**< Mode DVDD for ACMP_CTRL */ 119 #define _ACMP_CTRL_PWRSEL_IOVDD0 0x00000002UL /**< Mode IOVDD0 for ACMP_CTRL */ 120 #define _ACMP_CTRL_PWRSEL_IOVDD1 0x00000004UL /**< Mode IOVDD1 for ACMP_CTRL */ 121 #define ACMP_CTRL_PWRSEL_DEFAULT (_ACMP_CTRL_PWRSEL_DEFAULT << 12) /**< Shifted mode DEFAULT for ACMP_CTRL */ 122 #define ACMP_CTRL_PWRSEL_AVDD (_ACMP_CTRL_PWRSEL_AVDD << 12) /**< Shifted mode AVDD for ACMP_CTRL */ 123 #define ACMP_CTRL_PWRSEL_DVDD (_ACMP_CTRL_PWRSEL_DVDD << 12) /**< Shifted mode DVDD for ACMP_CTRL */ 124 #define ACMP_CTRL_PWRSEL_IOVDD0 (_ACMP_CTRL_PWRSEL_IOVDD0 << 12) /**< Shifted mode IOVDD0 for ACMP_CTRL */ 125 #define ACMP_CTRL_PWRSEL_IOVDD1 (_ACMP_CTRL_PWRSEL_IOVDD1 << 12) /**< Shifted mode IOVDD1 for ACMP_CTRL */ 126 #define ACMP_CTRL_ACCURACY (0x1UL << 15) /**< ACMP Accuracy Mode */ 127 #define _ACMP_CTRL_ACCURACY_SHIFT 15 /**< Shift value for ACMP_ACCURACY */ 128 #define _ACMP_CTRL_ACCURACY_MASK 0x8000UL /**< Bit mask for ACMP_ACCURACY */ 129 #define _ACMP_CTRL_ACCURACY_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */ 130 #define _ACMP_CTRL_ACCURACY_LOW 0x00000000UL /**< Mode LOW for ACMP_CTRL */ 131 #define _ACMP_CTRL_ACCURACY_HIGH 0x00000001UL /**< Mode HIGH for ACMP_CTRL */ 132 #define ACMP_CTRL_ACCURACY_DEFAULT (_ACMP_CTRL_ACCURACY_DEFAULT << 15) /**< Shifted mode DEFAULT for ACMP_CTRL */ 133 #define ACMP_CTRL_ACCURACY_LOW (_ACMP_CTRL_ACCURACY_LOW << 15) /**< Shifted mode LOW for ACMP_CTRL */ 134 #define ACMP_CTRL_ACCURACY_HIGH (_ACMP_CTRL_ACCURACY_HIGH << 15) /**< Shifted mode HIGH for ACMP_CTRL */ 135 #define _ACMP_CTRL_INPUTRANGE_SHIFT 18 /**< Shift value for ACMP_INPUTRANGE */ 136 #define _ACMP_CTRL_INPUTRANGE_MASK 0xC0000UL /**< Bit mask for ACMP_INPUTRANGE */ 137 #define _ACMP_CTRL_INPUTRANGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */ 138 #define _ACMP_CTRL_INPUTRANGE_FULL 0x00000000UL /**< Mode FULL for ACMP_CTRL */ 139 #define _ACMP_CTRL_INPUTRANGE_GTVDDDIV2 0x00000001UL /**< Mode GTVDDDIV2 for ACMP_CTRL */ 140 #define _ACMP_CTRL_INPUTRANGE_LTVDDDIV2 0x00000002UL /**< Mode LTVDDDIV2 for ACMP_CTRL */ 141 #define ACMP_CTRL_INPUTRANGE_DEFAULT (_ACMP_CTRL_INPUTRANGE_DEFAULT << 18) /**< Shifted mode DEFAULT for ACMP_CTRL */ 142 #define ACMP_CTRL_INPUTRANGE_FULL (_ACMP_CTRL_INPUTRANGE_FULL << 18) /**< Shifted mode FULL for ACMP_CTRL */ 143 #define ACMP_CTRL_INPUTRANGE_GTVDDDIV2 (_ACMP_CTRL_INPUTRANGE_GTVDDDIV2 << 18) /**< Shifted mode GTVDDDIV2 for ACMP_CTRL */ 144 #define ACMP_CTRL_INPUTRANGE_LTVDDDIV2 (_ACMP_CTRL_INPUTRANGE_LTVDDDIV2 << 18) /**< Shifted mode LTVDDDIV2 for ACMP_CTRL */ 145 #define ACMP_CTRL_IRISE (0x1UL << 20) /**< Rising Edge Interrupt Sense */ 146 #define _ACMP_CTRL_IRISE_SHIFT 20 /**< Shift value for ACMP_IRISE */ 147 #define _ACMP_CTRL_IRISE_MASK 0x100000UL /**< Bit mask for ACMP_IRISE */ 148 #define _ACMP_CTRL_IRISE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */ 149 #define _ACMP_CTRL_IRISE_DISABLED 0x00000000UL /**< Mode DISABLED for ACMP_CTRL */ 150 #define _ACMP_CTRL_IRISE_ENABLED 0x00000001UL /**< Mode ENABLED for ACMP_CTRL */ 151 #define ACMP_CTRL_IRISE_DEFAULT (_ACMP_CTRL_IRISE_DEFAULT << 20) /**< Shifted mode DEFAULT for ACMP_CTRL */ 152 #define ACMP_CTRL_IRISE_DISABLED (_ACMP_CTRL_IRISE_DISABLED << 20) /**< Shifted mode DISABLED for ACMP_CTRL */ 153 #define ACMP_CTRL_IRISE_ENABLED (_ACMP_CTRL_IRISE_ENABLED << 20) /**< Shifted mode ENABLED for ACMP_CTRL */ 154 #define ACMP_CTRL_IFALL (0x1UL << 21) /**< Falling Edge Interrupt Sense */ 155 #define _ACMP_CTRL_IFALL_SHIFT 21 /**< Shift value for ACMP_IFALL */ 156 #define _ACMP_CTRL_IFALL_MASK 0x200000UL /**< Bit mask for ACMP_IFALL */ 157 #define _ACMP_CTRL_IFALL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */ 158 #define _ACMP_CTRL_IFALL_DISABLED 0x00000000UL /**< Mode DISABLED for ACMP_CTRL */ 159 #define _ACMP_CTRL_IFALL_ENABLED 0x00000001UL /**< Mode ENABLED for ACMP_CTRL */ 160 #define ACMP_CTRL_IFALL_DEFAULT (_ACMP_CTRL_IFALL_DEFAULT << 21) /**< Shifted mode DEFAULT for ACMP_CTRL */ 161 #define ACMP_CTRL_IFALL_DISABLED (_ACMP_CTRL_IFALL_DISABLED << 21) /**< Shifted mode DISABLED for ACMP_CTRL */ 162 #define ACMP_CTRL_IFALL_ENABLED (_ACMP_CTRL_IFALL_ENABLED << 21) /**< Shifted mode ENABLED for ACMP_CTRL */ 163 #define _ACMP_CTRL_BIASPROG_SHIFT 24 /**< Shift value for ACMP_BIASPROG */ 164 #define _ACMP_CTRL_BIASPROG_MASK 0x3F000000UL /**< Bit mask for ACMP_BIASPROG */ 165 #define _ACMP_CTRL_BIASPROG_DEFAULT 0x00000007UL /**< Mode DEFAULT for ACMP_CTRL */ 166 #define ACMP_CTRL_BIASPROG_DEFAULT (_ACMP_CTRL_BIASPROG_DEFAULT << 24) /**< Shifted mode DEFAULT for ACMP_CTRL */ 167 #define ACMP_CTRL_FULLBIAS (0x1UL << 31) /**< Full Bias Current */ 168 #define _ACMP_CTRL_FULLBIAS_SHIFT 31 /**< Shift value for ACMP_FULLBIAS */ 169 #define _ACMP_CTRL_FULLBIAS_MASK 0x80000000UL /**< Bit mask for ACMP_FULLBIAS */ 170 #define _ACMP_CTRL_FULLBIAS_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */ 171 #define ACMP_CTRL_FULLBIAS_DEFAULT (_ACMP_CTRL_FULLBIAS_DEFAULT << 31) /**< Shifted mode DEFAULT for ACMP_CTRL */ 172 173 /* Bit fields for ACMP INPUTSEL */ 174 #define _ACMP_INPUTSEL_RESETVALUE 0x00000000UL /**< Default value for ACMP_INPUTSEL */ 175 #define _ACMP_INPUTSEL_MASK 0x757FFFFFUL /**< Mask for ACMP_INPUTSEL */ 176 #define _ACMP_INPUTSEL_POSSEL_SHIFT 0 /**< Shift value for ACMP_POSSEL */ 177 #define _ACMP_INPUTSEL_POSSEL_MASK 0xFFUL /**< Bit mask for ACMP_POSSEL */ 178 #define _ACMP_INPUTSEL_POSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_INPUTSEL */ 179 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH0 0x00000000UL /**< Mode APORT0XCH0 for ACMP_INPUTSEL */ 180 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH1 0x00000001UL /**< Mode APORT0XCH1 for ACMP_INPUTSEL */ 181 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH2 0x00000002UL /**< Mode APORT0XCH2 for ACMP_INPUTSEL */ 182 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH3 0x00000003UL /**< Mode APORT0XCH3 for ACMP_INPUTSEL */ 183 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH4 0x00000004UL /**< Mode APORT0XCH4 for ACMP_INPUTSEL */ 184 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH5 0x00000005UL /**< Mode APORT0XCH5 for ACMP_INPUTSEL */ 185 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH6 0x00000006UL /**< Mode APORT0XCH6 for ACMP_INPUTSEL */ 186 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH7 0x00000007UL /**< Mode APORT0XCH7 for ACMP_INPUTSEL */ 187 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH8 0x00000008UL /**< Mode APORT0XCH8 for ACMP_INPUTSEL */ 188 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH9 0x00000009UL /**< Mode APORT0XCH9 for ACMP_INPUTSEL */ 189 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH10 0x0000000AUL /**< Mode APORT0XCH10 for ACMP_INPUTSEL */ 190 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH11 0x0000000BUL /**< Mode APORT0XCH11 for ACMP_INPUTSEL */ 191 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH12 0x0000000CUL /**< Mode APORT0XCH12 for ACMP_INPUTSEL */ 192 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH13 0x0000000DUL /**< Mode APORT0XCH13 for ACMP_INPUTSEL */ 193 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH14 0x0000000EUL /**< Mode APORT0XCH14 for ACMP_INPUTSEL */ 194 #define _ACMP_INPUTSEL_POSSEL_APORT0XCH15 0x0000000FUL /**< Mode APORT0XCH15 for ACMP_INPUTSEL */ 195 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH0 0x00000010UL /**< Mode APORT0YCH0 for ACMP_INPUTSEL */ 196 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH1 0x00000011UL /**< Mode APORT0YCH1 for ACMP_INPUTSEL */ 197 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH2 0x00000012UL /**< Mode APORT0YCH2 for ACMP_INPUTSEL */ 198 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH3 0x00000013UL /**< Mode APORT0YCH3 for ACMP_INPUTSEL */ 199 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH4 0x00000014UL /**< Mode APORT0YCH4 for ACMP_INPUTSEL */ 200 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH5 0x00000015UL /**< Mode APORT0YCH5 for ACMP_INPUTSEL */ 201 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH6 0x00000016UL /**< Mode APORT0YCH6 for ACMP_INPUTSEL */ 202 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH7 0x00000017UL /**< Mode APORT0YCH7 for ACMP_INPUTSEL */ 203 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH8 0x00000018UL /**< Mode APORT0YCH8 for ACMP_INPUTSEL */ 204 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH9 0x00000019UL /**< Mode APORT0YCH9 for ACMP_INPUTSEL */ 205 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH10 0x0000001AUL /**< Mode APORT0YCH10 for ACMP_INPUTSEL */ 206 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH11 0x0000001BUL /**< Mode APORT0YCH11 for ACMP_INPUTSEL */ 207 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH12 0x0000001CUL /**< Mode APORT0YCH12 for ACMP_INPUTSEL */ 208 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH13 0x0000001DUL /**< Mode APORT0YCH13 for ACMP_INPUTSEL */ 209 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH14 0x0000001EUL /**< Mode APORT0YCH14 for ACMP_INPUTSEL */ 210 #define _ACMP_INPUTSEL_POSSEL_APORT0YCH15 0x0000001FUL /**< Mode APORT0YCH15 for ACMP_INPUTSEL */ 211 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH0 0x00000020UL /**< Mode APORT1XCH0 for ACMP_INPUTSEL */ 212 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH1 0x00000021UL /**< Mode APORT1YCH1 for ACMP_INPUTSEL */ 213 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH2 0x00000022UL /**< Mode APORT1XCH2 for ACMP_INPUTSEL */ 214 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH3 0x00000023UL /**< Mode APORT1YCH3 for ACMP_INPUTSEL */ 215 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH4 0x00000024UL /**< Mode APORT1XCH4 for ACMP_INPUTSEL */ 216 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH5 0x00000025UL /**< Mode APORT1YCH5 for ACMP_INPUTSEL */ 217 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH6 0x00000026UL /**< Mode APORT1XCH6 for ACMP_INPUTSEL */ 218 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH7 0x00000027UL /**< Mode APORT1YCH7 for ACMP_INPUTSEL */ 219 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH8 0x00000028UL /**< Mode APORT1XCH8 for ACMP_INPUTSEL */ 220 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH9 0x00000029UL /**< Mode APORT1YCH9 for ACMP_INPUTSEL */ 221 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH10 0x0000002AUL /**< Mode APORT1XCH10 for ACMP_INPUTSEL */ 222 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH11 0x0000002BUL /**< Mode APORT1YCH11 for ACMP_INPUTSEL */ 223 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH12 0x0000002CUL /**< Mode APORT1XCH12 for ACMP_INPUTSEL */ 224 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH13 0x0000002DUL /**< Mode APORT1YCH13 for ACMP_INPUTSEL */ 225 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH14 0x0000002EUL /**< Mode APORT1XCH14 for ACMP_INPUTSEL */ 226 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH15 0x0000002FUL /**< Mode APORT1YCH15 for ACMP_INPUTSEL */ 227 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH16 0x00000030UL /**< Mode APORT1XCH16 for ACMP_INPUTSEL */ 228 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH17 0x00000031UL /**< Mode APORT1YCH17 for ACMP_INPUTSEL */ 229 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH18 0x00000032UL /**< Mode APORT1XCH18 for ACMP_INPUTSEL */ 230 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH19 0x00000033UL /**< Mode APORT1YCH19 for ACMP_INPUTSEL */ 231 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH20 0x00000034UL /**< Mode APORT1XCH20 for ACMP_INPUTSEL */ 232 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH21 0x00000035UL /**< Mode APORT1YCH21 for ACMP_INPUTSEL */ 233 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH22 0x00000036UL /**< Mode APORT1XCH22 for ACMP_INPUTSEL */ 234 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH23 0x00000037UL /**< Mode APORT1YCH23 for ACMP_INPUTSEL */ 235 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH24 0x00000038UL /**< Mode APORT1XCH24 for ACMP_INPUTSEL */ 236 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH25 0x00000039UL /**< Mode APORT1YCH25 for ACMP_INPUTSEL */ 237 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH26 0x0000003AUL /**< Mode APORT1XCH26 for ACMP_INPUTSEL */ 238 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH27 0x0000003BUL /**< Mode APORT1YCH27 for ACMP_INPUTSEL */ 239 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH28 0x0000003CUL /**< Mode APORT1XCH28 for ACMP_INPUTSEL */ 240 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH29 0x0000003DUL /**< Mode APORT1YCH29 for ACMP_INPUTSEL */ 241 #define _ACMP_INPUTSEL_POSSEL_APORT1XCH30 0x0000003EUL /**< Mode APORT1XCH30 for ACMP_INPUTSEL */ 242 #define _ACMP_INPUTSEL_POSSEL_APORT1YCH31 0x0000003FUL /**< Mode APORT1YCH31 for ACMP_INPUTSEL */ 243 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH0 0x00000040UL /**< Mode APORT2YCH0 for ACMP_INPUTSEL */ 244 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH1 0x00000041UL /**< Mode APORT2XCH1 for ACMP_INPUTSEL */ 245 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH2 0x00000042UL /**< Mode APORT2YCH2 for ACMP_INPUTSEL */ 246 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH3 0x00000043UL /**< Mode APORT2XCH3 for ACMP_INPUTSEL */ 247 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH4 0x00000044UL /**< Mode APORT2YCH4 for ACMP_INPUTSEL */ 248 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH5 0x00000045UL /**< Mode APORT2XCH5 for ACMP_INPUTSEL */ 249 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH6 0x00000046UL /**< Mode APORT2YCH6 for ACMP_INPUTSEL */ 250 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH7 0x00000047UL /**< Mode APORT2XCH7 for ACMP_INPUTSEL */ 251 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH8 0x00000048UL /**< Mode APORT2YCH8 for ACMP_INPUTSEL */ 252 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH9 0x00000049UL /**< Mode APORT2XCH9 for ACMP_INPUTSEL */ 253 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH10 0x0000004AUL /**< Mode APORT2YCH10 for ACMP_INPUTSEL */ 254 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH11 0x0000004BUL /**< Mode APORT2XCH11 for ACMP_INPUTSEL */ 255 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH12 0x0000004CUL /**< Mode APORT2YCH12 for ACMP_INPUTSEL */ 256 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH13 0x0000004DUL /**< Mode APORT2XCH13 for ACMP_INPUTSEL */ 257 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH14 0x0000004EUL /**< Mode APORT2YCH14 for ACMP_INPUTSEL */ 258 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH15 0x0000004FUL /**< Mode APORT2XCH15 for ACMP_INPUTSEL */ 259 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH16 0x00000050UL /**< Mode APORT2YCH16 for ACMP_INPUTSEL */ 260 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH17 0x00000051UL /**< Mode APORT2XCH17 for ACMP_INPUTSEL */ 261 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH18 0x00000052UL /**< Mode APORT2YCH18 for ACMP_INPUTSEL */ 262 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH19 0x00000053UL /**< Mode APORT2XCH19 for ACMP_INPUTSEL */ 263 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH20 0x00000054UL /**< Mode APORT2YCH20 for ACMP_INPUTSEL */ 264 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH21 0x00000055UL /**< Mode APORT2XCH21 for ACMP_INPUTSEL */ 265 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH22 0x00000056UL /**< Mode APORT2YCH22 for ACMP_INPUTSEL */ 266 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH23 0x00000057UL /**< Mode APORT2XCH23 for ACMP_INPUTSEL */ 267 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH24 0x00000058UL /**< Mode APORT2YCH24 for ACMP_INPUTSEL */ 268 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH25 0x00000059UL /**< Mode APORT2XCH25 for ACMP_INPUTSEL */ 269 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH26 0x0000005AUL /**< Mode APORT2YCH26 for ACMP_INPUTSEL */ 270 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH27 0x0000005BUL /**< Mode APORT2XCH27 for ACMP_INPUTSEL */ 271 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH28 0x0000005CUL /**< Mode APORT2YCH28 for ACMP_INPUTSEL */ 272 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH29 0x0000005DUL /**< Mode APORT2XCH29 for ACMP_INPUTSEL */ 273 #define _ACMP_INPUTSEL_POSSEL_APORT2YCH30 0x0000005EUL /**< Mode APORT2YCH30 for ACMP_INPUTSEL */ 274 #define _ACMP_INPUTSEL_POSSEL_APORT2XCH31 0x0000005FUL /**< Mode APORT2XCH31 for ACMP_INPUTSEL */ 275 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH0 0x00000060UL /**< Mode APORT3XCH0 for ACMP_INPUTSEL */ 276 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH1 0x00000061UL /**< Mode APORT3YCH1 for ACMP_INPUTSEL */ 277 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH2 0x00000062UL /**< Mode APORT3XCH2 for ACMP_INPUTSEL */ 278 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH3 0x00000063UL /**< Mode APORT3YCH3 for ACMP_INPUTSEL */ 279 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH4 0x00000064UL /**< Mode APORT3XCH4 for ACMP_INPUTSEL */ 280 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH5 0x00000065UL /**< Mode APORT3YCH5 for ACMP_INPUTSEL */ 281 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH6 0x00000066UL /**< Mode APORT3XCH6 for ACMP_INPUTSEL */ 282 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH7 0x00000067UL /**< Mode APORT3YCH7 for ACMP_INPUTSEL */ 283 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH8 0x00000068UL /**< Mode APORT3XCH8 for ACMP_INPUTSEL */ 284 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH9 0x00000069UL /**< Mode APORT3YCH9 for ACMP_INPUTSEL */ 285 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH10 0x0000006AUL /**< Mode APORT3XCH10 for ACMP_INPUTSEL */ 286 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH11 0x0000006BUL /**< Mode APORT3YCH11 for ACMP_INPUTSEL */ 287 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH12 0x0000006CUL /**< Mode APORT3XCH12 for ACMP_INPUTSEL */ 288 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH13 0x0000006DUL /**< Mode APORT3YCH13 for ACMP_INPUTSEL */ 289 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH14 0x0000006EUL /**< Mode APORT3XCH14 for ACMP_INPUTSEL */ 290 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH15 0x0000006FUL /**< Mode APORT3YCH15 for ACMP_INPUTSEL */ 291 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH16 0x00000070UL /**< Mode APORT3XCH16 for ACMP_INPUTSEL */ 292 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH17 0x00000071UL /**< Mode APORT3YCH17 for ACMP_INPUTSEL */ 293 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH18 0x00000072UL /**< Mode APORT3XCH18 for ACMP_INPUTSEL */ 294 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH19 0x00000073UL /**< Mode APORT3YCH19 for ACMP_INPUTSEL */ 295 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH20 0x00000074UL /**< Mode APORT3XCH20 for ACMP_INPUTSEL */ 296 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH21 0x00000075UL /**< Mode APORT3YCH21 for ACMP_INPUTSEL */ 297 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH22 0x00000076UL /**< Mode APORT3XCH22 for ACMP_INPUTSEL */ 298 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH23 0x00000077UL /**< Mode APORT3YCH23 for ACMP_INPUTSEL */ 299 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH24 0x00000078UL /**< Mode APORT3XCH24 for ACMP_INPUTSEL */ 300 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH25 0x00000079UL /**< Mode APORT3YCH25 for ACMP_INPUTSEL */ 301 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH26 0x0000007AUL /**< Mode APORT3XCH26 for ACMP_INPUTSEL */ 302 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH27 0x0000007BUL /**< Mode APORT3YCH27 for ACMP_INPUTSEL */ 303 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH28 0x0000007CUL /**< Mode APORT3XCH28 for ACMP_INPUTSEL */ 304 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH29 0x0000007DUL /**< Mode APORT3YCH29 for ACMP_INPUTSEL */ 305 #define _ACMP_INPUTSEL_POSSEL_APORT3XCH30 0x0000007EUL /**< Mode APORT3XCH30 for ACMP_INPUTSEL */ 306 #define _ACMP_INPUTSEL_POSSEL_APORT3YCH31 0x0000007FUL /**< Mode APORT3YCH31 for ACMP_INPUTSEL */ 307 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH0 0x00000080UL /**< Mode APORT4YCH0 for ACMP_INPUTSEL */ 308 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH1 0x00000081UL /**< Mode APORT4XCH1 for ACMP_INPUTSEL */ 309 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH2 0x00000082UL /**< Mode APORT4YCH2 for ACMP_INPUTSEL */ 310 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH3 0x00000083UL /**< Mode APORT4XCH3 for ACMP_INPUTSEL */ 311 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH4 0x00000084UL /**< Mode APORT4YCH4 for ACMP_INPUTSEL */ 312 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH5 0x00000085UL /**< Mode APORT4XCH5 for ACMP_INPUTSEL */ 313 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH6 0x00000086UL /**< Mode APORT4YCH6 for ACMP_INPUTSEL */ 314 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH7 0x00000087UL /**< Mode APORT4XCH7 for ACMP_INPUTSEL */ 315 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH8 0x00000088UL /**< Mode APORT4YCH8 for ACMP_INPUTSEL */ 316 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH9 0x00000089UL /**< Mode APORT4XCH9 for ACMP_INPUTSEL */ 317 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH10 0x0000008AUL /**< Mode APORT4YCH10 for ACMP_INPUTSEL */ 318 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH11 0x0000008BUL /**< Mode APORT4XCH11 for ACMP_INPUTSEL */ 319 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH12 0x0000008CUL /**< Mode APORT4YCH12 for ACMP_INPUTSEL */ 320 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH13 0x0000008DUL /**< Mode APORT4XCH13 for ACMP_INPUTSEL */ 321 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH14 0x0000008EUL /**< Mode APORT4YCH14 for ACMP_INPUTSEL */ 322 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH15 0x0000008FUL /**< Mode APORT4XCH15 for ACMP_INPUTSEL */ 323 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH16 0x00000090UL /**< Mode APORT4YCH16 for ACMP_INPUTSEL */ 324 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH17 0x00000091UL /**< Mode APORT4XCH17 for ACMP_INPUTSEL */ 325 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH18 0x00000092UL /**< Mode APORT4YCH18 for ACMP_INPUTSEL */ 326 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH19 0x00000093UL /**< Mode APORT4XCH19 for ACMP_INPUTSEL */ 327 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH20 0x00000094UL /**< Mode APORT4YCH20 for ACMP_INPUTSEL */ 328 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH21 0x00000095UL /**< Mode APORT4XCH21 for ACMP_INPUTSEL */ 329 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH22 0x00000096UL /**< Mode APORT4YCH22 for ACMP_INPUTSEL */ 330 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH23 0x00000097UL /**< Mode APORT4XCH23 for ACMP_INPUTSEL */ 331 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH24 0x00000098UL /**< Mode APORT4YCH24 for ACMP_INPUTSEL */ 332 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH25 0x00000099UL /**< Mode APORT4XCH25 for ACMP_INPUTSEL */ 333 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH26 0x0000009AUL /**< Mode APORT4YCH26 for ACMP_INPUTSEL */ 334 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH27 0x0000009BUL /**< Mode APORT4XCH27 for ACMP_INPUTSEL */ 335 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH28 0x0000009CUL /**< Mode APORT4YCH28 for ACMP_INPUTSEL */ 336 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH29 0x0000009DUL /**< Mode APORT4XCH29 for ACMP_INPUTSEL */ 337 #define _ACMP_INPUTSEL_POSSEL_APORT4YCH30 0x0000009EUL /**< Mode APORT4YCH30 for ACMP_INPUTSEL */ 338 #define _ACMP_INPUTSEL_POSSEL_APORT4XCH31 0x0000009FUL /**< Mode APORT4XCH31 for ACMP_INPUTSEL */ 339 #define _ACMP_INPUTSEL_POSSEL_VLP 0x000000FBUL /**< Mode VLP for ACMP_INPUTSEL */ 340 #define _ACMP_INPUTSEL_POSSEL_VBDIV 0x000000FCUL /**< Mode VBDIV for ACMP_INPUTSEL */ 341 #define _ACMP_INPUTSEL_POSSEL_VADIV 0x000000FDUL /**< Mode VADIV for ACMP_INPUTSEL */ 342 #define _ACMP_INPUTSEL_POSSEL_VDD 0x000000FEUL /**< Mode VDD for ACMP_INPUTSEL */ 343 #define _ACMP_INPUTSEL_POSSEL_VSS 0x000000FFUL /**< Mode VSS for ACMP_INPUTSEL */ 344 #define ACMP_INPUTSEL_POSSEL_DEFAULT (_ACMP_INPUTSEL_POSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */ 345 #define ACMP_INPUTSEL_POSSEL_APORT0XCH0 (_ACMP_INPUTSEL_POSSEL_APORT0XCH0 << 0) /**< Shifted mode APORT0XCH0 for ACMP_INPUTSEL */ 346 #define ACMP_INPUTSEL_POSSEL_APORT0XCH1 (_ACMP_INPUTSEL_POSSEL_APORT0XCH1 << 0) /**< Shifted mode APORT0XCH1 for ACMP_INPUTSEL */ 347 #define ACMP_INPUTSEL_POSSEL_APORT0XCH2 (_ACMP_INPUTSEL_POSSEL_APORT0XCH2 << 0) /**< Shifted mode APORT0XCH2 for ACMP_INPUTSEL */ 348 #define ACMP_INPUTSEL_POSSEL_APORT0XCH3 (_ACMP_INPUTSEL_POSSEL_APORT0XCH3 << 0) /**< Shifted mode APORT0XCH3 for ACMP_INPUTSEL */ 349 #define ACMP_INPUTSEL_POSSEL_APORT0XCH4 (_ACMP_INPUTSEL_POSSEL_APORT0XCH4 << 0) /**< Shifted mode APORT0XCH4 for ACMP_INPUTSEL */ 350 #define ACMP_INPUTSEL_POSSEL_APORT0XCH5 (_ACMP_INPUTSEL_POSSEL_APORT0XCH5 << 0) /**< Shifted mode APORT0XCH5 for ACMP_INPUTSEL */ 351 #define ACMP_INPUTSEL_POSSEL_APORT0XCH6 (_ACMP_INPUTSEL_POSSEL_APORT0XCH6 << 0) /**< Shifted mode APORT0XCH6 for ACMP_INPUTSEL */ 352 #define ACMP_INPUTSEL_POSSEL_APORT0XCH7 (_ACMP_INPUTSEL_POSSEL_APORT0XCH7 << 0) /**< Shifted mode APORT0XCH7 for ACMP_INPUTSEL */ 353 #define ACMP_INPUTSEL_POSSEL_APORT0XCH8 (_ACMP_INPUTSEL_POSSEL_APORT0XCH8 << 0) /**< Shifted mode APORT0XCH8 for ACMP_INPUTSEL */ 354 #define ACMP_INPUTSEL_POSSEL_APORT0XCH9 (_ACMP_INPUTSEL_POSSEL_APORT0XCH9 << 0) /**< Shifted mode APORT0XCH9 for ACMP_INPUTSEL */ 355 #define ACMP_INPUTSEL_POSSEL_APORT0XCH10 (_ACMP_INPUTSEL_POSSEL_APORT0XCH10 << 0) /**< Shifted mode APORT0XCH10 for ACMP_INPUTSEL */ 356 #define ACMP_INPUTSEL_POSSEL_APORT0XCH11 (_ACMP_INPUTSEL_POSSEL_APORT0XCH11 << 0) /**< Shifted mode APORT0XCH11 for ACMP_INPUTSEL */ 357 #define ACMP_INPUTSEL_POSSEL_APORT0XCH12 (_ACMP_INPUTSEL_POSSEL_APORT0XCH12 << 0) /**< Shifted mode APORT0XCH12 for ACMP_INPUTSEL */ 358 #define ACMP_INPUTSEL_POSSEL_APORT0XCH13 (_ACMP_INPUTSEL_POSSEL_APORT0XCH13 << 0) /**< Shifted mode APORT0XCH13 for ACMP_INPUTSEL */ 359 #define ACMP_INPUTSEL_POSSEL_APORT0XCH14 (_ACMP_INPUTSEL_POSSEL_APORT0XCH14 << 0) /**< Shifted mode APORT0XCH14 for ACMP_INPUTSEL */ 360 #define ACMP_INPUTSEL_POSSEL_APORT0XCH15 (_ACMP_INPUTSEL_POSSEL_APORT0XCH15 << 0) /**< Shifted mode APORT0XCH15 for ACMP_INPUTSEL */ 361 #define ACMP_INPUTSEL_POSSEL_APORT0YCH0 (_ACMP_INPUTSEL_POSSEL_APORT0YCH0 << 0) /**< Shifted mode APORT0YCH0 for ACMP_INPUTSEL */ 362 #define ACMP_INPUTSEL_POSSEL_APORT0YCH1 (_ACMP_INPUTSEL_POSSEL_APORT0YCH1 << 0) /**< Shifted mode APORT0YCH1 for ACMP_INPUTSEL */ 363 #define ACMP_INPUTSEL_POSSEL_APORT0YCH2 (_ACMP_INPUTSEL_POSSEL_APORT0YCH2 << 0) /**< Shifted mode APORT0YCH2 for ACMP_INPUTSEL */ 364 #define ACMP_INPUTSEL_POSSEL_APORT0YCH3 (_ACMP_INPUTSEL_POSSEL_APORT0YCH3 << 0) /**< Shifted mode APORT0YCH3 for ACMP_INPUTSEL */ 365 #define ACMP_INPUTSEL_POSSEL_APORT0YCH4 (_ACMP_INPUTSEL_POSSEL_APORT0YCH4 << 0) /**< Shifted mode APORT0YCH4 for ACMP_INPUTSEL */ 366 #define ACMP_INPUTSEL_POSSEL_APORT0YCH5 (_ACMP_INPUTSEL_POSSEL_APORT0YCH5 << 0) /**< Shifted mode APORT0YCH5 for ACMP_INPUTSEL */ 367 #define ACMP_INPUTSEL_POSSEL_APORT0YCH6 (_ACMP_INPUTSEL_POSSEL_APORT0YCH6 << 0) /**< Shifted mode APORT0YCH6 for ACMP_INPUTSEL */ 368 #define ACMP_INPUTSEL_POSSEL_APORT0YCH7 (_ACMP_INPUTSEL_POSSEL_APORT0YCH7 << 0) /**< Shifted mode APORT0YCH7 for ACMP_INPUTSEL */ 369 #define ACMP_INPUTSEL_POSSEL_APORT0YCH8 (_ACMP_INPUTSEL_POSSEL_APORT0YCH8 << 0) /**< Shifted mode APORT0YCH8 for ACMP_INPUTSEL */ 370 #define ACMP_INPUTSEL_POSSEL_APORT0YCH9 (_ACMP_INPUTSEL_POSSEL_APORT0YCH9 << 0) /**< Shifted mode APORT0YCH9 for ACMP_INPUTSEL */ 371 #define ACMP_INPUTSEL_POSSEL_APORT0YCH10 (_ACMP_INPUTSEL_POSSEL_APORT0YCH10 << 0) /**< Shifted mode APORT0YCH10 for ACMP_INPUTSEL */ 372 #define ACMP_INPUTSEL_POSSEL_APORT0YCH11 (_ACMP_INPUTSEL_POSSEL_APORT0YCH11 << 0) /**< Shifted mode APORT0YCH11 for ACMP_INPUTSEL */ 373 #define ACMP_INPUTSEL_POSSEL_APORT0YCH12 (_ACMP_INPUTSEL_POSSEL_APORT0YCH12 << 0) /**< Shifted mode APORT0YCH12 for ACMP_INPUTSEL */ 374 #define ACMP_INPUTSEL_POSSEL_APORT0YCH13 (_ACMP_INPUTSEL_POSSEL_APORT0YCH13 << 0) /**< Shifted mode APORT0YCH13 for ACMP_INPUTSEL */ 375 #define ACMP_INPUTSEL_POSSEL_APORT0YCH14 (_ACMP_INPUTSEL_POSSEL_APORT0YCH14 << 0) /**< Shifted mode APORT0YCH14 for ACMP_INPUTSEL */ 376 #define ACMP_INPUTSEL_POSSEL_APORT0YCH15 (_ACMP_INPUTSEL_POSSEL_APORT0YCH15 << 0) /**< Shifted mode APORT0YCH15 for ACMP_INPUTSEL */ 377 #define ACMP_INPUTSEL_POSSEL_APORT1XCH0 (_ACMP_INPUTSEL_POSSEL_APORT1XCH0 << 0) /**< Shifted mode APORT1XCH0 for ACMP_INPUTSEL */ 378 #define ACMP_INPUTSEL_POSSEL_APORT1YCH1 (_ACMP_INPUTSEL_POSSEL_APORT1YCH1 << 0) /**< Shifted mode APORT1YCH1 for ACMP_INPUTSEL */ 379 #define ACMP_INPUTSEL_POSSEL_APORT1XCH2 (_ACMP_INPUTSEL_POSSEL_APORT1XCH2 << 0) /**< Shifted mode APORT1XCH2 for ACMP_INPUTSEL */ 380 #define ACMP_INPUTSEL_POSSEL_APORT1YCH3 (_ACMP_INPUTSEL_POSSEL_APORT1YCH3 << 0) /**< Shifted mode APORT1YCH3 for ACMP_INPUTSEL */ 381 #define ACMP_INPUTSEL_POSSEL_APORT1XCH4 (_ACMP_INPUTSEL_POSSEL_APORT1XCH4 << 0) /**< Shifted mode APORT1XCH4 for ACMP_INPUTSEL */ 382 #define ACMP_INPUTSEL_POSSEL_APORT1YCH5 (_ACMP_INPUTSEL_POSSEL_APORT1YCH5 << 0) /**< Shifted mode APORT1YCH5 for ACMP_INPUTSEL */ 383 #define ACMP_INPUTSEL_POSSEL_APORT1XCH6 (_ACMP_INPUTSEL_POSSEL_APORT1XCH6 << 0) /**< Shifted mode APORT1XCH6 for ACMP_INPUTSEL */ 384 #define ACMP_INPUTSEL_POSSEL_APORT1YCH7 (_ACMP_INPUTSEL_POSSEL_APORT1YCH7 << 0) /**< Shifted mode APORT1YCH7 for ACMP_INPUTSEL */ 385 #define ACMP_INPUTSEL_POSSEL_APORT1XCH8 (_ACMP_INPUTSEL_POSSEL_APORT1XCH8 << 0) /**< Shifted mode APORT1XCH8 for ACMP_INPUTSEL */ 386 #define ACMP_INPUTSEL_POSSEL_APORT1YCH9 (_ACMP_INPUTSEL_POSSEL_APORT1YCH9 << 0) /**< Shifted mode APORT1YCH9 for ACMP_INPUTSEL */ 387 #define ACMP_INPUTSEL_POSSEL_APORT1XCH10 (_ACMP_INPUTSEL_POSSEL_APORT1XCH10 << 0) /**< Shifted mode APORT1XCH10 for ACMP_INPUTSEL */ 388 #define ACMP_INPUTSEL_POSSEL_APORT1YCH11 (_ACMP_INPUTSEL_POSSEL_APORT1YCH11 << 0) /**< Shifted mode APORT1YCH11 for ACMP_INPUTSEL */ 389 #define ACMP_INPUTSEL_POSSEL_APORT1XCH12 (_ACMP_INPUTSEL_POSSEL_APORT1XCH12 << 0) /**< Shifted mode APORT1XCH12 for ACMP_INPUTSEL */ 390 #define ACMP_INPUTSEL_POSSEL_APORT1YCH13 (_ACMP_INPUTSEL_POSSEL_APORT1YCH13 << 0) /**< Shifted mode APORT1YCH13 for ACMP_INPUTSEL */ 391 #define ACMP_INPUTSEL_POSSEL_APORT1XCH14 (_ACMP_INPUTSEL_POSSEL_APORT1XCH14 << 0) /**< Shifted mode APORT1XCH14 for ACMP_INPUTSEL */ 392 #define ACMP_INPUTSEL_POSSEL_APORT1YCH15 (_ACMP_INPUTSEL_POSSEL_APORT1YCH15 << 0) /**< Shifted mode APORT1YCH15 for ACMP_INPUTSEL */ 393 #define ACMP_INPUTSEL_POSSEL_APORT1XCH16 (_ACMP_INPUTSEL_POSSEL_APORT1XCH16 << 0) /**< Shifted mode APORT1XCH16 for ACMP_INPUTSEL */ 394 #define ACMP_INPUTSEL_POSSEL_APORT1YCH17 (_ACMP_INPUTSEL_POSSEL_APORT1YCH17 << 0) /**< Shifted mode APORT1YCH17 for ACMP_INPUTSEL */ 395 #define ACMP_INPUTSEL_POSSEL_APORT1XCH18 (_ACMP_INPUTSEL_POSSEL_APORT1XCH18 << 0) /**< Shifted mode APORT1XCH18 for ACMP_INPUTSEL */ 396 #define ACMP_INPUTSEL_POSSEL_APORT1YCH19 (_ACMP_INPUTSEL_POSSEL_APORT1YCH19 << 0) /**< Shifted mode APORT1YCH19 for ACMP_INPUTSEL */ 397 #define ACMP_INPUTSEL_POSSEL_APORT1XCH20 (_ACMP_INPUTSEL_POSSEL_APORT1XCH20 << 0) /**< Shifted mode APORT1XCH20 for ACMP_INPUTSEL */ 398 #define ACMP_INPUTSEL_POSSEL_APORT1YCH21 (_ACMP_INPUTSEL_POSSEL_APORT1YCH21 << 0) /**< Shifted mode APORT1YCH21 for ACMP_INPUTSEL */ 399 #define ACMP_INPUTSEL_POSSEL_APORT1XCH22 (_ACMP_INPUTSEL_POSSEL_APORT1XCH22 << 0) /**< Shifted mode APORT1XCH22 for ACMP_INPUTSEL */ 400 #define ACMP_INPUTSEL_POSSEL_APORT1YCH23 (_ACMP_INPUTSEL_POSSEL_APORT1YCH23 << 0) /**< Shifted mode APORT1YCH23 for ACMP_INPUTSEL */ 401 #define ACMP_INPUTSEL_POSSEL_APORT1XCH24 (_ACMP_INPUTSEL_POSSEL_APORT1XCH24 << 0) /**< Shifted mode APORT1XCH24 for ACMP_INPUTSEL */ 402 #define ACMP_INPUTSEL_POSSEL_APORT1YCH25 (_ACMP_INPUTSEL_POSSEL_APORT1YCH25 << 0) /**< Shifted mode APORT1YCH25 for ACMP_INPUTSEL */ 403 #define ACMP_INPUTSEL_POSSEL_APORT1XCH26 (_ACMP_INPUTSEL_POSSEL_APORT1XCH26 << 0) /**< Shifted mode APORT1XCH26 for ACMP_INPUTSEL */ 404 #define ACMP_INPUTSEL_POSSEL_APORT1YCH27 (_ACMP_INPUTSEL_POSSEL_APORT1YCH27 << 0) /**< Shifted mode APORT1YCH27 for ACMP_INPUTSEL */ 405 #define ACMP_INPUTSEL_POSSEL_APORT1XCH28 (_ACMP_INPUTSEL_POSSEL_APORT1XCH28 << 0) /**< Shifted mode APORT1XCH28 for ACMP_INPUTSEL */ 406 #define ACMP_INPUTSEL_POSSEL_APORT1YCH29 (_ACMP_INPUTSEL_POSSEL_APORT1YCH29 << 0) /**< Shifted mode APORT1YCH29 for ACMP_INPUTSEL */ 407 #define ACMP_INPUTSEL_POSSEL_APORT1XCH30 (_ACMP_INPUTSEL_POSSEL_APORT1XCH30 << 0) /**< Shifted mode APORT1XCH30 for ACMP_INPUTSEL */ 408 #define ACMP_INPUTSEL_POSSEL_APORT1YCH31 (_ACMP_INPUTSEL_POSSEL_APORT1YCH31 << 0) /**< Shifted mode APORT1YCH31 for ACMP_INPUTSEL */ 409 #define ACMP_INPUTSEL_POSSEL_APORT2YCH0 (_ACMP_INPUTSEL_POSSEL_APORT2YCH0 << 0) /**< Shifted mode APORT2YCH0 for ACMP_INPUTSEL */ 410 #define ACMP_INPUTSEL_POSSEL_APORT2XCH1 (_ACMP_INPUTSEL_POSSEL_APORT2XCH1 << 0) /**< Shifted mode APORT2XCH1 for ACMP_INPUTSEL */ 411 #define ACMP_INPUTSEL_POSSEL_APORT2YCH2 (_ACMP_INPUTSEL_POSSEL_APORT2YCH2 << 0) /**< Shifted mode APORT2YCH2 for ACMP_INPUTSEL */ 412 #define ACMP_INPUTSEL_POSSEL_APORT2XCH3 (_ACMP_INPUTSEL_POSSEL_APORT2XCH3 << 0) /**< Shifted mode APORT2XCH3 for ACMP_INPUTSEL */ 413 #define ACMP_INPUTSEL_POSSEL_APORT2YCH4 (_ACMP_INPUTSEL_POSSEL_APORT2YCH4 << 0) /**< Shifted mode APORT2YCH4 for ACMP_INPUTSEL */ 414 #define ACMP_INPUTSEL_POSSEL_APORT2XCH5 (_ACMP_INPUTSEL_POSSEL_APORT2XCH5 << 0) /**< Shifted mode APORT2XCH5 for ACMP_INPUTSEL */ 415 #define ACMP_INPUTSEL_POSSEL_APORT2YCH6 (_ACMP_INPUTSEL_POSSEL_APORT2YCH6 << 0) /**< Shifted mode APORT2YCH6 for ACMP_INPUTSEL */ 416 #define ACMP_INPUTSEL_POSSEL_APORT2XCH7 (_ACMP_INPUTSEL_POSSEL_APORT2XCH7 << 0) /**< Shifted mode APORT2XCH7 for ACMP_INPUTSEL */ 417 #define ACMP_INPUTSEL_POSSEL_APORT2YCH8 (_ACMP_INPUTSEL_POSSEL_APORT2YCH8 << 0) /**< Shifted mode APORT2YCH8 for ACMP_INPUTSEL */ 418 #define ACMP_INPUTSEL_POSSEL_APORT2XCH9 (_ACMP_INPUTSEL_POSSEL_APORT2XCH9 << 0) /**< Shifted mode APORT2XCH9 for ACMP_INPUTSEL */ 419 #define ACMP_INPUTSEL_POSSEL_APORT2YCH10 (_ACMP_INPUTSEL_POSSEL_APORT2YCH10 << 0) /**< Shifted mode APORT2YCH10 for ACMP_INPUTSEL */ 420 #define ACMP_INPUTSEL_POSSEL_APORT2XCH11 (_ACMP_INPUTSEL_POSSEL_APORT2XCH11 << 0) /**< Shifted mode APORT2XCH11 for ACMP_INPUTSEL */ 421 #define ACMP_INPUTSEL_POSSEL_APORT2YCH12 (_ACMP_INPUTSEL_POSSEL_APORT2YCH12 << 0) /**< Shifted mode APORT2YCH12 for ACMP_INPUTSEL */ 422 #define ACMP_INPUTSEL_POSSEL_APORT2XCH13 (_ACMP_INPUTSEL_POSSEL_APORT2XCH13 << 0) /**< Shifted mode APORT2XCH13 for ACMP_INPUTSEL */ 423 #define ACMP_INPUTSEL_POSSEL_APORT2YCH14 (_ACMP_INPUTSEL_POSSEL_APORT2YCH14 << 0) /**< Shifted mode APORT2YCH14 for ACMP_INPUTSEL */ 424 #define ACMP_INPUTSEL_POSSEL_APORT2XCH15 (_ACMP_INPUTSEL_POSSEL_APORT2XCH15 << 0) /**< Shifted mode APORT2XCH15 for ACMP_INPUTSEL */ 425 #define ACMP_INPUTSEL_POSSEL_APORT2YCH16 (_ACMP_INPUTSEL_POSSEL_APORT2YCH16 << 0) /**< Shifted mode APORT2YCH16 for ACMP_INPUTSEL */ 426 #define ACMP_INPUTSEL_POSSEL_APORT2XCH17 (_ACMP_INPUTSEL_POSSEL_APORT2XCH17 << 0) /**< Shifted mode APORT2XCH17 for ACMP_INPUTSEL */ 427 #define ACMP_INPUTSEL_POSSEL_APORT2YCH18 (_ACMP_INPUTSEL_POSSEL_APORT2YCH18 << 0) /**< Shifted mode APORT2YCH18 for ACMP_INPUTSEL */ 428 #define ACMP_INPUTSEL_POSSEL_APORT2XCH19 (_ACMP_INPUTSEL_POSSEL_APORT2XCH19 << 0) /**< Shifted mode APORT2XCH19 for ACMP_INPUTSEL */ 429 #define ACMP_INPUTSEL_POSSEL_APORT2YCH20 (_ACMP_INPUTSEL_POSSEL_APORT2YCH20 << 0) /**< Shifted mode APORT2YCH20 for ACMP_INPUTSEL */ 430 #define ACMP_INPUTSEL_POSSEL_APORT2XCH21 (_ACMP_INPUTSEL_POSSEL_APORT2XCH21 << 0) /**< Shifted mode APORT2XCH21 for ACMP_INPUTSEL */ 431 #define ACMP_INPUTSEL_POSSEL_APORT2YCH22 (_ACMP_INPUTSEL_POSSEL_APORT2YCH22 << 0) /**< Shifted mode APORT2YCH22 for ACMP_INPUTSEL */ 432 #define ACMP_INPUTSEL_POSSEL_APORT2XCH23 (_ACMP_INPUTSEL_POSSEL_APORT2XCH23 << 0) /**< Shifted mode APORT2XCH23 for ACMP_INPUTSEL */ 433 #define ACMP_INPUTSEL_POSSEL_APORT2YCH24 (_ACMP_INPUTSEL_POSSEL_APORT2YCH24 << 0) /**< Shifted mode APORT2YCH24 for ACMP_INPUTSEL */ 434 #define ACMP_INPUTSEL_POSSEL_APORT2XCH25 (_ACMP_INPUTSEL_POSSEL_APORT2XCH25 << 0) /**< Shifted mode APORT2XCH25 for ACMP_INPUTSEL */ 435 #define ACMP_INPUTSEL_POSSEL_APORT2YCH26 (_ACMP_INPUTSEL_POSSEL_APORT2YCH26 << 0) /**< Shifted mode APORT2YCH26 for ACMP_INPUTSEL */ 436 #define ACMP_INPUTSEL_POSSEL_APORT2XCH27 (_ACMP_INPUTSEL_POSSEL_APORT2XCH27 << 0) /**< Shifted mode APORT2XCH27 for ACMP_INPUTSEL */ 437 #define ACMP_INPUTSEL_POSSEL_APORT2YCH28 (_ACMP_INPUTSEL_POSSEL_APORT2YCH28 << 0) /**< Shifted mode APORT2YCH28 for ACMP_INPUTSEL */ 438 #define ACMP_INPUTSEL_POSSEL_APORT2XCH29 (_ACMP_INPUTSEL_POSSEL_APORT2XCH29 << 0) /**< Shifted mode APORT2XCH29 for ACMP_INPUTSEL */ 439 #define ACMP_INPUTSEL_POSSEL_APORT2YCH30 (_ACMP_INPUTSEL_POSSEL_APORT2YCH30 << 0) /**< Shifted mode APORT2YCH30 for ACMP_INPUTSEL */ 440 #define ACMP_INPUTSEL_POSSEL_APORT2XCH31 (_ACMP_INPUTSEL_POSSEL_APORT2XCH31 << 0) /**< Shifted mode APORT2XCH31 for ACMP_INPUTSEL */ 441 #define ACMP_INPUTSEL_POSSEL_APORT3XCH0 (_ACMP_INPUTSEL_POSSEL_APORT3XCH0 << 0) /**< Shifted mode APORT3XCH0 for ACMP_INPUTSEL */ 442 #define ACMP_INPUTSEL_POSSEL_APORT3YCH1 (_ACMP_INPUTSEL_POSSEL_APORT3YCH1 << 0) /**< Shifted mode APORT3YCH1 for ACMP_INPUTSEL */ 443 #define ACMP_INPUTSEL_POSSEL_APORT3XCH2 (_ACMP_INPUTSEL_POSSEL_APORT3XCH2 << 0) /**< Shifted mode APORT3XCH2 for ACMP_INPUTSEL */ 444 #define ACMP_INPUTSEL_POSSEL_APORT3YCH3 (_ACMP_INPUTSEL_POSSEL_APORT3YCH3 << 0) /**< Shifted mode APORT3YCH3 for ACMP_INPUTSEL */ 445 #define ACMP_INPUTSEL_POSSEL_APORT3XCH4 (_ACMP_INPUTSEL_POSSEL_APORT3XCH4 << 0) /**< Shifted mode APORT3XCH4 for ACMP_INPUTSEL */ 446 #define ACMP_INPUTSEL_POSSEL_APORT3YCH5 (_ACMP_INPUTSEL_POSSEL_APORT3YCH5 << 0) /**< Shifted mode APORT3YCH5 for ACMP_INPUTSEL */ 447 #define ACMP_INPUTSEL_POSSEL_APORT3XCH6 (_ACMP_INPUTSEL_POSSEL_APORT3XCH6 << 0) /**< Shifted mode APORT3XCH6 for ACMP_INPUTSEL */ 448 #define ACMP_INPUTSEL_POSSEL_APORT3YCH7 (_ACMP_INPUTSEL_POSSEL_APORT3YCH7 << 0) /**< Shifted mode APORT3YCH7 for ACMP_INPUTSEL */ 449 #define ACMP_INPUTSEL_POSSEL_APORT3XCH8 (_ACMP_INPUTSEL_POSSEL_APORT3XCH8 << 0) /**< Shifted mode APORT3XCH8 for ACMP_INPUTSEL */ 450 #define ACMP_INPUTSEL_POSSEL_APORT3YCH9 (_ACMP_INPUTSEL_POSSEL_APORT3YCH9 << 0) /**< Shifted mode APORT3YCH9 for ACMP_INPUTSEL */ 451 #define ACMP_INPUTSEL_POSSEL_APORT3XCH10 (_ACMP_INPUTSEL_POSSEL_APORT3XCH10 << 0) /**< Shifted mode APORT3XCH10 for ACMP_INPUTSEL */ 452 #define ACMP_INPUTSEL_POSSEL_APORT3YCH11 (_ACMP_INPUTSEL_POSSEL_APORT3YCH11 << 0) /**< Shifted mode APORT3YCH11 for ACMP_INPUTSEL */ 453 #define ACMP_INPUTSEL_POSSEL_APORT3XCH12 (_ACMP_INPUTSEL_POSSEL_APORT3XCH12 << 0) /**< Shifted mode APORT3XCH12 for ACMP_INPUTSEL */ 454 #define ACMP_INPUTSEL_POSSEL_APORT3YCH13 (_ACMP_INPUTSEL_POSSEL_APORT3YCH13 << 0) /**< Shifted mode APORT3YCH13 for ACMP_INPUTSEL */ 455 #define ACMP_INPUTSEL_POSSEL_APORT3XCH14 (_ACMP_INPUTSEL_POSSEL_APORT3XCH14 << 0) /**< Shifted mode APORT3XCH14 for ACMP_INPUTSEL */ 456 #define ACMP_INPUTSEL_POSSEL_APORT3YCH15 (_ACMP_INPUTSEL_POSSEL_APORT3YCH15 << 0) /**< Shifted mode APORT3YCH15 for ACMP_INPUTSEL */ 457 #define ACMP_INPUTSEL_POSSEL_APORT3XCH16 (_ACMP_INPUTSEL_POSSEL_APORT3XCH16 << 0) /**< Shifted mode APORT3XCH16 for ACMP_INPUTSEL */ 458 #define ACMP_INPUTSEL_POSSEL_APORT3YCH17 (_ACMP_INPUTSEL_POSSEL_APORT3YCH17 << 0) /**< Shifted mode APORT3YCH17 for ACMP_INPUTSEL */ 459 #define ACMP_INPUTSEL_POSSEL_APORT3XCH18 (_ACMP_INPUTSEL_POSSEL_APORT3XCH18 << 0) /**< Shifted mode APORT3XCH18 for ACMP_INPUTSEL */ 460 #define ACMP_INPUTSEL_POSSEL_APORT3YCH19 (_ACMP_INPUTSEL_POSSEL_APORT3YCH19 << 0) /**< Shifted mode APORT3YCH19 for ACMP_INPUTSEL */ 461 #define ACMP_INPUTSEL_POSSEL_APORT3XCH20 (_ACMP_INPUTSEL_POSSEL_APORT3XCH20 << 0) /**< Shifted mode APORT3XCH20 for ACMP_INPUTSEL */ 462 #define ACMP_INPUTSEL_POSSEL_APORT3YCH21 (_ACMP_INPUTSEL_POSSEL_APORT3YCH21 << 0) /**< Shifted mode APORT3YCH21 for ACMP_INPUTSEL */ 463 #define ACMP_INPUTSEL_POSSEL_APORT3XCH22 (_ACMP_INPUTSEL_POSSEL_APORT3XCH22 << 0) /**< Shifted mode APORT3XCH22 for ACMP_INPUTSEL */ 464 #define ACMP_INPUTSEL_POSSEL_APORT3YCH23 (_ACMP_INPUTSEL_POSSEL_APORT3YCH23 << 0) /**< Shifted mode APORT3YCH23 for ACMP_INPUTSEL */ 465 #define ACMP_INPUTSEL_POSSEL_APORT3XCH24 (_ACMP_INPUTSEL_POSSEL_APORT3XCH24 << 0) /**< Shifted mode APORT3XCH24 for ACMP_INPUTSEL */ 466 #define ACMP_INPUTSEL_POSSEL_APORT3YCH25 (_ACMP_INPUTSEL_POSSEL_APORT3YCH25 << 0) /**< Shifted mode APORT3YCH25 for ACMP_INPUTSEL */ 467 #define ACMP_INPUTSEL_POSSEL_APORT3XCH26 (_ACMP_INPUTSEL_POSSEL_APORT3XCH26 << 0) /**< Shifted mode APORT3XCH26 for ACMP_INPUTSEL */ 468 #define ACMP_INPUTSEL_POSSEL_APORT3YCH27 (_ACMP_INPUTSEL_POSSEL_APORT3YCH27 << 0) /**< Shifted mode APORT3YCH27 for ACMP_INPUTSEL */ 469 #define ACMP_INPUTSEL_POSSEL_APORT3XCH28 (_ACMP_INPUTSEL_POSSEL_APORT3XCH28 << 0) /**< Shifted mode APORT3XCH28 for ACMP_INPUTSEL */ 470 #define ACMP_INPUTSEL_POSSEL_APORT3YCH29 (_ACMP_INPUTSEL_POSSEL_APORT3YCH29 << 0) /**< Shifted mode APORT3YCH29 for ACMP_INPUTSEL */ 471 #define ACMP_INPUTSEL_POSSEL_APORT3XCH30 (_ACMP_INPUTSEL_POSSEL_APORT3XCH30 << 0) /**< Shifted mode APORT3XCH30 for ACMP_INPUTSEL */ 472 #define ACMP_INPUTSEL_POSSEL_APORT3YCH31 (_ACMP_INPUTSEL_POSSEL_APORT3YCH31 << 0) /**< Shifted mode APORT3YCH31 for ACMP_INPUTSEL */ 473 #define ACMP_INPUTSEL_POSSEL_APORT4YCH0 (_ACMP_INPUTSEL_POSSEL_APORT4YCH0 << 0) /**< Shifted mode APORT4YCH0 for ACMP_INPUTSEL */ 474 #define ACMP_INPUTSEL_POSSEL_APORT4XCH1 (_ACMP_INPUTSEL_POSSEL_APORT4XCH1 << 0) /**< Shifted mode APORT4XCH1 for ACMP_INPUTSEL */ 475 #define ACMP_INPUTSEL_POSSEL_APORT4YCH2 (_ACMP_INPUTSEL_POSSEL_APORT4YCH2 << 0) /**< Shifted mode APORT4YCH2 for ACMP_INPUTSEL */ 476 #define ACMP_INPUTSEL_POSSEL_APORT4XCH3 (_ACMP_INPUTSEL_POSSEL_APORT4XCH3 << 0) /**< Shifted mode APORT4XCH3 for ACMP_INPUTSEL */ 477 #define ACMP_INPUTSEL_POSSEL_APORT4YCH4 (_ACMP_INPUTSEL_POSSEL_APORT4YCH4 << 0) /**< Shifted mode APORT4YCH4 for ACMP_INPUTSEL */ 478 #define ACMP_INPUTSEL_POSSEL_APORT4XCH5 (_ACMP_INPUTSEL_POSSEL_APORT4XCH5 << 0) /**< Shifted mode APORT4XCH5 for ACMP_INPUTSEL */ 479 #define ACMP_INPUTSEL_POSSEL_APORT4YCH6 (_ACMP_INPUTSEL_POSSEL_APORT4YCH6 << 0) /**< Shifted mode APORT4YCH6 for ACMP_INPUTSEL */ 480 #define ACMP_INPUTSEL_POSSEL_APORT4XCH7 (_ACMP_INPUTSEL_POSSEL_APORT4XCH7 << 0) /**< Shifted mode APORT4XCH7 for ACMP_INPUTSEL */ 481 #define ACMP_INPUTSEL_POSSEL_APORT4YCH8 (_ACMP_INPUTSEL_POSSEL_APORT4YCH8 << 0) /**< Shifted mode APORT4YCH8 for ACMP_INPUTSEL */ 482 #define ACMP_INPUTSEL_POSSEL_APORT4XCH9 (_ACMP_INPUTSEL_POSSEL_APORT4XCH9 << 0) /**< Shifted mode APORT4XCH9 for ACMP_INPUTSEL */ 483 #define ACMP_INPUTSEL_POSSEL_APORT4YCH10 (_ACMP_INPUTSEL_POSSEL_APORT4YCH10 << 0) /**< Shifted mode APORT4YCH10 for ACMP_INPUTSEL */ 484 #define ACMP_INPUTSEL_POSSEL_APORT4XCH11 (_ACMP_INPUTSEL_POSSEL_APORT4XCH11 << 0) /**< Shifted mode APORT4XCH11 for ACMP_INPUTSEL */ 485 #define ACMP_INPUTSEL_POSSEL_APORT4YCH12 (_ACMP_INPUTSEL_POSSEL_APORT4YCH12 << 0) /**< Shifted mode APORT4YCH12 for ACMP_INPUTSEL */ 486 #define ACMP_INPUTSEL_POSSEL_APORT4XCH13 (_ACMP_INPUTSEL_POSSEL_APORT4XCH13 << 0) /**< Shifted mode APORT4XCH13 for ACMP_INPUTSEL */ 487 #define ACMP_INPUTSEL_POSSEL_APORT4YCH14 (_ACMP_INPUTSEL_POSSEL_APORT4YCH14 << 0) /**< Shifted mode APORT4YCH14 for ACMP_INPUTSEL */ 488 #define ACMP_INPUTSEL_POSSEL_APORT4XCH15 (_ACMP_INPUTSEL_POSSEL_APORT4XCH15 << 0) /**< Shifted mode APORT4XCH15 for ACMP_INPUTSEL */ 489 #define ACMP_INPUTSEL_POSSEL_APORT4YCH16 (_ACMP_INPUTSEL_POSSEL_APORT4YCH16 << 0) /**< Shifted mode APORT4YCH16 for ACMP_INPUTSEL */ 490 #define ACMP_INPUTSEL_POSSEL_APORT4XCH17 (_ACMP_INPUTSEL_POSSEL_APORT4XCH17 << 0) /**< Shifted mode APORT4XCH17 for ACMP_INPUTSEL */ 491 #define ACMP_INPUTSEL_POSSEL_APORT4YCH18 (_ACMP_INPUTSEL_POSSEL_APORT4YCH18 << 0) /**< Shifted mode APORT4YCH18 for ACMP_INPUTSEL */ 492 #define ACMP_INPUTSEL_POSSEL_APORT4XCH19 (_ACMP_INPUTSEL_POSSEL_APORT4XCH19 << 0) /**< Shifted mode APORT4XCH19 for ACMP_INPUTSEL */ 493 #define ACMP_INPUTSEL_POSSEL_APORT4YCH20 (_ACMP_INPUTSEL_POSSEL_APORT4YCH20 << 0) /**< Shifted mode APORT4YCH20 for ACMP_INPUTSEL */ 494 #define ACMP_INPUTSEL_POSSEL_APORT4XCH21 (_ACMP_INPUTSEL_POSSEL_APORT4XCH21 << 0) /**< Shifted mode APORT4XCH21 for ACMP_INPUTSEL */ 495 #define ACMP_INPUTSEL_POSSEL_APORT4YCH22 (_ACMP_INPUTSEL_POSSEL_APORT4YCH22 << 0) /**< Shifted mode APORT4YCH22 for ACMP_INPUTSEL */ 496 #define ACMP_INPUTSEL_POSSEL_APORT4XCH23 (_ACMP_INPUTSEL_POSSEL_APORT4XCH23 << 0) /**< Shifted mode APORT4XCH23 for ACMP_INPUTSEL */ 497 #define ACMP_INPUTSEL_POSSEL_APORT4YCH24 (_ACMP_INPUTSEL_POSSEL_APORT4YCH24 << 0) /**< Shifted mode APORT4YCH24 for ACMP_INPUTSEL */ 498 #define ACMP_INPUTSEL_POSSEL_APORT4XCH25 (_ACMP_INPUTSEL_POSSEL_APORT4XCH25 << 0) /**< Shifted mode APORT4XCH25 for ACMP_INPUTSEL */ 499 #define ACMP_INPUTSEL_POSSEL_APORT4YCH26 (_ACMP_INPUTSEL_POSSEL_APORT4YCH26 << 0) /**< Shifted mode APORT4YCH26 for ACMP_INPUTSEL */ 500 #define ACMP_INPUTSEL_POSSEL_APORT4XCH27 (_ACMP_INPUTSEL_POSSEL_APORT4XCH27 << 0) /**< Shifted mode APORT4XCH27 for ACMP_INPUTSEL */ 501 #define ACMP_INPUTSEL_POSSEL_APORT4YCH28 (_ACMP_INPUTSEL_POSSEL_APORT4YCH28 << 0) /**< Shifted mode APORT4YCH28 for ACMP_INPUTSEL */ 502 #define ACMP_INPUTSEL_POSSEL_APORT4XCH29 (_ACMP_INPUTSEL_POSSEL_APORT4XCH29 << 0) /**< Shifted mode APORT4XCH29 for ACMP_INPUTSEL */ 503 #define ACMP_INPUTSEL_POSSEL_APORT4YCH30 (_ACMP_INPUTSEL_POSSEL_APORT4YCH30 << 0) /**< Shifted mode APORT4YCH30 for ACMP_INPUTSEL */ 504 #define ACMP_INPUTSEL_POSSEL_APORT4XCH31 (_ACMP_INPUTSEL_POSSEL_APORT4XCH31 << 0) /**< Shifted mode APORT4XCH31 for ACMP_INPUTSEL */ 505 #define ACMP_INPUTSEL_POSSEL_VLP (_ACMP_INPUTSEL_POSSEL_VLP << 0) /**< Shifted mode VLP for ACMP_INPUTSEL */ 506 #define ACMP_INPUTSEL_POSSEL_VBDIV (_ACMP_INPUTSEL_POSSEL_VBDIV << 0) /**< Shifted mode VBDIV for ACMP_INPUTSEL */ 507 #define ACMP_INPUTSEL_POSSEL_VADIV (_ACMP_INPUTSEL_POSSEL_VADIV << 0) /**< Shifted mode VADIV for ACMP_INPUTSEL */ 508 #define ACMP_INPUTSEL_POSSEL_VDD (_ACMP_INPUTSEL_POSSEL_VDD << 0) /**< Shifted mode VDD for ACMP_INPUTSEL */ 509 #define ACMP_INPUTSEL_POSSEL_VSS (_ACMP_INPUTSEL_POSSEL_VSS << 0) /**< Shifted mode VSS for ACMP_INPUTSEL */ 510 #define _ACMP_INPUTSEL_NEGSEL_SHIFT 8 /**< Shift value for ACMP_NEGSEL */ 511 #define _ACMP_INPUTSEL_NEGSEL_MASK 0xFF00UL /**< Bit mask for ACMP_NEGSEL */ 512 #define _ACMP_INPUTSEL_NEGSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_INPUTSEL */ 513 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH0 0x00000000UL /**< Mode APORT0XCH0 for ACMP_INPUTSEL */ 514 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH1 0x00000001UL /**< Mode APORT0XCH1 for ACMP_INPUTSEL */ 515 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH2 0x00000002UL /**< Mode APORT0XCH2 for ACMP_INPUTSEL */ 516 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH3 0x00000003UL /**< Mode APORT0XCH3 for ACMP_INPUTSEL */ 517 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH4 0x00000004UL /**< Mode APORT0XCH4 for ACMP_INPUTSEL */ 518 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH5 0x00000005UL /**< Mode APORT0XCH5 for ACMP_INPUTSEL */ 519 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH6 0x00000006UL /**< Mode APORT0XCH6 for ACMP_INPUTSEL */ 520 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH7 0x00000007UL /**< Mode APORT0XCH7 for ACMP_INPUTSEL */ 521 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH8 0x00000008UL /**< Mode APORT0XCH8 for ACMP_INPUTSEL */ 522 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH9 0x00000009UL /**< Mode APORT0XCH9 for ACMP_INPUTSEL */ 523 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH10 0x0000000AUL /**< Mode APORT0XCH10 for ACMP_INPUTSEL */ 524 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH11 0x0000000BUL /**< Mode APORT0XCH11 for ACMP_INPUTSEL */ 525 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH12 0x0000000CUL /**< Mode APORT0XCH12 for ACMP_INPUTSEL */ 526 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH13 0x0000000DUL /**< Mode APORT0XCH13 for ACMP_INPUTSEL */ 527 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH14 0x0000000EUL /**< Mode APORT0XCH14 for ACMP_INPUTSEL */ 528 #define _ACMP_INPUTSEL_NEGSEL_APORT0XCH15 0x0000000FUL /**< Mode APORT0XCH15 for ACMP_INPUTSEL */ 529 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH0 0x00000010UL /**< Mode APORT0YCH0 for ACMP_INPUTSEL */ 530 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH1 0x00000011UL /**< Mode APORT0YCH1 for ACMP_INPUTSEL */ 531 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH2 0x00000012UL /**< Mode APORT0YCH2 for ACMP_INPUTSEL */ 532 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH3 0x00000013UL /**< Mode APORT0YCH3 for ACMP_INPUTSEL */ 533 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH4 0x00000014UL /**< Mode APORT0YCH4 for ACMP_INPUTSEL */ 534 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH5 0x00000015UL /**< Mode APORT0YCH5 for ACMP_INPUTSEL */ 535 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH6 0x00000016UL /**< Mode APORT0YCH6 for ACMP_INPUTSEL */ 536 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH7 0x00000017UL /**< Mode APORT0YCH7 for ACMP_INPUTSEL */ 537 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH8 0x00000018UL /**< Mode APORT0YCH8 for ACMP_INPUTSEL */ 538 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH9 0x00000019UL /**< Mode APORT0YCH9 for ACMP_INPUTSEL */ 539 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH10 0x0000001AUL /**< Mode APORT0YCH10 for ACMP_INPUTSEL */ 540 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH11 0x0000001BUL /**< Mode APORT0YCH11 for ACMP_INPUTSEL */ 541 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH12 0x0000001CUL /**< Mode APORT0YCH12 for ACMP_INPUTSEL */ 542 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH13 0x0000001DUL /**< Mode APORT0YCH13 for ACMP_INPUTSEL */ 543 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH14 0x0000001EUL /**< Mode APORT0YCH14 for ACMP_INPUTSEL */ 544 #define _ACMP_INPUTSEL_NEGSEL_APORT0YCH15 0x0000001FUL /**< Mode APORT0YCH15 for ACMP_INPUTSEL */ 545 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH0 0x00000020UL /**< Mode APORT1XCH0 for ACMP_INPUTSEL */ 546 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH1 0x00000021UL /**< Mode APORT1YCH1 for ACMP_INPUTSEL */ 547 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH2 0x00000022UL /**< Mode APORT1XCH2 for ACMP_INPUTSEL */ 548 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH3 0x00000023UL /**< Mode APORT1YCH3 for ACMP_INPUTSEL */ 549 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH4 0x00000024UL /**< Mode APORT1XCH4 for ACMP_INPUTSEL */ 550 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH5 0x00000025UL /**< Mode APORT1YCH5 for ACMP_INPUTSEL */ 551 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH6 0x00000026UL /**< Mode APORT1XCH6 for ACMP_INPUTSEL */ 552 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH7 0x00000027UL /**< Mode APORT1YCH7 for ACMP_INPUTSEL */ 553 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH8 0x00000028UL /**< Mode APORT1XCH8 for ACMP_INPUTSEL */ 554 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH9 0x00000029UL /**< Mode APORT1YCH9 for ACMP_INPUTSEL */ 555 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH10 0x0000002AUL /**< Mode APORT1XCH10 for ACMP_INPUTSEL */ 556 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH11 0x0000002BUL /**< Mode APORT1YCH11 for ACMP_INPUTSEL */ 557 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH12 0x0000002CUL /**< Mode APORT1XCH12 for ACMP_INPUTSEL */ 558 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH13 0x0000002DUL /**< Mode APORT1YCH13 for ACMP_INPUTSEL */ 559 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH14 0x0000002EUL /**< Mode APORT1XCH14 for ACMP_INPUTSEL */ 560 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH15 0x0000002FUL /**< Mode APORT1YCH15 for ACMP_INPUTSEL */ 561 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH16 0x00000030UL /**< Mode APORT1XCH16 for ACMP_INPUTSEL */ 562 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH17 0x00000031UL /**< Mode APORT1YCH17 for ACMP_INPUTSEL */ 563 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH18 0x00000032UL /**< Mode APORT1XCH18 for ACMP_INPUTSEL */ 564 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH19 0x00000033UL /**< Mode APORT1YCH19 for ACMP_INPUTSEL */ 565 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH20 0x00000034UL /**< Mode APORT1XCH20 for ACMP_INPUTSEL */ 566 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH21 0x00000035UL /**< Mode APORT1YCH21 for ACMP_INPUTSEL */ 567 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH22 0x00000036UL /**< Mode APORT1XCH22 for ACMP_INPUTSEL */ 568 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH23 0x00000037UL /**< Mode APORT1YCH23 for ACMP_INPUTSEL */ 569 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH24 0x00000038UL /**< Mode APORT1XCH24 for ACMP_INPUTSEL */ 570 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH25 0x00000039UL /**< Mode APORT1YCH25 for ACMP_INPUTSEL */ 571 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH26 0x0000003AUL /**< Mode APORT1XCH26 for ACMP_INPUTSEL */ 572 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH27 0x0000003BUL /**< Mode APORT1YCH27 for ACMP_INPUTSEL */ 573 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH28 0x0000003CUL /**< Mode APORT1XCH28 for ACMP_INPUTSEL */ 574 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH29 0x0000003DUL /**< Mode APORT1YCH29 for ACMP_INPUTSEL */ 575 #define _ACMP_INPUTSEL_NEGSEL_APORT1XCH30 0x0000003EUL /**< Mode APORT1XCH30 for ACMP_INPUTSEL */ 576 #define _ACMP_INPUTSEL_NEGSEL_APORT1YCH31 0x0000003FUL /**< Mode APORT1YCH31 for ACMP_INPUTSEL */ 577 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH0 0x00000040UL /**< Mode APORT2YCH0 for ACMP_INPUTSEL */ 578 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH1 0x00000041UL /**< Mode APORT2XCH1 for ACMP_INPUTSEL */ 579 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH2 0x00000042UL /**< Mode APORT2YCH2 for ACMP_INPUTSEL */ 580 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH3 0x00000043UL /**< Mode APORT2XCH3 for ACMP_INPUTSEL */ 581 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH4 0x00000044UL /**< Mode APORT2YCH4 for ACMP_INPUTSEL */ 582 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH5 0x00000045UL /**< Mode APORT2XCH5 for ACMP_INPUTSEL */ 583 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH6 0x00000046UL /**< Mode APORT2YCH6 for ACMP_INPUTSEL */ 584 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH7 0x00000047UL /**< Mode APORT2XCH7 for ACMP_INPUTSEL */ 585 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH8 0x00000048UL /**< Mode APORT2YCH8 for ACMP_INPUTSEL */ 586 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH9 0x00000049UL /**< Mode APORT2XCH9 for ACMP_INPUTSEL */ 587 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH10 0x0000004AUL /**< Mode APORT2YCH10 for ACMP_INPUTSEL */ 588 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH11 0x0000004BUL /**< Mode APORT2XCH11 for ACMP_INPUTSEL */ 589 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH12 0x0000004CUL /**< Mode APORT2YCH12 for ACMP_INPUTSEL */ 590 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH13 0x0000004DUL /**< Mode APORT2XCH13 for ACMP_INPUTSEL */ 591 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH14 0x0000004EUL /**< Mode APORT2YCH14 for ACMP_INPUTSEL */ 592 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH15 0x0000004FUL /**< Mode APORT2XCH15 for ACMP_INPUTSEL */ 593 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH16 0x00000050UL /**< Mode APORT2YCH16 for ACMP_INPUTSEL */ 594 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH17 0x00000051UL /**< Mode APORT2XCH17 for ACMP_INPUTSEL */ 595 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH18 0x00000052UL /**< Mode APORT2YCH18 for ACMP_INPUTSEL */ 596 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH19 0x00000053UL /**< Mode APORT2XCH19 for ACMP_INPUTSEL */ 597 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH20 0x00000054UL /**< Mode APORT2YCH20 for ACMP_INPUTSEL */ 598 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH21 0x00000055UL /**< Mode APORT2XCH21 for ACMP_INPUTSEL */ 599 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH22 0x00000056UL /**< Mode APORT2YCH22 for ACMP_INPUTSEL */ 600 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH23 0x00000057UL /**< Mode APORT2XCH23 for ACMP_INPUTSEL */ 601 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH24 0x00000058UL /**< Mode APORT2YCH24 for ACMP_INPUTSEL */ 602 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH25 0x00000059UL /**< Mode APORT2XCH25 for ACMP_INPUTSEL */ 603 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH26 0x0000005AUL /**< Mode APORT2YCH26 for ACMP_INPUTSEL */ 604 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH27 0x0000005BUL /**< Mode APORT2XCH27 for ACMP_INPUTSEL */ 605 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH28 0x0000005CUL /**< Mode APORT2YCH28 for ACMP_INPUTSEL */ 606 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH29 0x0000005DUL /**< Mode APORT2XCH29 for ACMP_INPUTSEL */ 607 #define _ACMP_INPUTSEL_NEGSEL_APORT2YCH30 0x0000005EUL /**< Mode APORT2YCH30 for ACMP_INPUTSEL */ 608 #define _ACMP_INPUTSEL_NEGSEL_APORT2XCH31 0x0000005FUL /**< Mode APORT2XCH31 for ACMP_INPUTSEL */ 609 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH0 0x00000060UL /**< Mode APORT3XCH0 for ACMP_INPUTSEL */ 610 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH1 0x00000061UL /**< Mode APORT3YCH1 for ACMP_INPUTSEL */ 611 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH2 0x00000062UL /**< Mode APORT3XCH2 for ACMP_INPUTSEL */ 612 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH3 0x00000063UL /**< Mode APORT3YCH3 for ACMP_INPUTSEL */ 613 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH4 0x00000064UL /**< Mode APORT3XCH4 for ACMP_INPUTSEL */ 614 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH5 0x00000065UL /**< Mode APORT3YCH5 for ACMP_INPUTSEL */ 615 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH6 0x00000066UL /**< Mode APORT3XCH6 for ACMP_INPUTSEL */ 616 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH7 0x00000067UL /**< Mode APORT3YCH7 for ACMP_INPUTSEL */ 617 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH8 0x00000068UL /**< Mode APORT3XCH8 for ACMP_INPUTSEL */ 618 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH9 0x00000069UL /**< Mode APORT3YCH9 for ACMP_INPUTSEL */ 619 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH10 0x0000006AUL /**< Mode APORT3XCH10 for ACMP_INPUTSEL */ 620 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH11 0x0000006BUL /**< Mode APORT3YCH11 for ACMP_INPUTSEL */ 621 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH12 0x0000006CUL /**< Mode APORT3XCH12 for ACMP_INPUTSEL */ 622 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH13 0x0000006DUL /**< Mode APORT3YCH13 for ACMP_INPUTSEL */ 623 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH14 0x0000006EUL /**< Mode APORT3XCH14 for ACMP_INPUTSEL */ 624 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH15 0x0000006FUL /**< Mode APORT3YCH15 for ACMP_INPUTSEL */ 625 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH16 0x00000070UL /**< Mode APORT3XCH16 for ACMP_INPUTSEL */ 626 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH17 0x00000071UL /**< Mode APORT3YCH17 for ACMP_INPUTSEL */ 627 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH18 0x00000072UL /**< Mode APORT3XCH18 for ACMP_INPUTSEL */ 628 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH19 0x00000073UL /**< Mode APORT3YCH19 for ACMP_INPUTSEL */ 629 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH20 0x00000074UL /**< Mode APORT3XCH20 for ACMP_INPUTSEL */ 630 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH21 0x00000075UL /**< Mode APORT3YCH21 for ACMP_INPUTSEL */ 631 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH22 0x00000076UL /**< Mode APORT3XCH22 for ACMP_INPUTSEL */ 632 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH23 0x00000077UL /**< Mode APORT3YCH23 for ACMP_INPUTSEL */ 633 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH24 0x00000078UL /**< Mode APORT3XCH24 for ACMP_INPUTSEL */ 634 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH25 0x00000079UL /**< Mode APORT3YCH25 for ACMP_INPUTSEL */ 635 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH26 0x0000007AUL /**< Mode APORT3XCH26 for ACMP_INPUTSEL */ 636 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH27 0x0000007BUL /**< Mode APORT3YCH27 for ACMP_INPUTSEL */ 637 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH28 0x0000007CUL /**< Mode APORT3XCH28 for ACMP_INPUTSEL */ 638 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH29 0x0000007DUL /**< Mode APORT3YCH29 for ACMP_INPUTSEL */ 639 #define _ACMP_INPUTSEL_NEGSEL_APORT3XCH30 0x0000007EUL /**< Mode APORT3XCH30 for ACMP_INPUTSEL */ 640 #define _ACMP_INPUTSEL_NEGSEL_APORT3YCH31 0x0000007FUL /**< Mode APORT3YCH31 for ACMP_INPUTSEL */ 641 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH0 0x00000080UL /**< Mode APORT4YCH0 for ACMP_INPUTSEL */ 642 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH1 0x00000081UL /**< Mode APORT4XCH1 for ACMP_INPUTSEL */ 643 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH2 0x00000082UL /**< Mode APORT4YCH2 for ACMP_INPUTSEL */ 644 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH3 0x00000083UL /**< Mode APORT4XCH3 for ACMP_INPUTSEL */ 645 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH4 0x00000084UL /**< Mode APORT4YCH4 for ACMP_INPUTSEL */ 646 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH5 0x00000085UL /**< Mode APORT4XCH5 for ACMP_INPUTSEL */ 647 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH6 0x00000086UL /**< Mode APORT4YCH6 for ACMP_INPUTSEL */ 648 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH7 0x00000087UL /**< Mode APORT4XCH7 for ACMP_INPUTSEL */ 649 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH8 0x00000088UL /**< Mode APORT4YCH8 for ACMP_INPUTSEL */ 650 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH9 0x00000089UL /**< Mode APORT4XCH9 for ACMP_INPUTSEL */ 651 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH10 0x0000008AUL /**< Mode APORT4YCH10 for ACMP_INPUTSEL */ 652 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH11 0x0000008BUL /**< Mode APORT4XCH11 for ACMP_INPUTSEL */ 653 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH12 0x0000008CUL /**< Mode APORT4YCH12 for ACMP_INPUTSEL */ 654 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH13 0x0000008DUL /**< Mode APORT4XCH13 for ACMP_INPUTSEL */ 655 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH14 0x0000008EUL /**< Mode APORT4YCH14 for ACMP_INPUTSEL */ 656 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH15 0x0000008FUL /**< Mode APORT4XCH15 for ACMP_INPUTSEL */ 657 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH16 0x00000090UL /**< Mode APORT4YCH16 for ACMP_INPUTSEL */ 658 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH17 0x00000091UL /**< Mode APORT4XCH17 for ACMP_INPUTSEL */ 659 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH18 0x00000092UL /**< Mode APORT4YCH18 for ACMP_INPUTSEL */ 660 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH19 0x00000093UL /**< Mode APORT4XCH19 for ACMP_INPUTSEL */ 661 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH20 0x00000094UL /**< Mode APORT4YCH20 for ACMP_INPUTSEL */ 662 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH21 0x00000095UL /**< Mode APORT4XCH21 for ACMP_INPUTSEL */ 663 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH22 0x00000096UL /**< Mode APORT4YCH22 for ACMP_INPUTSEL */ 664 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH23 0x00000097UL /**< Mode APORT4XCH23 for ACMP_INPUTSEL */ 665 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH24 0x00000098UL /**< Mode APORT4YCH24 for ACMP_INPUTSEL */ 666 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH25 0x00000099UL /**< Mode APORT4XCH25 for ACMP_INPUTSEL */ 667 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH26 0x0000009AUL /**< Mode APORT4YCH26 for ACMP_INPUTSEL */ 668 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH27 0x0000009BUL /**< Mode APORT4XCH27 for ACMP_INPUTSEL */ 669 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH28 0x0000009CUL /**< Mode APORT4YCH28 for ACMP_INPUTSEL */ 670 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH29 0x0000009DUL /**< Mode APORT4XCH29 for ACMP_INPUTSEL */ 671 #define _ACMP_INPUTSEL_NEGSEL_APORT4YCH30 0x0000009EUL /**< Mode APORT4YCH30 for ACMP_INPUTSEL */ 672 #define _ACMP_INPUTSEL_NEGSEL_APORT4XCH31 0x0000009FUL /**< Mode APORT4XCH31 for ACMP_INPUTSEL */ 673 #define _ACMP_INPUTSEL_NEGSEL_VLP 0x000000FBUL /**< Mode VLP for ACMP_INPUTSEL */ 674 #define _ACMP_INPUTSEL_NEGSEL_VBDIV 0x000000FCUL /**< Mode VBDIV for ACMP_INPUTSEL */ 675 #define _ACMP_INPUTSEL_NEGSEL_VADIV 0x000000FDUL /**< Mode VADIV for ACMP_INPUTSEL */ 676 #define _ACMP_INPUTSEL_NEGSEL_VDD 0x000000FEUL /**< Mode VDD for ACMP_INPUTSEL */ 677 #define _ACMP_INPUTSEL_NEGSEL_VSS 0x000000FFUL /**< Mode VSS for ACMP_INPUTSEL */ 678 #define ACMP_INPUTSEL_NEGSEL_DEFAULT (_ACMP_INPUTSEL_NEGSEL_DEFAULT << 8) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */ 679 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH0 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH0 << 8) /**< Shifted mode APORT0XCH0 for ACMP_INPUTSEL */ 680 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH1 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH1 << 8) /**< Shifted mode APORT0XCH1 for ACMP_INPUTSEL */ 681 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH2 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH2 << 8) /**< Shifted mode APORT0XCH2 for ACMP_INPUTSEL */ 682 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH3 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH3 << 8) /**< Shifted mode APORT0XCH3 for ACMP_INPUTSEL */ 683 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH4 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH4 << 8) /**< Shifted mode APORT0XCH4 for ACMP_INPUTSEL */ 684 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH5 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH5 << 8) /**< Shifted mode APORT0XCH5 for ACMP_INPUTSEL */ 685 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH6 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH6 << 8) /**< Shifted mode APORT0XCH6 for ACMP_INPUTSEL */ 686 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH7 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH7 << 8) /**< Shifted mode APORT0XCH7 for ACMP_INPUTSEL */ 687 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH8 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH8 << 8) /**< Shifted mode APORT0XCH8 for ACMP_INPUTSEL */ 688 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH9 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH9 << 8) /**< Shifted mode APORT0XCH9 for ACMP_INPUTSEL */ 689 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH10 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH10 << 8) /**< Shifted mode APORT0XCH10 for ACMP_INPUTSEL */ 690 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH11 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH11 << 8) /**< Shifted mode APORT0XCH11 for ACMP_INPUTSEL */ 691 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH12 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH12 << 8) /**< Shifted mode APORT0XCH12 for ACMP_INPUTSEL */ 692 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH13 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH13 << 8) /**< Shifted mode APORT0XCH13 for ACMP_INPUTSEL */ 693 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH14 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH14 << 8) /**< Shifted mode APORT0XCH14 for ACMP_INPUTSEL */ 694 #define ACMP_INPUTSEL_NEGSEL_APORT0XCH15 (_ACMP_INPUTSEL_NEGSEL_APORT0XCH15 << 8) /**< Shifted mode APORT0XCH15 for ACMP_INPUTSEL */ 695 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH0 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH0 << 8) /**< Shifted mode APORT0YCH0 for ACMP_INPUTSEL */ 696 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH1 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH1 << 8) /**< Shifted mode APORT0YCH1 for ACMP_INPUTSEL */ 697 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH2 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH2 << 8) /**< Shifted mode APORT0YCH2 for ACMP_INPUTSEL */ 698 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH3 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH3 << 8) /**< Shifted mode APORT0YCH3 for ACMP_INPUTSEL */ 699 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH4 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH4 << 8) /**< Shifted mode APORT0YCH4 for ACMP_INPUTSEL */ 700 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH5 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH5 << 8) /**< Shifted mode APORT0YCH5 for ACMP_INPUTSEL */ 701 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH6 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH6 << 8) /**< Shifted mode APORT0YCH6 for ACMP_INPUTSEL */ 702 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH7 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH7 << 8) /**< Shifted mode APORT0YCH7 for ACMP_INPUTSEL */ 703 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH8 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH8 << 8) /**< Shifted mode APORT0YCH8 for ACMP_INPUTSEL */ 704 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH9 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH9 << 8) /**< Shifted mode APORT0YCH9 for ACMP_INPUTSEL */ 705 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH10 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH10 << 8) /**< Shifted mode APORT0YCH10 for ACMP_INPUTSEL */ 706 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH11 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH11 << 8) /**< Shifted mode APORT0YCH11 for ACMP_INPUTSEL */ 707 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH12 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH12 << 8) /**< Shifted mode APORT0YCH12 for ACMP_INPUTSEL */ 708 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH13 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH13 << 8) /**< Shifted mode APORT0YCH13 for ACMP_INPUTSEL */ 709 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH14 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH14 << 8) /**< Shifted mode APORT0YCH14 for ACMP_INPUTSEL */ 710 #define ACMP_INPUTSEL_NEGSEL_APORT0YCH15 (_ACMP_INPUTSEL_NEGSEL_APORT0YCH15 << 8) /**< Shifted mode APORT0YCH15 for ACMP_INPUTSEL */ 711 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH0 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH0 << 8) /**< Shifted mode APORT1XCH0 for ACMP_INPUTSEL */ 712 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH1 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH1 << 8) /**< Shifted mode APORT1YCH1 for ACMP_INPUTSEL */ 713 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH2 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH2 << 8) /**< Shifted mode APORT1XCH2 for ACMP_INPUTSEL */ 714 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH3 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH3 << 8) /**< Shifted mode APORT1YCH3 for ACMP_INPUTSEL */ 715 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH4 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH4 << 8) /**< Shifted mode APORT1XCH4 for ACMP_INPUTSEL */ 716 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH5 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH5 << 8) /**< Shifted mode APORT1YCH5 for ACMP_INPUTSEL */ 717 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH6 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH6 << 8) /**< Shifted mode APORT1XCH6 for ACMP_INPUTSEL */ 718 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH7 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH7 << 8) /**< Shifted mode APORT1YCH7 for ACMP_INPUTSEL */ 719 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH8 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH8 << 8) /**< Shifted mode APORT1XCH8 for ACMP_INPUTSEL */ 720 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH9 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH9 << 8) /**< Shifted mode APORT1YCH9 for ACMP_INPUTSEL */ 721 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH10 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH10 << 8) /**< Shifted mode APORT1XCH10 for ACMP_INPUTSEL */ 722 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH11 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH11 << 8) /**< Shifted mode APORT1YCH11 for ACMP_INPUTSEL */ 723 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH12 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH12 << 8) /**< Shifted mode APORT1XCH12 for ACMP_INPUTSEL */ 724 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH13 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH13 << 8) /**< Shifted mode APORT1YCH13 for ACMP_INPUTSEL */ 725 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH14 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH14 << 8) /**< Shifted mode APORT1XCH14 for ACMP_INPUTSEL */ 726 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH15 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH15 << 8) /**< Shifted mode APORT1YCH15 for ACMP_INPUTSEL */ 727 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH16 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH16 << 8) /**< Shifted mode APORT1XCH16 for ACMP_INPUTSEL */ 728 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH17 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH17 << 8) /**< Shifted mode APORT1YCH17 for ACMP_INPUTSEL */ 729 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH18 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH18 << 8) /**< Shifted mode APORT1XCH18 for ACMP_INPUTSEL */ 730 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH19 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH19 << 8) /**< Shifted mode APORT1YCH19 for ACMP_INPUTSEL */ 731 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH20 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH20 << 8) /**< Shifted mode APORT1XCH20 for ACMP_INPUTSEL */ 732 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH21 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH21 << 8) /**< Shifted mode APORT1YCH21 for ACMP_INPUTSEL */ 733 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH22 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH22 << 8) /**< Shifted mode APORT1XCH22 for ACMP_INPUTSEL */ 734 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH23 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH23 << 8) /**< Shifted mode APORT1YCH23 for ACMP_INPUTSEL */ 735 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH24 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH24 << 8) /**< Shifted mode APORT1XCH24 for ACMP_INPUTSEL */ 736 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH25 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH25 << 8) /**< Shifted mode APORT1YCH25 for ACMP_INPUTSEL */ 737 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH26 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH26 << 8) /**< Shifted mode APORT1XCH26 for ACMP_INPUTSEL */ 738 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH27 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH27 << 8) /**< Shifted mode APORT1YCH27 for ACMP_INPUTSEL */ 739 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH28 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH28 << 8) /**< Shifted mode APORT1XCH28 for ACMP_INPUTSEL */ 740 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH29 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH29 << 8) /**< Shifted mode APORT1YCH29 for ACMP_INPUTSEL */ 741 #define ACMP_INPUTSEL_NEGSEL_APORT1XCH30 (_ACMP_INPUTSEL_NEGSEL_APORT1XCH30 << 8) /**< Shifted mode APORT1XCH30 for ACMP_INPUTSEL */ 742 #define ACMP_INPUTSEL_NEGSEL_APORT1YCH31 (_ACMP_INPUTSEL_NEGSEL_APORT1YCH31 << 8) /**< Shifted mode APORT1YCH31 for ACMP_INPUTSEL */ 743 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH0 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH0 << 8) /**< Shifted mode APORT2YCH0 for ACMP_INPUTSEL */ 744 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH1 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH1 << 8) /**< Shifted mode APORT2XCH1 for ACMP_INPUTSEL */ 745 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH2 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH2 << 8) /**< Shifted mode APORT2YCH2 for ACMP_INPUTSEL */ 746 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH3 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH3 << 8) /**< Shifted mode APORT2XCH3 for ACMP_INPUTSEL */ 747 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH4 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH4 << 8) /**< Shifted mode APORT2YCH4 for ACMP_INPUTSEL */ 748 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH5 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH5 << 8) /**< Shifted mode APORT2XCH5 for ACMP_INPUTSEL */ 749 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH6 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH6 << 8) /**< Shifted mode APORT2YCH6 for ACMP_INPUTSEL */ 750 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH7 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH7 << 8) /**< Shifted mode APORT2XCH7 for ACMP_INPUTSEL */ 751 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH8 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH8 << 8) /**< Shifted mode APORT2YCH8 for ACMP_INPUTSEL */ 752 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH9 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH9 << 8) /**< Shifted mode APORT2XCH9 for ACMP_INPUTSEL */ 753 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH10 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH10 << 8) /**< Shifted mode APORT2YCH10 for ACMP_INPUTSEL */ 754 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH11 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH11 << 8) /**< Shifted mode APORT2XCH11 for ACMP_INPUTSEL */ 755 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH12 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH12 << 8) /**< Shifted mode APORT2YCH12 for ACMP_INPUTSEL */ 756 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH13 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH13 << 8) /**< Shifted mode APORT2XCH13 for ACMP_INPUTSEL */ 757 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH14 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH14 << 8) /**< Shifted mode APORT2YCH14 for ACMP_INPUTSEL */ 758 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH15 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH15 << 8) /**< Shifted mode APORT2XCH15 for ACMP_INPUTSEL */ 759 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH16 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH16 << 8) /**< Shifted mode APORT2YCH16 for ACMP_INPUTSEL */ 760 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH17 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH17 << 8) /**< Shifted mode APORT2XCH17 for ACMP_INPUTSEL */ 761 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH18 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH18 << 8) /**< Shifted mode APORT2YCH18 for ACMP_INPUTSEL */ 762 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH19 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH19 << 8) /**< Shifted mode APORT2XCH19 for ACMP_INPUTSEL */ 763 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH20 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH20 << 8) /**< Shifted mode APORT2YCH20 for ACMP_INPUTSEL */ 764 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH21 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH21 << 8) /**< Shifted mode APORT2XCH21 for ACMP_INPUTSEL */ 765 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH22 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH22 << 8) /**< Shifted mode APORT2YCH22 for ACMP_INPUTSEL */ 766 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH23 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH23 << 8) /**< Shifted mode APORT2XCH23 for ACMP_INPUTSEL */ 767 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH24 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH24 << 8) /**< Shifted mode APORT2YCH24 for ACMP_INPUTSEL */ 768 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH25 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH25 << 8) /**< Shifted mode APORT2XCH25 for ACMP_INPUTSEL */ 769 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH26 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH26 << 8) /**< Shifted mode APORT2YCH26 for ACMP_INPUTSEL */ 770 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH27 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH27 << 8) /**< Shifted mode APORT2XCH27 for ACMP_INPUTSEL */ 771 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH28 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH28 << 8) /**< Shifted mode APORT2YCH28 for ACMP_INPUTSEL */ 772 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH29 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH29 << 8) /**< Shifted mode APORT2XCH29 for ACMP_INPUTSEL */ 773 #define ACMP_INPUTSEL_NEGSEL_APORT2YCH30 (_ACMP_INPUTSEL_NEGSEL_APORT2YCH30 << 8) /**< Shifted mode APORT2YCH30 for ACMP_INPUTSEL */ 774 #define ACMP_INPUTSEL_NEGSEL_APORT2XCH31 (_ACMP_INPUTSEL_NEGSEL_APORT2XCH31 << 8) /**< Shifted mode APORT2XCH31 for ACMP_INPUTSEL */ 775 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH0 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH0 << 8) /**< Shifted mode APORT3XCH0 for ACMP_INPUTSEL */ 776 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH1 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH1 << 8) /**< Shifted mode APORT3YCH1 for ACMP_INPUTSEL */ 777 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH2 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH2 << 8) /**< Shifted mode APORT3XCH2 for ACMP_INPUTSEL */ 778 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH3 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH3 << 8) /**< Shifted mode APORT3YCH3 for ACMP_INPUTSEL */ 779 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH4 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH4 << 8) /**< Shifted mode APORT3XCH4 for ACMP_INPUTSEL */ 780 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH5 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH5 << 8) /**< Shifted mode APORT3YCH5 for ACMP_INPUTSEL */ 781 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH6 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH6 << 8) /**< Shifted mode APORT3XCH6 for ACMP_INPUTSEL */ 782 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH7 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH7 << 8) /**< Shifted mode APORT3YCH7 for ACMP_INPUTSEL */ 783 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH8 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH8 << 8) /**< Shifted mode APORT3XCH8 for ACMP_INPUTSEL */ 784 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH9 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH9 << 8) /**< Shifted mode APORT3YCH9 for ACMP_INPUTSEL */ 785 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH10 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH10 << 8) /**< Shifted mode APORT3XCH10 for ACMP_INPUTSEL */ 786 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH11 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH11 << 8) /**< Shifted mode APORT3YCH11 for ACMP_INPUTSEL */ 787 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH12 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH12 << 8) /**< Shifted mode APORT3XCH12 for ACMP_INPUTSEL */ 788 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH13 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH13 << 8) /**< Shifted mode APORT3YCH13 for ACMP_INPUTSEL */ 789 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH14 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH14 << 8) /**< Shifted mode APORT3XCH14 for ACMP_INPUTSEL */ 790 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH15 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH15 << 8) /**< Shifted mode APORT3YCH15 for ACMP_INPUTSEL */ 791 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH16 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH16 << 8) /**< Shifted mode APORT3XCH16 for ACMP_INPUTSEL */ 792 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH17 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH17 << 8) /**< Shifted mode APORT3YCH17 for ACMP_INPUTSEL */ 793 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH18 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH18 << 8) /**< Shifted mode APORT3XCH18 for ACMP_INPUTSEL */ 794 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH19 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH19 << 8) /**< Shifted mode APORT3YCH19 for ACMP_INPUTSEL */ 795 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH20 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH20 << 8) /**< Shifted mode APORT3XCH20 for ACMP_INPUTSEL */ 796 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH21 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH21 << 8) /**< Shifted mode APORT3YCH21 for ACMP_INPUTSEL */ 797 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH22 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH22 << 8) /**< Shifted mode APORT3XCH22 for ACMP_INPUTSEL */ 798 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH23 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH23 << 8) /**< Shifted mode APORT3YCH23 for ACMP_INPUTSEL */ 799 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH24 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH24 << 8) /**< Shifted mode APORT3XCH24 for ACMP_INPUTSEL */ 800 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH25 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH25 << 8) /**< Shifted mode APORT3YCH25 for ACMP_INPUTSEL */ 801 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH26 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH26 << 8) /**< Shifted mode APORT3XCH26 for ACMP_INPUTSEL */ 802 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH27 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH27 << 8) /**< Shifted mode APORT3YCH27 for ACMP_INPUTSEL */ 803 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH28 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH28 << 8) /**< Shifted mode APORT3XCH28 for ACMP_INPUTSEL */ 804 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH29 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH29 << 8) /**< Shifted mode APORT3YCH29 for ACMP_INPUTSEL */ 805 #define ACMP_INPUTSEL_NEGSEL_APORT3XCH30 (_ACMP_INPUTSEL_NEGSEL_APORT3XCH30 << 8) /**< Shifted mode APORT3XCH30 for ACMP_INPUTSEL */ 806 #define ACMP_INPUTSEL_NEGSEL_APORT3YCH31 (_ACMP_INPUTSEL_NEGSEL_APORT3YCH31 << 8) /**< Shifted mode APORT3YCH31 for ACMP_INPUTSEL */ 807 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH0 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH0 << 8) /**< Shifted mode APORT4YCH0 for ACMP_INPUTSEL */ 808 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH1 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH1 << 8) /**< Shifted mode APORT4XCH1 for ACMP_INPUTSEL */ 809 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH2 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH2 << 8) /**< Shifted mode APORT4YCH2 for ACMP_INPUTSEL */ 810 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH3 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH3 << 8) /**< Shifted mode APORT4XCH3 for ACMP_INPUTSEL */ 811 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH4 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH4 << 8) /**< Shifted mode APORT4YCH4 for ACMP_INPUTSEL */ 812 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH5 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH5 << 8) /**< Shifted mode APORT4XCH5 for ACMP_INPUTSEL */ 813 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH6 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH6 << 8) /**< Shifted mode APORT4YCH6 for ACMP_INPUTSEL */ 814 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH7 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH7 << 8) /**< Shifted mode APORT4XCH7 for ACMP_INPUTSEL */ 815 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH8 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH8 << 8) /**< Shifted mode APORT4YCH8 for ACMP_INPUTSEL */ 816 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH9 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH9 << 8) /**< Shifted mode APORT4XCH9 for ACMP_INPUTSEL */ 817 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH10 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH10 << 8) /**< Shifted mode APORT4YCH10 for ACMP_INPUTSEL */ 818 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH11 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH11 << 8) /**< Shifted mode APORT4XCH11 for ACMP_INPUTSEL */ 819 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH12 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH12 << 8) /**< Shifted mode APORT4YCH12 for ACMP_INPUTSEL */ 820 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH13 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH13 << 8) /**< Shifted mode APORT4XCH13 for ACMP_INPUTSEL */ 821 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH14 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH14 << 8) /**< Shifted mode APORT4YCH14 for ACMP_INPUTSEL */ 822 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH15 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH15 << 8) /**< Shifted mode APORT4XCH15 for ACMP_INPUTSEL */ 823 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH16 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH16 << 8) /**< Shifted mode APORT4YCH16 for ACMP_INPUTSEL */ 824 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH17 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH17 << 8) /**< Shifted mode APORT4XCH17 for ACMP_INPUTSEL */ 825 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH18 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH18 << 8) /**< Shifted mode APORT4YCH18 for ACMP_INPUTSEL */ 826 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH19 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH19 << 8) /**< Shifted mode APORT4XCH19 for ACMP_INPUTSEL */ 827 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH20 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH20 << 8) /**< Shifted mode APORT4YCH20 for ACMP_INPUTSEL */ 828 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH21 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH21 << 8) /**< Shifted mode APORT4XCH21 for ACMP_INPUTSEL */ 829 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH22 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH22 << 8) /**< Shifted mode APORT4YCH22 for ACMP_INPUTSEL */ 830 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH23 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH23 << 8) /**< Shifted mode APORT4XCH23 for ACMP_INPUTSEL */ 831 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH24 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH24 << 8) /**< Shifted mode APORT4YCH24 for ACMP_INPUTSEL */ 832 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH25 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH25 << 8) /**< Shifted mode APORT4XCH25 for ACMP_INPUTSEL */ 833 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH26 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH26 << 8) /**< Shifted mode APORT4YCH26 for ACMP_INPUTSEL */ 834 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH27 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH27 << 8) /**< Shifted mode APORT4XCH27 for ACMP_INPUTSEL */ 835 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH28 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH28 << 8) /**< Shifted mode APORT4YCH28 for ACMP_INPUTSEL */ 836 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH29 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH29 << 8) /**< Shifted mode APORT4XCH29 for ACMP_INPUTSEL */ 837 #define ACMP_INPUTSEL_NEGSEL_APORT4YCH30 (_ACMP_INPUTSEL_NEGSEL_APORT4YCH30 << 8) /**< Shifted mode APORT4YCH30 for ACMP_INPUTSEL */ 838 #define ACMP_INPUTSEL_NEGSEL_APORT4XCH31 (_ACMP_INPUTSEL_NEGSEL_APORT4XCH31 << 8) /**< Shifted mode APORT4XCH31 for ACMP_INPUTSEL */ 839 #define ACMP_INPUTSEL_NEGSEL_VLP (_ACMP_INPUTSEL_NEGSEL_VLP << 8) /**< Shifted mode VLP for ACMP_INPUTSEL */ 840 #define ACMP_INPUTSEL_NEGSEL_VBDIV (_ACMP_INPUTSEL_NEGSEL_VBDIV << 8) /**< Shifted mode VBDIV for ACMP_INPUTSEL */ 841 #define ACMP_INPUTSEL_NEGSEL_VADIV (_ACMP_INPUTSEL_NEGSEL_VADIV << 8) /**< Shifted mode VADIV for ACMP_INPUTSEL */ 842 #define ACMP_INPUTSEL_NEGSEL_VDD (_ACMP_INPUTSEL_NEGSEL_VDD << 8) /**< Shifted mode VDD for ACMP_INPUTSEL */ 843 #define ACMP_INPUTSEL_NEGSEL_VSS (_ACMP_INPUTSEL_NEGSEL_VSS << 8) /**< Shifted mode VSS for ACMP_INPUTSEL */ 844 #define _ACMP_INPUTSEL_VASEL_SHIFT 16 /**< Shift value for ACMP_VASEL */ 845 #define _ACMP_INPUTSEL_VASEL_MASK 0x3F0000UL /**< Bit mask for ACMP_VASEL */ 846 #define _ACMP_INPUTSEL_VASEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_INPUTSEL */ 847 #define _ACMP_INPUTSEL_VASEL_VDD 0x00000000UL /**< Mode VDD for ACMP_INPUTSEL */ 848 #define _ACMP_INPUTSEL_VASEL_APORT2YCH0 0x00000001UL /**< Mode APORT2YCH0 for ACMP_INPUTSEL */ 849 #define _ACMP_INPUTSEL_VASEL_APORT2YCH2 0x00000003UL /**< Mode APORT2YCH2 for ACMP_INPUTSEL */ 850 #define _ACMP_INPUTSEL_VASEL_APORT2YCH4 0x00000005UL /**< Mode APORT2YCH4 for ACMP_INPUTSEL */ 851 #define _ACMP_INPUTSEL_VASEL_APORT2YCH6 0x00000007UL /**< Mode APORT2YCH6 for ACMP_INPUTSEL */ 852 #define _ACMP_INPUTSEL_VASEL_APORT2YCH8 0x00000009UL /**< Mode APORT2YCH8 for ACMP_INPUTSEL */ 853 #define _ACMP_INPUTSEL_VASEL_APORT2YCH10 0x0000000BUL /**< Mode APORT2YCH10 for ACMP_INPUTSEL */ 854 #define _ACMP_INPUTSEL_VASEL_APORT2YCH12 0x0000000DUL /**< Mode APORT2YCH12 for ACMP_INPUTSEL */ 855 #define _ACMP_INPUTSEL_VASEL_APORT2YCH14 0x0000000FUL /**< Mode APORT2YCH14 for ACMP_INPUTSEL */ 856 #define _ACMP_INPUTSEL_VASEL_APORT2YCH16 0x00000011UL /**< Mode APORT2YCH16 for ACMP_INPUTSEL */ 857 #define _ACMP_INPUTSEL_VASEL_APORT2YCH18 0x00000013UL /**< Mode APORT2YCH18 for ACMP_INPUTSEL */ 858 #define _ACMP_INPUTSEL_VASEL_APORT2YCH20 0x00000015UL /**< Mode APORT2YCH20 for ACMP_INPUTSEL */ 859 #define _ACMP_INPUTSEL_VASEL_APORT2YCH22 0x00000017UL /**< Mode APORT2YCH22 for ACMP_INPUTSEL */ 860 #define _ACMP_INPUTSEL_VASEL_APORT2YCH24 0x00000019UL /**< Mode APORT2YCH24 for ACMP_INPUTSEL */ 861 #define _ACMP_INPUTSEL_VASEL_APORT2YCH26 0x0000001BUL /**< Mode APORT2YCH26 for ACMP_INPUTSEL */ 862 #define _ACMP_INPUTSEL_VASEL_APORT2YCH28 0x0000001DUL /**< Mode APORT2YCH28 for ACMP_INPUTSEL */ 863 #define _ACMP_INPUTSEL_VASEL_APORT2YCH30 0x0000001FUL /**< Mode APORT2YCH30 for ACMP_INPUTSEL */ 864 #define _ACMP_INPUTSEL_VASEL_APORT1XCH0 0x00000020UL /**< Mode APORT1XCH0 for ACMP_INPUTSEL */ 865 #define _ACMP_INPUTSEL_VASEL_APORT1YCH1 0x00000021UL /**< Mode APORT1YCH1 for ACMP_INPUTSEL */ 866 #define _ACMP_INPUTSEL_VASEL_APORT1XCH2 0x00000022UL /**< Mode APORT1XCH2 for ACMP_INPUTSEL */ 867 #define _ACMP_INPUTSEL_VASEL_APORT1YCH3 0x00000023UL /**< Mode APORT1YCH3 for ACMP_INPUTSEL */ 868 #define _ACMP_INPUTSEL_VASEL_APORT1XCH4 0x00000024UL /**< Mode APORT1XCH4 for ACMP_INPUTSEL */ 869 #define _ACMP_INPUTSEL_VASEL_APORT1YCH5 0x00000025UL /**< Mode APORT1YCH5 for ACMP_INPUTSEL */ 870 #define _ACMP_INPUTSEL_VASEL_APORT1XCH6 0x00000026UL /**< Mode APORT1XCH6 for ACMP_INPUTSEL */ 871 #define _ACMP_INPUTSEL_VASEL_APORT1YCH7 0x00000027UL /**< Mode APORT1YCH7 for ACMP_INPUTSEL */ 872 #define _ACMP_INPUTSEL_VASEL_APORT1XCH8 0x00000028UL /**< Mode APORT1XCH8 for ACMP_INPUTSEL */ 873 #define _ACMP_INPUTSEL_VASEL_APORT1YCH9 0x00000029UL /**< Mode APORT1YCH9 for ACMP_INPUTSEL */ 874 #define _ACMP_INPUTSEL_VASEL_APORT1XCH10 0x0000002AUL /**< Mode APORT1XCH10 for ACMP_INPUTSEL */ 875 #define _ACMP_INPUTSEL_VASEL_APORT1YCH11 0x0000002BUL /**< Mode APORT1YCH11 for ACMP_INPUTSEL */ 876 #define _ACMP_INPUTSEL_VASEL_APORT1XCH12 0x0000002CUL /**< Mode APORT1XCH12 for ACMP_INPUTSEL */ 877 #define _ACMP_INPUTSEL_VASEL_APORT1YCH13 0x0000002DUL /**< Mode APORT1YCH13 for ACMP_INPUTSEL */ 878 #define _ACMP_INPUTSEL_VASEL_APORT1XCH14 0x0000002EUL /**< Mode APORT1XCH14 for ACMP_INPUTSEL */ 879 #define _ACMP_INPUTSEL_VASEL_APORT1YCH15 0x0000002FUL /**< Mode APORT1YCH15 for ACMP_INPUTSEL */ 880 #define _ACMP_INPUTSEL_VASEL_APORT1XCH16 0x00000030UL /**< Mode APORT1XCH16 for ACMP_INPUTSEL */ 881 #define _ACMP_INPUTSEL_VASEL_APORT1YCH17 0x00000031UL /**< Mode APORT1YCH17 for ACMP_INPUTSEL */ 882 #define _ACMP_INPUTSEL_VASEL_APORT1XCH18 0x00000032UL /**< Mode APORT1XCH18 for ACMP_INPUTSEL */ 883 #define _ACMP_INPUTSEL_VASEL_APORT1YCH19 0x00000033UL /**< Mode APORT1YCH19 for ACMP_INPUTSEL */ 884 #define _ACMP_INPUTSEL_VASEL_APORT1XCH20 0x00000034UL /**< Mode APORT1XCH20 for ACMP_INPUTSEL */ 885 #define _ACMP_INPUTSEL_VASEL_APORT1YCH21 0x00000035UL /**< Mode APORT1YCH21 for ACMP_INPUTSEL */ 886 #define _ACMP_INPUTSEL_VASEL_APORT1XCH22 0x00000036UL /**< Mode APORT1XCH22 for ACMP_INPUTSEL */ 887 #define _ACMP_INPUTSEL_VASEL_APORT1YCH23 0x00000037UL /**< Mode APORT1YCH23 for ACMP_INPUTSEL */ 888 #define _ACMP_INPUTSEL_VASEL_APORT1XCH24 0x00000038UL /**< Mode APORT1XCH24 for ACMP_INPUTSEL */ 889 #define _ACMP_INPUTSEL_VASEL_APORT1YCH25 0x00000039UL /**< Mode APORT1YCH25 for ACMP_INPUTSEL */ 890 #define _ACMP_INPUTSEL_VASEL_APORT1XCH26 0x0000003AUL /**< Mode APORT1XCH26 for ACMP_INPUTSEL */ 891 #define _ACMP_INPUTSEL_VASEL_APORT1YCH27 0x0000003BUL /**< Mode APORT1YCH27 for ACMP_INPUTSEL */ 892 #define _ACMP_INPUTSEL_VASEL_APORT1XCH28 0x0000003CUL /**< Mode APORT1XCH28 for ACMP_INPUTSEL */ 893 #define _ACMP_INPUTSEL_VASEL_APORT1YCH29 0x0000003DUL /**< Mode APORT1YCH29 for ACMP_INPUTSEL */ 894 #define _ACMP_INPUTSEL_VASEL_APORT1XCH30 0x0000003EUL /**< Mode APORT1XCH30 for ACMP_INPUTSEL */ 895 #define _ACMP_INPUTSEL_VASEL_APORT1YCH31 0x0000003FUL /**< Mode APORT1YCH31 for ACMP_INPUTSEL */ 896 #define ACMP_INPUTSEL_VASEL_DEFAULT (_ACMP_INPUTSEL_VASEL_DEFAULT << 16) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */ 897 #define ACMP_INPUTSEL_VASEL_VDD (_ACMP_INPUTSEL_VASEL_VDD << 16) /**< Shifted mode VDD for ACMP_INPUTSEL */ 898 #define ACMP_INPUTSEL_VASEL_APORT2YCH0 (_ACMP_INPUTSEL_VASEL_APORT2YCH0 << 16) /**< Shifted mode APORT2YCH0 for ACMP_INPUTSEL */ 899 #define ACMP_INPUTSEL_VASEL_APORT2YCH2 (_ACMP_INPUTSEL_VASEL_APORT2YCH2 << 16) /**< Shifted mode APORT2YCH2 for ACMP_INPUTSEL */ 900 #define ACMP_INPUTSEL_VASEL_APORT2YCH4 (_ACMP_INPUTSEL_VASEL_APORT2YCH4 << 16) /**< Shifted mode APORT2YCH4 for ACMP_INPUTSEL */ 901 #define ACMP_INPUTSEL_VASEL_APORT2YCH6 (_ACMP_INPUTSEL_VASEL_APORT2YCH6 << 16) /**< Shifted mode APORT2YCH6 for ACMP_INPUTSEL */ 902 #define ACMP_INPUTSEL_VASEL_APORT2YCH8 (_ACMP_INPUTSEL_VASEL_APORT2YCH8 << 16) /**< Shifted mode APORT2YCH8 for ACMP_INPUTSEL */ 903 #define ACMP_INPUTSEL_VASEL_APORT2YCH10 (_ACMP_INPUTSEL_VASEL_APORT2YCH10 << 16) /**< Shifted mode APORT2YCH10 for ACMP_INPUTSEL */ 904 #define ACMP_INPUTSEL_VASEL_APORT2YCH12 (_ACMP_INPUTSEL_VASEL_APORT2YCH12 << 16) /**< Shifted mode APORT2YCH12 for ACMP_INPUTSEL */ 905 #define ACMP_INPUTSEL_VASEL_APORT2YCH14 (_ACMP_INPUTSEL_VASEL_APORT2YCH14 << 16) /**< Shifted mode APORT2YCH14 for ACMP_INPUTSEL */ 906 #define ACMP_INPUTSEL_VASEL_APORT2YCH16 (_ACMP_INPUTSEL_VASEL_APORT2YCH16 << 16) /**< Shifted mode APORT2YCH16 for ACMP_INPUTSEL */ 907 #define ACMP_INPUTSEL_VASEL_APORT2YCH18 (_ACMP_INPUTSEL_VASEL_APORT2YCH18 << 16) /**< Shifted mode APORT2YCH18 for ACMP_INPUTSEL */ 908 #define ACMP_INPUTSEL_VASEL_APORT2YCH20 (_ACMP_INPUTSEL_VASEL_APORT2YCH20 << 16) /**< Shifted mode APORT2YCH20 for ACMP_INPUTSEL */ 909 #define ACMP_INPUTSEL_VASEL_APORT2YCH22 (_ACMP_INPUTSEL_VASEL_APORT2YCH22 << 16) /**< Shifted mode APORT2YCH22 for ACMP_INPUTSEL */ 910 #define ACMP_INPUTSEL_VASEL_APORT2YCH24 (_ACMP_INPUTSEL_VASEL_APORT2YCH24 << 16) /**< Shifted mode APORT2YCH24 for ACMP_INPUTSEL */ 911 #define ACMP_INPUTSEL_VASEL_APORT2YCH26 (_ACMP_INPUTSEL_VASEL_APORT2YCH26 << 16) /**< Shifted mode APORT2YCH26 for ACMP_INPUTSEL */ 912 #define ACMP_INPUTSEL_VASEL_APORT2YCH28 (_ACMP_INPUTSEL_VASEL_APORT2YCH28 << 16) /**< Shifted mode APORT2YCH28 for ACMP_INPUTSEL */ 913 #define ACMP_INPUTSEL_VASEL_APORT2YCH30 (_ACMP_INPUTSEL_VASEL_APORT2YCH30 << 16) /**< Shifted mode APORT2YCH30 for ACMP_INPUTSEL */ 914 #define ACMP_INPUTSEL_VASEL_APORT1XCH0 (_ACMP_INPUTSEL_VASEL_APORT1XCH0 << 16) /**< Shifted mode APORT1XCH0 for ACMP_INPUTSEL */ 915 #define ACMP_INPUTSEL_VASEL_APORT1YCH1 (_ACMP_INPUTSEL_VASEL_APORT1YCH1 << 16) /**< Shifted mode APORT1YCH1 for ACMP_INPUTSEL */ 916 #define ACMP_INPUTSEL_VASEL_APORT1XCH2 (_ACMP_INPUTSEL_VASEL_APORT1XCH2 << 16) /**< Shifted mode APORT1XCH2 for ACMP_INPUTSEL */ 917 #define ACMP_INPUTSEL_VASEL_APORT1YCH3 (_ACMP_INPUTSEL_VASEL_APORT1YCH3 << 16) /**< Shifted mode APORT1YCH3 for ACMP_INPUTSEL */ 918 #define ACMP_INPUTSEL_VASEL_APORT1XCH4 (_ACMP_INPUTSEL_VASEL_APORT1XCH4 << 16) /**< Shifted mode APORT1XCH4 for ACMP_INPUTSEL */ 919 #define ACMP_INPUTSEL_VASEL_APORT1YCH5 (_ACMP_INPUTSEL_VASEL_APORT1YCH5 << 16) /**< Shifted mode APORT1YCH5 for ACMP_INPUTSEL */ 920 #define ACMP_INPUTSEL_VASEL_APORT1XCH6 (_ACMP_INPUTSEL_VASEL_APORT1XCH6 << 16) /**< Shifted mode APORT1XCH6 for ACMP_INPUTSEL */ 921 #define ACMP_INPUTSEL_VASEL_APORT1YCH7 (_ACMP_INPUTSEL_VASEL_APORT1YCH7 << 16) /**< Shifted mode APORT1YCH7 for ACMP_INPUTSEL */ 922 #define ACMP_INPUTSEL_VASEL_APORT1XCH8 (_ACMP_INPUTSEL_VASEL_APORT1XCH8 << 16) /**< Shifted mode APORT1XCH8 for ACMP_INPUTSEL */ 923 #define ACMP_INPUTSEL_VASEL_APORT1YCH9 (_ACMP_INPUTSEL_VASEL_APORT1YCH9 << 16) /**< Shifted mode APORT1YCH9 for ACMP_INPUTSEL */ 924 #define ACMP_INPUTSEL_VASEL_APORT1XCH10 (_ACMP_INPUTSEL_VASEL_APORT1XCH10 << 16) /**< Shifted mode APORT1XCH10 for ACMP_INPUTSEL */ 925 #define ACMP_INPUTSEL_VASEL_APORT1YCH11 (_ACMP_INPUTSEL_VASEL_APORT1YCH11 << 16) /**< Shifted mode APORT1YCH11 for ACMP_INPUTSEL */ 926 #define ACMP_INPUTSEL_VASEL_APORT1XCH12 (_ACMP_INPUTSEL_VASEL_APORT1XCH12 << 16) /**< Shifted mode APORT1XCH12 for ACMP_INPUTSEL */ 927 #define ACMP_INPUTSEL_VASEL_APORT1YCH13 (_ACMP_INPUTSEL_VASEL_APORT1YCH13 << 16) /**< Shifted mode APORT1YCH13 for ACMP_INPUTSEL */ 928 #define ACMP_INPUTSEL_VASEL_APORT1XCH14 (_ACMP_INPUTSEL_VASEL_APORT1XCH14 << 16) /**< Shifted mode APORT1XCH14 for ACMP_INPUTSEL */ 929 #define ACMP_INPUTSEL_VASEL_APORT1YCH15 (_ACMP_INPUTSEL_VASEL_APORT1YCH15 << 16) /**< Shifted mode APORT1YCH15 for ACMP_INPUTSEL */ 930 #define ACMP_INPUTSEL_VASEL_APORT1XCH16 (_ACMP_INPUTSEL_VASEL_APORT1XCH16 << 16) /**< Shifted mode APORT1XCH16 for ACMP_INPUTSEL */ 931 #define ACMP_INPUTSEL_VASEL_APORT1YCH17 (_ACMP_INPUTSEL_VASEL_APORT1YCH17 << 16) /**< Shifted mode APORT1YCH17 for ACMP_INPUTSEL */ 932 #define ACMP_INPUTSEL_VASEL_APORT1XCH18 (_ACMP_INPUTSEL_VASEL_APORT1XCH18 << 16) /**< Shifted mode APORT1XCH18 for ACMP_INPUTSEL */ 933 #define ACMP_INPUTSEL_VASEL_APORT1YCH19 (_ACMP_INPUTSEL_VASEL_APORT1YCH19 << 16) /**< Shifted mode APORT1YCH19 for ACMP_INPUTSEL */ 934 #define ACMP_INPUTSEL_VASEL_APORT1XCH20 (_ACMP_INPUTSEL_VASEL_APORT1XCH20 << 16) /**< Shifted mode APORT1XCH20 for ACMP_INPUTSEL */ 935 #define ACMP_INPUTSEL_VASEL_APORT1YCH21 (_ACMP_INPUTSEL_VASEL_APORT1YCH21 << 16) /**< Shifted mode APORT1YCH21 for ACMP_INPUTSEL */ 936 #define ACMP_INPUTSEL_VASEL_APORT1XCH22 (_ACMP_INPUTSEL_VASEL_APORT1XCH22 << 16) /**< Shifted mode APORT1XCH22 for ACMP_INPUTSEL */ 937 #define ACMP_INPUTSEL_VASEL_APORT1YCH23 (_ACMP_INPUTSEL_VASEL_APORT1YCH23 << 16) /**< Shifted mode APORT1YCH23 for ACMP_INPUTSEL */ 938 #define ACMP_INPUTSEL_VASEL_APORT1XCH24 (_ACMP_INPUTSEL_VASEL_APORT1XCH24 << 16) /**< Shifted mode APORT1XCH24 for ACMP_INPUTSEL */ 939 #define ACMP_INPUTSEL_VASEL_APORT1YCH25 (_ACMP_INPUTSEL_VASEL_APORT1YCH25 << 16) /**< Shifted mode APORT1YCH25 for ACMP_INPUTSEL */ 940 #define ACMP_INPUTSEL_VASEL_APORT1XCH26 (_ACMP_INPUTSEL_VASEL_APORT1XCH26 << 16) /**< Shifted mode APORT1XCH26 for ACMP_INPUTSEL */ 941 #define ACMP_INPUTSEL_VASEL_APORT1YCH27 (_ACMP_INPUTSEL_VASEL_APORT1YCH27 << 16) /**< Shifted mode APORT1YCH27 for ACMP_INPUTSEL */ 942 #define ACMP_INPUTSEL_VASEL_APORT1XCH28 (_ACMP_INPUTSEL_VASEL_APORT1XCH28 << 16) /**< Shifted mode APORT1XCH28 for ACMP_INPUTSEL */ 943 #define ACMP_INPUTSEL_VASEL_APORT1YCH29 (_ACMP_INPUTSEL_VASEL_APORT1YCH29 << 16) /**< Shifted mode APORT1YCH29 for ACMP_INPUTSEL */ 944 #define ACMP_INPUTSEL_VASEL_APORT1XCH30 (_ACMP_INPUTSEL_VASEL_APORT1XCH30 << 16) /**< Shifted mode APORT1XCH30 for ACMP_INPUTSEL */ 945 #define ACMP_INPUTSEL_VASEL_APORT1YCH31 (_ACMP_INPUTSEL_VASEL_APORT1YCH31 << 16) /**< Shifted mode APORT1YCH31 for ACMP_INPUTSEL */ 946 #define ACMP_INPUTSEL_VBSEL (0x1UL << 22) /**< VB Selection */ 947 #define _ACMP_INPUTSEL_VBSEL_SHIFT 22 /**< Shift value for ACMP_VBSEL */ 948 #define _ACMP_INPUTSEL_VBSEL_MASK 0x400000UL /**< Bit mask for ACMP_VBSEL */ 949 #define _ACMP_INPUTSEL_VBSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_INPUTSEL */ 950 #define _ACMP_INPUTSEL_VBSEL_1V25 0x00000000UL /**< Mode 1V25 for ACMP_INPUTSEL */ 951 #define _ACMP_INPUTSEL_VBSEL_2V5 0x00000001UL /**< Mode 2V5 for ACMP_INPUTSEL */ 952 #define ACMP_INPUTSEL_VBSEL_DEFAULT (_ACMP_INPUTSEL_VBSEL_DEFAULT << 22) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */ 953 #define ACMP_INPUTSEL_VBSEL_1V25 (_ACMP_INPUTSEL_VBSEL_1V25 << 22) /**< Shifted mode 1V25 for ACMP_INPUTSEL */ 954 #define ACMP_INPUTSEL_VBSEL_2V5 (_ACMP_INPUTSEL_VBSEL_2V5 << 22) /**< Shifted mode 2V5 for ACMP_INPUTSEL */ 955 #define ACMP_INPUTSEL_VLPSEL (0x1UL << 24) /**< Low-Power Sampled Voltage Selection */ 956 #define _ACMP_INPUTSEL_VLPSEL_SHIFT 24 /**< Shift value for ACMP_VLPSEL */ 957 #define _ACMP_INPUTSEL_VLPSEL_MASK 0x1000000UL /**< Bit mask for ACMP_VLPSEL */ 958 #define _ACMP_INPUTSEL_VLPSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_INPUTSEL */ 959 #define _ACMP_INPUTSEL_VLPSEL_VADIV 0x00000000UL /**< Mode VADIV for ACMP_INPUTSEL */ 960 #define _ACMP_INPUTSEL_VLPSEL_VBDIV 0x00000001UL /**< Mode VBDIV for ACMP_INPUTSEL */ 961 #define ACMP_INPUTSEL_VLPSEL_DEFAULT (_ACMP_INPUTSEL_VLPSEL_DEFAULT << 24) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */ 962 #define ACMP_INPUTSEL_VLPSEL_VADIV (_ACMP_INPUTSEL_VLPSEL_VADIV << 24) /**< Shifted mode VADIV for ACMP_INPUTSEL */ 963 #define ACMP_INPUTSEL_VLPSEL_VBDIV (_ACMP_INPUTSEL_VLPSEL_VBDIV << 24) /**< Shifted mode VBDIV for ACMP_INPUTSEL */ 964 #define ACMP_INPUTSEL_CSRESEN (0x1UL << 26) /**< Capacitive Sense Mode Internal Resistor Enable */ 965 #define _ACMP_INPUTSEL_CSRESEN_SHIFT 26 /**< Shift value for ACMP_CSRESEN */ 966 #define _ACMP_INPUTSEL_CSRESEN_MASK 0x4000000UL /**< Bit mask for ACMP_CSRESEN */ 967 #define _ACMP_INPUTSEL_CSRESEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_INPUTSEL */ 968 #define ACMP_INPUTSEL_CSRESEN_DEFAULT (_ACMP_INPUTSEL_CSRESEN_DEFAULT << 26) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */ 969 #define _ACMP_INPUTSEL_CSRESSEL_SHIFT 28 /**< Shift value for ACMP_CSRESSEL */ 970 #define _ACMP_INPUTSEL_CSRESSEL_MASK 0x70000000UL /**< Bit mask for ACMP_CSRESSEL */ 971 #define _ACMP_INPUTSEL_CSRESSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_INPUTSEL */ 972 #define _ACMP_INPUTSEL_CSRESSEL_RES0 0x00000000UL /**< Mode RES0 for ACMP_INPUTSEL */ 973 #define _ACMP_INPUTSEL_CSRESSEL_RES1 0x00000001UL /**< Mode RES1 for ACMP_INPUTSEL */ 974 #define _ACMP_INPUTSEL_CSRESSEL_RES2 0x00000002UL /**< Mode RES2 for ACMP_INPUTSEL */ 975 #define _ACMP_INPUTSEL_CSRESSEL_RES3 0x00000003UL /**< Mode RES3 for ACMP_INPUTSEL */ 976 #define _ACMP_INPUTSEL_CSRESSEL_RES4 0x00000004UL /**< Mode RES4 for ACMP_INPUTSEL */ 977 #define _ACMP_INPUTSEL_CSRESSEL_RES5 0x00000005UL /**< Mode RES5 for ACMP_INPUTSEL */ 978 #define _ACMP_INPUTSEL_CSRESSEL_RES6 0x00000006UL /**< Mode RES6 for ACMP_INPUTSEL */ 979 #define _ACMP_INPUTSEL_CSRESSEL_RES7 0x00000007UL /**< Mode RES7 for ACMP_INPUTSEL */ 980 #define ACMP_INPUTSEL_CSRESSEL_DEFAULT (_ACMP_INPUTSEL_CSRESSEL_DEFAULT << 28) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */ 981 #define ACMP_INPUTSEL_CSRESSEL_RES0 (_ACMP_INPUTSEL_CSRESSEL_RES0 << 28) /**< Shifted mode RES0 for ACMP_INPUTSEL */ 982 #define ACMP_INPUTSEL_CSRESSEL_RES1 (_ACMP_INPUTSEL_CSRESSEL_RES1 << 28) /**< Shifted mode RES1 for ACMP_INPUTSEL */ 983 #define ACMP_INPUTSEL_CSRESSEL_RES2 (_ACMP_INPUTSEL_CSRESSEL_RES2 << 28) /**< Shifted mode RES2 for ACMP_INPUTSEL */ 984 #define ACMP_INPUTSEL_CSRESSEL_RES3 (_ACMP_INPUTSEL_CSRESSEL_RES3 << 28) /**< Shifted mode RES3 for ACMP_INPUTSEL */ 985 #define ACMP_INPUTSEL_CSRESSEL_RES4 (_ACMP_INPUTSEL_CSRESSEL_RES4 << 28) /**< Shifted mode RES4 for ACMP_INPUTSEL */ 986 #define ACMP_INPUTSEL_CSRESSEL_RES5 (_ACMP_INPUTSEL_CSRESSEL_RES5 << 28) /**< Shifted mode RES5 for ACMP_INPUTSEL */ 987 #define ACMP_INPUTSEL_CSRESSEL_RES6 (_ACMP_INPUTSEL_CSRESSEL_RES6 << 28) /**< Shifted mode RES6 for ACMP_INPUTSEL */ 988 #define ACMP_INPUTSEL_CSRESSEL_RES7 (_ACMP_INPUTSEL_CSRESSEL_RES7 << 28) /**< Shifted mode RES7 for ACMP_INPUTSEL */ 989 990 /* Bit fields for ACMP STATUS */ 991 #define _ACMP_STATUS_RESETVALUE 0x00000000UL /**< Default value for ACMP_STATUS */ 992 #define _ACMP_STATUS_MASK 0x00000007UL /**< Mask for ACMP_STATUS */ 993 #define ACMP_STATUS_ACMPACT (0x1UL << 0) /**< Analog Comparator Active */ 994 #define _ACMP_STATUS_ACMPACT_SHIFT 0 /**< Shift value for ACMP_ACMPACT */ 995 #define _ACMP_STATUS_ACMPACT_MASK 0x1UL /**< Bit mask for ACMP_ACMPACT */ 996 #define _ACMP_STATUS_ACMPACT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_STATUS */ 997 #define ACMP_STATUS_ACMPACT_DEFAULT (_ACMP_STATUS_ACMPACT_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_STATUS */ 998 #define ACMP_STATUS_ACMPOUT (0x1UL << 1) /**< Analog Comparator Output */ 999 #define _ACMP_STATUS_ACMPOUT_SHIFT 1 /**< Shift value for ACMP_ACMPOUT */ 1000 #define _ACMP_STATUS_ACMPOUT_MASK 0x2UL /**< Bit mask for ACMP_ACMPOUT */ 1001 #define _ACMP_STATUS_ACMPOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_STATUS */ 1002 #define ACMP_STATUS_ACMPOUT_DEFAULT (_ACMP_STATUS_ACMPOUT_DEFAULT << 1) /**< Shifted mode DEFAULT for ACMP_STATUS */ 1003 #define ACMP_STATUS_APORTCONFLICT (0x1UL << 2) /**< APORT Conflict Output */ 1004 #define _ACMP_STATUS_APORTCONFLICT_SHIFT 2 /**< Shift value for ACMP_APORTCONFLICT */ 1005 #define _ACMP_STATUS_APORTCONFLICT_MASK 0x4UL /**< Bit mask for ACMP_APORTCONFLICT */ 1006 #define _ACMP_STATUS_APORTCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_STATUS */ 1007 #define ACMP_STATUS_APORTCONFLICT_DEFAULT (_ACMP_STATUS_APORTCONFLICT_DEFAULT << 2) /**< Shifted mode DEFAULT for ACMP_STATUS */ 1008 1009 /* Bit fields for ACMP IF */ 1010 #define _ACMP_IF_RESETVALUE 0x00000000UL /**< Default value for ACMP_IF */ 1011 #define _ACMP_IF_MASK 0x00000007UL /**< Mask for ACMP_IF */ 1012 #define ACMP_IF_EDGE (0x1UL << 0) /**< Edge Triggered Interrupt Flag */ 1013 #define _ACMP_IF_EDGE_SHIFT 0 /**< Shift value for ACMP_EDGE */ 1014 #define _ACMP_IF_EDGE_MASK 0x1UL /**< Bit mask for ACMP_EDGE */ 1015 #define _ACMP_IF_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IF */ 1016 #define ACMP_IF_EDGE_DEFAULT (_ACMP_IF_EDGE_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_IF */ 1017 #define ACMP_IF_WARMUP (0x1UL << 1) /**< Warm-up Interrupt Flag */ 1018 #define _ACMP_IF_WARMUP_SHIFT 1 /**< Shift value for ACMP_WARMUP */ 1019 #define _ACMP_IF_WARMUP_MASK 0x2UL /**< Bit mask for ACMP_WARMUP */ 1020 #define _ACMP_IF_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IF */ 1021 #define ACMP_IF_WARMUP_DEFAULT (_ACMP_IF_WARMUP_DEFAULT << 1) /**< Shifted mode DEFAULT for ACMP_IF */ 1022 #define ACMP_IF_APORTCONFLICT (0x1UL << 2) /**< APORT Conflict Interrupt Flag */ 1023 #define _ACMP_IF_APORTCONFLICT_SHIFT 2 /**< Shift value for ACMP_APORTCONFLICT */ 1024 #define _ACMP_IF_APORTCONFLICT_MASK 0x4UL /**< Bit mask for ACMP_APORTCONFLICT */ 1025 #define _ACMP_IF_APORTCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IF */ 1026 #define ACMP_IF_APORTCONFLICT_DEFAULT (_ACMP_IF_APORTCONFLICT_DEFAULT << 2) /**< Shifted mode DEFAULT for ACMP_IF */ 1027 1028 /* Bit fields for ACMP IFS */ 1029 #define _ACMP_IFS_RESETVALUE 0x00000000UL /**< Default value for ACMP_IFS */ 1030 #define _ACMP_IFS_MASK 0x00000007UL /**< Mask for ACMP_IFS */ 1031 #define ACMP_IFS_EDGE (0x1UL << 0) /**< Set EDGE Interrupt Flag */ 1032 #define _ACMP_IFS_EDGE_SHIFT 0 /**< Shift value for ACMP_EDGE */ 1033 #define _ACMP_IFS_EDGE_MASK 0x1UL /**< Bit mask for ACMP_EDGE */ 1034 #define _ACMP_IFS_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IFS */ 1035 #define ACMP_IFS_EDGE_DEFAULT (_ACMP_IFS_EDGE_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_IFS */ 1036 #define ACMP_IFS_WARMUP (0x1UL << 1) /**< Set WARMUP Interrupt Flag */ 1037 #define _ACMP_IFS_WARMUP_SHIFT 1 /**< Shift value for ACMP_WARMUP */ 1038 #define _ACMP_IFS_WARMUP_MASK 0x2UL /**< Bit mask for ACMP_WARMUP */ 1039 #define _ACMP_IFS_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IFS */ 1040 #define ACMP_IFS_WARMUP_DEFAULT (_ACMP_IFS_WARMUP_DEFAULT << 1) /**< Shifted mode DEFAULT for ACMP_IFS */ 1041 #define ACMP_IFS_APORTCONFLICT (0x1UL << 2) /**< Set APORTCONFLICT Interrupt Flag */ 1042 #define _ACMP_IFS_APORTCONFLICT_SHIFT 2 /**< Shift value for ACMP_APORTCONFLICT */ 1043 #define _ACMP_IFS_APORTCONFLICT_MASK 0x4UL /**< Bit mask for ACMP_APORTCONFLICT */ 1044 #define _ACMP_IFS_APORTCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IFS */ 1045 #define ACMP_IFS_APORTCONFLICT_DEFAULT (_ACMP_IFS_APORTCONFLICT_DEFAULT << 2) /**< Shifted mode DEFAULT for ACMP_IFS */ 1046 1047 /* Bit fields for ACMP IFC */ 1048 #define _ACMP_IFC_RESETVALUE 0x00000000UL /**< Default value for ACMP_IFC */ 1049 #define _ACMP_IFC_MASK 0x00000007UL /**< Mask for ACMP_IFC */ 1050 #define ACMP_IFC_EDGE (0x1UL << 0) /**< Clear EDGE Interrupt Flag */ 1051 #define _ACMP_IFC_EDGE_SHIFT 0 /**< Shift value for ACMP_EDGE */ 1052 #define _ACMP_IFC_EDGE_MASK 0x1UL /**< Bit mask for ACMP_EDGE */ 1053 #define _ACMP_IFC_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IFC */ 1054 #define ACMP_IFC_EDGE_DEFAULT (_ACMP_IFC_EDGE_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_IFC */ 1055 #define ACMP_IFC_WARMUP (0x1UL << 1) /**< Clear WARMUP Interrupt Flag */ 1056 #define _ACMP_IFC_WARMUP_SHIFT 1 /**< Shift value for ACMP_WARMUP */ 1057 #define _ACMP_IFC_WARMUP_MASK 0x2UL /**< Bit mask for ACMP_WARMUP */ 1058 #define _ACMP_IFC_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IFC */ 1059 #define ACMP_IFC_WARMUP_DEFAULT (_ACMP_IFC_WARMUP_DEFAULT << 1) /**< Shifted mode DEFAULT for ACMP_IFC */ 1060 #define ACMP_IFC_APORTCONFLICT (0x1UL << 2) /**< Clear APORTCONFLICT Interrupt Flag */ 1061 #define _ACMP_IFC_APORTCONFLICT_SHIFT 2 /**< Shift value for ACMP_APORTCONFLICT */ 1062 #define _ACMP_IFC_APORTCONFLICT_MASK 0x4UL /**< Bit mask for ACMP_APORTCONFLICT */ 1063 #define _ACMP_IFC_APORTCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IFC */ 1064 #define ACMP_IFC_APORTCONFLICT_DEFAULT (_ACMP_IFC_APORTCONFLICT_DEFAULT << 2) /**< Shifted mode DEFAULT for ACMP_IFC */ 1065 1066 /* Bit fields for ACMP IEN */ 1067 #define _ACMP_IEN_RESETVALUE 0x00000000UL /**< Default value for ACMP_IEN */ 1068 #define _ACMP_IEN_MASK 0x00000007UL /**< Mask for ACMP_IEN */ 1069 #define ACMP_IEN_EDGE (0x1UL << 0) /**< EDGE Interrupt Enable */ 1070 #define _ACMP_IEN_EDGE_SHIFT 0 /**< Shift value for ACMP_EDGE */ 1071 #define _ACMP_IEN_EDGE_MASK 0x1UL /**< Bit mask for ACMP_EDGE */ 1072 #define _ACMP_IEN_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IEN */ 1073 #define ACMP_IEN_EDGE_DEFAULT (_ACMP_IEN_EDGE_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_IEN */ 1074 #define ACMP_IEN_WARMUP (0x1UL << 1) /**< WARMUP Interrupt Enable */ 1075 #define _ACMP_IEN_WARMUP_SHIFT 1 /**< Shift value for ACMP_WARMUP */ 1076 #define _ACMP_IEN_WARMUP_MASK 0x2UL /**< Bit mask for ACMP_WARMUP */ 1077 #define _ACMP_IEN_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IEN */ 1078 #define ACMP_IEN_WARMUP_DEFAULT (_ACMP_IEN_WARMUP_DEFAULT << 1) /**< Shifted mode DEFAULT for ACMP_IEN */ 1079 #define ACMP_IEN_APORTCONFLICT (0x1UL << 2) /**< APORTCONFLICT Interrupt Enable */ 1080 #define _ACMP_IEN_APORTCONFLICT_SHIFT 2 /**< Shift value for ACMP_APORTCONFLICT */ 1081 #define _ACMP_IEN_APORTCONFLICT_MASK 0x4UL /**< Bit mask for ACMP_APORTCONFLICT */ 1082 #define _ACMP_IEN_APORTCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IEN */ 1083 #define ACMP_IEN_APORTCONFLICT_DEFAULT (_ACMP_IEN_APORTCONFLICT_DEFAULT << 2) /**< Shifted mode DEFAULT for ACMP_IEN */ 1084 1085 /* Bit fields for ACMP APORTREQ */ 1086 #define _ACMP_APORTREQ_RESETVALUE 0x00000000UL /**< Default value for ACMP_APORTREQ */ 1087 #define _ACMP_APORTREQ_MASK 0x000003FFUL /**< Mask for ACMP_APORTREQ */ 1088 #define ACMP_APORTREQ_APORT0XREQ (0x1UL << 0) /**< 1 If the Bus Connected to APORT0X is Requested */ 1089 #define _ACMP_APORTREQ_APORT0XREQ_SHIFT 0 /**< Shift value for ACMP_APORT0XREQ */ 1090 #define _ACMP_APORTREQ_APORT0XREQ_MASK 0x1UL /**< Bit mask for ACMP_APORT0XREQ */ 1091 #define _ACMP_APORTREQ_APORT0XREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTREQ */ 1092 #define ACMP_APORTREQ_APORT0XREQ_DEFAULT (_ACMP_APORTREQ_APORT0XREQ_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_APORTREQ */ 1093 #define ACMP_APORTREQ_APORT0YREQ (0x1UL << 1) /**< 1 If the Bus Connected to APORT0Y is Requested */ 1094 #define _ACMP_APORTREQ_APORT0YREQ_SHIFT 1 /**< Shift value for ACMP_APORT0YREQ */ 1095 #define _ACMP_APORTREQ_APORT0YREQ_MASK 0x2UL /**< Bit mask for ACMP_APORT0YREQ */ 1096 #define _ACMP_APORTREQ_APORT0YREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTREQ */ 1097 #define ACMP_APORTREQ_APORT0YREQ_DEFAULT (_ACMP_APORTREQ_APORT0YREQ_DEFAULT << 1) /**< Shifted mode DEFAULT for ACMP_APORTREQ */ 1098 #define ACMP_APORTREQ_APORT1XREQ (0x1UL << 2) /**< 1 If the Bus Connected to APORT2X is Requested */ 1099 #define _ACMP_APORTREQ_APORT1XREQ_SHIFT 2 /**< Shift value for ACMP_APORT1XREQ */ 1100 #define _ACMP_APORTREQ_APORT1XREQ_MASK 0x4UL /**< Bit mask for ACMP_APORT1XREQ */ 1101 #define _ACMP_APORTREQ_APORT1XREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTREQ */ 1102 #define ACMP_APORTREQ_APORT1XREQ_DEFAULT (_ACMP_APORTREQ_APORT1XREQ_DEFAULT << 2) /**< Shifted mode DEFAULT for ACMP_APORTREQ */ 1103 #define ACMP_APORTREQ_APORT1YREQ (0x1UL << 3) /**< 1 If the Bus Connected to APORT1X is Requested */ 1104 #define _ACMP_APORTREQ_APORT1YREQ_SHIFT 3 /**< Shift value for ACMP_APORT1YREQ */ 1105 #define _ACMP_APORTREQ_APORT1YREQ_MASK 0x8UL /**< Bit mask for ACMP_APORT1YREQ */ 1106 #define _ACMP_APORTREQ_APORT1YREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTREQ */ 1107 #define ACMP_APORTREQ_APORT1YREQ_DEFAULT (_ACMP_APORTREQ_APORT1YREQ_DEFAULT << 3) /**< Shifted mode DEFAULT for ACMP_APORTREQ */ 1108 #define ACMP_APORTREQ_APORT2XREQ (0x1UL << 4) /**< 1 If the Bus Connected to APORT2X is Requested */ 1109 #define _ACMP_APORTREQ_APORT2XREQ_SHIFT 4 /**< Shift value for ACMP_APORT2XREQ */ 1110 #define _ACMP_APORTREQ_APORT2XREQ_MASK 0x10UL /**< Bit mask for ACMP_APORT2XREQ */ 1111 #define _ACMP_APORTREQ_APORT2XREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTREQ */ 1112 #define ACMP_APORTREQ_APORT2XREQ_DEFAULT (_ACMP_APORTREQ_APORT2XREQ_DEFAULT << 4) /**< Shifted mode DEFAULT for ACMP_APORTREQ */ 1113 #define ACMP_APORTREQ_APORT2YREQ (0x1UL << 5) /**< 1 If the Bus Connected to APORT2Y is Requested */ 1114 #define _ACMP_APORTREQ_APORT2YREQ_SHIFT 5 /**< Shift value for ACMP_APORT2YREQ */ 1115 #define _ACMP_APORTREQ_APORT2YREQ_MASK 0x20UL /**< Bit mask for ACMP_APORT2YREQ */ 1116 #define _ACMP_APORTREQ_APORT2YREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTREQ */ 1117 #define ACMP_APORTREQ_APORT2YREQ_DEFAULT (_ACMP_APORTREQ_APORT2YREQ_DEFAULT << 5) /**< Shifted mode DEFAULT for ACMP_APORTREQ */ 1118 #define ACMP_APORTREQ_APORT3XREQ (0x1UL << 6) /**< 1 If the Bus Connected to APORT3X is Requested */ 1119 #define _ACMP_APORTREQ_APORT3XREQ_SHIFT 6 /**< Shift value for ACMP_APORT3XREQ */ 1120 #define _ACMP_APORTREQ_APORT3XREQ_MASK 0x40UL /**< Bit mask for ACMP_APORT3XREQ */ 1121 #define _ACMP_APORTREQ_APORT3XREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTREQ */ 1122 #define ACMP_APORTREQ_APORT3XREQ_DEFAULT (_ACMP_APORTREQ_APORT3XREQ_DEFAULT << 6) /**< Shifted mode DEFAULT for ACMP_APORTREQ */ 1123 #define ACMP_APORTREQ_APORT3YREQ (0x1UL << 7) /**< 1 If the Bus Connected to APORT3Y is Requested */ 1124 #define _ACMP_APORTREQ_APORT3YREQ_SHIFT 7 /**< Shift value for ACMP_APORT3YREQ */ 1125 #define _ACMP_APORTREQ_APORT3YREQ_MASK 0x80UL /**< Bit mask for ACMP_APORT3YREQ */ 1126 #define _ACMP_APORTREQ_APORT3YREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTREQ */ 1127 #define ACMP_APORTREQ_APORT3YREQ_DEFAULT (_ACMP_APORTREQ_APORT3YREQ_DEFAULT << 7) /**< Shifted mode DEFAULT for ACMP_APORTREQ */ 1128 #define ACMP_APORTREQ_APORT4XREQ (0x1UL << 8) /**< 1 If the Bus Connected to APORT4X is Requested */ 1129 #define _ACMP_APORTREQ_APORT4XREQ_SHIFT 8 /**< Shift value for ACMP_APORT4XREQ */ 1130 #define _ACMP_APORTREQ_APORT4XREQ_MASK 0x100UL /**< Bit mask for ACMP_APORT4XREQ */ 1131 #define _ACMP_APORTREQ_APORT4XREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTREQ */ 1132 #define ACMP_APORTREQ_APORT4XREQ_DEFAULT (_ACMP_APORTREQ_APORT4XREQ_DEFAULT << 8) /**< Shifted mode DEFAULT for ACMP_APORTREQ */ 1133 #define ACMP_APORTREQ_APORT4YREQ (0x1UL << 9) /**< 1 If the Bus Connected to APORT4Y is Requested */ 1134 #define _ACMP_APORTREQ_APORT4YREQ_SHIFT 9 /**< Shift value for ACMP_APORT4YREQ */ 1135 #define _ACMP_APORTREQ_APORT4YREQ_MASK 0x200UL /**< Bit mask for ACMP_APORT4YREQ */ 1136 #define _ACMP_APORTREQ_APORT4YREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTREQ */ 1137 #define ACMP_APORTREQ_APORT4YREQ_DEFAULT (_ACMP_APORTREQ_APORT4YREQ_DEFAULT << 9) /**< Shifted mode DEFAULT for ACMP_APORTREQ */ 1138 1139 /* Bit fields for ACMP APORTCONFLICT */ 1140 #define _ACMP_APORTCONFLICT_RESETVALUE 0x00000000UL /**< Default value for ACMP_APORTCONFLICT */ 1141 #define _ACMP_APORTCONFLICT_MASK 0x000003FFUL /**< Mask for ACMP_APORTCONFLICT */ 1142 #define ACMP_APORTCONFLICT_APORT0XCONFLICT (0x1UL << 0) /**< 1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral */ 1143 #define _ACMP_APORTCONFLICT_APORT0XCONFLICT_SHIFT 0 /**< Shift value for ACMP_APORT0XCONFLICT */ 1144 #define _ACMP_APORTCONFLICT_APORT0XCONFLICT_MASK 0x1UL /**< Bit mask for ACMP_APORT0XCONFLICT */ 1145 #define _ACMP_APORTCONFLICT_APORT0XCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTCONFLICT */ 1146 #define ACMP_APORTCONFLICT_APORT0XCONFLICT_DEFAULT (_ACMP_APORTCONFLICT_APORT0XCONFLICT_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_APORTCONFLICT */ 1147 #define ACMP_APORTCONFLICT_APORT0YCONFLICT (0x1UL << 1) /**< 1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral */ 1148 #define _ACMP_APORTCONFLICT_APORT0YCONFLICT_SHIFT 1 /**< Shift value for ACMP_APORT0YCONFLICT */ 1149 #define _ACMP_APORTCONFLICT_APORT0YCONFLICT_MASK 0x2UL /**< Bit mask for ACMP_APORT0YCONFLICT */ 1150 #define _ACMP_APORTCONFLICT_APORT0YCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTCONFLICT */ 1151 #define ACMP_APORTCONFLICT_APORT0YCONFLICT_DEFAULT (_ACMP_APORTCONFLICT_APORT0YCONFLICT_DEFAULT << 1) /**< Shifted mode DEFAULT for ACMP_APORTCONFLICT */ 1152 #define ACMP_APORTCONFLICT_APORT1XCONFLICT (0x1UL << 2) /**< 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral */ 1153 #define _ACMP_APORTCONFLICT_APORT1XCONFLICT_SHIFT 2 /**< Shift value for ACMP_APORT1XCONFLICT */ 1154 #define _ACMP_APORTCONFLICT_APORT1XCONFLICT_MASK 0x4UL /**< Bit mask for ACMP_APORT1XCONFLICT */ 1155 #define _ACMP_APORTCONFLICT_APORT1XCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTCONFLICT */ 1156 #define ACMP_APORTCONFLICT_APORT1XCONFLICT_DEFAULT (_ACMP_APORTCONFLICT_APORT1XCONFLICT_DEFAULT << 2) /**< Shifted mode DEFAULT for ACMP_APORTCONFLICT */ 1157 #define ACMP_APORTCONFLICT_APORT1YCONFLICT (0x1UL << 3) /**< 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral */ 1158 #define _ACMP_APORTCONFLICT_APORT1YCONFLICT_SHIFT 3 /**< Shift value for ACMP_APORT1YCONFLICT */ 1159 #define _ACMP_APORTCONFLICT_APORT1YCONFLICT_MASK 0x8UL /**< Bit mask for ACMP_APORT1YCONFLICT */ 1160 #define _ACMP_APORTCONFLICT_APORT1YCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTCONFLICT */ 1161 #define ACMP_APORTCONFLICT_APORT1YCONFLICT_DEFAULT (_ACMP_APORTCONFLICT_APORT1YCONFLICT_DEFAULT << 3) /**< Shifted mode DEFAULT for ACMP_APORTCONFLICT */ 1162 #define ACMP_APORTCONFLICT_APORT2XCONFLICT (0x1UL << 4) /**< 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral */ 1163 #define _ACMP_APORTCONFLICT_APORT2XCONFLICT_SHIFT 4 /**< Shift value for ACMP_APORT2XCONFLICT */ 1164 #define _ACMP_APORTCONFLICT_APORT2XCONFLICT_MASK 0x10UL /**< Bit mask for ACMP_APORT2XCONFLICT */ 1165 #define _ACMP_APORTCONFLICT_APORT2XCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTCONFLICT */ 1166 #define ACMP_APORTCONFLICT_APORT2XCONFLICT_DEFAULT (_ACMP_APORTCONFLICT_APORT2XCONFLICT_DEFAULT << 4) /**< Shifted mode DEFAULT for ACMP_APORTCONFLICT */ 1167 #define ACMP_APORTCONFLICT_APORT2YCONFLICT (0x1UL << 5) /**< 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral */ 1168 #define _ACMP_APORTCONFLICT_APORT2YCONFLICT_SHIFT 5 /**< Shift value for ACMP_APORT2YCONFLICT */ 1169 #define _ACMP_APORTCONFLICT_APORT2YCONFLICT_MASK 0x20UL /**< Bit mask for ACMP_APORT2YCONFLICT */ 1170 #define _ACMP_APORTCONFLICT_APORT2YCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTCONFLICT */ 1171 #define ACMP_APORTCONFLICT_APORT2YCONFLICT_DEFAULT (_ACMP_APORTCONFLICT_APORT2YCONFLICT_DEFAULT << 5) /**< Shifted mode DEFAULT for ACMP_APORTCONFLICT */ 1172 #define ACMP_APORTCONFLICT_APORT3XCONFLICT (0x1UL << 6) /**< 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral */ 1173 #define _ACMP_APORTCONFLICT_APORT3XCONFLICT_SHIFT 6 /**< Shift value for ACMP_APORT3XCONFLICT */ 1174 #define _ACMP_APORTCONFLICT_APORT3XCONFLICT_MASK 0x40UL /**< Bit mask for ACMP_APORT3XCONFLICT */ 1175 #define _ACMP_APORTCONFLICT_APORT3XCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTCONFLICT */ 1176 #define ACMP_APORTCONFLICT_APORT3XCONFLICT_DEFAULT (_ACMP_APORTCONFLICT_APORT3XCONFLICT_DEFAULT << 6) /**< Shifted mode DEFAULT for ACMP_APORTCONFLICT */ 1177 #define ACMP_APORTCONFLICT_APORT3YCONFLICT (0x1UL << 7) /**< 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral */ 1178 #define _ACMP_APORTCONFLICT_APORT3YCONFLICT_SHIFT 7 /**< Shift value for ACMP_APORT3YCONFLICT */ 1179 #define _ACMP_APORTCONFLICT_APORT3YCONFLICT_MASK 0x80UL /**< Bit mask for ACMP_APORT3YCONFLICT */ 1180 #define _ACMP_APORTCONFLICT_APORT3YCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTCONFLICT */ 1181 #define ACMP_APORTCONFLICT_APORT3YCONFLICT_DEFAULT (_ACMP_APORTCONFLICT_APORT3YCONFLICT_DEFAULT << 7) /**< Shifted mode DEFAULT for ACMP_APORTCONFLICT */ 1182 #define ACMP_APORTCONFLICT_APORT4XCONFLICT (0x1UL << 8) /**< 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral */ 1183 #define _ACMP_APORTCONFLICT_APORT4XCONFLICT_SHIFT 8 /**< Shift value for ACMP_APORT4XCONFLICT */ 1184 #define _ACMP_APORTCONFLICT_APORT4XCONFLICT_MASK 0x100UL /**< Bit mask for ACMP_APORT4XCONFLICT */ 1185 #define _ACMP_APORTCONFLICT_APORT4XCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTCONFLICT */ 1186 #define ACMP_APORTCONFLICT_APORT4XCONFLICT_DEFAULT (_ACMP_APORTCONFLICT_APORT4XCONFLICT_DEFAULT << 8) /**< Shifted mode DEFAULT for ACMP_APORTCONFLICT */ 1187 #define ACMP_APORTCONFLICT_APORT4YCONFLICT (0x1UL << 9) /**< 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral */ 1188 #define _ACMP_APORTCONFLICT_APORT4YCONFLICT_SHIFT 9 /**< Shift value for ACMP_APORT4YCONFLICT */ 1189 #define _ACMP_APORTCONFLICT_APORT4YCONFLICT_MASK 0x200UL /**< Bit mask for ACMP_APORT4YCONFLICT */ 1190 #define _ACMP_APORTCONFLICT_APORT4YCONFLICT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_APORTCONFLICT */ 1191 #define ACMP_APORTCONFLICT_APORT4YCONFLICT_DEFAULT (_ACMP_APORTCONFLICT_APORT4YCONFLICT_DEFAULT << 9) /**< Shifted mode DEFAULT for ACMP_APORTCONFLICT */ 1192 1193 /* Bit fields for ACMP HYSTERESIS0 */ 1194 #define _ACMP_HYSTERESIS0_RESETVALUE 0x00000000UL /**< Default value for ACMP_HYSTERESIS0 */ 1195 #define _ACMP_HYSTERESIS0_MASK 0x3F3F000FUL /**< Mask for ACMP_HYSTERESIS0 */ 1196 #define _ACMP_HYSTERESIS0_HYST_SHIFT 0 /**< Shift value for ACMP_HYST */ 1197 #define _ACMP_HYSTERESIS0_HYST_MASK 0xFUL /**< Bit mask for ACMP_HYST */ 1198 #define _ACMP_HYSTERESIS0_HYST_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_HYSTERESIS0 */ 1199 #define _ACMP_HYSTERESIS0_HYST_HYST0 0x00000000UL /**< Mode HYST0 for ACMP_HYSTERESIS0 */ 1200 #define _ACMP_HYSTERESIS0_HYST_HYST1 0x00000001UL /**< Mode HYST1 for ACMP_HYSTERESIS0 */ 1201 #define _ACMP_HYSTERESIS0_HYST_HYST2 0x00000002UL /**< Mode HYST2 for ACMP_HYSTERESIS0 */ 1202 #define _ACMP_HYSTERESIS0_HYST_HYST3 0x00000003UL /**< Mode HYST3 for ACMP_HYSTERESIS0 */ 1203 #define _ACMP_HYSTERESIS0_HYST_HYST4 0x00000004UL /**< Mode HYST4 for ACMP_HYSTERESIS0 */ 1204 #define _ACMP_HYSTERESIS0_HYST_HYST5 0x00000005UL /**< Mode HYST5 for ACMP_HYSTERESIS0 */ 1205 #define _ACMP_HYSTERESIS0_HYST_HYST6 0x00000006UL /**< Mode HYST6 for ACMP_HYSTERESIS0 */ 1206 #define _ACMP_HYSTERESIS0_HYST_HYST7 0x00000007UL /**< Mode HYST7 for ACMP_HYSTERESIS0 */ 1207 #define _ACMP_HYSTERESIS0_HYST_HYST8 0x00000008UL /**< Mode HYST8 for ACMP_HYSTERESIS0 */ 1208 #define _ACMP_HYSTERESIS0_HYST_HYST9 0x00000009UL /**< Mode HYST9 for ACMP_HYSTERESIS0 */ 1209 #define _ACMP_HYSTERESIS0_HYST_HYST10 0x0000000AUL /**< Mode HYST10 for ACMP_HYSTERESIS0 */ 1210 #define _ACMP_HYSTERESIS0_HYST_HYST11 0x0000000BUL /**< Mode HYST11 for ACMP_HYSTERESIS0 */ 1211 #define _ACMP_HYSTERESIS0_HYST_HYST12 0x0000000CUL /**< Mode HYST12 for ACMP_HYSTERESIS0 */ 1212 #define _ACMP_HYSTERESIS0_HYST_HYST13 0x0000000DUL /**< Mode HYST13 for ACMP_HYSTERESIS0 */ 1213 #define _ACMP_HYSTERESIS0_HYST_HYST14 0x0000000EUL /**< Mode HYST14 for ACMP_HYSTERESIS0 */ 1214 #define _ACMP_HYSTERESIS0_HYST_HYST15 0x0000000FUL /**< Mode HYST15 for ACMP_HYSTERESIS0 */ 1215 #define ACMP_HYSTERESIS0_HYST_DEFAULT (_ACMP_HYSTERESIS0_HYST_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_HYSTERESIS0 */ 1216 #define ACMP_HYSTERESIS0_HYST_HYST0 (_ACMP_HYSTERESIS0_HYST_HYST0 << 0) /**< Shifted mode HYST0 for ACMP_HYSTERESIS0 */ 1217 #define ACMP_HYSTERESIS0_HYST_HYST1 (_ACMP_HYSTERESIS0_HYST_HYST1 << 0) /**< Shifted mode HYST1 for ACMP_HYSTERESIS0 */ 1218 #define ACMP_HYSTERESIS0_HYST_HYST2 (_ACMP_HYSTERESIS0_HYST_HYST2 << 0) /**< Shifted mode HYST2 for ACMP_HYSTERESIS0 */ 1219 #define ACMP_HYSTERESIS0_HYST_HYST3 (_ACMP_HYSTERESIS0_HYST_HYST3 << 0) /**< Shifted mode HYST3 for ACMP_HYSTERESIS0 */ 1220 #define ACMP_HYSTERESIS0_HYST_HYST4 (_ACMP_HYSTERESIS0_HYST_HYST4 << 0) /**< Shifted mode HYST4 for ACMP_HYSTERESIS0 */ 1221 #define ACMP_HYSTERESIS0_HYST_HYST5 (_ACMP_HYSTERESIS0_HYST_HYST5 << 0) /**< Shifted mode HYST5 for ACMP_HYSTERESIS0 */ 1222 #define ACMP_HYSTERESIS0_HYST_HYST6 (_ACMP_HYSTERESIS0_HYST_HYST6 << 0) /**< Shifted mode HYST6 for ACMP_HYSTERESIS0 */ 1223 #define ACMP_HYSTERESIS0_HYST_HYST7 (_ACMP_HYSTERESIS0_HYST_HYST7 << 0) /**< Shifted mode HYST7 for ACMP_HYSTERESIS0 */ 1224 #define ACMP_HYSTERESIS0_HYST_HYST8 (_ACMP_HYSTERESIS0_HYST_HYST8 << 0) /**< Shifted mode HYST8 for ACMP_HYSTERESIS0 */ 1225 #define ACMP_HYSTERESIS0_HYST_HYST9 (_ACMP_HYSTERESIS0_HYST_HYST9 << 0) /**< Shifted mode HYST9 for ACMP_HYSTERESIS0 */ 1226 #define ACMP_HYSTERESIS0_HYST_HYST10 (_ACMP_HYSTERESIS0_HYST_HYST10 << 0) /**< Shifted mode HYST10 for ACMP_HYSTERESIS0 */ 1227 #define ACMP_HYSTERESIS0_HYST_HYST11 (_ACMP_HYSTERESIS0_HYST_HYST11 << 0) /**< Shifted mode HYST11 for ACMP_HYSTERESIS0 */ 1228 #define ACMP_HYSTERESIS0_HYST_HYST12 (_ACMP_HYSTERESIS0_HYST_HYST12 << 0) /**< Shifted mode HYST12 for ACMP_HYSTERESIS0 */ 1229 #define ACMP_HYSTERESIS0_HYST_HYST13 (_ACMP_HYSTERESIS0_HYST_HYST13 << 0) /**< Shifted mode HYST13 for ACMP_HYSTERESIS0 */ 1230 #define ACMP_HYSTERESIS0_HYST_HYST14 (_ACMP_HYSTERESIS0_HYST_HYST14 << 0) /**< Shifted mode HYST14 for ACMP_HYSTERESIS0 */ 1231 #define ACMP_HYSTERESIS0_HYST_HYST15 (_ACMP_HYSTERESIS0_HYST_HYST15 << 0) /**< Shifted mode HYST15 for ACMP_HYSTERESIS0 */ 1232 #define _ACMP_HYSTERESIS0_DIVVA_SHIFT 16 /**< Shift value for ACMP_DIVVA */ 1233 #define _ACMP_HYSTERESIS0_DIVVA_MASK 0x3F0000UL /**< Bit mask for ACMP_DIVVA */ 1234 #define _ACMP_HYSTERESIS0_DIVVA_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_HYSTERESIS0 */ 1235 #define ACMP_HYSTERESIS0_DIVVA_DEFAULT (_ACMP_HYSTERESIS0_DIVVA_DEFAULT << 16) /**< Shifted mode DEFAULT for ACMP_HYSTERESIS0 */ 1236 #define _ACMP_HYSTERESIS0_DIVVB_SHIFT 24 /**< Shift value for ACMP_DIVVB */ 1237 #define _ACMP_HYSTERESIS0_DIVVB_MASK 0x3F000000UL /**< Bit mask for ACMP_DIVVB */ 1238 #define _ACMP_HYSTERESIS0_DIVVB_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_HYSTERESIS0 */ 1239 #define ACMP_HYSTERESIS0_DIVVB_DEFAULT (_ACMP_HYSTERESIS0_DIVVB_DEFAULT << 24) /**< Shifted mode DEFAULT for ACMP_HYSTERESIS0 */ 1240 1241 /* Bit fields for ACMP HYSTERESIS1 */ 1242 #define _ACMP_HYSTERESIS1_RESETVALUE 0x00000000UL /**< Default value for ACMP_HYSTERESIS1 */ 1243 #define _ACMP_HYSTERESIS1_MASK 0x3F3F000FUL /**< Mask for ACMP_HYSTERESIS1 */ 1244 #define _ACMP_HYSTERESIS1_HYST_SHIFT 0 /**< Shift value for ACMP_HYST */ 1245 #define _ACMP_HYSTERESIS1_HYST_MASK 0xFUL /**< Bit mask for ACMP_HYST */ 1246 #define _ACMP_HYSTERESIS1_HYST_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_HYSTERESIS1 */ 1247 #define _ACMP_HYSTERESIS1_HYST_HYST0 0x00000000UL /**< Mode HYST0 for ACMP_HYSTERESIS1 */ 1248 #define _ACMP_HYSTERESIS1_HYST_HYST1 0x00000001UL /**< Mode HYST1 for ACMP_HYSTERESIS1 */ 1249 #define _ACMP_HYSTERESIS1_HYST_HYST2 0x00000002UL /**< Mode HYST2 for ACMP_HYSTERESIS1 */ 1250 #define _ACMP_HYSTERESIS1_HYST_HYST3 0x00000003UL /**< Mode HYST3 for ACMP_HYSTERESIS1 */ 1251 #define _ACMP_HYSTERESIS1_HYST_HYST4 0x00000004UL /**< Mode HYST4 for ACMP_HYSTERESIS1 */ 1252 #define _ACMP_HYSTERESIS1_HYST_HYST5 0x00000005UL /**< Mode HYST5 for ACMP_HYSTERESIS1 */ 1253 #define _ACMP_HYSTERESIS1_HYST_HYST6 0x00000006UL /**< Mode HYST6 for ACMP_HYSTERESIS1 */ 1254 #define _ACMP_HYSTERESIS1_HYST_HYST7 0x00000007UL /**< Mode HYST7 for ACMP_HYSTERESIS1 */ 1255 #define _ACMP_HYSTERESIS1_HYST_HYST8 0x00000008UL /**< Mode HYST8 for ACMP_HYSTERESIS1 */ 1256 #define _ACMP_HYSTERESIS1_HYST_HYST9 0x00000009UL /**< Mode HYST9 for ACMP_HYSTERESIS1 */ 1257 #define _ACMP_HYSTERESIS1_HYST_HYST10 0x0000000AUL /**< Mode HYST10 for ACMP_HYSTERESIS1 */ 1258 #define _ACMP_HYSTERESIS1_HYST_HYST11 0x0000000BUL /**< Mode HYST11 for ACMP_HYSTERESIS1 */ 1259 #define _ACMP_HYSTERESIS1_HYST_HYST12 0x0000000CUL /**< Mode HYST12 for ACMP_HYSTERESIS1 */ 1260 #define _ACMP_HYSTERESIS1_HYST_HYST13 0x0000000DUL /**< Mode HYST13 for ACMP_HYSTERESIS1 */ 1261 #define _ACMP_HYSTERESIS1_HYST_HYST14 0x0000000EUL /**< Mode HYST14 for ACMP_HYSTERESIS1 */ 1262 #define _ACMP_HYSTERESIS1_HYST_HYST15 0x0000000FUL /**< Mode HYST15 for ACMP_HYSTERESIS1 */ 1263 #define ACMP_HYSTERESIS1_HYST_DEFAULT (_ACMP_HYSTERESIS1_HYST_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_HYSTERESIS1 */ 1264 #define ACMP_HYSTERESIS1_HYST_HYST0 (_ACMP_HYSTERESIS1_HYST_HYST0 << 0) /**< Shifted mode HYST0 for ACMP_HYSTERESIS1 */ 1265 #define ACMP_HYSTERESIS1_HYST_HYST1 (_ACMP_HYSTERESIS1_HYST_HYST1 << 0) /**< Shifted mode HYST1 for ACMP_HYSTERESIS1 */ 1266 #define ACMP_HYSTERESIS1_HYST_HYST2 (_ACMP_HYSTERESIS1_HYST_HYST2 << 0) /**< Shifted mode HYST2 for ACMP_HYSTERESIS1 */ 1267 #define ACMP_HYSTERESIS1_HYST_HYST3 (_ACMP_HYSTERESIS1_HYST_HYST3 << 0) /**< Shifted mode HYST3 for ACMP_HYSTERESIS1 */ 1268 #define ACMP_HYSTERESIS1_HYST_HYST4 (_ACMP_HYSTERESIS1_HYST_HYST4 << 0) /**< Shifted mode HYST4 for ACMP_HYSTERESIS1 */ 1269 #define ACMP_HYSTERESIS1_HYST_HYST5 (_ACMP_HYSTERESIS1_HYST_HYST5 << 0) /**< Shifted mode HYST5 for ACMP_HYSTERESIS1 */ 1270 #define ACMP_HYSTERESIS1_HYST_HYST6 (_ACMP_HYSTERESIS1_HYST_HYST6 << 0) /**< Shifted mode HYST6 for ACMP_HYSTERESIS1 */ 1271 #define ACMP_HYSTERESIS1_HYST_HYST7 (_ACMP_HYSTERESIS1_HYST_HYST7 << 0) /**< Shifted mode HYST7 for ACMP_HYSTERESIS1 */ 1272 #define ACMP_HYSTERESIS1_HYST_HYST8 (_ACMP_HYSTERESIS1_HYST_HYST8 << 0) /**< Shifted mode HYST8 for ACMP_HYSTERESIS1 */ 1273 #define ACMP_HYSTERESIS1_HYST_HYST9 (_ACMP_HYSTERESIS1_HYST_HYST9 << 0) /**< Shifted mode HYST9 for ACMP_HYSTERESIS1 */ 1274 #define ACMP_HYSTERESIS1_HYST_HYST10 (_ACMP_HYSTERESIS1_HYST_HYST10 << 0) /**< Shifted mode HYST10 for ACMP_HYSTERESIS1 */ 1275 #define ACMP_HYSTERESIS1_HYST_HYST11 (_ACMP_HYSTERESIS1_HYST_HYST11 << 0) /**< Shifted mode HYST11 for ACMP_HYSTERESIS1 */ 1276 #define ACMP_HYSTERESIS1_HYST_HYST12 (_ACMP_HYSTERESIS1_HYST_HYST12 << 0) /**< Shifted mode HYST12 for ACMP_HYSTERESIS1 */ 1277 #define ACMP_HYSTERESIS1_HYST_HYST13 (_ACMP_HYSTERESIS1_HYST_HYST13 << 0) /**< Shifted mode HYST13 for ACMP_HYSTERESIS1 */ 1278 #define ACMP_HYSTERESIS1_HYST_HYST14 (_ACMP_HYSTERESIS1_HYST_HYST14 << 0) /**< Shifted mode HYST14 for ACMP_HYSTERESIS1 */ 1279 #define ACMP_HYSTERESIS1_HYST_HYST15 (_ACMP_HYSTERESIS1_HYST_HYST15 << 0) /**< Shifted mode HYST15 for ACMP_HYSTERESIS1 */ 1280 #define _ACMP_HYSTERESIS1_DIVVA_SHIFT 16 /**< Shift value for ACMP_DIVVA */ 1281 #define _ACMP_HYSTERESIS1_DIVVA_MASK 0x3F0000UL /**< Bit mask for ACMP_DIVVA */ 1282 #define _ACMP_HYSTERESIS1_DIVVA_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_HYSTERESIS1 */ 1283 #define ACMP_HYSTERESIS1_DIVVA_DEFAULT (_ACMP_HYSTERESIS1_DIVVA_DEFAULT << 16) /**< Shifted mode DEFAULT for ACMP_HYSTERESIS1 */ 1284 #define _ACMP_HYSTERESIS1_DIVVB_SHIFT 24 /**< Shift value for ACMP_DIVVB */ 1285 #define _ACMP_HYSTERESIS1_DIVVB_MASK 0x3F000000UL /**< Bit mask for ACMP_DIVVB */ 1286 #define _ACMP_HYSTERESIS1_DIVVB_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_HYSTERESIS1 */ 1287 #define ACMP_HYSTERESIS1_DIVVB_DEFAULT (_ACMP_HYSTERESIS1_DIVVB_DEFAULT << 24) /**< Shifted mode DEFAULT for ACMP_HYSTERESIS1 */ 1288 1289 /* Bit fields for ACMP ROUTEPEN */ 1290 #define _ACMP_ROUTEPEN_RESETVALUE 0x00000000UL /**< Default value for ACMP_ROUTEPEN */ 1291 #define _ACMP_ROUTEPEN_MASK 0x00000001UL /**< Mask for ACMP_ROUTEPEN */ 1292 #define ACMP_ROUTEPEN_OUTPEN (0x1UL << 0) /**< ACMP Output Pin Enable */ 1293 #define _ACMP_ROUTEPEN_OUTPEN_SHIFT 0 /**< Shift value for ACMP_OUTPEN */ 1294 #define _ACMP_ROUTEPEN_OUTPEN_MASK 0x1UL /**< Bit mask for ACMP_OUTPEN */ 1295 #define _ACMP_ROUTEPEN_OUTPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_ROUTEPEN */ 1296 #define ACMP_ROUTEPEN_OUTPEN_DEFAULT (_ACMP_ROUTEPEN_OUTPEN_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_ROUTEPEN */ 1297 1298 /* Bit fields for ACMP ROUTELOC0 */ 1299 #define _ACMP_ROUTELOC0_RESETVALUE 0x00000000UL /**< Default value for ACMP_ROUTELOC0 */ 1300 #define _ACMP_ROUTELOC0_MASK 0x0000001FUL /**< Mask for ACMP_ROUTELOC0 */ 1301 #define _ACMP_ROUTELOC0_OUTLOC_SHIFT 0 /**< Shift value for ACMP_OUTLOC */ 1302 #define _ACMP_ROUTELOC0_OUTLOC_MASK 0x1FUL /**< Bit mask for ACMP_OUTLOC */ 1303 #define _ACMP_ROUTELOC0_OUTLOC_LOC0 0x00000000UL /**< Mode LOC0 for ACMP_ROUTELOC0 */ 1304 #define _ACMP_ROUTELOC0_OUTLOC_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_ROUTELOC0 */ 1305 #define _ACMP_ROUTELOC0_OUTLOC_LOC1 0x00000001UL /**< Mode LOC1 for ACMP_ROUTELOC0 */ 1306 #define _ACMP_ROUTELOC0_OUTLOC_LOC2 0x00000002UL /**< Mode LOC2 for ACMP_ROUTELOC0 */ 1307 #define _ACMP_ROUTELOC0_OUTLOC_LOC3 0x00000003UL /**< Mode LOC3 for ACMP_ROUTELOC0 */ 1308 #define _ACMP_ROUTELOC0_OUTLOC_LOC4 0x00000004UL /**< Mode LOC4 for ACMP_ROUTELOC0 */ 1309 #define _ACMP_ROUTELOC0_OUTLOC_LOC5 0x00000005UL /**< Mode LOC5 for ACMP_ROUTELOC0 */ 1310 #define _ACMP_ROUTELOC0_OUTLOC_LOC6 0x00000006UL /**< Mode LOC6 for ACMP_ROUTELOC0 */ 1311 #define _ACMP_ROUTELOC0_OUTLOC_LOC7 0x00000007UL /**< Mode LOC7 for ACMP_ROUTELOC0 */ 1312 #define _ACMP_ROUTELOC0_OUTLOC_LOC8 0x00000008UL /**< Mode LOC8 for ACMP_ROUTELOC0 */ 1313 #define _ACMP_ROUTELOC0_OUTLOC_LOC9 0x00000009UL /**< Mode LOC9 for ACMP_ROUTELOC0 */ 1314 #define _ACMP_ROUTELOC0_OUTLOC_LOC10 0x0000000AUL /**< Mode LOC10 for ACMP_ROUTELOC0 */ 1315 #define _ACMP_ROUTELOC0_OUTLOC_LOC11 0x0000000BUL /**< Mode LOC11 for ACMP_ROUTELOC0 */ 1316 #define _ACMP_ROUTELOC0_OUTLOC_LOC12 0x0000000CUL /**< Mode LOC12 for ACMP_ROUTELOC0 */ 1317 #define _ACMP_ROUTELOC0_OUTLOC_LOC13 0x0000000DUL /**< Mode LOC13 for ACMP_ROUTELOC0 */ 1318 #define _ACMP_ROUTELOC0_OUTLOC_LOC14 0x0000000EUL /**< Mode LOC14 for ACMP_ROUTELOC0 */ 1319 #define _ACMP_ROUTELOC0_OUTLOC_LOC15 0x0000000FUL /**< Mode LOC15 for ACMP_ROUTELOC0 */ 1320 #define _ACMP_ROUTELOC0_OUTLOC_LOC16 0x00000010UL /**< Mode LOC16 for ACMP_ROUTELOC0 */ 1321 #define _ACMP_ROUTELOC0_OUTLOC_LOC17 0x00000011UL /**< Mode LOC17 for ACMP_ROUTELOC0 */ 1322 #define _ACMP_ROUTELOC0_OUTLOC_LOC18 0x00000012UL /**< Mode LOC18 for ACMP_ROUTELOC0 */ 1323 #define _ACMP_ROUTELOC0_OUTLOC_LOC19 0x00000013UL /**< Mode LOC19 for ACMP_ROUTELOC0 */ 1324 #define _ACMP_ROUTELOC0_OUTLOC_LOC20 0x00000014UL /**< Mode LOC20 for ACMP_ROUTELOC0 */ 1325 #define _ACMP_ROUTELOC0_OUTLOC_LOC21 0x00000015UL /**< Mode LOC21 for ACMP_ROUTELOC0 */ 1326 #define _ACMP_ROUTELOC0_OUTLOC_LOC22 0x00000016UL /**< Mode LOC22 for ACMP_ROUTELOC0 */ 1327 #define _ACMP_ROUTELOC0_OUTLOC_LOC23 0x00000017UL /**< Mode LOC23 for ACMP_ROUTELOC0 */ 1328 #define _ACMP_ROUTELOC0_OUTLOC_LOC24 0x00000018UL /**< Mode LOC24 for ACMP_ROUTELOC0 */ 1329 #define _ACMP_ROUTELOC0_OUTLOC_LOC25 0x00000019UL /**< Mode LOC25 for ACMP_ROUTELOC0 */ 1330 #define _ACMP_ROUTELOC0_OUTLOC_LOC26 0x0000001AUL /**< Mode LOC26 for ACMP_ROUTELOC0 */ 1331 #define _ACMP_ROUTELOC0_OUTLOC_LOC27 0x0000001BUL /**< Mode LOC27 for ACMP_ROUTELOC0 */ 1332 #define _ACMP_ROUTELOC0_OUTLOC_LOC28 0x0000001CUL /**< Mode LOC28 for ACMP_ROUTELOC0 */ 1333 #define _ACMP_ROUTELOC0_OUTLOC_LOC29 0x0000001DUL /**< Mode LOC29 for ACMP_ROUTELOC0 */ 1334 #define _ACMP_ROUTELOC0_OUTLOC_LOC30 0x0000001EUL /**< Mode LOC30 for ACMP_ROUTELOC0 */ 1335 #define _ACMP_ROUTELOC0_OUTLOC_LOC31 0x0000001FUL /**< Mode LOC31 for ACMP_ROUTELOC0 */ 1336 #define ACMP_ROUTELOC0_OUTLOC_LOC0 (_ACMP_ROUTELOC0_OUTLOC_LOC0 << 0) /**< Shifted mode LOC0 for ACMP_ROUTELOC0 */ 1337 #define ACMP_ROUTELOC0_OUTLOC_DEFAULT (_ACMP_ROUTELOC0_OUTLOC_DEFAULT << 0) /**< Shifted mode DEFAULT for ACMP_ROUTELOC0 */ 1338 #define ACMP_ROUTELOC0_OUTLOC_LOC1 (_ACMP_ROUTELOC0_OUTLOC_LOC1 << 0) /**< Shifted mode LOC1 for ACMP_ROUTELOC0 */ 1339 #define ACMP_ROUTELOC0_OUTLOC_LOC2 (_ACMP_ROUTELOC0_OUTLOC_LOC2 << 0) /**< Shifted mode LOC2 for ACMP_ROUTELOC0 */ 1340 #define ACMP_ROUTELOC0_OUTLOC_LOC3 (_ACMP_ROUTELOC0_OUTLOC_LOC3 << 0) /**< Shifted mode LOC3 for ACMP_ROUTELOC0 */ 1341 #define ACMP_ROUTELOC0_OUTLOC_LOC4 (_ACMP_ROUTELOC0_OUTLOC_LOC4 << 0) /**< Shifted mode LOC4 for ACMP_ROUTELOC0 */ 1342 #define ACMP_ROUTELOC0_OUTLOC_LOC5 (_ACMP_ROUTELOC0_OUTLOC_LOC5 << 0) /**< Shifted mode LOC5 for ACMP_ROUTELOC0 */ 1343 #define ACMP_ROUTELOC0_OUTLOC_LOC6 (_ACMP_ROUTELOC0_OUTLOC_LOC6 << 0) /**< Shifted mode LOC6 for ACMP_ROUTELOC0 */ 1344 #define ACMP_ROUTELOC0_OUTLOC_LOC7 (_ACMP_ROUTELOC0_OUTLOC_LOC7 << 0) /**< Shifted mode LOC7 for ACMP_ROUTELOC0 */ 1345 #define ACMP_ROUTELOC0_OUTLOC_LOC8 (_ACMP_ROUTELOC0_OUTLOC_LOC8 << 0) /**< Shifted mode LOC8 for ACMP_ROUTELOC0 */ 1346 #define ACMP_ROUTELOC0_OUTLOC_LOC9 (_ACMP_ROUTELOC0_OUTLOC_LOC9 << 0) /**< Shifted mode LOC9 for ACMP_ROUTELOC0 */ 1347 #define ACMP_ROUTELOC0_OUTLOC_LOC10 (_ACMP_ROUTELOC0_OUTLOC_LOC10 << 0) /**< Shifted mode LOC10 for ACMP_ROUTELOC0 */ 1348 #define ACMP_ROUTELOC0_OUTLOC_LOC11 (_ACMP_ROUTELOC0_OUTLOC_LOC11 << 0) /**< Shifted mode LOC11 for ACMP_ROUTELOC0 */ 1349 #define ACMP_ROUTELOC0_OUTLOC_LOC12 (_ACMP_ROUTELOC0_OUTLOC_LOC12 << 0) /**< Shifted mode LOC12 for ACMP_ROUTELOC0 */ 1350 #define ACMP_ROUTELOC0_OUTLOC_LOC13 (_ACMP_ROUTELOC0_OUTLOC_LOC13 << 0) /**< Shifted mode LOC13 for ACMP_ROUTELOC0 */ 1351 #define ACMP_ROUTELOC0_OUTLOC_LOC14 (_ACMP_ROUTELOC0_OUTLOC_LOC14 << 0) /**< Shifted mode LOC14 for ACMP_ROUTELOC0 */ 1352 #define ACMP_ROUTELOC0_OUTLOC_LOC15 (_ACMP_ROUTELOC0_OUTLOC_LOC15 << 0) /**< Shifted mode LOC15 for ACMP_ROUTELOC0 */ 1353 #define ACMP_ROUTELOC0_OUTLOC_LOC16 (_ACMP_ROUTELOC0_OUTLOC_LOC16 << 0) /**< Shifted mode LOC16 for ACMP_ROUTELOC0 */ 1354 #define ACMP_ROUTELOC0_OUTLOC_LOC17 (_ACMP_ROUTELOC0_OUTLOC_LOC17 << 0) /**< Shifted mode LOC17 for ACMP_ROUTELOC0 */ 1355 #define ACMP_ROUTELOC0_OUTLOC_LOC18 (_ACMP_ROUTELOC0_OUTLOC_LOC18 << 0) /**< Shifted mode LOC18 for ACMP_ROUTELOC0 */ 1356 #define ACMP_ROUTELOC0_OUTLOC_LOC19 (_ACMP_ROUTELOC0_OUTLOC_LOC19 << 0) /**< Shifted mode LOC19 for ACMP_ROUTELOC0 */ 1357 #define ACMP_ROUTELOC0_OUTLOC_LOC20 (_ACMP_ROUTELOC0_OUTLOC_LOC20 << 0) /**< Shifted mode LOC20 for ACMP_ROUTELOC0 */ 1358 #define ACMP_ROUTELOC0_OUTLOC_LOC21 (_ACMP_ROUTELOC0_OUTLOC_LOC21 << 0) /**< Shifted mode LOC21 for ACMP_ROUTELOC0 */ 1359 #define ACMP_ROUTELOC0_OUTLOC_LOC22 (_ACMP_ROUTELOC0_OUTLOC_LOC22 << 0) /**< Shifted mode LOC22 for ACMP_ROUTELOC0 */ 1360 #define ACMP_ROUTELOC0_OUTLOC_LOC23 (_ACMP_ROUTELOC0_OUTLOC_LOC23 << 0) /**< Shifted mode LOC23 for ACMP_ROUTELOC0 */ 1361 #define ACMP_ROUTELOC0_OUTLOC_LOC24 (_ACMP_ROUTELOC0_OUTLOC_LOC24 << 0) /**< Shifted mode LOC24 for ACMP_ROUTELOC0 */ 1362 #define ACMP_ROUTELOC0_OUTLOC_LOC25 (_ACMP_ROUTELOC0_OUTLOC_LOC25 << 0) /**< Shifted mode LOC25 for ACMP_ROUTELOC0 */ 1363 #define ACMP_ROUTELOC0_OUTLOC_LOC26 (_ACMP_ROUTELOC0_OUTLOC_LOC26 << 0) /**< Shifted mode LOC26 for ACMP_ROUTELOC0 */ 1364 #define ACMP_ROUTELOC0_OUTLOC_LOC27 (_ACMP_ROUTELOC0_OUTLOC_LOC27 << 0) /**< Shifted mode LOC27 for ACMP_ROUTELOC0 */ 1365 #define ACMP_ROUTELOC0_OUTLOC_LOC28 (_ACMP_ROUTELOC0_OUTLOC_LOC28 << 0) /**< Shifted mode LOC28 for ACMP_ROUTELOC0 */ 1366 #define ACMP_ROUTELOC0_OUTLOC_LOC29 (_ACMP_ROUTELOC0_OUTLOC_LOC29 << 0) /**< Shifted mode LOC29 for ACMP_ROUTELOC0 */ 1367 #define ACMP_ROUTELOC0_OUTLOC_LOC30 (_ACMP_ROUTELOC0_OUTLOC_LOC30 << 0) /**< Shifted mode LOC30 for ACMP_ROUTELOC0 */ 1368 #define ACMP_ROUTELOC0_OUTLOC_LOC31 (_ACMP_ROUTELOC0_OUTLOC_LOC31 << 0) /**< Shifted mode LOC31 for ACMP_ROUTELOC0 */ 1369 1370 /** @} */ 1371 /** @} End of group EFM32PG1B_ACMP */ 1372 /** @} End of group Parts */ 1373
