1 /* 2 * Copyright (c) 2024 Silicon Laboratories Inc. 3 * SPDX-License-Identifier: Apache-2.0 4 * 5 * Pin Control for Silicon Labs XG24 devices 6 * 7 * This file was generated by the script gen_pinctrl.py in the hal_silabs module. 8 * Do not manually edit. 9 */ 10 11 #ifndef ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_XG24_PINCTRL_H_ 12 #define ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_XG24_PINCTRL_H_ 13 14 #include <dt-bindings/pinctrl/silabs-pinctrl-dbus.h> 15 16 #define SILABS_DBUS_ACMP0_ACMPOUT(port, pin) SILABS_DBUS(port, pin, 4, 1, 0, 1) 17 18 #define SILABS_DBUS_ACMP1_ACMPOUT(port, pin) SILABS_DBUS(port, pin, 7, 1, 0, 1) 19 20 #define SILABS_DBUS_CMU_CLKOUT0(port, pin) SILABS_DBUS(port, pin, 10, 1, 0, 2) 21 #define SILABS_DBUS_CMU_CLKOUT1(port, pin) SILABS_DBUS(port, pin, 10, 1, 1, 3) 22 #define SILABS_DBUS_CMU_CLKOUT2(port, pin) SILABS_DBUS(port, pin, 10, 1, 2, 4) 23 #define SILABS_DBUS_CMU_CLKIN0(port, pin) SILABS_DBUS(port, pin, 10, 0, 0, 1) 24 25 #define SILABS_DBUS_EUSART0_CS(port, pin) SILABS_DBUS(port, pin, 21, 1, 0, 1) 26 #define SILABS_DBUS_EUSART0_RTS(port, pin) SILABS_DBUS(port, pin, 21, 1, 1, 3) 27 #define SILABS_DBUS_EUSART0_RX(port, pin) SILABS_DBUS(port, pin, 21, 1, 2, 4) 28 #define SILABS_DBUS_EUSART0_SCLK(port, pin) SILABS_DBUS(port, pin, 21, 1, 3, 5) 29 #define SILABS_DBUS_EUSART0_TX(port, pin) SILABS_DBUS(port, pin, 21, 1, 4, 6) 30 #define SILABS_DBUS_EUSART0_CTS(port, pin) SILABS_DBUS(port, pin, 21, 0, 0, 2) 31 32 #define SILABS_DBUS_EUSART1_CS(port, pin) SILABS_DBUS(port, pin, 29, 1, 0, 1) 33 #define SILABS_DBUS_EUSART1_RTS(port, pin) SILABS_DBUS(port, pin, 29, 1, 1, 3) 34 #define SILABS_DBUS_EUSART1_RX(port, pin) SILABS_DBUS(port, pin, 29, 1, 2, 4) 35 #define SILABS_DBUS_EUSART1_SCLK(port, pin) SILABS_DBUS(port, pin, 29, 1, 3, 5) 36 #define SILABS_DBUS_EUSART1_TX(port, pin) SILABS_DBUS(port, pin, 29, 1, 4, 6) 37 #define SILABS_DBUS_EUSART1_CTS(port, pin) SILABS_DBUS(port, pin, 29, 0, 0, 2) 38 39 #define SILABS_DBUS_PTI_DCLK(port, pin) SILABS_DBUS(port, pin, 37, 1, 0, 1) 40 #define SILABS_DBUS_PTI_DFRAME(port, pin) SILABS_DBUS(port, pin, 37, 1, 1, 2) 41 #define SILABS_DBUS_PTI_DOUT(port, pin) SILABS_DBUS(port, pin, 37, 1, 2, 3) 42 43 #define SILABS_DBUS_I2C0_SCL(port, pin) SILABS_DBUS(port, pin, 42, 1, 0, 1) 44 #define SILABS_DBUS_I2C0_SDA(port, pin) SILABS_DBUS(port, pin, 42, 1, 1, 2) 45 46 #define SILABS_DBUS_I2C1_SCL(port, pin) SILABS_DBUS(port, pin, 46, 1, 0, 1) 47 #define SILABS_DBUS_I2C1_SDA(port, pin) SILABS_DBUS(port, pin, 46, 1, 1, 2) 48 49 #define SILABS_DBUS_KEYSCAN_COLOUT0(port, pin) SILABS_DBUS(port, pin, 50, 1, 0, 1) 50 #define SILABS_DBUS_KEYSCAN_COLOUT1(port, pin) SILABS_DBUS(port, pin, 50, 1, 1, 2) 51 #define SILABS_DBUS_KEYSCAN_COLOUT2(port, pin) SILABS_DBUS(port, pin, 50, 1, 2, 3) 52 #define SILABS_DBUS_KEYSCAN_COLOUT3(port, pin) SILABS_DBUS(port, pin, 50, 1, 3, 4) 53 #define SILABS_DBUS_KEYSCAN_COLOUT4(port, pin) SILABS_DBUS(port, pin, 50, 1, 4, 5) 54 #define SILABS_DBUS_KEYSCAN_COLOUT5(port, pin) SILABS_DBUS(port, pin, 50, 1, 5, 6) 55 #define SILABS_DBUS_KEYSCAN_COLOUT6(port, pin) SILABS_DBUS(port, pin, 50, 1, 6, 7) 56 #define SILABS_DBUS_KEYSCAN_COLOUT7(port, pin) SILABS_DBUS(port, pin, 50, 1, 7, 8) 57 #define SILABS_DBUS_KEYSCAN_ROWSENSE0(port, pin) SILABS_DBUS(port, pin, 50, 0, 0, 9) 58 #define SILABS_DBUS_KEYSCAN_ROWSENSE1(port, pin) SILABS_DBUS(port, pin, 50, 0, 0, 10) 59 #define SILABS_DBUS_KEYSCAN_ROWSENSE2(port, pin) SILABS_DBUS(port, pin, 50, 0, 0, 11) 60 #define SILABS_DBUS_KEYSCAN_ROWSENSE3(port, pin) SILABS_DBUS(port, pin, 50, 0, 0, 12) 61 #define SILABS_DBUS_KEYSCAN_ROWSENSE4(port, pin) SILABS_DBUS(port, pin, 50, 0, 0, 13) 62 #define SILABS_DBUS_KEYSCAN_ROWSENSE5(port, pin) SILABS_DBUS(port, pin, 50, 0, 0, 14) 63 64 #define SILABS_DBUS_LETIMER0_OUT0(port, pin) SILABS_DBUS(port, pin, 66, 1, 0, 1) 65 #define SILABS_DBUS_LETIMER0_OUT1(port, pin) SILABS_DBUS(port, pin, 66, 1, 1, 2) 66 67 #define SILABS_DBUS_MODEM_ANT0(port, pin) SILABS_DBUS(port, pin, 70, 1, 0, 1) 68 #define SILABS_DBUS_MODEM_ANT1(port, pin) SILABS_DBUS(port, pin, 70, 1, 1, 2) 69 #define SILABS_DBUS_MODEM_ANTROLLOVER(port, pin) SILABS_DBUS(port, pin, 70, 1, 2, 3) 70 #define SILABS_DBUS_MODEM_ANTRR0(port, pin) SILABS_DBUS(port, pin, 70, 1, 3, 4) 71 #define SILABS_DBUS_MODEM_ANTRR1(port, pin) SILABS_DBUS(port, pin, 70, 1, 4, 5) 72 #define SILABS_DBUS_MODEM_ANTRR2(port, pin) SILABS_DBUS(port, pin, 70, 1, 5, 6) 73 #define SILABS_DBUS_MODEM_ANTRR3(port, pin) SILABS_DBUS(port, pin, 70, 1, 6, 7) 74 #define SILABS_DBUS_MODEM_ANTRR4(port, pin) SILABS_DBUS(port, pin, 70, 1, 7, 8) 75 #define SILABS_DBUS_MODEM_ANTRR5(port, pin) SILABS_DBUS(port, pin, 70, 1, 8, 9) 76 #define SILABS_DBUS_MODEM_ANTSWEN(port, pin) SILABS_DBUS(port, pin, 70, 1, 9, 10) 77 #define SILABS_DBUS_MODEM_ANTSWUS(port, pin) SILABS_DBUS(port, pin, 70, 1, 10, 11) 78 #define SILABS_DBUS_MODEM_ANTTRIG(port, pin) SILABS_DBUS(port, pin, 70, 1, 11, 12) 79 #define SILABS_DBUS_MODEM_ANTTRIGSTOP(port, pin) SILABS_DBUS(port, pin, 70, 1, 12, 13) 80 #define SILABS_DBUS_MODEM_DCLK(port, pin) SILABS_DBUS(port, pin, 70, 1, 13, 14) 81 #define SILABS_DBUS_MODEM_DOUT(port, pin) SILABS_DBUS(port, pin, 70, 1, 14, 16) 82 #define SILABS_DBUS_MODEM_DIN(port, pin) SILABS_DBUS(port, pin, 70, 0, 0, 15) 83 84 #define SILABS_DBUS_PCNT0_S0IN(port, pin) SILABS_DBUS(port, pin, 89, 0, 0, 0) 85 #define SILABS_DBUS_PCNT0_S1IN(port, pin) SILABS_DBUS(port, pin, 89, 0, 0, 1) 86 87 #define SILABS_DBUS_PRS0_ASYNCH0(port, pin) SILABS_DBUS(port, pin, 92, 1, 0, 1) 88 #define SILABS_DBUS_PRS0_ASYNCH1(port, pin) SILABS_DBUS(port, pin, 92, 1, 1, 2) 89 #define SILABS_DBUS_PRS0_ASYNCH2(port, pin) SILABS_DBUS(port, pin, 92, 1, 2, 3) 90 #define SILABS_DBUS_PRS0_ASYNCH3(port, pin) SILABS_DBUS(port, pin, 92, 1, 3, 4) 91 #define SILABS_DBUS_PRS0_ASYNCH4(port, pin) SILABS_DBUS(port, pin, 92, 1, 4, 5) 92 #define SILABS_DBUS_PRS0_ASYNCH5(port, pin) SILABS_DBUS(port, pin, 92, 1, 5, 6) 93 #define SILABS_DBUS_PRS0_ASYNCH6(port, pin) SILABS_DBUS(port, pin, 92, 1, 6, 7) 94 #define SILABS_DBUS_PRS0_ASYNCH7(port, pin) SILABS_DBUS(port, pin, 92, 1, 7, 8) 95 #define SILABS_DBUS_PRS0_ASYNCH8(port, pin) SILABS_DBUS(port, pin, 92, 1, 8, 9) 96 #define SILABS_DBUS_PRS0_ASYNCH9(port, pin) SILABS_DBUS(port, pin, 92, 1, 9, 10) 97 #define SILABS_DBUS_PRS0_ASYNCH10(port, pin) SILABS_DBUS(port, pin, 92, 1, 10, 11) 98 #define SILABS_DBUS_PRS0_ASYNCH11(port, pin) SILABS_DBUS(port, pin, 92, 1, 11, 12) 99 #define SILABS_DBUS_PRS0_ASYNCH12(port, pin) SILABS_DBUS(port, pin, 92, 1, 12, 13) 100 #define SILABS_DBUS_PRS0_ASYNCH13(port, pin) SILABS_DBUS(port, pin, 92, 1, 13, 14) 101 #define SILABS_DBUS_PRS0_ASYNCH14(port, pin) SILABS_DBUS(port, pin, 92, 1, 14, 15) 102 #define SILABS_DBUS_PRS0_ASYNCH15(port, pin) SILABS_DBUS(port, pin, 92, 1, 15, 16) 103 #define SILABS_DBUS_PRS0_SYNCH0(port, pin) SILABS_DBUS(port, pin, 92, 1, 16, 17) 104 #define SILABS_DBUS_PRS0_SYNCH1(port, pin) SILABS_DBUS(port, pin, 92, 1, 17, 18) 105 #define SILABS_DBUS_PRS0_SYNCH2(port, pin) SILABS_DBUS(port, pin, 92, 1, 18, 19) 106 #define SILABS_DBUS_PRS0_SYNCH3(port, pin) SILABS_DBUS(port, pin, 92, 1, 19, 20) 107 108 #define SILABS_DBUS_RAC_LNAEN(port, pin) SILABS_DBUS(port, pin, 114, 1, 0, 1) 109 #define SILABS_DBUS_RAC_PAEN(port, pin) SILABS_DBUS(port, pin, 114, 1, 1, 2) 110 111 #define SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(port, pin) SILABS_DBUS(port, pin, 142, 0, 0, 0) 112 113 #define SILABS_DBUS_TIMER0_CC0(port, pin) SILABS_DBUS(port, pin, 144, 1, 0, 1) 114 #define SILABS_DBUS_TIMER0_CC1(port, pin) SILABS_DBUS(port, pin, 144, 1, 1, 2) 115 #define SILABS_DBUS_TIMER0_CC2(port, pin) SILABS_DBUS(port, pin, 144, 1, 2, 3) 116 #define SILABS_DBUS_TIMER0_CDTI0(port, pin) SILABS_DBUS(port, pin, 144, 1, 3, 4) 117 #define SILABS_DBUS_TIMER0_CDTI1(port, pin) SILABS_DBUS(port, pin, 144, 1, 4, 5) 118 #define SILABS_DBUS_TIMER0_CDTI2(port, pin) SILABS_DBUS(port, pin, 144, 1, 5, 6) 119 120 #define SILABS_DBUS_TIMER1_CC0(port, pin) SILABS_DBUS(port, pin, 152, 1, 0, 1) 121 #define SILABS_DBUS_TIMER1_CC1(port, pin) SILABS_DBUS(port, pin, 152, 1, 1, 2) 122 #define SILABS_DBUS_TIMER1_CC2(port, pin) SILABS_DBUS(port, pin, 152, 1, 2, 3) 123 #define SILABS_DBUS_TIMER1_CDTI0(port, pin) SILABS_DBUS(port, pin, 152, 1, 3, 4) 124 #define SILABS_DBUS_TIMER1_CDTI1(port, pin) SILABS_DBUS(port, pin, 152, 1, 4, 5) 125 #define SILABS_DBUS_TIMER1_CDTI2(port, pin) SILABS_DBUS(port, pin, 152, 1, 5, 6) 126 127 #define SILABS_DBUS_TIMER2_CC0(port, pin) SILABS_DBUS(port, pin, 160, 1, 0, 1) 128 #define SILABS_DBUS_TIMER2_CC1(port, pin) SILABS_DBUS(port, pin, 160, 1, 1, 2) 129 #define SILABS_DBUS_TIMER2_CC2(port, pin) SILABS_DBUS(port, pin, 160, 1, 2, 3) 130 #define SILABS_DBUS_TIMER2_CDTI0(port, pin) SILABS_DBUS(port, pin, 160, 1, 3, 4) 131 #define SILABS_DBUS_TIMER2_CDTI1(port, pin) SILABS_DBUS(port, pin, 160, 1, 4, 5) 132 #define SILABS_DBUS_TIMER2_CDTI2(port, pin) SILABS_DBUS(port, pin, 160, 1, 5, 6) 133 134 #define SILABS_DBUS_TIMER3_CC0(port, pin) SILABS_DBUS(port, pin, 168, 1, 0, 1) 135 #define SILABS_DBUS_TIMER3_CC1(port, pin) SILABS_DBUS(port, pin, 168, 1, 1, 2) 136 #define SILABS_DBUS_TIMER3_CC2(port, pin) SILABS_DBUS(port, pin, 168, 1, 2, 3) 137 #define SILABS_DBUS_TIMER3_CDTI0(port, pin) SILABS_DBUS(port, pin, 168, 1, 3, 4) 138 #define SILABS_DBUS_TIMER3_CDTI1(port, pin) SILABS_DBUS(port, pin, 168, 1, 4, 5) 139 #define SILABS_DBUS_TIMER3_CDTI2(port, pin) SILABS_DBUS(port, pin, 168, 1, 5, 6) 140 141 #define SILABS_DBUS_TIMER4_CC0(port, pin) SILABS_DBUS(port, pin, 176, 1, 0, 1) 142 #define SILABS_DBUS_TIMER4_CC1(port, pin) SILABS_DBUS(port, pin, 176, 1, 1, 2) 143 #define SILABS_DBUS_TIMER4_CC2(port, pin) SILABS_DBUS(port, pin, 176, 1, 2, 3) 144 #define SILABS_DBUS_TIMER4_CDTI0(port, pin) SILABS_DBUS(port, pin, 176, 1, 3, 4) 145 #define SILABS_DBUS_TIMER4_CDTI1(port, pin) SILABS_DBUS(port, pin, 176, 1, 4, 5) 146 #define SILABS_DBUS_TIMER4_CDTI2(port, pin) SILABS_DBUS(port, pin, 176, 1, 5, 6) 147 148 #define SILABS_DBUS_USART0_CS(port, pin) SILABS_DBUS(port, pin, 184, 1, 0, 1) 149 #define SILABS_DBUS_USART0_RTS(port, pin) SILABS_DBUS(port, pin, 184, 1, 1, 3) 150 #define SILABS_DBUS_USART0_RX(port, pin) SILABS_DBUS(port, pin, 184, 1, 2, 4) 151 #define SILABS_DBUS_USART0_CLK(port, pin) SILABS_DBUS(port, pin, 184, 1, 3, 5) 152 #define SILABS_DBUS_USART0_TX(port, pin) SILABS_DBUS(port, pin, 184, 1, 4, 6) 153 #define SILABS_DBUS_USART0_CTS(port, pin) SILABS_DBUS(port, pin, 184, 0, 0, 2) 154 155 #define ACMP0_ACMPOUT_PA0 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x0) 156 #define ACMP0_ACMPOUT_PA1 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x1) 157 #define ACMP0_ACMPOUT_PA2 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x2) 158 #define ACMP0_ACMPOUT_PA3 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x3) 159 #define ACMP0_ACMPOUT_PA4 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x4) 160 #define ACMP0_ACMPOUT_PA5 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x5) 161 #define ACMP0_ACMPOUT_PA6 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x6) 162 #define ACMP0_ACMPOUT_PA7 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x7) 163 #define ACMP0_ACMPOUT_PA8 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x8) 164 #define ACMP0_ACMPOUT_PA9 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x9) 165 #define ACMP0_ACMPOUT_PB0 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x0) 166 #define ACMP0_ACMPOUT_PB1 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x1) 167 #define ACMP0_ACMPOUT_PB2 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x2) 168 #define ACMP0_ACMPOUT_PB3 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x3) 169 #define ACMP0_ACMPOUT_PB4 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x4) 170 #define ACMP0_ACMPOUT_PB5 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x5) 171 #define ACMP0_ACMPOUT_PC0 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x0) 172 #define ACMP0_ACMPOUT_PC1 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x1) 173 #define ACMP0_ACMPOUT_PC2 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x2) 174 #define ACMP0_ACMPOUT_PC3 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x3) 175 #define ACMP0_ACMPOUT_PC4 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x4) 176 #define ACMP0_ACMPOUT_PC5 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x5) 177 #define ACMP0_ACMPOUT_PC6 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x6) 178 #define ACMP0_ACMPOUT_PC7 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x7) 179 #define ACMP0_ACMPOUT_PC8 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x8) 180 #define ACMP0_ACMPOUT_PC9 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x9) 181 #define ACMP0_ACMPOUT_PD0 SILABS_DBUS_ACMP0_ACMPOUT(0x3, 0x0) 182 #define ACMP0_ACMPOUT_PD1 SILABS_DBUS_ACMP0_ACMPOUT(0x3, 0x1) 183 #define ACMP0_ACMPOUT_PD2 SILABS_DBUS_ACMP0_ACMPOUT(0x3, 0x2) 184 #define ACMP0_ACMPOUT_PD3 SILABS_DBUS_ACMP0_ACMPOUT(0x3, 0x3) 185 #define ACMP0_ACMPOUT_PD4 SILABS_DBUS_ACMP0_ACMPOUT(0x3, 0x4) 186 #define ACMP0_ACMPOUT_PD5 SILABS_DBUS_ACMP0_ACMPOUT(0x3, 0x5) 187 188 #define ACMP1_ACMPOUT_PA0 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x0) 189 #define ACMP1_ACMPOUT_PA1 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x1) 190 #define ACMP1_ACMPOUT_PA2 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x2) 191 #define ACMP1_ACMPOUT_PA3 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x3) 192 #define ACMP1_ACMPOUT_PA4 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x4) 193 #define ACMP1_ACMPOUT_PA5 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x5) 194 #define ACMP1_ACMPOUT_PA6 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x6) 195 #define ACMP1_ACMPOUT_PA7 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x7) 196 #define ACMP1_ACMPOUT_PA8 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x8) 197 #define ACMP1_ACMPOUT_PA9 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x9) 198 #define ACMP1_ACMPOUT_PB0 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x0) 199 #define ACMP1_ACMPOUT_PB1 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x1) 200 #define ACMP1_ACMPOUT_PB2 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x2) 201 #define ACMP1_ACMPOUT_PB3 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x3) 202 #define ACMP1_ACMPOUT_PB4 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x4) 203 #define ACMP1_ACMPOUT_PB5 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x5) 204 #define ACMP1_ACMPOUT_PC0 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x0) 205 #define ACMP1_ACMPOUT_PC1 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x1) 206 #define ACMP1_ACMPOUT_PC2 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x2) 207 #define ACMP1_ACMPOUT_PC3 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x3) 208 #define ACMP1_ACMPOUT_PC4 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x4) 209 #define ACMP1_ACMPOUT_PC5 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x5) 210 #define ACMP1_ACMPOUT_PC6 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x6) 211 #define ACMP1_ACMPOUT_PC7 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x7) 212 #define ACMP1_ACMPOUT_PC8 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x8) 213 #define ACMP1_ACMPOUT_PC9 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x9) 214 #define ACMP1_ACMPOUT_PD0 SILABS_DBUS_ACMP1_ACMPOUT(0x3, 0x0) 215 #define ACMP1_ACMPOUT_PD1 SILABS_DBUS_ACMP1_ACMPOUT(0x3, 0x1) 216 #define ACMP1_ACMPOUT_PD2 SILABS_DBUS_ACMP1_ACMPOUT(0x3, 0x2) 217 #define ACMP1_ACMPOUT_PD3 SILABS_DBUS_ACMP1_ACMPOUT(0x3, 0x3) 218 #define ACMP1_ACMPOUT_PD4 SILABS_DBUS_ACMP1_ACMPOUT(0x3, 0x4) 219 #define ACMP1_ACMPOUT_PD5 SILABS_DBUS_ACMP1_ACMPOUT(0x3, 0x5) 220 221 #define CMU_CLKOUT0_PC0 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x0) 222 #define CMU_CLKOUT0_PC1 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x1) 223 #define CMU_CLKOUT0_PC2 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x2) 224 #define CMU_CLKOUT0_PC3 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x3) 225 #define CMU_CLKOUT0_PC4 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x4) 226 #define CMU_CLKOUT0_PC5 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x5) 227 #define CMU_CLKOUT0_PC6 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x6) 228 #define CMU_CLKOUT0_PC7 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x7) 229 #define CMU_CLKOUT0_PC8 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x8) 230 #define CMU_CLKOUT0_PC9 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x9) 231 #define CMU_CLKOUT0_PD0 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x0) 232 #define CMU_CLKOUT0_PD1 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x1) 233 #define CMU_CLKOUT0_PD2 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x2) 234 #define CMU_CLKOUT0_PD3 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x3) 235 #define CMU_CLKOUT0_PD4 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x4) 236 #define CMU_CLKOUT0_PD5 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x5) 237 #define CMU_CLKOUT1_PC0 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x0) 238 #define CMU_CLKOUT1_PC1 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x1) 239 #define CMU_CLKOUT1_PC2 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x2) 240 #define CMU_CLKOUT1_PC3 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x3) 241 #define CMU_CLKOUT1_PC4 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x4) 242 #define CMU_CLKOUT1_PC5 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x5) 243 #define CMU_CLKOUT1_PC6 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x6) 244 #define CMU_CLKOUT1_PC7 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x7) 245 #define CMU_CLKOUT1_PC8 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x8) 246 #define CMU_CLKOUT1_PC9 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x9) 247 #define CMU_CLKOUT1_PD0 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x0) 248 #define CMU_CLKOUT1_PD1 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x1) 249 #define CMU_CLKOUT1_PD2 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x2) 250 #define CMU_CLKOUT1_PD3 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x3) 251 #define CMU_CLKOUT1_PD4 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x4) 252 #define CMU_CLKOUT1_PD5 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x5) 253 #define CMU_CLKOUT2_PA0 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x0) 254 #define CMU_CLKOUT2_PA1 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x1) 255 #define CMU_CLKOUT2_PA2 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x2) 256 #define CMU_CLKOUT2_PA3 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x3) 257 #define CMU_CLKOUT2_PA4 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x4) 258 #define CMU_CLKOUT2_PA5 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x5) 259 #define CMU_CLKOUT2_PA6 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x6) 260 #define CMU_CLKOUT2_PA7 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x7) 261 #define CMU_CLKOUT2_PA8 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x8) 262 #define CMU_CLKOUT2_PA9 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x9) 263 #define CMU_CLKOUT2_PB0 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x0) 264 #define CMU_CLKOUT2_PB1 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x1) 265 #define CMU_CLKOUT2_PB2 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x2) 266 #define CMU_CLKOUT2_PB3 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x3) 267 #define CMU_CLKOUT2_PB4 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x4) 268 #define CMU_CLKOUT2_PB5 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x5) 269 #define CMU_CLKIN0_PC0 SILABS_DBUS_CMU_CLKIN0(0x2, 0x0) 270 #define CMU_CLKIN0_PC1 SILABS_DBUS_CMU_CLKIN0(0x2, 0x1) 271 #define CMU_CLKIN0_PC2 SILABS_DBUS_CMU_CLKIN0(0x2, 0x2) 272 #define CMU_CLKIN0_PC3 SILABS_DBUS_CMU_CLKIN0(0x2, 0x3) 273 #define CMU_CLKIN0_PC4 SILABS_DBUS_CMU_CLKIN0(0x2, 0x4) 274 #define CMU_CLKIN0_PC5 SILABS_DBUS_CMU_CLKIN0(0x2, 0x5) 275 #define CMU_CLKIN0_PC6 SILABS_DBUS_CMU_CLKIN0(0x2, 0x6) 276 #define CMU_CLKIN0_PC7 SILABS_DBUS_CMU_CLKIN0(0x2, 0x7) 277 #define CMU_CLKIN0_PC8 SILABS_DBUS_CMU_CLKIN0(0x2, 0x8) 278 #define CMU_CLKIN0_PC9 SILABS_DBUS_CMU_CLKIN0(0x2, 0x9) 279 #define CMU_CLKIN0_PD0 SILABS_DBUS_CMU_CLKIN0(0x3, 0x0) 280 #define CMU_CLKIN0_PD1 SILABS_DBUS_CMU_CLKIN0(0x3, 0x1) 281 #define CMU_CLKIN0_PD2 SILABS_DBUS_CMU_CLKIN0(0x3, 0x2) 282 #define CMU_CLKIN0_PD3 SILABS_DBUS_CMU_CLKIN0(0x3, 0x3) 283 #define CMU_CLKIN0_PD4 SILABS_DBUS_CMU_CLKIN0(0x3, 0x4) 284 #define CMU_CLKIN0_PD5 SILABS_DBUS_CMU_CLKIN0(0x3, 0x5) 285 286 #define EUSART0_CS_PA0 SILABS_DBUS_EUSART0_CS(0x0, 0x0) 287 #define EUSART0_CS_PA1 SILABS_DBUS_EUSART0_CS(0x0, 0x1) 288 #define EUSART0_CS_PA2 SILABS_DBUS_EUSART0_CS(0x0, 0x2) 289 #define EUSART0_CS_PA3 SILABS_DBUS_EUSART0_CS(0x0, 0x3) 290 #define EUSART0_CS_PA4 SILABS_DBUS_EUSART0_CS(0x0, 0x4) 291 #define EUSART0_CS_PA5 SILABS_DBUS_EUSART0_CS(0x0, 0x5) 292 #define EUSART0_CS_PA6 SILABS_DBUS_EUSART0_CS(0x0, 0x6) 293 #define EUSART0_CS_PA7 SILABS_DBUS_EUSART0_CS(0x0, 0x7) 294 #define EUSART0_CS_PA8 SILABS_DBUS_EUSART0_CS(0x0, 0x8) 295 #define EUSART0_CS_PA9 SILABS_DBUS_EUSART0_CS(0x0, 0x9) 296 #define EUSART0_CS_PB0 SILABS_DBUS_EUSART0_CS(0x1, 0x0) 297 #define EUSART0_CS_PB1 SILABS_DBUS_EUSART0_CS(0x1, 0x1) 298 #define EUSART0_CS_PB2 SILABS_DBUS_EUSART0_CS(0x1, 0x2) 299 #define EUSART0_CS_PB3 SILABS_DBUS_EUSART0_CS(0x1, 0x3) 300 #define EUSART0_CS_PB4 SILABS_DBUS_EUSART0_CS(0x1, 0x4) 301 #define EUSART0_CS_PB5 SILABS_DBUS_EUSART0_CS(0x1, 0x5) 302 #define EUSART0_RTS_PA0 SILABS_DBUS_EUSART0_RTS(0x0, 0x0) 303 #define EUSART0_RTS_PA1 SILABS_DBUS_EUSART0_RTS(0x0, 0x1) 304 #define EUSART0_RTS_PA2 SILABS_DBUS_EUSART0_RTS(0x0, 0x2) 305 #define EUSART0_RTS_PA3 SILABS_DBUS_EUSART0_RTS(0x0, 0x3) 306 #define EUSART0_RTS_PA4 SILABS_DBUS_EUSART0_RTS(0x0, 0x4) 307 #define EUSART0_RTS_PA5 SILABS_DBUS_EUSART0_RTS(0x0, 0x5) 308 #define EUSART0_RTS_PA6 SILABS_DBUS_EUSART0_RTS(0x0, 0x6) 309 #define EUSART0_RTS_PA7 SILABS_DBUS_EUSART0_RTS(0x0, 0x7) 310 #define EUSART0_RTS_PA8 SILABS_DBUS_EUSART0_RTS(0x0, 0x8) 311 #define EUSART0_RTS_PA9 SILABS_DBUS_EUSART0_RTS(0x0, 0x9) 312 #define EUSART0_RTS_PB0 SILABS_DBUS_EUSART0_RTS(0x1, 0x0) 313 #define EUSART0_RTS_PB1 SILABS_DBUS_EUSART0_RTS(0x1, 0x1) 314 #define EUSART0_RTS_PB2 SILABS_DBUS_EUSART0_RTS(0x1, 0x2) 315 #define EUSART0_RTS_PB3 SILABS_DBUS_EUSART0_RTS(0x1, 0x3) 316 #define EUSART0_RTS_PB4 SILABS_DBUS_EUSART0_RTS(0x1, 0x4) 317 #define EUSART0_RTS_PB5 SILABS_DBUS_EUSART0_RTS(0x1, 0x5) 318 #define EUSART0_RX_PA0 SILABS_DBUS_EUSART0_RX(0x0, 0x0) 319 #define EUSART0_RX_PA1 SILABS_DBUS_EUSART0_RX(0x0, 0x1) 320 #define EUSART0_RX_PA2 SILABS_DBUS_EUSART0_RX(0x0, 0x2) 321 #define EUSART0_RX_PA3 SILABS_DBUS_EUSART0_RX(0x0, 0x3) 322 #define EUSART0_RX_PA4 SILABS_DBUS_EUSART0_RX(0x0, 0x4) 323 #define EUSART0_RX_PA5 SILABS_DBUS_EUSART0_RX(0x0, 0x5) 324 #define EUSART0_RX_PA6 SILABS_DBUS_EUSART0_RX(0x0, 0x6) 325 #define EUSART0_RX_PA7 SILABS_DBUS_EUSART0_RX(0x0, 0x7) 326 #define EUSART0_RX_PA8 SILABS_DBUS_EUSART0_RX(0x0, 0x8) 327 #define EUSART0_RX_PA9 SILABS_DBUS_EUSART0_RX(0x0, 0x9) 328 #define EUSART0_RX_PB0 SILABS_DBUS_EUSART0_RX(0x1, 0x0) 329 #define EUSART0_RX_PB1 SILABS_DBUS_EUSART0_RX(0x1, 0x1) 330 #define EUSART0_RX_PB2 SILABS_DBUS_EUSART0_RX(0x1, 0x2) 331 #define EUSART0_RX_PB3 SILABS_DBUS_EUSART0_RX(0x1, 0x3) 332 #define EUSART0_RX_PB4 SILABS_DBUS_EUSART0_RX(0x1, 0x4) 333 #define EUSART0_RX_PB5 SILABS_DBUS_EUSART0_RX(0x1, 0x5) 334 #define EUSART0_SCLK_PA0 SILABS_DBUS_EUSART0_SCLK(0x0, 0x0) 335 #define EUSART0_SCLK_PA1 SILABS_DBUS_EUSART0_SCLK(0x0, 0x1) 336 #define EUSART0_SCLK_PA2 SILABS_DBUS_EUSART0_SCLK(0x0, 0x2) 337 #define EUSART0_SCLK_PA3 SILABS_DBUS_EUSART0_SCLK(0x0, 0x3) 338 #define EUSART0_SCLK_PA4 SILABS_DBUS_EUSART0_SCLK(0x0, 0x4) 339 #define EUSART0_SCLK_PA5 SILABS_DBUS_EUSART0_SCLK(0x0, 0x5) 340 #define EUSART0_SCLK_PA6 SILABS_DBUS_EUSART0_SCLK(0x0, 0x6) 341 #define EUSART0_SCLK_PA7 SILABS_DBUS_EUSART0_SCLK(0x0, 0x7) 342 #define EUSART0_SCLK_PA8 SILABS_DBUS_EUSART0_SCLK(0x0, 0x8) 343 #define EUSART0_SCLK_PA9 SILABS_DBUS_EUSART0_SCLK(0x0, 0x9) 344 #define EUSART0_SCLK_PB0 SILABS_DBUS_EUSART0_SCLK(0x1, 0x0) 345 #define EUSART0_SCLK_PB1 SILABS_DBUS_EUSART0_SCLK(0x1, 0x1) 346 #define EUSART0_SCLK_PB2 SILABS_DBUS_EUSART0_SCLK(0x1, 0x2) 347 #define EUSART0_SCLK_PB3 SILABS_DBUS_EUSART0_SCLK(0x1, 0x3) 348 #define EUSART0_SCLK_PB4 SILABS_DBUS_EUSART0_SCLK(0x1, 0x4) 349 #define EUSART0_SCLK_PB5 SILABS_DBUS_EUSART0_SCLK(0x1, 0x5) 350 #define EUSART0_TX_PA0 SILABS_DBUS_EUSART0_TX(0x0, 0x0) 351 #define EUSART0_TX_PA1 SILABS_DBUS_EUSART0_TX(0x0, 0x1) 352 #define EUSART0_TX_PA2 SILABS_DBUS_EUSART0_TX(0x0, 0x2) 353 #define EUSART0_TX_PA3 SILABS_DBUS_EUSART0_TX(0x0, 0x3) 354 #define EUSART0_TX_PA4 SILABS_DBUS_EUSART0_TX(0x0, 0x4) 355 #define EUSART0_TX_PA5 SILABS_DBUS_EUSART0_TX(0x0, 0x5) 356 #define EUSART0_TX_PA6 SILABS_DBUS_EUSART0_TX(0x0, 0x6) 357 #define EUSART0_TX_PA7 SILABS_DBUS_EUSART0_TX(0x0, 0x7) 358 #define EUSART0_TX_PA8 SILABS_DBUS_EUSART0_TX(0x0, 0x8) 359 #define EUSART0_TX_PA9 SILABS_DBUS_EUSART0_TX(0x0, 0x9) 360 #define EUSART0_TX_PB0 SILABS_DBUS_EUSART0_TX(0x1, 0x0) 361 #define EUSART0_TX_PB1 SILABS_DBUS_EUSART0_TX(0x1, 0x1) 362 #define EUSART0_TX_PB2 SILABS_DBUS_EUSART0_TX(0x1, 0x2) 363 #define EUSART0_TX_PB3 SILABS_DBUS_EUSART0_TX(0x1, 0x3) 364 #define EUSART0_TX_PB4 SILABS_DBUS_EUSART0_TX(0x1, 0x4) 365 #define EUSART0_TX_PB5 SILABS_DBUS_EUSART0_TX(0x1, 0x5) 366 #define EUSART0_CTS_PA0 SILABS_DBUS_EUSART0_CTS(0x0, 0x0) 367 #define EUSART0_CTS_PA1 SILABS_DBUS_EUSART0_CTS(0x0, 0x1) 368 #define EUSART0_CTS_PA2 SILABS_DBUS_EUSART0_CTS(0x0, 0x2) 369 #define EUSART0_CTS_PA3 SILABS_DBUS_EUSART0_CTS(0x0, 0x3) 370 #define EUSART0_CTS_PA4 SILABS_DBUS_EUSART0_CTS(0x0, 0x4) 371 #define EUSART0_CTS_PA5 SILABS_DBUS_EUSART0_CTS(0x0, 0x5) 372 #define EUSART0_CTS_PA6 SILABS_DBUS_EUSART0_CTS(0x0, 0x6) 373 #define EUSART0_CTS_PA7 SILABS_DBUS_EUSART0_CTS(0x0, 0x7) 374 #define EUSART0_CTS_PA8 SILABS_DBUS_EUSART0_CTS(0x0, 0x8) 375 #define EUSART0_CTS_PA9 SILABS_DBUS_EUSART0_CTS(0x0, 0x9) 376 #define EUSART0_CTS_PB0 SILABS_DBUS_EUSART0_CTS(0x1, 0x0) 377 #define EUSART0_CTS_PB1 SILABS_DBUS_EUSART0_CTS(0x1, 0x1) 378 #define EUSART0_CTS_PB2 SILABS_DBUS_EUSART0_CTS(0x1, 0x2) 379 #define EUSART0_CTS_PB3 SILABS_DBUS_EUSART0_CTS(0x1, 0x3) 380 #define EUSART0_CTS_PB4 SILABS_DBUS_EUSART0_CTS(0x1, 0x4) 381 #define EUSART0_CTS_PB5 SILABS_DBUS_EUSART0_CTS(0x1, 0x5) 382 383 #define EUSART1_CS_PA0 SILABS_DBUS_EUSART1_CS(0x0, 0x0) 384 #define EUSART1_CS_PA1 SILABS_DBUS_EUSART1_CS(0x0, 0x1) 385 #define EUSART1_CS_PA2 SILABS_DBUS_EUSART1_CS(0x0, 0x2) 386 #define EUSART1_CS_PA3 SILABS_DBUS_EUSART1_CS(0x0, 0x3) 387 #define EUSART1_CS_PA4 SILABS_DBUS_EUSART1_CS(0x0, 0x4) 388 #define EUSART1_CS_PA5 SILABS_DBUS_EUSART1_CS(0x0, 0x5) 389 #define EUSART1_CS_PA6 SILABS_DBUS_EUSART1_CS(0x0, 0x6) 390 #define EUSART1_CS_PA7 SILABS_DBUS_EUSART1_CS(0x0, 0x7) 391 #define EUSART1_CS_PA8 SILABS_DBUS_EUSART1_CS(0x0, 0x8) 392 #define EUSART1_CS_PA9 SILABS_DBUS_EUSART1_CS(0x0, 0x9) 393 #define EUSART1_CS_PB0 SILABS_DBUS_EUSART1_CS(0x1, 0x0) 394 #define EUSART1_CS_PB1 SILABS_DBUS_EUSART1_CS(0x1, 0x1) 395 #define EUSART1_CS_PB2 SILABS_DBUS_EUSART1_CS(0x1, 0x2) 396 #define EUSART1_CS_PB3 SILABS_DBUS_EUSART1_CS(0x1, 0x3) 397 #define EUSART1_CS_PB4 SILABS_DBUS_EUSART1_CS(0x1, 0x4) 398 #define EUSART1_CS_PB5 SILABS_DBUS_EUSART1_CS(0x1, 0x5) 399 #define EUSART1_CS_PC0 SILABS_DBUS_EUSART1_CS(0x2, 0x0) 400 #define EUSART1_CS_PC1 SILABS_DBUS_EUSART1_CS(0x2, 0x1) 401 #define EUSART1_CS_PC2 SILABS_DBUS_EUSART1_CS(0x2, 0x2) 402 #define EUSART1_CS_PC3 SILABS_DBUS_EUSART1_CS(0x2, 0x3) 403 #define EUSART1_CS_PC4 SILABS_DBUS_EUSART1_CS(0x2, 0x4) 404 #define EUSART1_CS_PC5 SILABS_DBUS_EUSART1_CS(0x2, 0x5) 405 #define EUSART1_CS_PC6 SILABS_DBUS_EUSART1_CS(0x2, 0x6) 406 #define EUSART1_CS_PC7 SILABS_DBUS_EUSART1_CS(0x2, 0x7) 407 #define EUSART1_CS_PC8 SILABS_DBUS_EUSART1_CS(0x2, 0x8) 408 #define EUSART1_CS_PC9 SILABS_DBUS_EUSART1_CS(0x2, 0x9) 409 #define EUSART1_CS_PD0 SILABS_DBUS_EUSART1_CS(0x3, 0x0) 410 #define EUSART1_CS_PD1 SILABS_DBUS_EUSART1_CS(0x3, 0x1) 411 #define EUSART1_CS_PD2 SILABS_DBUS_EUSART1_CS(0x3, 0x2) 412 #define EUSART1_CS_PD3 SILABS_DBUS_EUSART1_CS(0x3, 0x3) 413 #define EUSART1_CS_PD4 SILABS_DBUS_EUSART1_CS(0x3, 0x4) 414 #define EUSART1_CS_PD5 SILABS_DBUS_EUSART1_CS(0x3, 0x5) 415 #define EUSART1_RTS_PA0 SILABS_DBUS_EUSART1_RTS(0x0, 0x0) 416 #define EUSART1_RTS_PA1 SILABS_DBUS_EUSART1_RTS(0x0, 0x1) 417 #define EUSART1_RTS_PA2 SILABS_DBUS_EUSART1_RTS(0x0, 0x2) 418 #define EUSART1_RTS_PA3 SILABS_DBUS_EUSART1_RTS(0x0, 0x3) 419 #define EUSART1_RTS_PA4 SILABS_DBUS_EUSART1_RTS(0x0, 0x4) 420 #define EUSART1_RTS_PA5 SILABS_DBUS_EUSART1_RTS(0x0, 0x5) 421 #define EUSART1_RTS_PA6 SILABS_DBUS_EUSART1_RTS(0x0, 0x6) 422 #define EUSART1_RTS_PA7 SILABS_DBUS_EUSART1_RTS(0x0, 0x7) 423 #define EUSART1_RTS_PA8 SILABS_DBUS_EUSART1_RTS(0x0, 0x8) 424 #define EUSART1_RTS_PA9 SILABS_DBUS_EUSART1_RTS(0x0, 0x9) 425 #define EUSART1_RTS_PB0 SILABS_DBUS_EUSART1_RTS(0x1, 0x0) 426 #define EUSART1_RTS_PB1 SILABS_DBUS_EUSART1_RTS(0x1, 0x1) 427 #define EUSART1_RTS_PB2 SILABS_DBUS_EUSART1_RTS(0x1, 0x2) 428 #define EUSART1_RTS_PB3 SILABS_DBUS_EUSART1_RTS(0x1, 0x3) 429 #define EUSART1_RTS_PB4 SILABS_DBUS_EUSART1_RTS(0x1, 0x4) 430 #define EUSART1_RTS_PB5 SILABS_DBUS_EUSART1_RTS(0x1, 0x5) 431 #define EUSART1_RTS_PC0 SILABS_DBUS_EUSART1_RTS(0x2, 0x0) 432 #define EUSART1_RTS_PC1 SILABS_DBUS_EUSART1_RTS(0x2, 0x1) 433 #define EUSART1_RTS_PC2 SILABS_DBUS_EUSART1_RTS(0x2, 0x2) 434 #define EUSART1_RTS_PC3 SILABS_DBUS_EUSART1_RTS(0x2, 0x3) 435 #define EUSART1_RTS_PC4 SILABS_DBUS_EUSART1_RTS(0x2, 0x4) 436 #define EUSART1_RTS_PC5 SILABS_DBUS_EUSART1_RTS(0x2, 0x5) 437 #define EUSART1_RTS_PC6 SILABS_DBUS_EUSART1_RTS(0x2, 0x6) 438 #define EUSART1_RTS_PC7 SILABS_DBUS_EUSART1_RTS(0x2, 0x7) 439 #define EUSART1_RTS_PC8 SILABS_DBUS_EUSART1_RTS(0x2, 0x8) 440 #define EUSART1_RTS_PC9 SILABS_DBUS_EUSART1_RTS(0x2, 0x9) 441 #define EUSART1_RTS_PD0 SILABS_DBUS_EUSART1_RTS(0x3, 0x0) 442 #define EUSART1_RTS_PD1 SILABS_DBUS_EUSART1_RTS(0x3, 0x1) 443 #define EUSART1_RTS_PD2 SILABS_DBUS_EUSART1_RTS(0x3, 0x2) 444 #define EUSART1_RTS_PD3 SILABS_DBUS_EUSART1_RTS(0x3, 0x3) 445 #define EUSART1_RTS_PD4 SILABS_DBUS_EUSART1_RTS(0x3, 0x4) 446 #define EUSART1_RTS_PD5 SILABS_DBUS_EUSART1_RTS(0x3, 0x5) 447 #define EUSART1_RX_PA0 SILABS_DBUS_EUSART1_RX(0x0, 0x0) 448 #define EUSART1_RX_PA1 SILABS_DBUS_EUSART1_RX(0x0, 0x1) 449 #define EUSART1_RX_PA2 SILABS_DBUS_EUSART1_RX(0x0, 0x2) 450 #define EUSART1_RX_PA3 SILABS_DBUS_EUSART1_RX(0x0, 0x3) 451 #define EUSART1_RX_PA4 SILABS_DBUS_EUSART1_RX(0x0, 0x4) 452 #define EUSART1_RX_PA5 SILABS_DBUS_EUSART1_RX(0x0, 0x5) 453 #define EUSART1_RX_PA6 SILABS_DBUS_EUSART1_RX(0x0, 0x6) 454 #define EUSART1_RX_PA7 SILABS_DBUS_EUSART1_RX(0x0, 0x7) 455 #define EUSART1_RX_PA8 SILABS_DBUS_EUSART1_RX(0x0, 0x8) 456 #define EUSART1_RX_PA9 SILABS_DBUS_EUSART1_RX(0x0, 0x9) 457 #define EUSART1_RX_PB0 SILABS_DBUS_EUSART1_RX(0x1, 0x0) 458 #define EUSART1_RX_PB1 SILABS_DBUS_EUSART1_RX(0x1, 0x1) 459 #define EUSART1_RX_PB2 SILABS_DBUS_EUSART1_RX(0x1, 0x2) 460 #define EUSART1_RX_PB3 SILABS_DBUS_EUSART1_RX(0x1, 0x3) 461 #define EUSART1_RX_PB4 SILABS_DBUS_EUSART1_RX(0x1, 0x4) 462 #define EUSART1_RX_PB5 SILABS_DBUS_EUSART1_RX(0x1, 0x5) 463 #define EUSART1_RX_PC0 SILABS_DBUS_EUSART1_RX(0x2, 0x0) 464 #define EUSART1_RX_PC1 SILABS_DBUS_EUSART1_RX(0x2, 0x1) 465 #define EUSART1_RX_PC2 SILABS_DBUS_EUSART1_RX(0x2, 0x2) 466 #define EUSART1_RX_PC3 SILABS_DBUS_EUSART1_RX(0x2, 0x3) 467 #define EUSART1_RX_PC4 SILABS_DBUS_EUSART1_RX(0x2, 0x4) 468 #define EUSART1_RX_PC5 SILABS_DBUS_EUSART1_RX(0x2, 0x5) 469 #define EUSART1_RX_PC6 SILABS_DBUS_EUSART1_RX(0x2, 0x6) 470 #define EUSART1_RX_PC7 SILABS_DBUS_EUSART1_RX(0x2, 0x7) 471 #define EUSART1_RX_PC8 SILABS_DBUS_EUSART1_RX(0x2, 0x8) 472 #define EUSART1_RX_PC9 SILABS_DBUS_EUSART1_RX(0x2, 0x9) 473 #define EUSART1_RX_PD0 SILABS_DBUS_EUSART1_RX(0x3, 0x0) 474 #define EUSART1_RX_PD1 SILABS_DBUS_EUSART1_RX(0x3, 0x1) 475 #define EUSART1_RX_PD2 SILABS_DBUS_EUSART1_RX(0x3, 0x2) 476 #define EUSART1_RX_PD3 SILABS_DBUS_EUSART1_RX(0x3, 0x3) 477 #define EUSART1_RX_PD4 SILABS_DBUS_EUSART1_RX(0x3, 0x4) 478 #define EUSART1_RX_PD5 SILABS_DBUS_EUSART1_RX(0x3, 0x5) 479 #define EUSART1_SCLK_PA0 SILABS_DBUS_EUSART1_SCLK(0x0, 0x0) 480 #define EUSART1_SCLK_PA1 SILABS_DBUS_EUSART1_SCLK(0x0, 0x1) 481 #define EUSART1_SCLK_PA2 SILABS_DBUS_EUSART1_SCLK(0x0, 0x2) 482 #define EUSART1_SCLK_PA3 SILABS_DBUS_EUSART1_SCLK(0x0, 0x3) 483 #define EUSART1_SCLK_PA4 SILABS_DBUS_EUSART1_SCLK(0x0, 0x4) 484 #define EUSART1_SCLK_PA5 SILABS_DBUS_EUSART1_SCLK(0x0, 0x5) 485 #define EUSART1_SCLK_PA6 SILABS_DBUS_EUSART1_SCLK(0x0, 0x6) 486 #define EUSART1_SCLK_PA7 SILABS_DBUS_EUSART1_SCLK(0x0, 0x7) 487 #define EUSART1_SCLK_PA8 SILABS_DBUS_EUSART1_SCLK(0x0, 0x8) 488 #define EUSART1_SCLK_PA9 SILABS_DBUS_EUSART1_SCLK(0x0, 0x9) 489 #define EUSART1_SCLK_PB0 SILABS_DBUS_EUSART1_SCLK(0x1, 0x0) 490 #define EUSART1_SCLK_PB1 SILABS_DBUS_EUSART1_SCLK(0x1, 0x1) 491 #define EUSART1_SCLK_PB2 SILABS_DBUS_EUSART1_SCLK(0x1, 0x2) 492 #define EUSART1_SCLK_PB3 SILABS_DBUS_EUSART1_SCLK(0x1, 0x3) 493 #define EUSART1_SCLK_PB4 SILABS_DBUS_EUSART1_SCLK(0x1, 0x4) 494 #define EUSART1_SCLK_PB5 SILABS_DBUS_EUSART1_SCLK(0x1, 0x5) 495 #define EUSART1_SCLK_PC0 SILABS_DBUS_EUSART1_SCLK(0x2, 0x0) 496 #define EUSART1_SCLK_PC1 SILABS_DBUS_EUSART1_SCLK(0x2, 0x1) 497 #define EUSART1_SCLK_PC2 SILABS_DBUS_EUSART1_SCLK(0x2, 0x2) 498 #define EUSART1_SCLK_PC3 SILABS_DBUS_EUSART1_SCLK(0x2, 0x3) 499 #define EUSART1_SCLK_PC4 SILABS_DBUS_EUSART1_SCLK(0x2, 0x4) 500 #define EUSART1_SCLK_PC5 SILABS_DBUS_EUSART1_SCLK(0x2, 0x5) 501 #define EUSART1_SCLK_PC6 SILABS_DBUS_EUSART1_SCLK(0x2, 0x6) 502 #define EUSART1_SCLK_PC7 SILABS_DBUS_EUSART1_SCLK(0x2, 0x7) 503 #define EUSART1_SCLK_PC8 SILABS_DBUS_EUSART1_SCLK(0x2, 0x8) 504 #define EUSART1_SCLK_PC9 SILABS_DBUS_EUSART1_SCLK(0x2, 0x9) 505 #define EUSART1_SCLK_PD0 SILABS_DBUS_EUSART1_SCLK(0x3, 0x0) 506 #define EUSART1_SCLK_PD1 SILABS_DBUS_EUSART1_SCLK(0x3, 0x1) 507 #define EUSART1_SCLK_PD2 SILABS_DBUS_EUSART1_SCLK(0x3, 0x2) 508 #define EUSART1_SCLK_PD3 SILABS_DBUS_EUSART1_SCLK(0x3, 0x3) 509 #define EUSART1_SCLK_PD4 SILABS_DBUS_EUSART1_SCLK(0x3, 0x4) 510 #define EUSART1_SCLK_PD5 SILABS_DBUS_EUSART1_SCLK(0x3, 0x5) 511 #define EUSART1_TX_PA0 SILABS_DBUS_EUSART1_TX(0x0, 0x0) 512 #define EUSART1_TX_PA1 SILABS_DBUS_EUSART1_TX(0x0, 0x1) 513 #define EUSART1_TX_PA2 SILABS_DBUS_EUSART1_TX(0x0, 0x2) 514 #define EUSART1_TX_PA3 SILABS_DBUS_EUSART1_TX(0x0, 0x3) 515 #define EUSART1_TX_PA4 SILABS_DBUS_EUSART1_TX(0x0, 0x4) 516 #define EUSART1_TX_PA5 SILABS_DBUS_EUSART1_TX(0x0, 0x5) 517 #define EUSART1_TX_PA6 SILABS_DBUS_EUSART1_TX(0x0, 0x6) 518 #define EUSART1_TX_PA7 SILABS_DBUS_EUSART1_TX(0x0, 0x7) 519 #define EUSART1_TX_PA8 SILABS_DBUS_EUSART1_TX(0x0, 0x8) 520 #define EUSART1_TX_PA9 SILABS_DBUS_EUSART1_TX(0x0, 0x9) 521 #define EUSART1_TX_PB0 SILABS_DBUS_EUSART1_TX(0x1, 0x0) 522 #define EUSART1_TX_PB1 SILABS_DBUS_EUSART1_TX(0x1, 0x1) 523 #define EUSART1_TX_PB2 SILABS_DBUS_EUSART1_TX(0x1, 0x2) 524 #define EUSART1_TX_PB3 SILABS_DBUS_EUSART1_TX(0x1, 0x3) 525 #define EUSART1_TX_PB4 SILABS_DBUS_EUSART1_TX(0x1, 0x4) 526 #define EUSART1_TX_PB5 SILABS_DBUS_EUSART1_TX(0x1, 0x5) 527 #define EUSART1_TX_PC0 SILABS_DBUS_EUSART1_TX(0x2, 0x0) 528 #define EUSART1_TX_PC1 SILABS_DBUS_EUSART1_TX(0x2, 0x1) 529 #define EUSART1_TX_PC2 SILABS_DBUS_EUSART1_TX(0x2, 0x2) 530 #define EUSART1_TX_PC3 SILABS_DBUS_EUSART1_TX(0x2, 0x3) 531 #define EUSART1_TX_PC4 SILABS_DBUS_EUSART1_TX(0x2, 0x4) 532 #define EUSART1_TX_PC5 SILABS_DBUS_EUSART1_TX(0x2, 0x5) 533 #define EUSART1_TX_PC6 SILABS_DBUS_EUSART1_TX(0x2, 0x6) 534 #define EUSART1_TX_PC7 SILABS_DBUS_EUSART1_TX(0x2, 0x7) 535 #define EUSART1_TX_PC8 SILABS_DBUS_EUSART1_TX(0x2, 0x8) 536 #define EUSART1_TX_PC9 SILABS_DBUS_EUSART1_TX(0x2, 0x9) 537 #define EUSART1_TX_PD0 SILABS_DBUS_EUSART1_TX(0x3, 0x0) 538 #define EUSART1_TX_PD1 SILABS_DBUS_EUSART1_TX(0x3, 0x1) 539 #define EUSART1_TX_PD2 SILABS_DBUS_EUSART1_TX(0x3, 0x2) 540 #define EUSART1_TX_PD3 SILABS_DBUS_EUSART1_TX(0x3, 0x3) 541 #define EUSART1_TX_PD4 SILABS_DBUS_EUSART1_TX(0x3, 0x4) 542 #define EUSART1_TX_PD5 SILABS_DBUS_EUSART1_TX(0x3, 0x5) 543 #define EUSART1_CTS_PA0 SILABS_DBUS_EUSART1_CTS(0x0, 0x0) 544 #define EUSART1_CTS_PA1 SILABS_DBUS_EUSART1_CTS(0x0, 0x1) 545 #define EUSART1_CTS_PA2 SILABS_DBUS_EUSART1_CTS(0x0, 0x2) 546 #define EUSART1_CTS_PA3 SILABS_DBUS_EUSART1_CTS(0x0, 0x3) 547 #define EUSART1_CTS_PA4 SILABS_DBUS_EUSART1_CTS(0x0, 0x4) 548 #define EUSART1_CTS_PA5 SILABS_DBUS_EUSART1_CTS(0x0, 0x5) 549 #define EUSART1_CTS_PA6 SILABS_DBUS_EUSART1_CTS(0x0, 0x6) 550 #define EUSART1_CTS_PA7 SILABS_DBUS_EUSART1_CTS(0x0, 0x7) 551 #define EUSART1_CTS_PA8 SILABS_DBUS_EUSART1_CTS(0x0, 0x8) 552 #define EUSART1_CTS_PA9 SILABS_DBUS_EUSART1_CTS(0x0, 0x9) 553 #define EUSART1_CTS_PB0 SILABS_DBUS_EUSART1_CTS(0x1, 0x0) 554 #define EUSART1_CTS_PB1 SILABS_DBUS_EUSART1_CTS(0x1, 0x1) 555 #define EUSART1_CTS_PB2 SILABS_DBUS_EUSART1_CTS(0x1, 0x2) 556 #define EUSART1_CTS_PB3 SILABS_DBUS_EUSART1_CTS(0x1, 0x3) 557 #define EUSART1_CTS_PB4 SILABS_DBUS_EUSART1_CTS(0x1, 0x4) 558 #define EUSART1_CTS_PB5 SILABS_DBUS_EUSART1_CTS(0x1, 0x5) 559 #define EUSART1_CTS_PC0 SILABS_DBUS_EUSART1_CTS(0x2, 0x0) 560 #define EUSART1_CTS_PC1 SILABS_DBUS_EUSART1_CTS(0x2, 0x1) 561 #define EUSART1_CTS_PC2 SILABS_DBUS_EUSART1_CTS(0x2, 0x2) 562 #define EUSART1_CTS_PC3 SILABS_DBUS_EUSART1_CTS(0x2, 0x3) 563 #define EUSART1_CTS_PC4 SILABS_DBUS_EUSART1_CTS(0x2, 0x4) 564 #define EUSART1_CTS_PC5 SILABS_DBUS_EUSART1_CTS(0x2, 0x5) 565 #define EUSART1_CTS_PC6 SILABS_DBUS_EUSART1_CTS(0x2, 0x6) 566 #define EUSART1_CTS_PC7 SILABS_DBUS_EUSART1_CTS(0x2, 0x7) 567 #define EUSART1_CTS_PC8 SILABS_DBUS_EUSART1_CTS(0x2, 0x8) 568 #define EUSART1_CTS_PC9 SILABS_DBUS_EUSART1_CTS(0x2, 0x9) 569 #define EUSART1_CTS_PD0 SILABS_DBUS_EUSART1_CTS(0x3, 0x0) 570 #define EUSART1_CTS_PD1 SILABS_DBUS_EUSART1_CTS(0x3, 0x1) 571 #define EUSART1_CTS_PD2 SILABS_DBUS_EUSART1_CTS(0x3, 0x2) 572 #define EUSART1_CTS_PD3 SILABS_DBUS_EUSART1_CTS(0x3, 0x3) 573 #define EUSART1_CTS_PD4 SILABS_DBUS_EUSART1_CTS(0x3, 0x4) 574 #define EUSART1_CTS_PD5 SILABS_DBUS_EUSART1_CTS(0x3, 0x5) 575 576 #define PTI_DCLK_PC0 SILABS_DBUS_PTI_DCLK(0x2, 0x0) 577 #define PTI_DCLK_PC1 SILABS_DBUS_PTI_DCLK(0x2, 0x1) 578 #define PTI_DCLK_PC2 SILABS_DBUS_PTI_DCLK(0x2, 0x2) 579 #define PTI_DCLK_PC3 SILABS_DBUS_PTI_DCLK(0x2, 0x3) 580 #define PTI_DCLK_PC4 SILABS_DBUS_PTI_DCLK(0x2, 0x4) 581 #define PTI_DCLK_PC5 SILABS_DBUS_PTI_DCLK(0x2, 0x5) 582 #define PTI_DCLK_PC6 SILABS_DBUS_PTI_DCLK(0x2, 0x6) 583 #define PTI_DCLK_PC7 SILABS_DBUS_PTI_DCLK(0x2, 0x7) 584 #define PTI_DCLK_PC8 SILABS_DBUS_PTI_DCLK(0x2, 0x8) 585 #define PTI_DCLK_PC9 SILABS_DBUS_PTI_DCLK(0x2, 0x9) 586 #define PTI_DCLK_PD0 SILABS_DBUS_PTI_DCLK(0x3, 0x0) 587 #define PTI_DCLK_PD1 SILABS_DBUS_PTI_DCLK(0x3, 0x1) 588 #define PTI_DCLK_PD2 SILABS_DBUS_PTI_DCLK(0x3, 0x2) 589 #define PTI_DCLK_PD3 SILABS_DBUS_PTI_DCLK(0x3, 0x3) 590 #define PTI_DCLK_PD4 SILABS_DBUS_PTI_DCLK(0x3, 0x4) 591 #define PTI_DCLK_PD5 SILABS_DBUS_PTI_DCLK(0x3, 0x5) 592 #define PTI_DFRAME_PC0 SILABS_DBUS_PTI_DFRAME(0x2, 0x0) 593 #define PTI_DFRAME_PC1 SILABS_DBUS_PTI_DFRAME(0x2, 0x1) 594 #define PTI_DFRAME_PC2 SILABS_DBUS_PTI_DFRAME(0x2, 0x2) 595 #define PTI_DFRAME_PC3 SILABS_DBUS_PTI_DFRAME(0x2, 0x3) 596 #define PTI_DFRAME_PC4 SILABS_DBUS_PTI_DFRAME(0x2, 0x4) 597 #define PTI_DFRAME_PC5 SILABS_DBUS_PTI_DFRAME(0x2, 0x5) 598 #define PTI_DFRAME_PC6 SILABS_DBUS_PTI_DFRAME(0x2, 0x6) 599 #define PTI_DFRAME_PC7 SILABS_DBUS_PTI_DFRAME(0x2, 0x7) 600 #define PTI_DFRAME_PC8 SILABS_DBUS_PTI_DFRAME(0x2, 0x8) 601 #define PTI_DFRAME_PC9 SILABS_DBUS_PTI_DFRAME(0x2, 0x9) 602 #define PTI_DFRAME_PD0 SILABS_DBUS_PTI_DFRAME(0x3, 0x0) 603 #define PTI_DFRAME_PD1 SILABS_DBUS_PTI_DFRAME(0x3, 0x1) 604 #define PTI_DFRAME_PD2 SILABS_DBUS_PTI_DFRAME(0x3, 0x2) 605 #define PTI_DFRAME_PD3 SILABS_DBUS_PTI_DFRAME(0x3, 0x3) 606 #define PTI_DFRAME_PD4 SILABS_DBUS_PTI_DFRAME(0x3, 0x4) 607 #define PTI_DFRAME_PD5 SILABS_DBUS_PTI_DFRAME(0x3, 0x5) 608 #define PTI_DOUT_PC0 SILABS_DBUS_PTI_DOUT(0x2, 0x0) 609 #define PTI_DOUT_PC1 SILABS_DBUS_PTI_DOUT(0x2, 0x1) 610 #define PTI_DOUT_PC2 SILABS_DBUS_PTI_DOUT(0x2, 0x2) 611 #define PTI_DOUT_PC3 SILABS_DBUS_PTI_DOUT(0x2, 0x3) 612 #define PTI_DOUT_PC4 SILABS_DBUS_PTI_DOUT(0x2, 0x4) 613 #define PTI_DOUT_PC5 SILABS_DBUS_PTI_DOUT(0x2, 0x5) 614 #define PTI_DOUT_PC6 SILABS_DBUS_PTI_DOUT(0x2, 0x6) 615 #define PTI_DOUT_PC7 SILABS_DBUS_PTI_DOUT(0x2, 0x7) 616 #define PTI_DOUT_PC8 SILABS_DBUS_PTI_DOUT(0x2, 0x8) 617 #define PTI_DOUT_PC9 SILABS_DBUS_PTI_DOUT(0x2, 0x9) 618 #define PTI_DOUT_PD0 SILABS_DBUS_PTI_DOUT(0x3, 0x0) 619 #define PTI_DOUT_PD1 SILABS_DBUS_PTI_DOUT(0x3, 0x1) 620 #define PTI_DOUT_PD2 SILABS_DBUS_PTI_DOUT(0x3, 0x2) 621 #define PTI_DOUT_PD3 SILABS_DBUS_PTI_DOUT(0x3, 0x3) 622 #define PTI_DOUT_PD4 SILABS_DBUS_PTI_DOUT(0x3, 0x4) 623 #define PTI_DOUT_PD5 SILABS_DBUS_PTI_DOUT(0x3, 0x5) 624 625 #define I2C0_SCL_PA0 SILABS_DBUS_I2C0_SCL(0x0, 0x0) 626 #define I2C0_SCL_PA1 SILABS_DBUS_I2C0_SCL(0x0, 0x1) 627 #define I2C0_SCL_PA2 SILABS_DBUS_I2C0_SCL(0x0, 0x2) 628 #define I2C0_SCL_PA3 SILABS_DBUS_I2C0_SCL(0x0, 0x3) 629 #define I2C0_SCL_PA4 SILABS_DBUS_I2C0_SCL(0x0, 0x4) 630 #define I2C0_SCL_PA5 SILABS_DBUS_I2C0_SCL(0x0, 0x5) 631 #define I2C0_SCL_PA6 SILABS_DBUS_I2C0_SCL(0x0, 0x6) 632 #define I2C0_SCL_PA7 SILABS_DBUS_I2C0_SCL(0x0, 0x7) 633 #define I2C0_SCL_PA8 SILABS_DBUS_I2C0_SCL(0x0, 0x8) 634 #define I2C0_SCL_PA9 SILABS_DBUS_I2C0_SCL(0x0, 0x9) 635 #define I2C0_SCL_PB0 SILABS_DBUS_I2C0_SCL(0x1, 0x0) 636 #define I2C0_SCL_PB1 SILABS_DBUS_I2C0_SCL(0x1, 0x1) 637 #define I2C0_SCL_PB2 SILABS_DBUS_I2C0_SCL(0x1, 0x2) 638 #define I2C0_SCL_PB3 SILABS_DBUS_I2C0_SCL(0x1, 0x3) 639 #define I2C0_SCL_PB4 SILABS_DBUS_I2C0_SCL(0x1, 0x4) 640 #define I2C0_SCL_PB5 SILABS_DBUS_I2C0_SCL(0x1, 0x5) 641 #define I2C0_SCL_PC0 SILABS_DBUS_I2C0_SCL(0x2, 0x0) 642 #define I2C0_SCL_PC1 SILABS_DBUS_I2C0_SCL(0x2, 0x1) 643 #define I2C0_SCL_PC2 SILABS_DBUS_I2C0_SCL(0x2, 0x2) 644 #define I2C0_SCL_PC3 SILABS_DBUS_I2C0_SCL(0x2, 0x3) 645 #define I2C0_SCL_PC4 SILABS_DBUS_I2C0_SCL(0x2, 0x4) 646 #define I2C0_SCL_PC5 SILABS_DBUS_I2C0_SCL(0x2, 0x5) 647 #define I2C0_SCL_PC6 SILABS_DBUS_I2C0_SCL(0x2, 0x6) 648 #define I2C0_SCL_PC7 SILABS_DBUS_I2C0_SCL(0x2, 0x7) 649 #define I2C0_SCL_PC8 SILABS_DBUS_I2C0_SCL(0x2, 0x8) 650 #define I2C0_SCL_PC9 SILABS_DBUS_I2C0_SCL(0x2, 0x9) 651 #define I2C0_SCL_PD0 SILABS_DBUS_I2C0_SCL(0x3, 0x0) 652 #define I2C0_SCL_PD1 SILABS_DBUS_I2C0_SCL(0x3, 0x1) 653 #define I2C0_SCL_PD2 SILABS_DBUS_I2C0_SCL(0x3, 0x2) 654 #define I2C0_SCL_PD3 SILABS_DBUS_I2C0_SCL(0x3, 0x3) 655 #define I2C0_SCL_PD4 SILABS_DBUS_I2C0_SCL(0x3, 0x4) 656 #define I2C0_SCL_PD5 SILABS_DBUS_I2C0_SCL(0x3, 0x5) 657 #define I2C0_SDA_PA0 SILABS_DBUS_I2C0_SDA(0x0, 0x0) 658 #define I2C0_SDA_PA1 SILABS_DBUS_I2C0_SDA(0x0, 0x1) 659 #define I2C0_SDA_PA2 SILABS_DBUS_I2C0_SDA(0x0, 0x2) 660 #define I2C0_SDA_PA3 SILABS_DBUS_I2C0_SDA(0x0, 0x3) 661 #define I2C0_SDA_PA4 SILABS_DBUS_I2C0_SDA(0x0, 0x4) 662 #define I2C0_SDA_PA5 SILABS_DBUS_I2C0_SDA(0x0, 0x5) 663 #define I2C0_SDA_PA6 SILABS_DBUS_I2C0_SDA(0x0, 0x6) 664 #define I2C0_SDA_PA7 SILABS_DBUS_I2C0_SDA(0x0, 0x7) 665 #define I2C0_SDA_PA8 SILABS_DBUS_I2C0_SDA(0x0, 0x8) 666 #define I2C0_SDA_PA9 SILABS_DBUS_I2C0_SDA(0x0, 0x9) 667 #define I2C0_SDA_PB0 SILABS_DBUS_I2C0_SDA(0x1, 0x0) 668 #define I2C0_SDA_PB1 SILABS_DBUS_I2C0_SDA(0x1, 0x1) 669 #define I2C0_SDA_PB2 SILABS_DBUS_I2C0_SDA(0x1, 0x2) 670 #define I2C0_SDA_PB3 SILABS_DBUS_I2C0_SDA(0x1, 0x3) 671 #define I2C0_SDA_PB4 SILABS_DBUS_I2C0_SDA(0x1, 0x4) 672 #define I2C0_SDA_PB5 SILABS_DBUS_I2C0_SDA(0x1, 0x5) 673 #define I2C0_SDA_PC0 SILABS_DBUS_I2C0_SDA(0x2, 0x0) 674 #define I2C0_SDA_PC1 SILABS_DBUS_I2C0_SDA(0x2, 0x1) 675 #define I2C0_SDA_PC2 SILABS_DBUS_I2C0_SDA(0x2, 0x2) 676 #define I2C0_SDA_PC3 SILABS_DBUS_I2C0_SDA(0x2, 0x3) 677 #define I2C0_SDA_PC4 SILABS_DBUS_I2C0_SDA(0x2, 0x4) 678 #define I2C0_SDA_PC5 SILABS_DBUS_I2C0_SDA(0x2, 0x5) 679 #define I2C0_SDA_PC6 SILABS_DBUS_I2C0_SDA(0x2, 0x6) 680 #define I2C0_SDA_PC7 SILABS_DBUS_I2C0_SDA(0x2, 0x7) 681 #define I2C0_SDA_PC8 SILABS_DBUS_I2C0_SDA(0x2, 0x8) 682 #define I2C0_SDA_PC9 SILABS_DBUS_I2C0_SDA(0x2, 0x9) 683 #define I2C0_SDA_PD0 SILABS_DBUS_I2C0_SDA(0x3, 0x0) 684 #define I2C0_SDA_PD1 SILABS_DBUS_I2C0_SDA(0x3, 0x1) 685 #define I2C0_SDA_PD2 SILABS_DBUS_I2C0_SDA(0x3, 0x2) 686 #define I2C0_SDA_PD3 SILABS_DBUS_I2C0_SDA(0x3, 0x3) 687 #define I2C0_SDA_PD4 SILABS_DBUS_I2C0_SDA(0x3, 0x4) 688 #define I2C0_SDA_PD5 SILABS_DBUS_I2C0_SDA(0x3, 0x5) 689 690 #define I2C1_SCL_PC0 SILABS_DBUS_I2C1_SCL(0x2, 0x0) 691 #define I2C1_SCL_PC1 SILABS_DBUS_I2C1_SCL(0x2, 0x1) 692 #define I2C1_SCL_PC2 SILABS_DBUS_I2C1_SCL(0x2, 0x2) 693 #define I2C1_SCL_PC3 SILABS_DBUS_I2C1_SCL(0x2, 0x3) 694 #define I2C1_SCL_PC4 SILABS_DBUS_I2C1_SCL(0x2, 0x4) 695 #define I2C1_SCL_PC5 SILABS_DBUS_I2C1_SCL(0x2, 0x5) 696 #define I2C1_SCL_PC6 SILABS_DBUS_I2C1_SCL(0x2, 0x6) 697 #define I2C1_SCL_PC7 SILABS_DBUS_I2C1_SCL(0x2, 0x7) 698 #define I2C1_SCL_PC8 SILABS_DBUS_I2C1_SCL(0x2, 0x8) 699 #define I2C1_SCL_PC9 SILABS_DBUS_I2C1_SCL(0x2, 0x9) 700 #define I2C1_SCL_PD0 SILABS_DBUS_I2C1_SCL(0x3, 0x0) 701 #define I2C1_SCL_PD1 SILABS_DBUS_I2C1_SCL(0x3, 0x1) 702 #define I2C1_SCL_PD2 SILABS_DBUS_I2C1_SCL(0x3, 0x2) 703 #define I2C1_SCL_PD3 SILABS_DBUS_I2C1_SCL(0x3, 0x3) 704 #define I2C1_SCL_PD4 SILABS_DBUS_I2C1_SCL(0x3, 0x4) 705 #define I2C1_SCL_PD5 SILABS_DBUS_I2C1_SCL(0x3, 0x5) 706 #define I2C1_SDA_PC0 SILABS_DBUS_I2C1_SDA(0x2, 0x0) 707 #define I2C1_SDA_PC1 SILABS_DBUS_I2C1_SDA(0x2, 0x1) 708 #define I2C1_SDA_PC2 SILABS_DBUS_I2C1_SDA(0x2, 0x2) 709 #define I2C1_SDA_PC3 SILABS_DBUS_I2C1_SDA(0x2, 0x3) 710 #define I2C1_SDA_PC4 SILABS_DBUS_I2C1_SDA(0x2, 0x4) 711 #define I2C1_SDA_PC5 SILABS_DBUS_I2C1_SDA(0x2, 0x5) 712 #define I2C1_SDA_PC6 SILABS_DBUS_I2C1_SDA(0x2, 0x6) 713 #define I2C1_SDA_PC7 SILABS_DBUS_I2C1_SDA(0x2, 0x7) 714 #define I2C1_SDA_PC8 SILABS_DBUS_I2C1_SDA(0x2, 0x8) 715 #define I2C1_SDA_PC9 SILABS_DBUS_I2C1_SDA(0x2, 0x9) 716 #define I2C1_SDA_PD0 SILABS_DBUS_I2C1_SDA(0x3, 0x0) 717 #define I2C1_SDA_PD1 SILABS_DBUS_I2C1_SDA(0x3, 0x1) 718 #define I2C1_SDA_PD2 SILABS_DBUS_I2C1_SDA(0x3, 0x2) 719 #define I2C1_SDA_PD3 SILABS_DBUS_I2C1_SDA(0x3, 0x3) 720 #define I2C1_SDA_PD4 SILABS_DBUS_I2C1_SDA(0x3, 0x4) 721 #define I2C1_SDA_PD5 SILABS_DBUS_I2C1_SDA(0x3, 0x5) 722 723 #define KEYSCAN_COLOUT0_PA0 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x0) 724 #define KEYSCAN_COLOUT0_PA1 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x1) 725 #define KEYSCAN_COLOUT0_PA2 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x2) 726 #define KEYSCAN_COLOUT0_PA3 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x3) 727 #define KEYSCAN_COLOUT0_PA4 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x4) 728 #define KEYSCAN_COLOUT0_PA5 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x5) 729 #define KEYSCAN_COLOUT0_PA6 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x6) 730 #define KEYSCAN_COLOUT0_PA7 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x7) 731 #define KEYSCAN_COLOUT0_PA8 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x8) 732 #define KEYSCAN_COLOUT0_PA9 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x9) 733 #define KEYSCAN_COLOUT0_PB0 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x0) 734 #define KEYSCAN_COLOUT0_PB1 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x1) 735 #define KEYSCAN_COLOUT0_PB2 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x2) 736 #define KEYSCAN_COLOUT0_PB3 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x3) 737 #define KEYSCAN_COLOUT0_PB4 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x4) 738 #define KEYSCAN_COLOUT0_PB5 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x5) 739 #define KEYSCAN_COLOUT0_PC0 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x0) 740 #define KEYSCAN_COLOUT0_PC1 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x1) 741 #define KEYSCAN_COLOUT0_PC2 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x2) 742 #define KEYSCAN_COLOUT0_PC3 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x3) 743 #define KEYSCAN_COLOUT0_PC4 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x4) 744 #define KEYSCAN_COLOUT0_PC5 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x5) 745 #define KEYSCAN_COLOUT0_PC6 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x6) 746 #define KEYSCAN_COLOUT0_PC7 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x7) 747 #define KEYSCAN_COLOUT0_PC8 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x8) 748 #define KEYSCAN_COLOUT0_PC9 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x9) 749 #define KEYSCAN_COLOUT0_PD0 SILABS_DBUS_KEYSCAN_COLOUT0(0x3, 0x0) 750 #define KEYSCAN_COLOUT0_PD1 SILABS_DBUS_KEYSCAN_COLOUT0(0x3, 0x1) 751 #define KEYSCAN_COLOUT0_PD2 SILABS_DBUS_KEYSCAN_COLOUT0(0x3, 0x2) 752 #define KEYSCAN_COLOUT0_PD3 SILABS_DBUS_KEYSCAN_COLOUT0(0x3, 0x3) 753 #define KEYSCAN_COLOUT0_PD4 SILABS_DBUS_KEYSCAN_COLOUT0(0x3, 0x4) 754 #define KEYSCAN_COLOUT0_PD5 SILABS_DBUS_KEYSCAN_COLOUT0(0x3, 0x5) 755 #define KEYSCAN_COLOUT1_PA0 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x0) 756 #define KEYSCAN_COLOUT1_PA1 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x1) 757 #define KEYSCAN_COLOUT1_PA2 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x2) 758 #define KEYSCAN_COLOUT1_PA3 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x3) 759 #define KEYSCAN_COLOUT1_PA4 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x4) 760 #define KEYSCAN_COLOUT1_PA5 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x5) 761 #define KEYSCAN_COLOUT1_PA6 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x6) 762 #define KEYSCAN_COLOUT1_PA7 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x7) 763 #define KEYSCAN_COLOUT1_PA8 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x8) 764 #define KEYSCAN_COLOUT1_PA9 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x9) 765 #define KEYSCAN_COLOUT1_PB0 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x0) 766 #define KEYSCAN_COLOUT1_PB1 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x1) 767 #define KEYSCAN_COLOUT1_PB2 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x2) 768 #define KEYSCAN_COLOUT1_PB3 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x3) 769 #define KEYSCAN_COLOUT1_PB4 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x4) 770 #define KEYSCAN_COLOUT1_PB5 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x5) 771 #define KEYSCAN_COLOUT1_PC0 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x0) 772 #define KEYSCAN_COLOUT1_PC1 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x1) 773 #define KEYSCAN_COLOUT1_PC2 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x2) 774 #define KEYSCAN_COLOUT1_PC3 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x3) 775 #define KEYSCAN_COLOUT1_PC4 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x4) 776 #define KEYSCAN_COLOUT1_PC5 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x5) 777 #define KEYSCAN_COLOUT1_PC6 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x6) 778 #define KEYSCAN_COLOUT1_PC7 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x7) 779 #define KEYSCAN_COLOUT1_PC8 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x8) 780 #define KEYSCAN_COLOUT1_PC9 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x9) 781 #define KEYSCAN_COLOUT1_PD0 SILABS_DBUS_KEYSCAN_COLOUT1(0x3, 0x0) 782 #define KEYSCAN_COLOUT1_PD1 SILABS_DBUS_KEYSCAN_COLOUT1(0x3, 0x1) 783 #define KEYSCAN_COLOUT1_PD2 SILABS_DBUS_KEYSCAN_COLOUT1(0x3, 0x2) 784 #define KEYSCAN_COLOUT1_PD3 SILABS_DBUS_KEYSCAN_COLOUT1(0x3, 0x3) 785 #define KEYSCAN_COLOUT1_PD4 SILABS_DBUS_KEYSCAN_COLOUT1(0x3, 0x4) 786 #define KEYSCAN_COLOUT1_PD5 SILABS_DBUS_KEYSCAN_COLOUT1(0x3, 0x5) 787 #define KEYSCAN_COLOUT2_PA0 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x0) 788 #define KEYSCAN_COLOUT2_PA1 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x1) 789 #define KEYSCAN_COLOUT2_PA2 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x2) 790 #define KEYSCAN_COLOUT2_PA3 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x3) 791 #define KEYSCAN_COLOUT2_PA4 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x4) 792 #define KEYSCAN_COLOUT2_PA5 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x5) 793 #define KEYSCAN_COLOUT2_PA6 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x6) 794 #define KEYSCAN_COLOUT2_PA7 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x7) 795 #define KEYSCAN_COLOUT2_PA8 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x8) 796 #define KEYSCAN_COLOUT2_PA9 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x9) 797 #define KEYSCAN_COLOUT2_PB0 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x0) 798 #define KEYSCAN_COLOUT2_PB1 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x1) 799 #define KEYSCAN_COLOUT2_PB2 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x2) 800 #define KEYSCAN_COLOUT2_PB3 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x3) 801 #define KEYSCAN_COLOUT2_PB4 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x4) 802 #define KEYSCAN_COLOUT2_PB5 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x5) 803 #define KEYSCAN_COLOUT2_PC0 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x0) 804 #define KEYSCAN_COLOUT2_PC1 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x1) 805 #define KEYSCAN_COLOUT2_PC2 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x2) 806 #define KEYSCAN_COLOUT2_PC3 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x3) 807 #define KEYSCAN_COLOUT2_PC4 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x4) 808 #define KEYSCAN_COLOUT2_PC5 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x5) 809 #define KEYSCAN_COLOUT2_PC6 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x6) 810 #define KEYSCAN_COLOUT2_PC7 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x7) 811 #define KEYSCAN_COLOUT2_PC8 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x8) 812 #define KEYSCAN_COLOUT2_PC9 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x9) 813 #define KEYSCAN_COLOUT2_PD0 SILABS_DBUS_KEYSCAN_COLOUT2(0x3, 0x0) 814 #define KEYSCAN_COLOUT2_PD1 SILABS_DBUS_KEYSCAN_COLOUT2(0x3, 0x1) 815 #define KEYSCAN_COLOUT2_PD2 SILABS_DBUS_KEYSCAN_COLOUT2(0x3, 0x2) 816 #define KEYSCAN_COLOUT2_PD3 SILABS_DBUS_KEYSCAN_COLOUT2(0x3, 0x3) 817 #define KEYSCAN_COLOUT2_PD4 SILABS_DBUS_KEYSCAN_COLOUT2(0x3, 0x4) 818 #define KEYSCAN_COLOUT2_PD5 SILABS_DBUS_KEYSCAN_COLOUT2(0x3, 0x5) 819 #define KEYSCAN_COLOUT3_PA0 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x0) 820 #define KEYSCAN_COLOUT3_PA1 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x1) 821 #define KEYSCAN_COLOUT3_PA2 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x2) 822 #define KEYSCAN_COLOUT3_PA3 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x3) 823 #define KEYSCAN_COLOUT3_PA4 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x4) 824 #define KEYSCAN_COLOUT3_PA5 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x5) 825 #define KEYSCAN_COLOUT3_PA6 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x6) 826 #define KEYSCAN_COLOUT3_PA7 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x7) 827 #define KEYSCAN_COLOUT3_PA8 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x8) 828 #define KEYSCAN_COLOUT3_PA9 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x9) 829 #define KEYSCAN_COLOUT3_PB0 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x0) 830 #define KEYSCAN_COLOUT3_PB1 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x1) 831 #define KEYSCAN_COLOUT3_PB2 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x2) 832 #define KEYSCAN_COLOUT3_PB3 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x3) 833 #define KEYSCAN_COLOUT3_PB4 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x4) 834 #define KEYSCAN_COLOUT3_PB5 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x5) 835 #define KEYSCAN_COLOUT3_PC0 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x0) 836 #define KEYSCAN_COLOUT3_PC1 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x1) 837 #define KEYSCAN_COLOUT3_PC2 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x2) 838 #define KEYSCAN_COLOUT3_PC3 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x3) 839 #define KEYSCAN_COLOUT3_PC4 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x4) 840 #define KEYSCAN_COLOUT3_PC5 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x5) 841 #define KEYSCAN_COLOUT3_PC6 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x6) 842 #define KEYSCAN_COLOUT3_PC7 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x7) 843 #define KEYSCAN_COLOUT3_PC8 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x8) 844 #define KEYSCAN_COLOUT3_PC9 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x9) 845 #define KEYSCAN_COLOUT3_PD0 SILABS_DBUS_KEYSCAN_COLOUT3(0x3, 0x0) 846 #define KEYSCAN_COLOUT3_PD1 SILABS_DBUS_KEYSCAN_COLOUT3(0x3, 0x1) 847 #define KEYSCAN_COLOUT3_PD2 SILABS_DBUS_KEYSCAN_COLOUT3(0x3, 0x2) 848 #define KEYSCAN_COLOUT3_PD3 SILABS_DBUS_KEYSCAN_COLOUT3(0x3, 0x3) 849 #define KEYSCAN_COLOUT3_PD4 SILABS_DBUS_KEYSCAN_COLOUT3(0x3, 0x4) 850 #define KEYSCAN_COLOUT3_PD5 SILABS_DBUS_KEYSCAN_COLOUT3(0x3, 0x5) 851 #define KEYSCAN_COLOUT4_PA0 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x0) 852 #define KEYSCAN_COLOUT4_PA1 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x1) 853 #define KEYSCAN_COLOUT4_PA2 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x2) 854 #define KEYSCAN_COLOUT4_PA3 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x3) 855 #define KEYSCAN_COLOUT4_PA4 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x4) 856 #define KEYSCAN_COLOUT4_PA5 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x5) 857 #define KEYSCAN_COLOUT4_PA6 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x6) 858 #define KEYSCAN_COLOUT4_PA7 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x7) 859 #define KEYSCAN_COLOUT4_PA8 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x8) 860 #define KEYSCAN_COLOUT4_PA9 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x9) 861 #define KEYSCAN_COLOUT4_PB0 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x0) 862 #define KEYSCAN_COLOUT4_PB1 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x1) 863 #define KEYSCAN_COLOUT4_PB2 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x2) 864 #define KEYSCAN_COLOUT4_PB3 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x3) 865 #define KEYSCAN_COLOUT4_PB4 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x4) 866 #define KEYSCAN_COLOUT4_PB5 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x5) 867 #define KEYSCAN_COLOUT4_PC0 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x0) 868 #define KEYSCAN_COLOUT4_PC1 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x1) 869 #define KEYSCAN_COLOUT4_PC2 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x2) 870 #define KEYSCAN_COLOUT4_PC3 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x3) 871 #define KEYSCAN_COLOUT4_PC4 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x4) 872 #define KEYSCAN_COLOUT4_PC5 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x5) 873 #define KEYSCAN_COLOUT4_PC6 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x6) 874 #define KEYSCAN_COLOUT4_PC7 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x7) 875 #define KEYSCAN_COLOUT4_PC8 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x8) 876 #define KEYSCAN_COLOUT4_PC9 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x9) 877 #define KEYSCAN_COLOUT4_PD0 SILABS_DBUS_KEYSCAN_COLOUT4(0x3, 0x0) 878 #define KEYSCAN_COLOUT4_PD1 SILABS_DBUS_KEYSCAN_COLOUT4(0x3, 0x1) 879 #define KEYSCAN_COLOUT4_PD2 SILABS_DBUS_KEYSCAN_COLOUT4(0x3, 0x2) 880 #define KEYSCAN_COLOUT4_PD3 SILABS_DBUS_KEYSCAN_COLOUT4(0x3, 0x3) 881 #define KEYSCAN_COLOUT4_PD4 SILABS_DBUS_KEYSCAN_COLOUT4(0x3, 0x4) 882 #define KEYSCAN_COLOUT4_PD5 SILABS_DBUS_KEYSCAN_COLOUT4(0x3, 0x5) 883 #define KEYSCAN_COLOUT5_PA0 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x0) 884 #define KEYSCAN_COLOUT5_PA1 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x1) 885 #define KEYSCAN_COLOUT5_PA2 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x2) 886 #define KEYSCAN_COLOUT5_PA3 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x3) 887 #define KEYSCAN_COLOUT5_PA4 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x4) 888 #define KEYSCAN_COLOUT5_PA5 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x5) 889 #define KEYSCAN_COLOUT5_PA6 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x6) 890 #define KEYSCAN_COLOUT5_PA7 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x7) 891 #define KEYSCAN_COLOUT5_PA8 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x8) 892 #define KEYSCAN_COLOUT5_PA9 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x9) 893 #define KEYSCAN_COLOUT5_PB0 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x0) 894 #define KEYSCAN_COLOUT5_PB1 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x1) 895 #define KEYSCAN_COLOUT5_PB2 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x2) 896 #define KEYSCAN_COLOUT5_PB3 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x3) 897 #define KEYSCAN_COLOUT5_PB4 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x4) 898 #define KEYSCAN_COLOUT5_PB5 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x5) 899 #define KEYSCAN_COLOUT5_PC0 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x0) 900 #define KEYSCAN_COLOUT5_PC1 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x1) 901 #define KEYSCAN_COLOUT5_PC2 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x2) 902 #define KEYSCAN_COLOUT5_PC3 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x3) 903 #define KEYSCAN_COLOUT5_PC4 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x4) 904 #define KEYSCAN_COLOUT5_PC5 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x5) 905 #define KEYSCAN_COLOUT5_PC6 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x6) 906 #define KEYSCAN_COLOUT5_PC7 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x7) 907 #define KEYSCAN_COLOUT5_PC8 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x8) 908 #define KEYSCAN_COLOUT5_PC9 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x9) 909 #define KEYSCAN_COLOUT5_PD0 SILABS_DBUS_KEYSCAN_COLOUT5(0x3, 0x0) 910 #define KEYSCAN_COLOUT5_PD1 SILABS_DBUS_KEYSCAN_COLOUT5(0x3, 0x1) 911 #define KEYSCAN_COLOUT5_PD2 SILABS_DBUS_KEYSCAN_COLOUT5(0x3, 0x2) 912 #define KEYSCAN_COLOUT5_PD3 SILABS_DBUS_KEYSCAN_COLOUT5(0x3, 0x3) 913 #define KEYSCAN_COLOUT5_PD4 SILABS_DBUS_KEYSCAN_COLOUT5(0x3, 0x4) 914 #define KEYSCAN_COLOUT5_PD5 SILABS_DBUS_KEYSCAN_COLOUT5(0x3, 0x5) 915 #define KEYSCAN_COLOUT6_PA0 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x0) 916 #define KEYSCAN_COLOUT6_PA1 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x1) 917 #define KEYSCAN_COLOUT6_PA2 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x2) 918 #define KEYSCAN_COLOUT6_PA3 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x3) 919 #define KEYSCAN_COLOUT6_PA4 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x4) 920 #define KEYSCAN_COLOUT6_PA5 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x5) 921 #define KEYSCAN_COLOUT6_PA6 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x6) 922 #define KEYSCAN_COLOUT6_PA7 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x7) 923 #define KEYSCAN_COLOUT6_PA8 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x8) 924 #define KEYSCAN_COLOUT6_PA9 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x9) 925 #define KEYSCAN_COLOUT6_PB0 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x0) 926 #define KEYSCAN_COLOUT6_PB1 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x1) 927 #define KEYSCAN_COLOUT6_PB2 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x2) 928 #define KEYSCAN_COLOUT6_PB3 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x3) 929 #define KEYSCAN_COLOUT6_PB4 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x4) 930 #define KEYSCAN_COLOUT6_PB5 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x5) 931 #define KEYSCAN_COLOUT6_PC0 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x0) 932 #define KEYSCAN_COLOUT6_PC1 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x1) 933 #define KEYSCAN_COLOUT6_PC2 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x2) 934 #define KEYSCAN_COLOUT6_PC3 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x3) 935 #define KEYSCAN_COLOUT6_PC4 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x4) 936 #define KEYSCAN_COLOUT6_PC5 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x5) 937 #define KEYSCAN_COLOUT6_PC6 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x6) 938 #define KEYSCAN_COLOUT6_PC7 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x7) 939 #define KEYSCAN_COLOUT6_PC8 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x8) 940 #define KEYSCAN_COLOUT6_PC9 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x9) 941 #define KEYSCAN_COLOUT6_PD0 SILABS_DBUS_KEYSCAN_COLOUT6(0x3, 0x0) 942 #define KEYSCAN_COLOUT6_PD1 SILABS_DBUS_KEYSCAN_COLOUT6(0x3, 0x1) 943 #define KEYSCAN_COLOUT6_PD2 SILABS_DBUS_KEYSCAN_COLOUT6(0x3, 0x2) 944 #define KEYSCAN_COLOUT6_PD3 SILABS_DBUS_KEYSCAN_COLOUT6(0x3, 0x3) 945 #define KEYSCAN_COLOUT6_PD4 SILABS_DBUS_KEYSCAN_COLOUT6(0x3, 0x4) 946 #define KEYSCAN_COLOUT6_PD5 SILABS_DBUS_KEYSCAN_COLOUT6(0x3, 0x5) 947 #define KEYSCAN_COLOUT7_PA0 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x0) 948 #define KEYSCAN_COLOUT7_PA1 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x1) 949 #define KEYSCAN_COLOUT7_PA2 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x2) 950 #define KEYSCAN_COLOUT7_PA3 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x3) 951 #define KEYSCAN_COLOUT7_PA4 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x4) 952 #define KEYSCAN_COLOUT7_PA5 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x5) 953 #define KEYSCAN_COLOUT7_PA6 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x6) 954 #define KEYSCAN_COLOUT7_PA7 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x7) 955 #define KEYSCAN_COLOUT7_PA8 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x8) 956 #define KEYSCAN_COLOUT7_PA9 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x9) 957 #define KEYSCAN_COLOUT7_PB0 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x0) 958 #define KEYSCAN_COLOUT7_PB1 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x1) 959 #define KEYSCAN_COLOUT7_PB2 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x2) 960 #define KEYSCAN_COLOUT7_PB3 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x3) 961 #define KEYSCAN_COLOUT7_PB4 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x4) 962 #define KEYSCAN_COLOUT7_PB5 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x5) 963 #define KEYSCAN_COLOUT7_PC0 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x0) 964 #define KEYSCAN_COLOUT7_PC1 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x1) 965 #define KEYSCAN_COLOUT7_PC2 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x2) 966 #define KEYSCAN_COLOUT7_PC3 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x3) 967 #define KEYSCAN_COLOUT7_PC4 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x4) 968 #define KEYSCAN_COLOUT7_PC5 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x5) 969 #define KEYSCAN_COLOUT7_PC6 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x6) 970 #define KEYSCAN_COLOUT7_PC7 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x7) 971 #define KEYSCAN_COLOUT7_PC8 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x8) 972 #define KEYSCAN_COLOUT7_PC9 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x9) 973 #define KEYSCAN_COLOUT7_PD0 SILABS_DBUS_KEYSCAN_COLOUT7(0x3, 0x0) 974 #define KEYSCAN_COLOUT7_PD1 SILABS_DBUS_KEYSCAN_COLOUT7(0x3, 0x1) 975 #define KEYSCAN_COLOUT7_PD2 SILABS_DBUS_KEYSCAN_COLOUT7(0x3, 0x2) 976 #define KEYSCAN_COLOUT7_PD3 SILABS_DBUS_KEYSCAN_COLOUT7(0x3, 0x3) 977 #define KEYSCAN_COLOUT7_PD4 SILABS_DBUS_KEYSCAN_COLOUT7(0x3, 0x4) 978 #define KEYSCAN_COLOUT7_PD5 SILABS_DBUS_KEYSCAN_COLOUT7(0x3, 0x5) 979 #define KEYSCAN_ROWSENSE0_PA0 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x0) 980 #define KEYSCAN_ROWSENSE0_PA1 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x1) 981 #define KEYSCAN_ROWSENSE0_PA2 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x2) 982 #define KEYSCAN_ROWSENSE0_PA3 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x3) 983 #define KEYSCAN_ROWSENSE0_PA4 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x4) 984 #define KEYSCAN_ROWSENSE0_PA5 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x5) 985 #define KEYSCAN_ROWSENSE0_PA6 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x6) 986 #define KEYSCAN_ROWSENSE0_PA7 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x7) 987 #define KEYSCAN_ROWSENSE0_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x8) 988 #define KEYSCAN_ROWSENSE0_PA9 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x9) 989 #define KEYSCAN_ROWSENSE0_PB0 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x0) 990 #define KEYSCAN_ROWSENSE0_PB1 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x1) 991 #define KEYSCAN_ROWSENSE0_PB2 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x2) 992 #define KEYSCAN_ROWSENSE0_PB3 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x3) 993 #define KEYSCAN_ROWSENSE0_PB4 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x4) 994 #define KEYSCAN_ROWSENSE0_PB5 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x5) 995 #define KEYSCAN_ROWSENSE1_PA0 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x0) 996 #define KEYSCAN_ROWSENSE1_PA1 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x1) 997 #define KEYSCAN_ROWSENSE1_PA2 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x2) 998 #define KEYSCAN_ROWSENSE1_PA3 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x3) 999 #define KEYSCAN_ROWSENSE1_PA4 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x4) 1000 #define KEYSCAN_ROWSENSE1_PA5 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x5) 1001 #define KEYSCAN_ROWSENSE1_PA6 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x6) 1002 #define KEYSCAN_ROWSENSE1_PA7 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x7) 1003 #define KEYSCAN_ROWSENSE1_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x8) 1004 #define KEYSCAN_ROWSENSE1_PA9 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x9) 1005 #define KEYSCAN_ROWSENSE1_PB0 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x0) 1006 #define KEYSCAN_ROWSENSE1_PB1 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x1) 1007 #define KEYSCAN_ROWSENSE1_PB2 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x2) 1008 #define KEYSCAN_ROWSENSE1_PB3 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x3) 1009 #define KEYSCAN_ROWSENSE1_PB4 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x4) 1010 #define KEYSCAN_ROWSENSE1_PB5 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x5) 1011 #define KEYSCAN_ROWSENSE2_PA0 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x0) 1012 #define KEYSCAN_ROWSENSE2_PA1 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x1) 1013 #define KEYSCAN_ROWSENSE2_PA2 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x2) 1014 #define KEYSCAN_ROWSENSE2_PA3 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x3) 1015 #define KEYSCAN_ROWSENSE2_PA4 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x4) 1016 #define KEYSCAN_ROWSENSE2_PA5 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x5) 1017 #define KEYSCAN_ROWSENSE2_PA6 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x6) 1018 #define KEYSCAN_ROWSENSE2_PA7 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x7) 1019 #define KEYSCAN_ROWSENSE2_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x8) 1020 #define KEYSCAN_ROWSENSE2_PA9 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x9) 1021 #define KEYSCAN_ROWSENSE2_PB0 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x0) 1022 #define KEYSCAN_ROWSENSE2_PB1 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x1) 1023 #define KEYSCAN_ROWSENSE2_PB2 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x2) 1024 #define KEYSCAN_ROWSENSE2_PB3 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x3) 1025 #define KEYSCAN_ROWSENSE2_PB4 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x4) 1026 #define KEYSCAN_ROWSENSE2_PB5 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x5) 1027 #define KEYSCAN_ROWSENSE3_PA0 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x0) 1028 #define KEYSCAN_ROWSENSE3_PA1 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x1) 1029 #define KEYSCAN_ROWSENSE3_PA2 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x2) 1030 #define KEYSCAN_ROWSENSE3_PA3 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x3) 1031 #define KEYSCAN_ROWSENSE3_PA4 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x4) 1032 #define KEYSCAN_ROWSENSE3_PA5 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x5) 1033 #define KEYSCAN_ROWSENSE3_PA6 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x6) 1034 #define KEYSCAN_ROWSENSE3_PA7 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x7) 1035 #define KEYSCAN_ROWSENSE3_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x8) 1036 #define KEYSCAN_ROWSENSE3_PA9 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x9) 1037 #define KEYSCAN_ROWSENSE3_PB0 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x0) 1038 #define KEYSCAN_ROWSENSE3_PB1 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x1) 1039 #define KEYSCAN_ROWSENSE3_PB2 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x2) 1040 #define KEYSCAN_ROWSENSE3_PB3 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x3) 1041 #define KEYSCAN_ROWSENSE3_PB4 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x4) 1042 #define KEYSCAN_ROWSENSE3_PB5 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x5) 1043 #define KEYSCAN_ROWSENSE4_PA0 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x0) 1044 #define KEYSCAN_ROWSENSE4_PA1 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x1) 1045 #define KEYSCAN_ROWSENSE4_PA2 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x2) 1046 #define KEYSCAN_ROWSENSE4_PA3 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x3) 1047 #define KEYSCAN_ROWSENSE4_PA4 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x4) 1048 #define KEYSCAN_ROWSENSE4_PA5 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x5) 1049 #define KEYSCAN_ROWSENSE4_PA6 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x6) 1050 #define KEYSCAN_ROWSENSE4_PA7 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x7) 1051 #define KEYSCAN_ROWSENSE4_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x8) 1052 #define KEYSCAN_ROWSENSE4_PA9 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x9) 1053 #define KEYSCAN_ROWSENSE4_PB0 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x0) 1054 #define KEYSCAN_ROWSENSE4_PB1 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x1) 1055 #define KEYSCAN_ROWSENSE4_PB2 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x2) 1056 #define KEYSCAN_ROWSENSE4_PB3 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x3) 1057 #define KEYSCAN_ROWSENSE4_PB4 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x4) 1058 #define KEYSCAN_ROWSENSE4_PB5 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x5) 1059 #define KEYSCAN_ROWSENSE5_PA0 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x0) 1060 #define KEYSCAN_ROWSENSE5_PA1 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x1) 1061 #define KEYSCAN_ROWSENSE5_PA2 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x2) 1062 #define KEYSCAN_ROWSENSE5_PA3 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x3) 1063 #define KEYSCAN_ROWSENSE5_PA4 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x4) 1064 #define KEYSCAN_ROWSENSE5_PA5 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x5) 1065 #define KEYSCAN_ROWSENSE5_PA6 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x6) 1066 #define KEYSCAN_ROWSENSE5_PA7 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x7) 1067 #define KEYSCAN_ROWSENSE5_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x8) 1068 #define KEYSCAN_ROWSENSE5_PA9 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x9) 1069 #define KEYSCAN_ROWSENSE5_PB0 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x0) 1070 #define KEYSCAN_ROWSENSE5_PB1 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x1) 1071 #define KEYSCAN_ROWSENSE5_PB2 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x2) 1072 #define KEYSCAN_ROWSENSE5_PB3 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x3) 1073 #define KEYSCAN_ROWSENSE5_PB4 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x4) 1074 #define KEYSCAN_ROWSENSE5_PB5 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x5) 1075 1076 #define LETIMER0_OUT0_PA0 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x0) 1077 #define LETIMER0_OUT0_PA1 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x1) 1078 #define LETIMER0_OUT0_PA2 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x2) 1079 #define LETIMER0_OUT0_PA3 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x3) 1080 #define LETIMER0_OUT0_PA4 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x4) 1081 #define LETIMER0_OUT0_PA5 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x5) 1082 #define LETIMER0_OUT0_PA6 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x6) 1083 #define LETIMER0_OUT0_PA7 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x7) 1084 #define LETIMER0_OUT0_PA8 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x8) 1085 #define LETIMER0_OUT0_PA9 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x9) 1086 #define LETIMER0_OUT0_PB0 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x0) 1087 #define LETIMER0_OUT0_PB1 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x1) 1088 #define LETIMER0_OUT0_PB2 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x2) 1089 #define LETIMER0_OUT0_PB3 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x3) 1090 #define LETIMER0_OUT0_PB4 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x4) 1091 #define LETIMER0_OUT0_PB5 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x5) 1092 #define LETIMER0_OUT1_PA0 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x0) 1093 #define LETIMER0_OUT1_PA1 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x1) 1094 #define LETIMER0_OUT1_PA2 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x2) 1095 #define LETIMER0_OUT1_PA3 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x3) 1096 #define LETIMER0_OUT1_PA4 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x4) 1097 #define LETIMER0_OUT1_PA5 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x5) 1098 #define LETIMER0_OUT1_PA6 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x6) 1099 #define LETIMER0_OUT1_PA7 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x7) 1100 #define LETIMER0_OUT1_PA8 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x8) 1101 #define LETIMER0_OUT1_PA9 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x9) 1102 #define LETIMER0_OUT1_PB0 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x0) 1103 #define LETIMER0_OUT1_PB1 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x1) 1104 #define LETIMER0_OUT1_PB2 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x2) 1105 #define LETIMER0_OUT1_PB3 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x3) 1106 #define LETIMER0_OUT1_PB4 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x4) 1107 #define LETIMER0_OUT1_PB5 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x5) 1108 1109 #define MODEM_ANT0_PA0 SILABS_DBUS_MODEM_ANT0(0x0, 0x0) 1110 #define MODEM_ANT0_PA1 SILABS_DBUS_MODEM_ANT0(0x0, 0x1) 1111 #define MODEM_ANT0_PA2 SILABS_DBUS_MODEM_ANT0(0x0, 0x2) 1112 #define MODEM_ANT0_PA3 SILABS_DBUS_MODEM_ANT0(0x0, 0x3) 1113 #define MODEM_ANT0_PA4 SILABS_DBUS_MODEM_ANT0(0x0, 0x4) 1114 #define MODEM_ANT0_PA5 SILABS_DBUS_MODEM_ANT0(0x0, 0x5) 1115 #define MODEM_ANT0_PA6 SILABS_DBUS_MODEM_ANT0(0x0, 0x6) 1116 #define MODEM_ANT0_PA7 SILABS_DBUS_MODEM_ANT0(0x0, 0x7) 1117 #define MODEM_ANT0_PA8 SILABS_DBUS_MODEM_ANT0(0x0, 0x8) 1118 #define MODEM_ANT0_PA9 SILABS_DBUS_MODEM_ANT0(0x0, 0x9) 1119 #define MODEM_ANT0_PB0 SILABS_DBUS_MODEM_ANT0(0x1, 0x0) 1120 #define MODEM_ANT0_PB1 SILABS_DBUS_MODEM_ANT0(0x1, 0x1) 1121 #define MODEM_ANT0_PB2 SILABS_DBUS_MODEM_ANT0(0x1, 0x2) 1122 #define MODEM_ANT0_PB3 SILABS_DBUS_MODEM_ANT0(0x1, 0x3) 1123 #define MODEM_ANT0_PB4 SILABS_DBUS_MODEM_ANT0(0x1, 0x4) 1124 #define MODEM_ANT0_PB5 SILABS_DBUS_MODEM_ANT0(0x1, 0x5) 1125 #define MODEM_ANT0_PC0 SILABS_DBUS_MODEM_ANT0(0x2, 0x0) 1126 #define MODEM_ANT0_PC1 SILABS_DBUS_MODEM_ANT0(0x2, 0x1) 1127 #define MODEM_ANT0_PC2 SILABS_DBUS_MODEM_ANT0(0x2, 0x2) 1128 #define MODEM_ANT0_PC3 SILABS_DBUS_MODEM_ANT0(0x2, 0x3) 1129 #define MODEM_ANT0_PC4 SILABS_DBUS_MODEM_ANT0(0x2, 0x4) 1130 #define MODEM_ANT0_PC5 SILABS_DBUS_MODEM_ANT0(0x2, 0x5) 1131 #define MODEM_ANT0_PC6 SILABS_DBUS_MODEM_ANT0(0x2, 0x6) 1132 #define MODEM_ANT0_PC7 SILABS_DBUS_MODEM_ANT0(0x2, 0x7) 1133 #define MODEM_ANT0_PC8 SILABS_DBUS_MODEM_ANT0(0x2, 0x8) 1134 #define MODEM_ANT0_PC9 SILABS_DBUS_MODEM_ANT0(0x2, 0x9) 1135 #define MODEM_ANT0_PD0 SILABS_DBUS_MODEM_ANT0(0x3, 0x0) 1136 #define MODEM_ANT0_PD1 SILABS_DBUS_MODEM_ANT0(0x3, 0x1) 1137 #define MODEM_ANT0_PD2 SILABS_DBUS_MODEM_ANT0(0x3, 0x2) 1138 #define MODEM_ANT0_PD3 SILABS_DBUS_MODEM_ANT0(0x3, 0x3) 1139 #define MODEM_ANT0_PD4 SILABS_DBUS_MODEM_ANT0(0x3, 0x4) 1140 #define MODEM_ANT0_PD5 SILABS_DBUS_MODEM_ANT0(0x3, 0x5) 1141 #define MODEM_ANT1_PA0 SILABS_DBUS_MODEM_ANT1(0x0, 0x0) 1142 #define MODEM_ANT1_PA1 SILABS_DBUS_MODEM_ANT1(0x0, 0x1) 1143 #define MODEM_ANT1_PA2 SILABS_DBUS_MODEM_ANT1(0x0, 0x2) 1144 #define MODEM_ANT1_PA3 SILABS_DBUS_MODEM_ANT1(0x0, 0x3) 1145 #define MODEM_ANT1_PA4 SILABS_DBUS_MODEM_ANT1(0x0, 0x4) 1146 #define MODEM_ANT1_PA5 SILABS_DBUS_MODEM_ANT1(0x0, 0x5) 1147 #define MODEM_ANT1_PA6 SILABS_DBUS_MODEM_ANT1(0x0, 0x6) 1148 #define MODEM_ANT1_PA7 SILABS_DBUS_MODEM_ANT1(0x0, 0x7) 1149 #define MODEM_ANT1_PA8 SILABS_DBUS_MODEM_ANT1(0x0, 0x8) 1150 #define MODEM_ANT1_PA9 SILABS_DBUS_MODEM_ANT1(0x0, 0x9) 1151 #define MODEM_ANT1_PB0 SILABS_DBUS_MODEM_ANT1(0x1, 0x0) 1152 #define MODEM_ANT1_PB1 SILABS_DBUS_MODEM_ANT1(0x1, 0x1) 1153 #define MODEM_ANT1_PB2 SILABS_DBUS_MODEM_ANT1(0x1, 0x2) 1154 #define MODEM_ANT1_PB3 SILABS_DBUS_MODEM_ANT1(0x1, 0x3) 1155 #define MODEM_ANT1_PB4 SILABS_DBUS_MODEM_ANT1(0x1, 0x4) 1156 #define MODEM_ANT1_PB5 SILABS_DBUS_MODEM_ANT1(0x1, 0x5) 1157 #define MODEM_ANT1_PC0 SILABS_DBUS_MODEM_ANT1(0x2, 0x0) 1158 #define MODEM_ANT1_PC1 SILABS_DBUS_MODEM_ANT1(0x2, 0x1) 1159 #define MODEM_ANT1_PC2 SILABS_DBUS_MODEM_ANT1(0x2, 0x2) 1160 #define MODEM_ANT1_PC3 SILABS_DBUS_MODEM_ANT1(0x2, 0x3) 1161 #define MODEM_ANT1_PC4 SILABS_DBUS_MODEM_ANT1(0x2, 0x4) 1162 #define MODEM_ANT1_PC5 SILABS_DBUS_MODEM_ANT1(0x2, 0x5) 1163 #define MODEM_ANT1_PC6 SILABS_DBUS_MODEM_ANT1(0x2, 0x6) 1164 #define MODEM_ANT1_PC7 SILABS_DBUS_MODEM_ANT1(0x2, 0x7) 1165 #define MODEM_ANT1_PC8 SILABS_DBUS_MODEM_ANT1(0x2, 0x8) 1166 #define MODEM_ANT1_PC9 SILABS_DBUS_MODEM_ANT1(0x2, 0x9) 1167 #define MODEM_ANT1_PD0 SILABS_DBUS_MODEM_ANT1(0x3, 0x0) 1168 #define MODEM_ANT1_PD1 SILABS_DBUS_MODEM_ANT1(0x3, 0x1) 1169 #define MODEM_ANT1_PD2 SILABS_DBUS_MODEM_ANT1(0x3, 0x2) 1170 #define MODEM_ANT1_PD3 SILABS_DBUS_MODEM_ANT1(0x3, 0x3) 1171 #define MODEM_ANT1_PD4 SILABS_DBUS_MODEM_ANT1(0x3, 0x4) 1172 #define MODEM_ANT1_PD5 SILABS_DBUS_MODEM_ANT1(0x3, 0x5) 1173 #define MODEM_ANTROLLOVER_PC0 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x0) 1174 #define MODEM_ANTROLLOVER_PC1 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x1) 1175 #define MODEM_ANTROLLOVER_PC2 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x2) 1176 #define MODEM_ANTROLLOVER_PC3 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x3) 1177 #define MODEM_ANTROLLOVER_PC4 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x4) 1178 #define MODEM_ANTROLLOVER_PC5 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x5) 1179 #define MODEM_ANTROLLOVER_PC6 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x6) 1180 #define MODEM_ANTROLLOVER_PC7 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x7) 1181 #define MODEM_ANTROLLOVER_PC8 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x8) 1182 #define MODEM_ANTROLLOVER_PC9 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x9) 1183 #define MODEM_ANTROLLOVER_PD0 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x0) 1184 #define MODEM_ANTROLLOVER_PD1 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x1) 1185 #define MODEM_ANTROLLOVER_PD2 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x2) 1186 #define MODEM_ANTROLLOVER_PD3 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x3) 1187 #define MODEM_ANTROLLOVER_PD4 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x4) 1188 #define MODEM_ANTROLLOVER_PD5 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x5) 1189 #define MODEM_ANTRR0_PC0 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x0) 1190 #define MODEM_ANTRR0_PC1 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x1) 1191 #define MODEM_ANTRR0_PC2 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x2) 1192 #define MODEM_ANTRR0_PC3 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x3) 1193 #define MODEM_ANTRR0_PC4 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x4) 1194 #define MODEM_ANTRR0_PC5 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x5) 1195 #define MODEM_ANTRR0_PC6 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x6) 1196 #define MODEM_ANTRR0_PC7 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x7) 1197 #define MODEM_ANTRR0_PC8 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x8) 1198 #define MODEM_ANTRR0_PC9 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x9) 1199 #define MODEM_ANTRR0_PD0 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x0) 1200 #define MODEM_ANTRR0_PD1 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x1) 1201 #define MODEM_ANTRR0_PD2 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x2) 1202 #define MODEM_ANTRR0_PD3 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x3) 1203 #define MODEM_ANTRR0_PD4 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x4) 1204 #define MODEM_ANTRR0_PD5 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x5) 1205 #define MODEM_ANTRR1_PC0 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x0) 1206 #define MODEM_ANTRR1_PC1 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x1) 1207 #define MODEM_ANTRR1_PC2 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x2) 1208 #define MODEM_ANTRR1_PC3 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x3) 1209 #define MODEM_ANTRR1_PC4 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x4) 1210 #define MODEM_ANTRR1_PC5 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x5) 1211 #define MODEM_ANTRR1_PC6 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x6) 1212 #define MODEM_ANTRR1_PC7 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x7) 1213 #define MODEM_ANTRR1_PC8 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x8) 1214 #define MODEM_ANTRR1_PC9 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x9) 1215 #define MODEM_ANTRR1_PD0 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x0) 1216 #define MODEM_ANTRR1_PD1 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x1) 1217 #define MODEM_ANTRR1_PD2 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x2) 1218 #define MODEM_ANTRR1_PD3 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x3) 1219 #define MODEM_ANTRR1_PD4 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x4) 1220 #define MODEM_ANTRR1_PD5 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x5) 1221 #define MODEM_ANTRR2_PC0 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x0) 1222 #define MODEM_ANTRR2_PC1 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x1) 1223 #define MODEM_ANTRR2_PC2 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x2) 1224 #define MODEM_ANTRR2_PC3 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x3) 1225 #define MODEM_ANTRR2_PC4 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x4) 1226 #define MODEM_ANTRR2_PC5 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x5) 1227 #define MODEM_ANTRR2_PC6 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x6) 1228 #define MODEM_ANTRR2_PC7 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x7) 1229 #define MODEM_ANTRR2_PC8 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x8) 1230 #define MODEM_ANTRR2_PC9 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x9) 1231 #define MODEM_ANTRR2_PD0 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x0) 1232 #define MODEM_ANTRR2_PD1 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x1) 1233 #define MODEM_ANTRR2_PD2 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x2) 1234 #define MODEM_ANTRR2_PD3 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x3) 1235 #define MODEM_ANTRR2_PD4 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x4) 1236 #define MODEM_ANTRR2_PD5 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x5) 1237 #define MODEM_ANTRR3_PC0 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x0) 1238 #define MODEM_ANTRR3_PC1 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x1) 1239 #define MODEM_ANTRR3_PC2 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x2) 1240 #define MODEM_ANTRR3_PC3 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x3) 1241 #define MODEM_ANTRR3_PC4 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x4) 1242 #define MODEM_ANTRR3_PC5 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x5) 1243 #define MODEM_ANTRR3_PC6 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x6) 1244 #define MODEM_ANTRR3_PC7 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x7) 1245 #define MODEM_ANTRR3_PC8 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x8) 1246 #define MODEM_ANTRR3_PC9 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x9) 1247 #define MODEM_ANTRR3_PD0 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x0) 1248 #define MODEM_ANTRR3_PD1 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x1) 1249 #define MODEM_ANTRR3_PD2 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x2) 1250 #define MODEM_ANTRR3_PD3 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x3) 1251 #define MODEM_ANTRR3_PD4 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x4) 1252 #define MODEM_ANTRR3_PD5 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x5) 1253 #define MODEM_ANTRR4_PC0 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x0) 1254 #define MODEM_ANTRR4_PC1 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x1) 1255 #define MODEM_ANTRR4_PC2 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x2) 1256 #define MODEM_ANTRR4_PC3 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x3) 1257 #define MODEM_ANTRR4_PC4 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x4) 1258 #define MODEM_ANTRR4_PC5 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x5) 1259 #define MODEM_ANTRR4_PC6 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x6) 1260 #define MODEM_ANTRR4_PC7 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x7) 1261 #define MODEM_ANTRR4_PC8 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x8) 1262 #define MODEM_ANTRR4_PC9 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x9) 1263 #define MODEM_ANTRR4_PD0 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x0) 1264 #define MODEM_ANTRR4_PD1 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x1) 1265 #define MODEM_ANTRR4_PD2 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x2) 1266 #define MODEM_ANTRR4_PD3 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x3) 1267 #define MODEM_ANTRR4_PD4 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x4) 1268 #define MODEM_ANTRR4_PD5 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x5) 1269 #define MODEM_ANTRR5_PC0 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x0) 1270 #define MODEM_ANTRR5_PC1 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x1) 1271 #define MODEM_ANTRR5_PC2 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x2) 1272 #define MODEM_ANTRR5_PC3 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x3) 1273 #define MODEM_ANTRR5_PC4 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x4) 1274 #define MODEM_ANTRR5_PC5 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x5) 1275 #define MODEM_ANTRR5_PC6 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x6) 1276 #define MODEM_ANTRR5_PC7 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x7) 1277 #define MODEM_ANTRR5_PC8 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x8) 1278 #define MODEM_ANTRR5_PC9 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x9) 1279 #define MODEM_ANTRR5_PD0 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x0) 1280 #define MODEM_ANTRR5_PD1 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x1) 1281 #define MODEM_ANTRR5_PD2 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x2) 1282 #define MODEM_ANTRR5_PD3 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x3) 1283 #define MODEM_ANTRR5_PD4 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x4) 1284 #define MODEM_ANTRR5_PD5 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x5) 1285 #define MODEM_ANTSWEN_PC0 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x0) 1286 #define MODEM_ANTSWEN_PC1 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x1) 1287 #define MODEM_ANTSWEN_PC2 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x2) 1288 #define MODEM_ANTSWEN_PC3 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x3) 1289 #define MODEM_ANTSWEN_PC4 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x4) 1290 #define MODEM_ANTSWEN_PC5 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x5) 1291 #define MODEM_ANTSWEN_PC6 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x6) 1292 #define MODEM_ANTSWEN_PC7 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x7) 1293 #define MODEM_ANTSWEN_PC8 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x8) 1294 #define MODEM_ANTSWEN_PC9 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x9) 1295 #define MODEM_ANTSWEN_PD0 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x0) 1296 #define MODEM_ANTSWEN_PD1 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x1) 1297 #define MODEM_ANTSWEN_PD2 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x2) 1298 #define MODEM_ANTSWEN_PD3 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x3) 1299 #define MODEM_ANTSWEN_PD4 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x4) 1300 #define MODEM_ANTSWEN_PD5 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x5) 1301 #define MODEM_ANTSWUS_PC0 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x0) 1302 #define MODEM_ANTSWUS_PC1 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x1) 1303 #define MODEM_ANTSWUS_PC2 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x2) 1304 #define MODEM_ANTSWUS_PC3 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x3) 1305 #define MODEM_ANTSWUS_PC4 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x4) 1306 #define MODEM_ANTSWUS_PC5 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x5) 1307 #define MODEM_ANTSWUS_PC6 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x6) 1308 #define MODEM_ANTSWUS_PC7 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x7) 1309 #define MODEM_ANTSWUS_PC8 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x8) 1310 #define MODEM_ANTSWUS_PC9 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x9) 1311 #define MODEM_ANTSWUS_PD0 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x0) 1312 #define MODEM_ANTSWUS_PD1 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x1) 1313 #define MODEM_ANTSWUS_PD2 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x2) 1314 #define MODEM_ANTSWUS_PD3 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x3) 1315 #define MODEM_ANTSWUS_PD4 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x4) 1316 #define MODEM_ANTSWUS_PD5 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x5) 1317 #define MODEM_ANTTRIG_PC0 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x0) 1318 #define MODEM_ANTTRIG_PC1 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x1) 1319 #define MODEM_ANTTRIG_PC2 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x2) 1320 #define MODEM_ANTTRIG_PC3 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x3) 1321 #define MODEM_ANTTRIG_PC4 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x4) 1322 #define MODEM_ANTTRIG_PC5 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x5) 1323 #define MODEM_ANTTRIG_PC6 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x6) 1324 #define MODEM_ANTTRIG_PC7 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x7) 1325 #define MODEM_ANTTRIG_PC8 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x8) 1326 #define MODEM_ANTTRIG_PC9 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x9) 1327 #define MODEM_ANTTRIG_PD0 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x0) 1328 #define MODEM_ANTTRIG_PD1 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x1) 1329 #define MODEM_ANTTRIG_PD2 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x2) 1330 #define MODEM_ANTTRIG_PD3 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x3) 1331 #define MODEM_ANTTRIG_PD4 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x4) 1332 #define MODEM_ANTTRIG_PD5 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x5) 1333 #define MODEM_ANTTRIGSTOP_PC0 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x0) 1334 #define MODEM_ANTTRIGSTOP_PC1 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x1) 1335 #define MODEM_ANTTRIGSTOP_PC2 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x2) 1336 #define MODEM_ANTTRIGSTOP_PC3 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x3) 1337 #define MODEM_ANTTRIGSTOP_PC4 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x4) 1338 #define MODEM_ANTTRIGSTOP_PC5 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x5) 1339 #define MODEM_ANTTRIGSTOP_PC6 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x6) 1340 #define MODEM_ANTTRIGSTOP_PC7 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x7) 1341 #define MODEM_ANTTRIGSTOP_PC8 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x8) 1342 #define MODEM_ANTTRIGSTOP_PC9 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x9) 1343 #define MODEM_ANTTRIGSTOP_PD0 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x0) 1344 #define MODEM_ANTTRIGSTOP_PD1 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x1) 1345 #define MODEM_ANTTRIGSTOP_PD2 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x2) 1346 #define MODEM_ANTTRIGSTOP_PD3 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x3) 1347 #define MODEM_ANTTRIGSTOP_PD4 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x4) 1348 #define MODEM_ANTTRIGSTOP_PD5 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x5) 1349 #define MODEM_DCLK_PA0 SILABS_DBUS_MODEM_DCLK(0x0, 0x0) 1350 #define MODEM_DCLK_PA1 SILABS_DBUS_MODEM_DCLK(0x0, 0x1) 1351 #define MODEM_DCLK_PA2 SILABS_DBUS_MODEM_DCLK(0x0, 0x2) 1352 #define MODEM_DCLK_PA3 SILABS_DBUS_MODEM_DCLK(0x0, 0x3) 1353 #define MODEM_DCLK_PA4 SILABS_DBUS_MODEM_DCLK(0x0, 0x4) 1354 #define MODEM_DCLK_PA5 SILABS_DBUS_MODEM_DCLK(0x0, 0x5) 1355 #define MODEM_DCLK_PA6 SILABS_DBUS_MODEM_DCLK(0x0, 0x6) 1356 #define MODEM_DCLK_PA7 SILABS_DBUS_MODEM_DCLK(0x0, 0x7) 1357 #define MODEM_DCLK_PA8 SILABS_DBUS_MODEM_DCLK(0x0, 0x8) 1358 #define MODEM_DCLK_PA9 SILABS_DBUS_MODEM_DCLK(0x0, 0x9) 1359 #define MODEM_DCLK_PB0 SILABS_DBUS_MODEM_DCLK(0x1, 0x0) 1360 #define MODEM_DCLK_PB1 SILABS_DBUS_MODEM_DCLK(0x1, 0x1) 1361 #define MODEM_DCLK_PB2 SILABS_DBUS_MODEM_DCLK(0x1, 0x2) 1362 #define MODEM_DCLK_PB3 SILABS_DBUS_MODEM_DCLK(0x1, 0x3) 1363 #define MODEM_DCLK_PB4 SILABS_DBUS_MODEM_DCLK(0x1, 0x4) 1364 #define MODEM_DCLK_PB5 SILABS_DBUS_MODEM_DCLK(0x1, 0x5) 1365 #define MODEM_DOUT_PA0 SILABS_DBUS_MODEM_DOUT(0x0, 0x0) 1366 #define MODEM_DOUT_PA1 SILABS_DBUS_MODEM_DOUT(0x0, 0x1) 1367 #define MODEM_DOUT_PA2 SILABS_DBUS_MODEM_DOUT(0x0, 0x2) 1368 #define MODEM_DOUT_PA3 SILABS_DBUS_MODEM_DOUT(0x0, 0x3) 1369 #define MODEM_DOUT_PA4 SILABS_DBUS_MODEM_DOUT(0x0, 0x4) 1370 #define MODEM_DOUT_PA5 SILABS_DBUS_MODEM_DOUT(0x0, 0x5) 1371 #define MODEM_DOUT_PA6 SILABS_DBUS_MODEM_DOUT(0x0, 0x6) 1372 #define MODEM_DOUT_PA7 SILABS_DBUS_MODEM_DOUT(0x0, 0x7) 1373 #define MODEM_DOUT_PA8 SILABS_DBUS_MODEM_DOUT(0x0, 0x8) 1374 #define MODEM_DOUT_PA9 SILABS_DBUS_MODEM_DOUT(0x0, 0x9) 1375 #define MODEM_DOUT_PB0 SILABS_DBUS_MODEM_DOUT(0x1, 0x0) 1376 #define MODEM_DOUT_PB1 SILABS_DBUS_MODEM_DOUT(0x1, 0x1) 1377 #define MODEM_DOUT_PB2 SILABS_DBUS_MODEM_DOUT(0x1, 0x2) 1378 #define MODEM_DOUT_PB3 SILABS_DBUS_MODEM_DOUT(0x1, 0x3) 1379 #define MODEM_DOUT_PB4 SILABS_DBUS_MODEM_DOUT(0x1, 0x4) 1380 #define MODEM_DOUT_PB5 SILABS_DBUS_MODEM_DOUT(0x1, 0x5) 1381 #define MODEM_DIN_PA0 SILABS_DBUS_MODEM_DIN(0x0, 0x0) 1382 #define MODEM_DIN_PA1 SILABS_DBUS_MODEM_DIN(0x0, 0x1) 1383 #define MODEM_DIN_PA2 SILABS_DBUS_MODEM_DIN(0x0, 0x2) 1384 #define MODEM_DIN_PA3 SILABS_DBUS_MODEM_DIN(0x0, 0x3) 1385 #define MODEM_DIN_PA4 SILABS_DBUS_MODEM_DIN(0x0, 0x4) 1386 #define MODEM_DIN_PA5 SILABS_DBUS_MODEM_DIN(0x0, 0x5) 1387 #define MODEM_DIN_PA6 SILABS_DBUS_MODEM_DIN(0x0, 0x6) 1388 #define MODEM_DIN_PA7 SILABS_DBUS_MODEM_DIN(0x0, 0x7) 1389 #define MODEM_DIN_PA8 SILABS_DBUS_MODEM_DIN(0x0, 0x8) 1390 #define MODEM_DIN_PA9 SILABS_DBUS_MODEM_DIN(0x0, 0x9) 1391 #define MODEM_DIN_PB0 SILABS_DBUS_MODEM_DIN(0x1, 0x0) 1392 #define MODEM_DIN_PB1 SILABS_DBUS_MODEM_DIN(0x1, 0x1) 1393 #define MODEM_DIN_PB2 SILABS_DBUS_MODEM_DIN(0x1, 0x2) 1394 #define MODEM_DIN_PB3 SILABS_DBUS_MODEM_DIN(0x1, 0x3) 1395 #define MODEM_DIN_PB4 SILABS_DBUS_MODEM_DIN(0x1, 0x4) 1396 #define MODEM_DIN_PB5 SILABS_DBUS_MODEM_DIN(0x1, 0x5) 1397 1398 #define PCNT0_S0IN_PA0 SILABS_DBUS_PCNT0_S0IN(0x0, 0x0) 1399 #define PCNT0_S0IN_PA1 SILABS_DBUS_PCNT0_S0IN(0x0, 0x1) 1400 #define PCNT0_S0IN_PA2 SILABS_DBUS_PCNT0_S0IN(0x0, 0x2) 1401 #define PCNT0_S0IN_PA3 SILABS_DBUS_PCNT0_S0IN(0x0, 0x3) 1402 #define PCNT0_S0IN_PA4 SILABS_DBUS_PCNT0_S0IN(0x0, 0x4) 1403 #define PCNT0_S0IN_PA5 SILABS_DBUS_PCNT0_S0IN(0x0, 0x5) 1404 #define PCNT0_S0IN_PA6 SILABS_DBUS_PCNT0_S0IN(0x0, 0x6) 1405 #define PCNT0_S0IN_PA7 SILABS_DBUS_PCNT0_S0IN(0x0, 0x7) 1406 #define PCNT0_S0IN_PA8 SILABS_DBUS_PCNT0_S0IN(0x0, 0x8) 1407 #define PCNT0_S0IN_PA9 SILABS_DBUS_PCNT0_S0IN(0x0, 0x9) 1408 #define PCNT0_S0IN_PB0 SILABS_DBUS_PCNT0_S0IN(0x1, 0x0) 1409 #define PCNT0_S0IN_PB1 SILABS_DBUS_PCNT0_S0IN(0x1, 0x1) 1410 #define PCNT0_S0IN_PB2 SILABS_DBUS_PCNT0_S0IN(0x1, 0x2) 1411 #define PCNT0_S0IN_PB3 SILABS_DBUS_PCNT0_S0IN(0x1, 0x3) 1412 #define PCNT0_S0IN_PB4 SILABS_DBUS_PCNT0_S0IN(0x1, 0x4) 1413 #define PCNT0_S0IN_PB5 SILABS_DBUS_PCNT0_S0IN(0x1, 0x5) 1414 #define PCNT0_S1IN_PA0 SILABS_DBUS_PCNT0_S1IN(0x0, 0x0) 1415 #define PCNT0_S1IN_PA1 SILABS_DBUS_PCNT0_S1IN(0x0, 0x1) 1416 #define PCNT0_S1IN_PA2 SILABS_DBUS_PCNT0_S1IN(0x0, 0x2) 1417 #define PCNT0_S1IN_PA3 SILABS_DBUS_PCNT0_S1IN(0x0, 0x3) 1418 #define PCNT0_S1IN_PA4 SILABS_DBUS_PCNT0_S1IN(0x0, 0x4) 1419 #define PCNT0_S1IN_PA5 SILABS_DBUS_PCNT0_S1IN(0x0, 0x5) 1420 #define PCNT0_S1IN_PA6 SILABS_DBUS_PCNT0_S1IN(0x0, 0x6) 1421 #define PCNT0_S1IN_PA7 SILABS_DBUS_PCNT0_S1IN(0x0, 0x7) 1422 #define PCNT0_S1IN_PA8 SILABS_DBUS_PCNT0_S1IN(0x0, 0x8) 1423 #define PCNT0_S1IN_PA9 SILABS_DBUS_PCNT0_S1IN(0x0, 0x9) 1424 #define PCNT0_S1IN_PB0 SILABS_DBUS_PCNT0_S1IN(0x1, 0x0) 1425 #define PCNT0_S1IN_PB1 SILABS_DBUS_PCNT0_S1IN(0x1, 0x1) 1426 #define PCNT0_S1IN_PB2 SILABS_DBUS_PCNT0_S1IN(0x1, 0x2) 1427 #define PCNT0_S1IN_PB3 SILABS_DBUS_PCNT0_S1IN(0x1, 0x3) 1428 #define PCNT0_S1IN_PB4 SILABS_DBUS_PCNT0_S1IN(0x1, 0x4) 1429 #define PCNT0_S1IN_PB5 SILABS_DBUS_PCNT0_S1IN(0x1, 0x5) 1430 1431 #define PRS0_ASYNCH0_PA0 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x0) 1432 #define PRS0_ASYNCH0_PA1 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x1) 1433 #define PRS0_ASYNCH0_PA2 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x2) 1434 #define PRS0_ASYNCH0_PA3 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x3) 1435 #define PRS0_ASYNCH0_PA4 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x4) 1436 #define PRS0_ASYNCH0_PA5 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x5) 1437 #define PRS0_ASYNCH0_PA6 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x6) 1438 #define PRS0_ASYNCH0_PA7 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x7) 1439 #define PRS0_ASYNCH0_PA8 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x8) 1440 #define PRS0_ASYNCH0_PA9 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x9) 1441 #define PRS0_ASYNCH0_PB0 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x0) 1442 #define PRS0_ASYNCH0_PB1 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x1) 1443 #define PRS0_ASYNCH0_PB2 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x2) 1444 #define PRS0_ASYNCH0_PB3 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x3) 1445 #define PRS0_ASYNCH0_PB4 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x4) 1446 #define PRS0_ASYNCH0_PB5 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x5) 1447 #define PRS0_ASYNCH1_PA0 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x0) 1448 #define PRS0_ASYNCH1_PA1 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x1) 1449 #define PRS0_ASYNCH1_PA2 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x2) 1450 #define PRS0_ASYNCH1_PA3 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x3) 1451 #define PRS0_ASYNCH1_PA4 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x4) 1452 #define PRS0_ASYNCH1_PA5 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x5) 1453 #define PRS0_ASYNCH1_PA6 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x6) 1454 #define PRS0_ASYNCH1_PA7 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x7) 1455 #define PRS0_ASYNCH1_PA8 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x8) 1456 #define PRS0_ASYNCH1_PA9 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x9) 1457 #define PRS0_ASYNCH1_PB0 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x0) 1458 #define PRS0_ASYNCH1_PB1 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x1) 1459 #define PRS0_ASYNCH1_PB2 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x2) 1460 #define PRS0_ASYNCH1_PB3 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x3) 1461 #define PRS0_ASYNCH1_PB4 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x4) 1462 #define PRS0_ASYNCH1_PB5 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x5) 1463 #define PRS0_ASYNCH2_PA0 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x0) 1464 #define PRS0_ASYNCH2_PA1 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x1) 1465 #define PRS0_ASYNCH2_PA2 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x2) 1466 #define PRS0_ASYNCH2_PA3 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x3) 1467 #define PRS0_ASYNCH2_PA4 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x4) 1468 #define PRS0_ASYNCH2_PA5 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x5) 1469 #define PRS0_ASYNCH2_PA6 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x6) 1470 #define PRS0_ASYNCH2_PA7 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x7) 1471 #define PRS0_ASYNCH2_PA8 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x8) 1472 #define PRS0_ASYNCH2_PA9 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x9) 1473 #define PRS0_ASYNCH2_PB0 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x0) 1474 #define PRS0_ASYNCH2_PB1 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x1) 1475 #define PRS0_ASYNCH2_PB2 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x2) 1476 #define PRS0_ASYNCH2_PB3 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x3) 1477 #define PRS0_ASYNCH2_PB4 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x4) 1478 #define PRS0_ASYNCH2_PB5 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x5) 1479 #define PRS0_ASYNCH3_PA0 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x0) 1480 #define PRS0_ASYNCH3_PA1 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x1) 1481 #define PRS0_ASYNCH3_PA2 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x2) 1482 #define PRS0_ASYNCH3_PA3 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x3) 1483 #define PRS0_ASYNCH3_PA4 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x4) 1484 #define PRS0_ASYNCH3_PA5 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x5) 1485 #define PRS0_ASYNCH3_PA6 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x6) 1486 #define PRS0_ASYNCH3_PA7 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x7) 1487 #define PRS0_ASYNCH3_PA8 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x8) 1488 #define PRS0_ASYNCH3_PA9 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x9) 1489 #define PRS0_ASYNCH3_PB0 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x0) 1490 #define PRS0_ASYNCH3_PB1 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x1) 1491 #define PRS0_ASYNCH3_PB2 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x2) 1492 #define PRS0_ASYNCH3_PB3 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x3) 1493 #define PRS0_ASYNCH3_PB4 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x4) 1494 #define PRS0_ASYNCH3_PB5 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x5) 1495 #define PRS0_ASYNCH4_PA0 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x0) 1496 #define PRS0_ASYNCH4_PA1 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x1) 1497 #define PRS0_ASYNCH4_PA2 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x2) 1498 #define PRS0_ASYNCH4_PA3 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x3) 1499 #define PRS0_ASYNCH4_PA4 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x4) 1500 #define PRS0_ASYNCH4_PA5 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x5) 1501 #define PRS0_ASYNCH4_PA6 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x6) 1502 #define PRS0_ASYNCH4_PA7 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x7) 1503 #define PRS0_ASYNCH4_PA8 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x8) 1504 #define PRS0_ASYNCH4_PA9 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x9) 1505 #define PRS0_ASYNCH4_PB0 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x0) 1506 #define PRS0_ASYNCH4_PB1 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x1) 1507 #define PRS0_ASYNCH4_PB2 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x2) 1508 #define PRS0_ASYNCH4_PB3 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x3) 1509 #define PRS0_ASYNCH4_PB4 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x4) 1510 #define PRS0_ASYNCH4_PB5 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x5) 1511 #define PRS0_ASYNCH5_PA0 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x0) 1512 #define PRS0_ASYNCH5_PA1 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x1) 1513 #define PRS0_ASYNCH5_PA2 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x2) 1514 #define PRS0_ASYNCH5_PA3 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x3) 1515 #define PRS0_ASYNCH5_PA4 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x4) 1516 #define PRS0_ASYNCH5_PA5 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x5) 1517 #define PRS0_ASYNCH5_PA6 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x6) 1518 #define PRS0_ASYNCH5_PA7 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x7) 1519 #define PRS0_ASYNCH5_PA8 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x8) 1520 #define PRS0_ASYNCH5_PA9 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x9) 1521 #define PRS0_ASYNCH5_PB0 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x0) 1522 #define PRS0_ASYNCH5_PB1 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x1) 1523 #define PRS0_ASYNCH5_PB2 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x2) 1524 #define PRS0_ASYNCH5_PB3 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x3) 1525 #define PRS0_ASYNCH5_PB4 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x4) 1526 #define PRS0_ASYNCH5_PB5 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x5) 1527 #define PRS0_ASYNCH6_PC0 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x0) 1528 #define PRS0_ASYNCH6_PC1 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x1) 1529 #define PRS0_ASYNCH6_PC2 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x2) 1530 #define PRS0_ASYNCH6_PC3 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x3) 1531 #define PRS0_ASYNCH6_PC4 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x4) 1532 #define PRS0_ASYNCH6_PC5 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x5) 1533 #define PRS0_ASYNCH6_PC6 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x6) 1534 #define PRS0_ASYNCH6_PC7 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x7) 1535 #define PRS0_ASYNCH6_PC8 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x8) 1536 #define PRS0_ASYNCH6_PC9 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x9) 1537 #define PRS0_ASYNCH6_PD0 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x0) 1538 #define PRS0_ASYNCH6_PD1 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x1) 1539 #define PRS0_ASYNCH6_PD2 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x2) 1540 #define PRS0_ASYNCH6_PD3 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x3) 1541 #define PRS0_ASYNCH6_PD4 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x4) 1542 #define PRS0_ASYNCH6_PD5 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x5) 1543 #define PRS0_ASYNCH7_PC0 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x0) 1544 #define PRS0_ASYNCH7_PC1 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x1) 1545 #define PRS0_ASYNCH7_PC2 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x2) 1546 #define PRS0_ASYNCH7_PC3 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x3) 1547 #define PRS0_ASYNCH7_PC4 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x4) 1548 #define PRS0_ASYNCH7_PC5 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x5) 1549 #define PRS0_ASYNCH7_PC6 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x6) 1550 #define PRS0_ASYNCH7_PC7 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x7) 1551 #define PRS0_ASYNCH7_PC8 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x8) 1552 #define PRS0_ASYNCH7_PC9 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x9) 1553 #define PRS0_ASYNCH7_PD0 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x0) 1554 #define PRS0_ASYNCH7_PD1 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x1) 1555 #define PRS0_ASYNCH7_PD2 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x2) 1556 #define PRS0_ASYNCH7_PD3 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x3) 1557 #define PRS0_ASYNCH7_PD4 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x4) 1558 #define PRS0_ASYNCH7_PD5 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x5) 1559 #define PRS0_ASYNCH8_PC0 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x0) 1560 #define PRS0_ASYNCH8_PC1 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x1) 1561 #define PRS0_ASYNCH8_PC2 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x2) 1562 #define PRS0_ASYNCH8_PC3 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x3) 1563 #define PRS0_ASYNCH8_PC4 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x4) 1564 #define PRS0_ASYNCH8_PC5 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x5) 1565 #define PRS0_ASYNCH8_PC6 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x6) 1566 #define PRS0_ASYNCH8_PC7 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x7) 1567 #define PRS0_ASYNCH8_PC8 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x8) 1568 #define PRS0_ASYNCH8_PC9 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x9) 1569 #define PRS0_ASYNCH8_PD0 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x0) 1570 #define PRS0_ASYNCH8_PD1 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x1) 1571 #define PRS0_ASYNCH8_PD2 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x2) 1572 #define PRS0_ASYNCH8_PD3 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x3) 1573 #define PRS0_ASYNCH8_PD4 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x4) 1574 #define PRS0_ASYNCH8_PD5 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x5) 1575 #define PRS0_ASYNCH9_PC0 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x0) 1576 #define PRS0_ASYNCH9_PC1 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x1) 1577 #define PRS0_ASYNCH9_PC2 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x2) 1578 #define PRS0_ASYNCH9_PC3 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x3) 1579 #define PRS0_ASYNCH9_PC4 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x4) 1580 #define PRS0_ASYNCH9_PC5 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x5) 1581 #define PRS0_ASYNCH9_PC6 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x6) 1582 #define PRS0_ASYNCH9_PC7 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x7) 1583 #define PRS0_ASYNCH9_PC8 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x8) 1584 #define PRS0_ASYNCH9_PC9 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x9) 1585 #define PRS0_ASYNCH9_PD0 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x0) 1586 #define PRS0_ASYNCH9_PD1 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x1) 1587 #define PRS0_ASYNCH9_PD2 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x2) 1588 #define PRS0_ASYNCH9_PD3 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x3) 1589 #define PRS0_ASYNCH9_PD4 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x4) 1590 #define PRS0_ASYNCH9_PD5 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x5) 1591 #define PRS0_ASYNCH10_PC0 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x0) 1592 #define PRS0_ASYNCH10_PC1 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x1) 1593 #define PRS0_ASYNCH10_PC2 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x2) 1594 #define PRS0_ASYNCH10_PC3 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x3) 1595 #define PRS0_ASYNCH10_PC4 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x4) 1596 #define PRS0_ASYNCH10_PC5 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x5) 1597 #define PRS0_ASYNCH10_PC6 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x6) 1598 #define PRS0_ASYNCH10_PC7 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x7) 1599 #define PRS0_ASYNCH10_PC8 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x8) 1600 #define PRS0_ASYNCH10_PC9 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x9) 1601 #define PRS0_ASYNCH10_PD0 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x0) 1602 #define PRS0_ASYNCH10_PD1 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x1) 1603 #define PRS0_ASYNCH10_PD2 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x2) 1604 #define PRS0_ASYNCH10_PD3 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x3) 1605 #define PRS0_ASYNCH10_PD4 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x4) 1606 #define PRS0_ASYNCH10_PD5 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x5) 1607 #define PRS0_ASYNCH11_PC0 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x0) 1608 #define PRS0_ASYNCH11_PC1 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x1) 1609 #define PRS0_ASYNCH11_PC2 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x2) 1610 #define PRS0_ASYNCH11_PC3 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x3) 1611 #define PRS0_ASYNCH11_PC4 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x4) 1612 #define PRS0_ASYNCH11_PC5 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x5) 1613 #define PRS0_ASYNCH11_PC6 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x6) 1614 #define PRS0_ASYNCH11_PC7 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x7) 1615 #define PRS0_ASYNCH11_PC8 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x8) 1616 #define PRS0_ASYNCH11_PC9 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x9) 1617 #define PRS0_ASYNCH11_PD0 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x0) 1618 #define PRS0_ASYNCH11_PD1 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x1) 1619 #define PRS0_ASYNCH11_PD2 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x2) 1620 #define PRS0_ASYNCH11_PD3 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x3) 1621 #define PRS0_ASYNCH11_PD4 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x4) 1622 #define PRS0_ASYNCH11_PD5 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x5) 1623 #define PRS0_ASYNCH12_PA0 SILABS_DBUS_PRS0_ASYNCH12(0x0, 0x0) 1624 #define PRS0_ASYNCH12_PA1 SILABS_DBUS_PRS0_ASYNCH12(0x0, 0x1) 1625 #define PRS0_ASYNCH12_PA2 SILABS_DBUS_PRS0_ASYNCH12(0x0, 0x2) 1626 #define PRS0_ASYNCH12_PA3 SILABS_DBUS_PRS0_ASYNCH12(0x0, 0x3) 1627 #define PRS0_ASYNCH12_PA4 SILABS_DBUS_PRS0_ASYNCH12(0x0, 0x4) 1628 #define PRS0_ASYNCH12_PA5 SILABS_DBUS_PRS0_ASYNCH12(0x0, 0x5) 1629 #define PRS0_ASYNCH12_PA6 SILABS_DBUS_PRS0_ASYNCH12(0x0, 0x6) 1630 #define PRS0_ASYNCH12_PA7 SILABS_DBUS_PRS0_ASYNCH12(0x0, 0x7) 1631 #define PRS0_ASYNCH12_PA8 SILABS_DBUS_PRS0_ASYNCH12(0x0, 0x8) 1632 #define PRS0_ASYNCH12_PA9 SILABS_DBUS_PRS0_ASYNCH12(0x0, 0x9) 1633 #define PRS0_ASYNCH12_PB0 SILABS_DBUS_PRS0_ASYNCH12(0x1, 0x0) 1634 #define PRS0_ASYNCH12_PB1 SILABS_DBUS_PRS0_ASYNCH12(0x1, 0x1) 1635 #define PRS0_ASYNCH12_PB2 SILABS_DBUS_PRS0_ASYNCH12(0x1, 0x2) 1636 #define PRS0_ASYNCH12_PB3 SILABS_DBUS_PRS0_ASYNCH12(0x1, 0x3) 1637 #define PRS0_ASYNCH12_PB4 SILABS_DBUS_PRS0_ASYNCH12(0x1, 0x4) 1638 #define PRS0_ASYNCH12_PB5 SILABS_DBUS_PRS0_ASYNCH12(0x1, 0x5) 1639 #define PRS0_ASYNCH13_PA0 SILABS_DBUS_PRS0_ASYNCH13(0x0, 0x0) 1640 #define PRS0_ASYNCH13_PA1 SILABS_DBUS_PRS0_ASYNCH13(0x0, 0x1) 1641 #define PRS0_ASYNCH13_PA2 SILABS_DBUS_PRS0_ASYNCH13(0x0, 0x2) 1642 #define PRS0_ASYNCH13_PA3 SILABS_DBUS_PRS0_ASYNCH13(0x0, 0x3) 1643 #define PRS0_ASYNCH13_PA4 SILABS_DBUS_PRS0_ASYNCH13(0x0, 0x4) 1644 #define PRS0_ASYNCH13_PA5 SILABS_DBUS_PRS0_ASYNCH13(0x0, 0x5) 1645 #define PRS0_ASYNCH13_PA6 SILABS_DBUS_PRS0_ASYNCH13(0x0, 0x6) 1646 #define PRS0_ASYNCH13_PA7 SILABS_DBUS_PRS0_ASYNCH13(0x0, 0x7) 1647 #define PRS0_ASYNCH13_PA8 SILABS_DBUS_PRS0_ASYNCH13(0x0, 0x8) 1648 #define PRS0_ASYNCH13_PA9 SILABS_DBUS_PRS0_ASYNCH13(0x0, 0x9) 1649 #define PRS0_ASYNCH13_PB0 SILABS_DBUS_PRS0_ASYNCH13(0x1, 0x0) 1650 #define PRS0_ASYNCH13_PB1 SILABS_DBUS_PRS0_ASYNCH13(0x1, 0x1) 1651 #define PRS0_ASYNCH13_PB2 SILABS_DBUS_PRS0_ASYNCH13(0x1, 0x2) 1652 #define PRS0_ASYNCH13_PB3 SILABS_DBUS_PRS0_ASYNCH13(0x1, 0x3) 1653 #define PRS0_ASYNCH13_PB4 SILABS_DBUS_PRS0_ASYNCH13(0x1, 0x4) 1654 #define PRS0_ASYNCH13_PB5 SILABS_DBUS_PRS0_ASYNCH13(0x1, 0x5) 1655 #define PRS0_ASYNCH14_PA0 SILABS_DBUS_PRS0_ASYNCH14(0x0, 0x0) 1656 #define PRS0_ASYNCH14_PA1 SILABS_DBUS_PRS0_ASYNCH14(0x0, 0x1) 1657 #define PRS0_ASYNCH14_PA2 SILABS_DBUS_PRS0_ASYNCH14(0x0, 0x2) 1658 #define PRS0_ASYNCH14_PA3 SILABS_DBUS_PRS0_ASYNCH14(0x0, 0x3) 1659 #define PRS0_ASYNCH14_PA4 SILABS_DBUS_PRS0_ASYNCH14(0x0, 0x4) 1660 #define PRS0_ASYNCH14_PA5 SILABS_DBUS_PRS0_ASYNCH14(0x0, 0x5) 1661 #define PRS0_ASYNCH14_PA6 SILABS_DBUS_PRS0_ASYNCH14(0x0, 0x6) 1662 #define PRS0_ASYNCH14_PA7 SILABS_DBUS_PRS0_ASYNCH14(0x0, 0x7) 1663 #define PRS0_ASYNCH14_PA8 SILABS_DBUS_PRS0_ASYNCH14(0x0, 0x8) 1664 #define PRS0_ASYNCH14_PA9 SILABS_DBUS_PRS0_ASYNCH14(0x0, 0x9) 1665 #define PRS0_ASYNCH14_PB0 SILABS_DBUS_PRS0_ASYNCH14(0x1, 0x0) 1666 #define PRS0_ASYNCH14_PB1 SILABS_DBUS_PRS0_ASYNCH14(0x1, 0x1) 1667 #define PRS0_ASYNCH14_PB2 SILABS_DBUS_PRS0_ASYNCH14(0x1, 0x2) 1668 #define PRS0_ASYNCH14_PB3 SILABS_DBUS_PRS0_ASYNCH14(0x1, 0x3) 1669 #define PRS0_ASYNCH14_PB4 SILABS_DBUS_PRS0_ASYNCH14(0x1, 0x4) 1670 #define PRS0_ASYNCH14_PB5 SILABS_DBUS_PRS0_ASYNCH14(0x1, 0x5) 1671 #define PRS0_ASYNCH15_PA0 SILABS_DBUS_PRS0_ASYNCH15(0x0, 0x0) 1672 #define PRS0_ASYNCH15_PA1 SILABS_DBUS_PRS0_ASYNCH15(0x0, 0x1) 1673 #define PRS0_ASYNCH15_PA2 SILABS_DBUS_PRS0_ASYNCH15(0x0, 0x2) 1674 #define PRS0_ASYNCH15_PA3 SILABS_DBUS_PRS0_ASYNCH15(0x0, 0x3) 1675 #define PRS0_ASYNCH15_PA4 SILABS_DBUS_PRS0_ASYNCH15(0x0, 0x4) 1676 #define PRS0_ASYNCH15_PA5 SILABS_DBUS_PRS0_ASYNCH15(0x0, 0x5) 1677 #define PRS0_ASYNCH15_PA6 SILABS_DBUS_PRS0_ASYNCH15(0x0, 0x6) 1678 #define PRS0_ASYNCH15_PA7 SILABS_DBUS_PRS0_ASYNCH15(0x0, 0x7) 1679 #define PRS0_ASYNCH15_PA8 SILABS_DBUS_PRS0_ASYNCH15(0x0, 0x8) 1680 #define PRS0_ASYNCH15_PA9 SILABS_DBUS_PRS0_ASYNCH15(0x0, 0x9) 1681 #define PRS0_ASYNCH15_PB0 SILABS_DBUS_PRS0_ASYNCH15(0x1, 0x0) 1682 #define PRS0_ASYNCH15_PB1 SILABS_DBUS_PRS0_ASYNCH15(0x1, 0x1) 1683 #define PRS0_ASYNCH15_PB2 SILABS_DBUS_PRS0_ASYNCH15(0x1, 0x2) 1684 #define PRS0_ASYNCH15_PB3 SILABS_DBUS_PRS0_ASYNCH15(0x1, 0x3) 1685 #define PRS0_ASYNCH15_PB4 SILABS_DBUS_PRS0_ASYNCH15(0x1, 0x4) 1686 #define PRS0_ASYNCH15_PB5 SILABS_DBUS_PRS0_ASYNCH15(0x1, 0x5) 1687 #define PRS0_SYNCH0_PA0 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x0) 1688 #define PRS0_SYNCH0_PA1 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x1) 1689 #define PRS0_SYNCH0_PA2 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x2) 1690 #define PRS0_SYNCH0_PA3 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x3) 1691 #define PRS0_SYNCH0_PA4 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x4) 1692 #define PRS0_SYNCH0_PA5 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x5) 1693 #define PRS0_SYNCH0_PA6 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x6) 1694 #define PRS0_SYNCH0_PA7 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x7) 1695 #define PRS0_SYNCH0_PA8 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x8) 1696 #define PRS0_SYNCH0_PA9 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x9) 1697 #define PRS0_SYNCH0_PB0 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x0) 1698 #define PRS0_SYNCH0_PB1 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x1) 1699 #define PRS0_SYNCH0_PB2 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x2) 1700 #define PRS0_SYNCH0_PB3 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x3) 1701 #define PRS0_SYNCH0_PB4 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x4) 1702 #define PRS0_SYNCH0_PB5 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x5) 1703 #define PRS0_SYNCH0_PC0 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x0) 1704 #define PRS0_SYNCH0_PC1 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x1) 1705 #define PRS0_SYNCH0_PC2 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x2) 1706 #define PRS0_SYNCH0_PC3 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x3) 1707 #define PRS0_SYNCH0_PC4 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x4) 1708 #define PRS0_SYNCH0_PC5 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x5) 1709 #define PRS0_SYNCH0_PC6 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x6) 1710 #define PRS0_SYNCH0_PC7 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x7) 1711 #define PRS0_SYNCH0_PC8 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x8) 1712 #define PRS0_SYNCH0_PC9 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x9) 1713 #define PRS0_SYNCH0_PD0 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x0) 1714 #define PRS0_SYNCH0_PD1 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x1) 1715 #define PRS0_SYNCH0_PD2 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x2) 1716 #define PRS0_SYNCH0_PD3 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x3) 1717 #define PRS0_SYNCH0_PD4 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x4) 1718 #define PRS0_SYNCH0_PD5 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x5) 1719 #define PRS0_SYNCH1_PA0 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x0) 1720 #define PRS0_SYNCH1_PA1 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x1) 1721 #define PRS0_SYNCH1_PA2 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x2) 1722 #define PRS0_SYNCH1_PA3 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x3) 1723 #define PRS0_SYNCH1_PA4 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x4) 1724 #define PRS0_SYNCH1_PA5 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x5) 1725 #define PRS0_SYNCH1_PA6 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x6) 1726 #define PRS0_SYNCH1_PA7 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x7) 1727 #define PRS0_SYNCH1_PA8 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x8) 1728 #define PRS0_SYNCH1_PA9 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x9) 1729 #define PRS0_SYNCH1_PB0 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x0) 1730 #define PRS0_SYNCH1_PB1 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x1) 1731 #define PRS0_SYNCH1_PB2 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x2) 1732 #define PRS0_SYNCH1_PB3 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x3) 1733 #define PRS0_SYNCH1_PB4 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x4) 1734 #define PRS0_SYNCH1_PB5 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x5) 1735 #define PRS0_SYNCH1_PC0 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x0) 1736 #define PRS0_SYNCH1_PC1 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x1) 1737 #define PRS0_SYNCH1_PC2 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x2) 1738 #define PRS0_SYNCH1_PC3 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x3) 1739 #define PRS0_SYNCH1_PC4 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x4) 1740 #define PRS0_SYNCH1_PC5 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x5) 1741 #define PRS0_SYNCH1_PC6 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x6) 1742 #define PRS0_SYNCH1_PC7 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x7) 1743 #define PRS0_SYNCH1_PC8 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x8) 1744 #define PRS0_SYNCH1_PC9 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x9) 1745 #define PRS0_SYNCH1_PD0 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x0) 1746 #define PRS0_SYNCH1_PD1 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x1) 1747 #define PRS0_SYNCH1_PD2 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x2) 1748 #define PRS0_SYNCH1_PD3 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x3) 1749 #define PRS0_SYNCH1_PD4 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x4) 1750 #define PRS0_SYNCH1_PD5 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x5) 1751 #define PRS0_SYNCH2_PA0 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x0) 1752 #define PRS0_SYNCH2_PA1 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x1) 1753 #define PRS0_SYNCH2_PA2 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x2) 1754 #define PRS0_SYNCH2_PA3 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x3) 1755 #define PRS0_SYNCH2_PA4 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x4) 1756 #define PRS0_SYNCH2_PA5 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x5) 1757 #define PRS0_SYNCH2_PA6 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x6) 1758 #define PRS0_SYNCH2_PA7 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x7) 1759 #define PRS0_SYNCH2_PA8 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x8) 1760 #define PRS0_SYNCH2_PA9 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x9) 1761 #define PRS0_SYNCH2_PB0 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x0) 1762 #define PRS0_SYNCH2_PB1 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x1) 1763 #define PRS0_SYNCH2_PB2 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x2) 1764 #define PRS0_SYNCH2_PB3 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x3) 1765 #define PRS0_SYNCH2_PB4 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x4) 1766 #define PRS0_SYNCH2_PB5 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x5) 1767 #define PRS0_SYNCH2_PC0 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x0) 1768 #define PRS0_SYNCH2_PC1 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x1) 1769 #define PRS0_SYNCH2_PC2 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x2) 1770 #define PRS0_SYNCH2_PC3 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x3) 1771 #define PRS0_SYNCH2_PC4 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x4) 1772 #define PRS0_SYNCH2_PC5 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x5) 1773 #define PRS0_SYNCH2_PC6 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x6) 1774 #define PRS0_SYNCH2_PC7 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x7) 1775 #define PRS0_SYNCH2_PC8 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x8) 1776 #define PRS0_SYNCH2_PC9 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x9) 1777 #define PRS0_SYNCH2_PD0 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x0) 1778 #define PRS0_SYNCH2_PD1 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x1) 1779 #define PRS0_SYNCH2_PD2 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x2) 1780 #define PRS0_SYNCH2_PD3 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x3) 1781 #define PRS0_SYNCH2_PD4 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x4) 1782 #define PRS0_SYNCH2_PD5 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x5) 1783 #define PRS0_SYNCH3_PA0 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x0) 1784 #define PRS0_SYNCH3_PA1 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x1) 1785 #define PRS0_SYNCH3_PA2 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x2) 1786 #define PRS0_SYNCH3_PA3 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x3) 1787 #define PRS0_SYNCH3_PA4 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x4) 1788 #define PRS0_SYNCH3_PA5 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x5) 1789 #define PRS0_SYNCH3_PA6 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x6) 1790 #define PRS0_SYNCH3_PA7 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x7) 1791 #define PRS0_SYNCH3_PA8 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x8) 1792 #define PRS0_SYNCH3_PA9 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x9) 1793 #define PRS0_SYNCH3_PB0 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x0) 1794 #define PRS0_SYNCH3_PB1 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x1) 1795 #define PRS0_SYNCH3_PB2 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x2) 1796 #define PRS0_SYNCH3_PB3 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x3) 1797 #define PRS0_SYNCH3_PB4 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x4) 1798 #define PRS0_SYNCH3_PB5 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x5) 1799 #define PRS0_SYNCH3_PC0 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x0) 1800 #define PRS0_SYNCH3_PC1 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x1) 1801 #define PRS0_SYNCH3_PC2 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x2) 1802 #define PRS0_SYNCH3_PC3 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x3) 1803 #define PRS0_SYNCH3_PC4 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x4) 1804 #define PRS0_SYNCH3_PC5 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x5) 1805 #define PRS0_SYNCH3_PC6 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x6) 1806 #define PRS0_SYNCH3_PC7 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x7) 1807 #define PRS0_SYNCH3_PC8 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x8) 1808 #define PRS0_SYNCH3_PC9 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x9) 1809 #define PRS0_SYNCH3_PD0 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x0) 1810 #define PRS0_SYNCH3_PD1 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x1) 1811 #define PRS0_SYNCH3_PD2 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x2) 1812 #define PRS0_SYNCH3_PD3 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x3) 1813 #define PRS0_SYNCH3_PD4 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x4) 1814 #define PRS0_SYNCH3_PD5 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x5) 1815 1816 #define HFXO0_BUFOUTREQINASYNC_PA0 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x0) 1817 #define HFXO0_BUFOUTREQINASYNC_PA1 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x1) 1818 #define HFXO0_BUFOUTREQINASYNC_PA2 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x2) 1819 #define HFXO0_BUFOUTREQINASYNC_PA3 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x3) 1820 #define HFXO0_BUFOUTREQINASYNC_PA4 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x4) 1821 #define HFXO0_BUFOUTREQINASYNC_PA5 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x5) 1822 #define HFXO0_BUFOUTREQINASYNC_PA6 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x6) 1823 #define HFXO0_BUFOUTREQINASYNC_PA7 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x7) 1824 #define HFXO0_BUFOUTREQINASYNC_PA8 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x8) 1825 #define HFXO0_BUFOUTREQINASYNC_PA9 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x9) 1826 #define HFXO0_BUFOUTREQINASYNC_PB0 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x0) 1827 #define HFXO0_BUFOUTREQINASYNC_PB1 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x1) 1828 #define HFXO0_BUFOUTREQINASYNC_PB2 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x2) 1829 #define HFXO0_BUFOUTREQINASYNC_PB3 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x3) 1830 #define HFXO0_BUFOUTREQINASYNC_PB4 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x4) 1831 #define HFXO0_BUFOUTREQINASYNC_PB5 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x5) 1832 1833 #define TIMER0_CC0_PA0 SILABS_DBUS_TIMER0_CC0(0x0, 0x0) 1834 #define TIMER0_CC0_PA1 SILABS_DBUS_TIMER0_CC0(0x0, 0x1) 1835 #define TIMER0_CC0_PA2 SILABS_DBUS_TIMER0_CC0(0x0, 0x2) 1836 #define TIMER0_CC0_PA3 SILABS_DBUS_TIMER0_CC0(0x0, 0x3) 1837 #define TIMER0_CC0_PA4 SILABS_DBUS_TIMER0_CC0(0x0, 0x4) 1838 #define TIMER0_CC0_PA5 SILABS_DBUS_TIMER0_CC0(0x0, 0x5) 1839 #define TIMER0_CC0_PA6 SILABS_DBUS_TIMER0_CC0(0x0, 0x6) 1840 #define TIMER0_CC0_PA7 SILABS_DBUS_TIMER0_CC0(0x0, 0x7) 1841 #define TIMER0_CC0_PA8 SILABS_DBUS_TIMER0_CC0(0x0, 0x8) 1842 #define TIMER0_CC0_PA9 SILABS_DBUS_TIMER0_CC0(0x0, 0x9) 1843 #define TIMER0_CC0_PB0 SILABS_DBUS_TIMER0_CC0(0x1, 0x0) 1844 #define TIMER0_CC0_PB1 SILABS_DBUS_TIMER0_CC0(0x1, 0x1) 1845 #define TIMER0_CC0_PB2 SILABS_DBUS_TIMER0_CC0(0x1, 0x2) 1846 #define TIMER0_CC0_PB3 SILABS_DBUS_TIMER0_CC0(0x1, 0x3) 1847 #define TIMER0_CC0_PB4 SILABS_DBUS_TIMER0_CC0(0x1, 0x4) 1848 #define TIMER0_CC0_PB5 SILABS_DBUS_TIMER0_CC0(0x1, 0x5) 1849 #define TIMER0_CC0_PC0 SILABS_DBUS_TIMER0_CC0(0x2, 0x0) 1850 #define TIMER0_CC0_PC1 SILABS_DBUS_TIMER0_CC0(0x2, 0x1) 1851 #define TIMER0_CC0_PC2 SILABS_DBUS_TIMER0_CC0(0x2, 0x2) 1852 #define TIMER0_CC0_PC3 SILABS_DBUS_TIMER0_CC0(0x2, 0x3) 1853 #define TIMER0_CC0_PC4 SILABS_DBUS_TIMER0_CC0(0x2, 0x4) 1854 #define TIMER0_CC0_PC5 SILABS_DBUS_TIMER0_CC0(0x2, 0x5) 1855 #define TIMER0_CC0_PC6 SILABS_DBUS_TIMER0_CC0(0x2, 0x6) 1856 #define TIMER0_CC0_PC7 SILABS_DBUS_TIMER0_CC0(0x2, 0x7) 1857 #define TIMER0_CC0_PC8 SILABS_DBUS_TIMER0_CC0(0x2, 0x8) 1858 #define TIMER0_CC0_PC9 SILABS_DBUS_TIMER0_CC0(0x2, 0x9) 1859 #define TIMER0_CC0_PD0 SILABS_DBUS_TIMER0_CC0(0x3, 0x0) 1860 #define TIMER0_CC0_PD1 SILABS_DBUS_TIMER0_CC0(0x3, 0x1) 1861 #define TIMER0_CC0_PD2 SILABS_DBUS_TIMER0_CC0(0x3, 0x2) 1862 #define TIMER0_CC0_PD3 SILABS_DBUS_TIMER0_CC0(0x3, 0x3) 1863 #define TIMER0_CC0_PD4 SILABS_DBUS_TIMER0_CC0(0x3, 0x4) 1864 #define TIMER0_CC0_PD5 SILABS_DBUS_TIMER0_CC0(0x3, 0x5) 1865 #define TIMER0_CC1_PA0 SILABS_DBUS_TIMER0_CC1(0x0, 0x0) 1866 #define TIMER0_CC1_PA1 SILABS_DBUS_TIMER0_CC1(0x0, 0x1) 1867 #define TIMER0_CC1_PA2 SILABS_DBUS_TIMER0_CC1(0x0, 0x2) 1868 #define TIMER0_CC1_PA3 SILABS_DBUS_TIMER0_CC1(0x0, 0x3) 1869 #define TIMER0_CC1_PA4 SILABS_DBUS_TIMER0_CC1(0x0, 0x4) 1870 #define TIMER0_CC1_PA5 SILABS_DBUS_TIMER0_CC1(0x0, 0x5) 1871 #define TIMER0_CC1_PA6 SILABS_DBUS_TIMER0_CC1(0x0, 0x6) 1872 #define TIMER0_CC1_PA7 SILABS_DBUS_TIMER0_CC1(0x0, 0x7) 1873 #define TIMER0_CC1_PA8 SILABS_DBUS_TIMER0_CC1(0x0, 0x8) 1874 #define TIMER0_CC1_PA9 SILABS_DBUS_TIMER0_CC1(0x0, 0x9) 1875 #define TIMER0_CC1_PB0 SILABS_DBUS_TIMER0_CC1(0x1, 0x0) 1876 #define TIMER0_CC1_PB1 SILABS_DBUS_TIMER0_CC1(0x1, 0x1) 1877 #define TIMER0_CC1_PB2 SILABS_DBUS_TIMER0_CC1(0x1, 0x2) 1878 #define TIMER0_CC1_PB3 SILABS_DBUS_TIMER0_CC1(0x1, 0x3) 1879 #define TIMER0_CC1_PB4 SILABS_DBUS_TIMER0_CC1(0x1, 0x4) 1880 #define TIMER0_CC1_PB5 SILABS_DBUS_TIMER0_CC1(0x1, 0x5) 1881 #define TIMER0_CC1_PC0 SILABS_DBUS_TIMER0_CC1(0x2, 0x0) 1882 #define TIMER0_CC1_PC1 SILABS_DBUS_TIMER0_CC1(0x2, 0x1) 1883 #define TIMER0_CC1_PC2 SILABS_DBUS_TIMER0_CC1(0x2, 0x2) 1884 #define TIMER0_CC1_PC3 SILABS_DBUS_TIMER0_CC1(0x2, 0x3) 1885 #define TIMER0_CC1_PC4 SILABS_DBUS_TIMER0_CC1(0x2, 0x4) 1886 #define TIMER0_CC1_PC5 SILABS_DBUS_TIMER0_CC1(0x2, 0x5) 1887 #define TIMER0_CC1_PC6 SILABS_DBUS_TIMER0_CC1(0x2, 0x6) 1888 #define TIMER0_CC1_PC7 SILABS_DBUS_TIMER0_CC1(0x2, 0x7) 1889 #define TIMER0_CC1_PC8 SILABS_DBUS_TIMER0_CC1(0x2, 0x8) 1890 #define TIMER0_CC1_PC9 SILABS_DBUS_TIMER0_CC1(0x2, 0x9) 1891 #define TIMER0_CC1_PD0 SILABS_DBUS_TIMER0_CC1(0x3, 0x0) 1892 #define TIMER0_CC1_PD1 SILABS_DBUS_TIMER0_CC1(0x3, 0x1) 1893 #define TIMER0_CC1_PD2 SILABS_DBUS_TIMER0_CC1(0x3, 0x2) 1894 #define TIMER0_CC1_PD3 SILABS_DBUS_TIMER0_CC1(0x3, 0x3) 1895 #define TIMER0_CC1_PD4 SILABS_DBUS_TIMER0_CC1(0x3, 0x4) 1896 #define TIMER0_CC1_PD5 SILABS_DBUS_TIMER0_CC1(0x3, 0x5) 1897 #define TIMER0_CC2_PA0 SILABS_DBUS_TIMER0_CC2(0x0, 0x0) 1898 #define TIMER0_CC2_PA1 SILABS_DBUS_TIMER0_CC2(0x0, 0x1) 1899 #define TIMER0_CC2_PA2 SILABS_DBUS_TIMER0_CC2(0x0, 0x2) 1900 #define TIMER0_CC2_PA3 SILABS_DBUS_TIMER0_CC2(0x0, 0x3) 1901 #define TIMER0_CC2_PA4 SILABS_DBUS_TIMER0_CC2(0x0, 0x4) 1902 #define TIMER0_CC2_PA5 SILABS_DBUS_TIMER0_CC2(0x0, 0x5) 1903 #define TIMER0_CC2_PA6 SILABS_DBUS_TIMER0_CC2(0x0, 0x6) 1904 #define TIMER0_CC2_PA7 SILABS_DBUS_TIMER0_CC2(0x0, 0x7) 1905 #define TIMER0_CC2_PA8 SILABS_DBUS_TIMER0_CC2(0x0, 0x8) 1906 #define TIMER0_CC2_PA9 SILABS_DBUS_TIMER0_CC2(0x0, 0x9) 1907 #define TIMER0_CC2_PB0 SILABS_DBUS_TIMER0_CC2(0x1, 0x0) 1908 #define TIMER0_CC2_PB1 SILABS_DBUS_TIMER0_CC2(0x1, 0x1) 1909 #define TIMER0_CC2_PB2 SILABS_DBUS_TIMER0_CC2(0x1, 0x2) 1910 #define TIMER0_CC2_PB3 SILABS_DBUS_TIMER0_CC2(0x1, 0x3) 1911 #define TIMER0_CC2_PB4 SILABS_DBUS_TIMER0_CC2(0x1, 0x4) 1912 #define TIMER0_CC2_PB5 SILABS_DBUS_TIMER0_CC2(0x1, 0x5) 1913 #define TIMER0_CC2_PC0 SILABS_DBUS_TIMER0_CC2(0x2, 0x0) 1914 #define TIMER0_CC2_PC1 SILABS_DBUS_TIMER0_CC2(0x2, 0x1) 1915 #define TIMER0_CC2_PC2 SILABS_DBUS_TIMER0_CC2(0x2, 0x2) 1916 #define TIMER0_CC2_PC3 SILABS_DBUS_TIMER0_CC2(0x2, 0x3) 1917 #define TIMER0_CC2_PC4 SILABS_DBUS_TIMER0_CC2(0x2, 0x4) 1918 #define TIMER0_CC2_PC5 SILABS_DBUS_TIMER0_CC2(0x2, 0x5) 1919 #define TIMER0_CC2_PC6 SILABS_DBUS_TIMER0_CC2(0x2, 0x6) 1920 #define TIMER0_CC2_PC7 SILABS_DBUS_TIMER0_CC2(0x2, 0x7) 1921 #define TIMER0_CC2_PC8 SILABS_DBUS_TIMER0_CC2(0x2, 0x8) 1922 #define TIMER0_CC2_PC9 SILABS_DBUS_TIMER0_CC2(0x2, 0x9) 1923 #define TIMER0_CC2_PD0 SILABS_DBUS_TIMER0_CC2(0x3, 0x0) 1924 #define TIMER0_CC2_PD1 SILABS_DBUS_TIMER0_CC2(0x3, 0x1) 1925 #define TIMER0_CC2_PD2 SILABS_DBUS_TIMER0_CC2(0x3, 0x2) 1926 #define TIMER0_CC2_PD3 SILABS_DBUS_TIMER0_CC2(0x3, 0x3) 1927 #define TIMER0_CC2_PD4 SILABS_DBUS_TIMER0_CC2(0x3, 0x4) 1928 #define TIMER0_CC2_PD5 SILABS_DBUS_TIMER0_CC2(0x3, 0x5) 1929 #define TIMER0_CDTI0_PA0 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x0) 1930 #define TIMER0_CDTI0_PA1 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x1) 1931 #define TIMER0_CDTI0_PA2 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x2) 1932 #define TIMER0_CDTI0_PA3 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x3) 1933 #define TIMER0_CDTI0_PA4 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x4) 1934 #define TIMER0_CDTI0_PA5 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x5) 1935 #define TIMER0_CDTI0_PA6 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x6) 1936 #define TIMER0_CDTI0_PA7 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x7) 1937 #define TIMER0_CDTI0_PA8 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x8) 1938 #define TIMER0_CDTI0_PA9 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x9) 1939 #define TIMER0_CDTI0_PB0 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x0) 1940 #define TIMER0_CDTI0_PB1 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x1) 1941 #define TIMER0_CDTI0_PB2 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x2) 1942 #define TIMER0_CDTI0_PB3 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x3) 1943 #define TIMER0_CDTI0_PB4 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x4) 1944 #define TIMER0_CDTI0_PB5 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x5) 1945 #define TIMER0_CDTI0_PC0 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x0) 1946 #define TIMER0_CDTI0_PC1 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x1) 1947 #define TIMER0_CDTI0_PC2 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x2) 1948 #define TIMER0_CDTI0_PC3 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x3) 1949 #define TIMER0_CDTI0_PC4 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x4) 1950 #define TIMER0_CDTI0_PC5 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x5) 1951 #define TIMER0_CDTI0_PC6 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x6) 1952 #define TIMER0_CDTI0_PC7 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x7) 1953 #define TIMER0_CDTI0_PC8 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x8) 1954 #define TIMER0_CDTI0_PC9 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x9) 1955 #define TIMER0_CDTI0_PD0 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x0) 1956 #define TIMER0_CDTI0_PD1 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x1) 1957 #define TIMER0_CDTI0_PD2 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x2) 1958 #define TIMER0_CDTI0_PD3 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x3) 1959 #define TIMER0_CDTI0_PD4 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x4) 1960 #define TIMER0_CDTI0_PD5 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x5) 1961 #define TIMER0_CDTI1_PA0 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x0) 1962 #define TIMER0_CDTI1_PA1 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x1) 1963 #define TIMER0_CDTI1_PA2 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x2) 1964 #define TIMER0_CDTI1_PA3 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x3) 1965 #define TIMER0_CDTI1_PA4 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x4) 1966 #define TIMER0_CDTI1_PA5 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x5) 1967 #define TIMER0_CDTI1_PA6 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x6) 1968 #define TIMER0_CDTI1_PA7 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x7) 1969 #define TIMER0_CDTI1_PA8 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x8) 1970 #define TIMER0_CDTI1_PA9 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x9) 1971 #define TIMER0_CDTI1_PB0 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x0) 1972 #define TIMER0_CDTI1_PB1 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x1) 1973 #define TIMER0_CDTI1_PB2 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x2) 1974 #define TIMER0_CDTI1_PB3 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x3) 1975 #define TIMER0_CDTI1_PB4 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x4) 1976 #define TIMER0_CDTI1_PB5 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x5) 1977 #define TIMER0_CDTI1_PC0 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x0) 1978 #define TIMER0_CDTI1_PC1 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x1) 1979 #define TIMER0_CDTI1_PC2 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x2) 1980 #define TIMER0_CDTI1_PC3 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x3) 1981 #define TIMER0_CDTI1_PC4 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x4) 1982 #define TIMER0_CDTI1_PC5 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x5) 1983 #define TIMER0_CDTI1_PC6 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x6) 1984 #define TIMER0_CDTI1_PC7 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x7) 1985 #define TIMER0_CDTI1_PC8 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x8) 1986 #define TIMER0_CDTI1_PC9 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x9) 1987 #define TIMER0_CDTI1_PD0 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x0) 1988 #define TIMER0_CDTI1_PD1 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x1) 1989 #define TIMER0_CDTI1_PD2 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x2) 1990 #define TIMER0_CDTI1_PD3 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x3) 1991 #define TIMER0_CDTI1_PD4 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x4) 1992 #define TIMER0_CDTI1_PD5 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x5) 1993 #define TIMER0_CDTI2_PA0 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x0) 1994 #define TIMER0_CDTI2_PA1 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x1) 1995 #define TIMER0_CDTI2_PA2 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x2) 1996 #define TIMER0_CDTI2_PA3 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x3) 1997 #define TIMER0_CDTI2_PA4 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x4) 1998 #define TIMER0_CDTI2_PA5 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x5) 1999 #define TIMER0_CDTI2_PA6 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x6) 2000 #define TIMER0_CDTI2_PA7 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x7) 2001 #define TIMER0_CDTI2_PA8 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x8) 2002 #define TIMER0_CDTI2_PA9 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x9) 2003 #define TIMER0_CDTI2_PB0 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x0) 2004 #define TIMER0_CDTI2_PB1 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x1) 2005 #define TIMER0_CDTI2_PB2 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x2) 2006 #define TIMER0_CDTI2_PB3 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x3) 2007 #define TIMER0_CDTI2_PB4 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x4) 2008 #define TIMER0_CDTI2_PB5 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x5) 2009 #define TIMER0_CDTI2_PC0 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x0) 2010 #define TIMER0_CDTI2_PC1 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x1) 2011 #define TIMER0_CDTI2_PC2 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x2) 2012 #define TIMER0_CDTI2_PC3 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x3) 2013 #define TIMER0_CDTI2_PC4 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x4) 2014 #define TIMER0_CDTI2_PC5 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x5) 2015 #define TIMER0_CDTI2_PC6 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x6) 2016 #define TIMER0_CDTI2_PC7 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x7) 2017 #define TIMER0_CDTI2_PC8 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x8) 2018 #define TIMER0_CDTI2_PC9 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x9) 2019 #define TIMER0_CDTI2_PD0 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x0) 2020 #define TIMER0_CDTI2_PD1 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x1) 2021 #define TIMER0_CDTI2_PD2 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x2) 2022 #define TIMER0_CDTI2_PD3 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x3) 2023 #define TIMER0_CDTI2_PD4 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x4) 2024 #define TIMER0_CDTI2_PD5 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x5) 2025 2026 #define TIMER1_CC0_PA0 SILABS_DBUS_TIMER1_CC0(0x0, 0x0) 2027 #define TIMER1_CC0_PA1 SILABS_DBUS_TIMER1_CC0(0x0, 0x1) 2028 #define TIMER1_CC0_PA2 SILABS_DBUS_TIMER1_CC0(0x0, 0x2) 2029 #define TIMER1_CC0_PA3 SILABS_DBUS_TIMER1_CC0(0x0, 0x3) 2030 #define TIMER1_CC0_PA4 SILABS_DBUS_TIMER1_CC0(0x0, 0x4) 2031 #define TIMER1_CC0_PA5 SILABS_DBUS_TIMER1_CC0(0x0, 0x5) 2032 #define TIMER1_CC0_PA6 SILABS_DBUS_TIMER1_CC0(0x0, 0x6) 2033 #define TIMER1_CC0_PA7 SILABS_DBUS_TIMER1_CC0(0x0, 0x7) 2034 #define TIMER1_CC0_PA8 SILABS_DBUS_TIMER1_CC0(0x0, 0x8) 2035 #define TIMER1_CC0_PA9 SILABS_DBUS_TIMER1_CC0(0x0, 0x9) 2036 #define TIMER1_CC0_PB0 SILABS_DBUS_TIMER1_CC0(0x1, 0x0) 2037 #define TIMER1_CC0_PB1 SILABS_DBUS_TIMER1_CC0(0x1, 0x1) 2038 #define TIMER1_CC0_PB2 SILABS_DBUS_TIMER1_CC0(0x1, 0x2) 2039 #define TIMER1_CC0_PB3 SILABS_DBUS_TIMER1_CC0(0x1, 0x3) 2040 #define TIMER1_CC0_PB4 SILABS_DBUS_TIMER1_CC0(0x1, 0x4) 2041 #define TIMER1_CC0_PB5 SILABS_DBUS_TIMER1_CC0(0x1, 0x5) 2042 #define TIMER1_CC0_PC0 SILABS_DBUS_TIMER1_CC0(0x2, 0x0) 2043 #define TIMER1_CC0_PC1 SILABS_DBUS_TIMER1_CC0(0x2, 0x1) 2044 #define TIMER1_CC0_PC2 SILABS_DBUS_TIMER1_CC0(0x2, 0x2) 2045 #define TIMER1_CC0_PC3 SILABS_DBUS_TIMER1_CC0(0x2, 0x3) 2046 #define TIMER1_CC0_PC4 SILABS_DBUS_TIMER1_CC0(0x2, 0x4) 2047 #define TIMER1_CC0_PC5 SILABS_DBUS_TIMER1_CC0(0x2, 0x5) 2048 #define TIMER1_CC0_PC6 SILABS_DBUS_TIMER1_CC0(0x2, 0x6) 2049 #define TIMER1_CC0_PC7 SILABS_DBUS_TIMER1_CC0(0x2, 0x7) 2050 #define TIMER1_CC0_PC8 SILABS_DBUS_TIMER1_CC0(0x2, 0x8) 2051 #define TIMER1_CC0_PC9 SILABS_DBUS_TIMER1_CC0(0x2, 0x9) 2052 #define TIMER1_CC0_PD0 SILABS_DBUS_TIMER1_CC0(0x3, 0x0) 2053 #define TIMER1_CC0_PD1 SILABS_DBUS_TIMER1_CC0(0x3, 0x1) 2054 #define TIMER1_CC0_PD2 SILABS_DBUS_TIMER1_CC0(0x3, 0x2) 2055 #define TIMER1_CC0_PD3 SILABS_DBUS_TIMER1_CC0(0x3, 0x3) 2056 #define TIMER1_CC0_PD4 SILABS_DBUS_TIMER1_CC0(0x3, 0x4) 2057 #define TIMER1_CC0_PD5 SILABS_DBUS_TIMER1_CC0(0x3, 0x5) 2058 #define TIMER1_CC1_PA0 SILABS_DBUS_TIMER1_CC1(0x0, 0x0) 2059 #define TIMER1_CC1_PA1 SILABS_DBUS_TIMER1_CC1(0x0, 0x1) 2060 #define TIMER1_CC1_PA2 SILABS_DBUS_TIMER1_CC1(0x0, 0x2) 2061 #define TIMER1_CC1_PA3 SILABS_DBUS_TIMER1_CC1(0x0, 0x3) 2062 #define TIMER1_CC1_PA4 SILABS_DBUS_TIMER1_CC1(0x0, 0x4) 2063 #define TIMER1_CC1_PA5 SILABS_DBUS_TIMER1_CC1(0x0, 0x5) 2064 #define TIMER1_CC1_PA6 SILABS_DBUS_TIMER1_CC1(0x0, 0x6) 2065 #define TIMER1_CC1_PA7 SILABS_DBUS_TIMER1_CC1(0x0, 0x7) 2066 #define TIMER1_CC1_PA8 SILABS_DBUS_TIMER1_CC1(0x0, 0x8) 2067 #define TIMER1_CC1_PA9 SILABS_DBUS_TIMER1_CC1(0x0, 0x9) 2068 #define TIMER1_CC1_PB0 SILABS_DBUS_TIMER1_CC1(0x1, 0x0) 2069 #define TIMER1_CC1_PB1 SILABS_DBUS_TIMER1_CC1(0x1, 0x1) 2070 #define TIMER1_CC1_PB2 SILABS_DBUS_TIMER1_CC1(0x1, 0x2) 2071 #define TIMER1_CC1_PB3 SILABS_DBUS_TIMER1_CC1(0x1, 0x3) 2072 #define TIMER1_CC1_PB4 SILABS_DBUS_TIMER1_CC1(0x1, 0x4) 2073 #define TIMER1_CC1_PB5 SILABS_DBUS_TIMER1_CC1(0x1, 0x5) 2074 #define TIMER1_CC1_PC0 SILABS_DBUS_TIMER1_CC1(0x2, 0x0) 2075 #define TIMER1_CC1_PC1 SILABS_DBUS_TIMER1_CC1(0x2, 0x1) 2076 #define TIMER1_CC1_PC2 SILABS_DBUS_TIMER1_CC1(0x2, 0x2) 2077 #define TIMER1_CC1_PC3 SILABS_DBUS_TIMER1_CC1(0x2, 0x3) 2078 #define TIMER1_CC1_PC4 SILABS_DBUS_TIMER1_CC1(0x2, 0x4) 2079 #define TIMER1_CC1_PC5 SILABS_DBUS_TIMER1_CC1(0x2, 0x5) 2080 #define TIMER1_CC1_PC6 SILABS_DBUS_TIMER1_CC1(0x2, 0x6) 2081 #define TIMER1_CC1_PC7 SILABS_DBUS_TIMER1_CC1(0x2, 0x7) 2082 #define TIMER1_CC1_PC8 SILABS_DBUS_TIMER1_CC1(0x2, 0x8) 2083 #define TIMER1_CC1_PC9 SILABS_DBUS_TIMER1_CC1(0x2, 0x9) 2084 #define TIMER1_CC1_PD0 SILABS_DBUS_TIMER1_CC1(0x3, 0x0) 2085 #define TIMER1_CC1_PD1 SILABS_DBUS_TIMER1_CC1(0x3, 0x1) 2086 #define TIMER1_CC1_PD2 SILABS_DBUS_TIMER1_CC1(0x3, 0x2) 2087 #define TIMER1_CC1_PD3 SILABS_DBUS_TIMER1_CC1(0x3, 0x3) 2088 #define TIMER1_CC1_PD4 SILABS_DBUS_TIMER1_CC1(0x3, 0x4) 2089 #define TIMER1_CC1_PD5 SILABS_DBUS_TIMER1_CC1(0x3, 0x5) 2090 #define TIMER1_CC2_PA0 SILABS_DBUS_TIMER1_CC2(0x0, 0x0) 2091 #define TIMER1_CC2_PA1 SILABS_DBUS_TIMER1_CC2(0x0, 0x1) 2092 #define TIMER1_CC2_PA2 SILABS_DBUS_TIMER1_CC2(0x0, 0x2) 2093 #define TIMER1_CC2_PA3 SILABS_DBUS_TIMER1_CC2(0x0, 0x3) 2094 #define TIMER1_CC2_PA4 SILABS_DBUS_TIMER1_CC2(0x0, 0x4) 2095 #define TIMER1_CC2_PA5 SILABS_DBUS_TIMER1_CC2(0x0, 0x5) 2096 #define TIMER1_CC2_PA6 SILABS_DBUS_TIMER1_CC2(0x0, 0x6) 2097 #define TIMER1_CC2_PA7 SILABS_DBUS_TIMER1_CC2(0x0, 0x7) 2098 #define TIMER1_CC2_PA8 SILABS_DBUS_TIMER1_CC2(0x0, 0x8) 2099 #define TIMER1_CC2_PA9 SILABS_DBUS_TIMER1_CC2(0x0, 0x9) 2100 #define TIMER1_CC2_PB0 SILABS_DBUS_TIMER1_CC2(0x1, 0x0) 2101 #define TIMER1_CC2_PB1 SILABS_DBUS_TIMER1_CC2(0x1, 0x1) 2102 #define TIMER1_CC2_PB2 SILABS_DBUS_TIMER1_CC2(0x1, 0x2) 2103 #define TIMER1_CC2_PB3 SILABS_DBUS_TIMER1_CC2(0x1, 0x3) 2104 #define TIMER1_CC2_PB4 SILABS_DBUS_TIMER1_CC2(0x1, 0x4) 2105 #define TIMER1_CC2_PB5 SILABS_DBUS_TIMER1_CC2(0x1, 0x5) 2106 #define TIMER1_CC2_PC0 SILABS_DBUS_TIMER1_CC2(0x2, 0x0) 2107 #define TIMER1_CC2_PC1 SILABS_DBUS_TIMER1_CC2(0x2, 0x1) 2108 #define TIMER1_CC2_PC2 SILABS_DBUS_TIMER1_CC2(0x2, 0x2) 2109 #define TIMER1_CC2_PC3 SILABS_DBUS_TIMER1_CC2(0x2, 0x3) 2110 #define TIMER1_CC2_PC4 SILABS_DBUS_TIMER1_CC2(0x2, 0x4) 2111 #define TIMER1_CC2_PC5 SILABS_DBUS_TIMER1_CC2(0x2, 0x5) 2112 #define TIMER1_CC2_PC6 SILABS_DBUS_TIMER1_CC2(0x2, 0x6) 2113 #define TIMER1_CC2_PC7 SILABS_DBUS_TIMER1_CC2(0x2, 0x7) 2114 #define TIMER1_CC2_PC8 SILABS_DBUS_TIMER1_CC2(0x2, 0x8) 2115 #define TIMER1_CC2_PC9 SILABS_DBUS_TIMER1_CC2(0x2, 0x9) 2116 #define TIMER1_CC2_PD0 SILABS_DBUS_TIMER1_CC2(0x3, 0x0) 2117 #define TIMER1_CC2_PD1 SILABS_DBUS_TIMER1_CC2(0x3, 0x1) 2118 #define TIMER1_CC2_PD2 SILABS_DBUS_TIMER1_CC2(0x3, 0x2) 2119 #define TIMER1_CC2_PD3 SILABS_DBUS_TIMER1_CC2(0x3, 0x3) 2120 #define TIMER1_CC2_PD4 SILABS_DBUS_TIMER1_CC2(0x3, 0x4) 2121 #define TIMER1_CC2_PD5 SILABS_DBUS_TIMER1_CC2(0x3, 0x5) 2122 #define TIMER1_CDTI0_PA0 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x0) 2123 #define TIMER1_CDTI0_PA1 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x1) 2124 #define TIMER1_CDTI0_PA2 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x2) 2125 #define TIMER1_CDTI0_PA3 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x3) 2126 #define TIMER1_CDTI0_PA4 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x4) 2127 #define TIMER1_CDTI0_PA5 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x5) 2128 #define TIMER1_CDTI0_PA6 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x6) 2129 #define TIMER1_CDTI0_PA7 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x7) 2130 #define TIMER1_CDTI0_PA8 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x8) 2131 #define TIMER1_CDTI0_PA9 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x9) 2132 #define TIMER1_CDTI0_PB0 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x0) 2133 #define TIMER1_CDTI0_PB1 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x1) 2134 #define TIMER1_CDTI0_PB2 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x2) 2135 #define TIMER1_CDTI0_PB3 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x3) 2136 #define TIMER1_CDTI0_PB4 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x4) 2137 #define TIMER1_CDTI0_PB5 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x5) 2138 #define TIMER1_CDTI0_PC0 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x0) 2139 #define TIMER1_CDTI0_PC1 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x1) 2140 #define TIMER1_CDTI0_PC2 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x2) 2141 #define TIMER1_CDTI0_PC3 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x3) 2142 #define TIMER1_CDTI0_PC4 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x4) 2143 #define TIMER1_CDTI0_PC5 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x5) 2144 #define TIMER1_CDTI0_PC6 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x6) 2145 #define TIMER1_CDTI0_PC7 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x7) 2146 #define TIMER1_CDTI0_PC8 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x8) 2147 #define TIMER1_CDTI0_PC9 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x9) 2148 #define TIMER1_CDTI0_PD0 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x0) 2149 #define TIMER1_CDTI0_PD1 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x1) 2150 #define TIMER1_CDTI0_PD2 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x2) 2151 #define TIMER1_CDTI0_PD3 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x3) 2152 #define TIMER1_CDTI0_PD4 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x4) 2153 #define TIMER1_CDTI0_PD5 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x5) 2154 #define TIMER1_CDTI1_PA0 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x0) 2155 #define TIMER1_CDTI1_PA1 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x1) 2156 #define TIMER1_CDTI1_PA2 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x2) 2157 #define TIMER1_CDTI1_PA3 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x3) 2158 #define TIMER1_CDTI1_PA4 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x4) 2159 #define TIMER1_CDTI1_PA5 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x5) 2160 #define TIMER1_CDTI1_PA6 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x6) 2161 #define TIMER1_CDTI1_PA7 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x7) 2162 #define TIMER1_CDTI1_PA8 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x8) 2163 #define TIMER1_CDTI1_PA9 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x9) 2164 #define TIMER1_CDTI1_PB0 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x0) 2165 #define TIMER1_CDTI1_PB1 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x1) 2166 #define TIMER1_CDTI1_PB2 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x2) 2167 #define TIMER1_CDTI1_PB3 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x3) 2168 #define TIMER1_CDTI1_PB4 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x4) 2169 #define TIMER1_CDTI1_PB5 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x5) 2170 #define TIMER1_CDTI1_PC0 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x0) 2171 #define TIMER1_CDTI1_PC1 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x1) 2172 #define TIMER1_CDTI1_PC2 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x2) 2173 #define TIMER1_CDTI1_PC3 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x3) 2174 #define TIMER1_CDTI1_PC4 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x4) 2175 #define TIMER1_CDTI1_PC5 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x5) 2176 #define TIMER1_CDTI1_PC6 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x6) 2177 #define TIMER1_CDTI1_PC7 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x7) 2178 #define TIMER1_CDTI1_PC8 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x8) 2179 #define TIMER1_CDTI1_PC9 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x9) 2180 #define TIMER1_CDTI1_PD0 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x0) 2181 #define TIMER1_CDTI1_PD1 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x1) 2182 #define TIMER1_CDTI1_PD2 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x2) 2183 #define TIMER1_CDTI1_PD3 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x3) 2184 #define TIMER1_CDTI1_PD4 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x4) 2185 #define TIMER1_CDTI1_PD5 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x5) 2186 #define TIMER1_CDTI2_PA0 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x0) 2187 #define TIMER1_CDTI2_PA1 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x1) 2188 #define TIMER1_CDTI2_PA2 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x2) 2189 #define TIMER1_CDTI2_PA3 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x3) 2190 #define TIMER1_CDTI2_PA4 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x4) 2191 #define TIMER1_CDTI2_PA5 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x5) 2192 #define TIMER1_CDTI2_PA6 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x6) 2193 #define TIMER1_CDTI2_PA7 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x7) 2194 #define TIMER1_CDTI2_PA8 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x8) 2195 #define TIMER1_CDTI2_PA9 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x9) 2196 #define TIMER1_CDTI2_PB0 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x0) 2197 #define TIMER1_CDTI2_PB1 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x1) 2198 #define TIMER1_CDTI2_PB2 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x2) 2199 #define TIMER1_CDTI2_PB3 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x3) 2200 #define TIMER1_CDTI2_PB4 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x4) 2201 #define TIMER1_CDTI2_PB5 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x5) 2202 #define TIMER1_CDTI2_PC0 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x0) 2203 #define TIMER1_CDTI2_PC1 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x1) 2204 #define TIMER1_CDTI2_PC2 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x2) 2205 #define TIMER1_CDTI2_PC3 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x3) 2206 #define TIMER1_CDTI2_PC4 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x4) 2207 #define TIMER1_CDTI2_PC5 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x5) 2208 #define TIMER1_CDTI2_PC6 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x6) 2209 #define TIMER1_CDTI2_PC7 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x7) 2210 #define TIMER1_CDTI2_PC8 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x8) 2211 #define TIMER1_CDTI2_PC9 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x9) 2212 #define TIMER1_CDTI2_PD0 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x0) 2213 #define TIMER1_CDTI2_PD1 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x1) 2214 #define TIMER1_CDTI2_PD2 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x2) 2215 #define TIMER1_CDTI2_PD3 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x3) 2216 #define TIMER1_CDTI2_PD4 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x4) 2217 #define TIMER1_CDTI2_PD5 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x5) 2218 2219 #define TIMER2_CC0_PA0 SILABS_DBUS_TIMER2_CC0(0x0, 0x0) 2220 #define TIMER2_CC0_PA1 SILABS_DBUS_TIMER2_CC0(0x0, 0x1) 2221 #define TIMER2_CC0_PA2 SILABS_DBUS_TIMER2_CC0(0x0, 0x2) 2222 #define TIMER2_CC0_PA3 SILABS_DBUS_TIMER2_CC0(0x0, 0x3) 2223 #define TIMER2_CC0_PA4 SILABS_DBUS_TIMER2_CC0(0x0, 0x4) 2224 #define TIMER2_CC0_PA5 SILABS_DBUS_TIMER2_CC0(0x0, 0x5) 2225 #define TIMER2_CC0_PA6 SILABS_DBUS_TIMER2_CC0(0x0, 0x6) 2226 #define TIMER2_CC0_PA7 SILABS_DBUS_TIMER2_CC0(0x0, 0x7) 2227 #define TIMER2_CC0_PA8 SILABS_DBUS_TIMER2_CC0(0x0, 0x8) 2228 #define TIMER2_CC0_PA9 SILABS_DBUS_TIMER2_CC0(0x0, 0x9) 2229 #define TIMER2_CC0_PB0 SILABS_DBUS_TIMER2_CC0(0x1, 0x0) 2230 #define TIMER2_CC0_PB1 SILABS_DBUS_TIMER2_CC0(0x1, 0x1) 2231 #define TIMER2_CC0_PB2 SILABS_DBUS_TIMER2_CC0(0x1, 0x2) 2232 #define TIMER2_CC0_PB3 SILABS_DBUS_TIMER2_CC0(0x1, 0x3) 2233 #define TIMER2_CC0_PB4 SILABS_DBUS_TIMER2_CC0(0x1, 0x4) 2234 #define TIMER2_CC0_PB5 SILABS_DBUS_TIMER2_CC0(0x1, 0x5) 2235 #define TIMER2_CC1_PA0 SILABS_DBUS_TIMER2_CC1(0x0, 0x0) 2236 #define TIMER2_CC1_PA1 SILABS_DBUS_TIMER2_CC1(0x0, 0x1) 2237 #define TIMER2_CC1_PA2 SILABS_DBUS_TIMER2_CC1(0x0, 0x2) 2238 #define TIMER2_CC1_PA3 SILABS_DBUS_TIMER2_CC1(0x0, 0x3) 2239 #define TIMER2_CC1_PA4 SILABS_DBUS_TIMER2_CC1(0x0, 0x4) 2240 #define TIMER2_CC1_PA5 SILABS_DBUS_TIMER2_CC1(0x0, 0x5) 2241 #define TIMER2_CC1_PA6 SILABS_DBUS_TIMER2_CC1(0x0, 0x6) 2242 #define TIMER2_CC1_PA7 SILABS_DBUS_TIMER2_CC1(0x0, 0x7) 2243 #define TIMER2_CC1_PA8 SILABS_DBUS_TIMER2_CC1(0x0, 0x8) 2244 #define TIMER2_CC1_PA9 SILABS_DBUS_TIMER2_CC1(0x0, 0x9) 2245 #define TIMER2_CC1_PB0 SILABS_DBUS_TIMER2_CC1(0x1, 0x0) 2246 #define TIMER2_CC1_PB1 SILABS_DBUS_TIMER2_CC1(0x1, 0x1) 2247 #define TIMER2_CC1_PB2 SILABS_DBUS_TIMER2_CC1(0x1, 0x2) 2248 #define TIMER2_CC1_PB3 SILABS_DBUS_TIMER2_CC1(0x1, 0x3) 2249 #define TIMER2_CC1_PB4 SILABS_DBUS_TIMER2_CC1(0x1, 0x4) 2250 #define TIMER2_CC1_PB5 SILABS_DBUS_TIMER2_CC1(0x1, 0x5) 2251 #define TIMER2_CC2_PA0 SILABS_DBUS_TIMER2_CC2(0x0, 0x0) 2252 #define TIMER2_CC2_PA1 SILABS_DBUS_TIMER2_CC2(0x0, 0x1) 2253 #define TIMER2_CC2_PA2 SILABS_DBUS_TIMER2_CC2(0x0, 0x2) 2254 #define TIMER2_CC2_PA3 SILABS_DBUS_TIMER2_CC2(0x0, 0x3) 2255 #define TIMER2_CC2_PA4 SILABS_DBUS_TIMER2_CC2(0x0, 0x4) 2256 #define TIMER2_CC2_PA5 SILABS_DBUS_TIMER2_CC2(0x0, 0x5) 2257 #define TIMER2_CC2_PA6 SILABS_DBUS_TIMER2_CC2(0x0, 0x6) 2258 #define TIMER2_CC2_PA7 SILABS_DBUS_TIMER2_CC2(0x0, 0x7) 2259 #define TIMER2_CC2_PA8 SILABS_DBUS_TIMER2_CC2(0x0, 0x8) 2260 #define TIMER2_CC2_PA9 SILABS_DBUS_TIMER2_CC2(0x0, 0x9) 2261 #define TIMER2_CC2_PB0 SILABS_DBUS_TIMER2_CC2(0x1, 0x0) 2262 #define TIMER2_CC2_PB1 SILABS_DBUS_TIMER2_CC2(0x1, 0x1) 2263 #define TIMER2_CC2_PB2 SILABS_DBUS_TIMER2_CC2(0x1, 0x2) 2264 #define TIMER2_CC2_PB3 SILABS_DBUS_TIMER2_CC2(0x1, 0x3) 2265 #define TIMER2_CC2_PB4 SILABS_DBUS_TIMER2_CC2(0x1, 0x4) 2266 #define TIMER2_CC2_PB5 SILABS_DBUS_TIMER2_CC2(0x1, 0x5) 2267 #define TIMER2_CDTI0_PA0 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x0) 2268 #define TIMER2_CDTI0_PA1 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x1) 2269 #define TIMER2_CDTI0_PA2 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x2) 2270 #define TIMER2_CDTI0_PA3 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x3) 2271 #define TIMER2_CDTI0_PA4 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x4) 2272 #define TIMER2_CDTI0_PA5 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x5) 2273 #define TIMER2_CDTI0_PA6 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x6) 2274 #define TIMER2_CDTI0_PA7 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x7) 2275 #define TIMER2_CDTI0_PA8 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x8) 2276 #define TIMER2_CDTI0_PA9 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x9) 2277 #define TIMER2_CDTI0_PB0 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x0) 2278 #define TIMER2_CDTI0_PB1 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x1) 2279 #define TIMER2_CDTI0_PB2 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x2) 2280 #define TIMER2_CDTI0_PB3 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x3) 2281 #define TIMER2_CDTI0_PB4 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x4) 2282 #define TIMER2_CDTI0_PB5 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x5) 2283 #define TIMER2_CDTI1_PA0 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x0) 2284 #define TIMER2_CDTI1_PA1 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x1) 2285 #define TIMER2_CDTI1_PA2 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x2) 2286 #define TIMER2_CDTI1_PA3 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x3) 2287 #define TIMER2_CDTI1_PA4 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x4) 2288 #define TIMER2_CDTI1_PA5 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x5) 2289 #define TIMER2_CDTI1_PA6 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x6) 2290 #define TIMER2_CDTI1_PA7 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x7) 2291 #define TIMER2_CDTI1_PA8 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x8) 2292 #define TIMER2_CDTI1_PA9 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x9) 2293 #define TIMER2_CDTI1_PB0 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x0) 2294 #define TIMER2_CDTI1_PB1 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x1) 2295 #define TIMER2_CDTI1_PB2 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x2) 2296 #define TIMER2_CDTI1_PB3 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x3) 2297 #define TIMER2_CDTI1_PB4 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x4) 2298 #define TIMER2_CDTI1_PB5 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x5) 2299 #define TIMER2_CDTI2_PA0 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x0) 2300 #define TIMER2_CDTI2_PA1 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x1) 2301 #define TIMER2_CDTI2_PA2 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x2) 2302 #define TIMER2_CDTI2_PA3 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x3) 2303 #define TIMER2_CDTI2_PA4 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x4) 2304 #define TIMER2_CDTI2_PA5 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x5) 2305 #define TIMER2_CDTI2_PA6 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x6) 2306 #define TIMER2_CDTI2_PA7 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x7) 2307 #define TIMER2_CDTI2_PA8 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x8) 2308 #define TIMER2_CDTI2_PA9 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x9) 2309 #define TIMER2_CDTI2_PB0 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x0) 2310 #define TIMER2_CDTI2_PB1 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x1) 2311 #define TIMER2_CDTI2_PB2 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x2) 2312 #define TIMER2_CDTI2_PB3 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x3) 2313 #define TIMER2_CDTI2_PB4 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x4) 2314 #define TIMER2_CDTI2_PB5 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x5) 2315 2316 #define TIMER3_CC0_PC0 SILABS_DBUS_TIMER3_CC0(0x2, 0x0) 2317 #define TIMER3_CC0_PC1 SILABS_DBUS_TIMER3_CC0(0x2, 0x1) 2318 #define TIMER3_CC0_PC2 SILABS_DBUS_TIMER3_CC0(0x2, 0x2) 2319 #define TIMER3_CC0_PC3 SILABS_DBUS_TIMER3_CC0(0x2, 0x3) 2320 #define TIMER3_CC0_PC4 SILABS_DBUS_TIMER3_CC0(0x2, 0x4) 2321 #define TIMER3_CC0_PC5 SILABS_DBUS_TIMER3_CC0(0x2, 0x5) 2322 #define TIMER3_CC0_PC6 SILABS_DBUS_TIMER3_CC0(0x2, 0x6) 2323 #define TIMER3_CC0_PC7 SILABS_DBUS_TIMER3_CC0(0x2, 0x7) 2324 #define TIMER3_CC0_PC8 SILABS_DBUS_TIMER3_CC0(0x2, 0x8) 2325 #define TIMER3_CC0_PC9 SILABS_DBUS_TIMER3_CC0(0x2, 0x9) 2326 #define TIMER3_CC0_PD0 SILABS_DBUS_TIMER3_CC0(0x3, 0x0) 2327 #define TIMER3_CC0_PD1 SILABS_DBUS_TIMER3_CC0(0x3, 0x1) 2328 #define TIMER3_CC0_PD2 SILABS_DBUS_TIMER3_CC0(0x3, 0x2) 2329 #define TIMER3_CC0_PD3 SILABS_DBUS_TIMER3_CC0(0x3, 0x3) 2330 #define TIMER3_CC0_PD4 SILABS_DBUS_TIMER3_CC0(0x3, 0x4) 2331 #define TIMER3_CC0_PD5 SILABS_DBUS_TIMER3_CC0(0x3, 0x5) 2332 #define TIMER3_CC1_PC0 SILABS_DBUS_TIMER3_CC1(0x2, 0x0) 2333 #define TIMER3_CC1_PC1 SILABS_DBUS_TIMER3_CC1(0x2, 0x1) 2334 #define TIMER3_CC1_PC2 SILABS_DBUS_TIMER3_CC1(0x2, 0x2) 2335 #define TIMER3_CC1_PC3 SILABS_DBUS_TIMER3_CC1(0x2, 0x3) 2336 #define TIMER3_CC1_PC4 SILABS_DBUS_TIMER3_CC1(0x2, 0x4) 2337 #define TIMER3_CC1_PC5 SILABS_DBUS_TIMER3_CC1(0x2, 0x5) 2338 #define TIMER3_CC1_PC6 SILABS_DBUS_TIMER3_CC1(0x2, 0x6) 2339 #define TIMER3_CC1_PC7 SILABS_DBUS_TIMER3_CC1(0x2, 0x7) 2340 #define TIMER3_CC1_PC8 SILABS_DBUS_TIMER3_CC1(0x2, 0x8) 2341 #define TIMER3_CC1_PC9 SILABS_DBUS_TIMER3_CC1(0x2, 0x9) 2342 #define TIMER3_CC1_PD0 SILABS_DBUS_TIMER3_CC1(0x3, 0x0) 2343 #define TIMER3_CC1_PD1 SILABS_DBUS_TIMER3_CC1(0x3, 0x1) 2344 #define TIMER3_CC1_PD2 SILABS_DBUS_TIMER3_CC1(0x3, 0x2) 2345 #define TIMER3_CC1_PD3 SILABS_DBUS_TIMER3_CC1(0x3, 0x3) 2346 #define TIMER3_CC1_PD4 SILABS_DBUS_TIMER3_CC1(0x3, 0x4) 2347 #define TIMER3_CC1_PD5 SILABS_DBUS_TIMER3_CC1(0x3, 0x5) 2348 #define TIMER3_CC2_PC0 SILABS_DBUS_TIMER3_CC2(0x2, 0x0) 2349 #define TIMER3_CC2_PC1 SILABS_DBUS_TIMER3_CC2(0x2, 0x1) 2350 #define TIMER3_CC2_PC2 SILABS_DBUS_TIMER3_CC2(0x2, 0x2) 2351 #define TIMER3_CC2_PC3 SILABS_DBUS_TIMER3_CC2(0x2, 0x3) 2352 #define TIMER3_CC2_PC4 SILABS_DBUS_TIMER3_CC2(0x2, 0x4) 2353 #define TIMER3_CC2_PC5 SILABS_DBUS_TIMER3_CC2(0x2, 0x5) 2354 #define TIMER3_CC2_PC6 SILABS_DBUS_TIMER3_CC2(0x2, 0x6) 2355 #define TIMER3_CC2_PC7 SILABS_DBUS_TIMER3_CC2(0x2, 0x7) 2356 #define TIMER3_CC2_PC8 SILABS_DBUS_TIMER3_CC2(0x2, 0x8) 2357 #define TIMER3_CC2_PC9 SILABS_DBUS_TIMER3_CC2(0x2, 0x9) 2358 #define TIMER3_CC2_PD0 SILABS_DBUS_TIMER3_CC2(0x3, 0x0) 2359 #define TIMER3_CC2_PD1 SILABS_DBUS_TIMER3_CC2(0x3, 0x1) 2360 #define TIMER3_CC2_PD2 SILABS_DBUS_TIMER3_CC2(0x3, 0x2) 2361 #define TIMER3_CC2_PD3 SILABS_DBUS_TIMER3_CC2(0x3, 0x3) 2362 #define TIMER3_CC2_PD4 SILABS_DBUS_TIMER3_CC2(0x3, 0x4) 2363 #define TIMER3_CC2_PD5 SILABS_DBUS_TIMER3_CC2(0x3, 0x5) 2364 #define TIMER3_CDTI0_PC0 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x0) 2365 #define TIMER3_CDTI0_PC1 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x1) 2366 #define TIMER3_CDTI0_PC2 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x2) 2367 #define TIMER3_CDTI0_PC3 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x3) 2368 #define TIMER3_CDTI0_PC4 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x4) 2369 #define TIMER3_CDTI0_PC5 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x5) 2370 #define TIMER3_CDTI0_PC6 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x6) 2371 #define TIMER3_CDTI0_PC7 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x7) 2372 #define TIMER3_CDTI0_PC8 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x8) 2373 #define TIMER3_CDTI0_PC9 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x9) 2374 #define TIMER3_CDTI0_PD0 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x0) 2375 #define TIMER3_CDTI0_PD1 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x1) 2376 #define TIMER3_CDTI0_PD2 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x2) 2377 #define TIMER3_CDTI0_PD3 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x3) 2378 #define TIMER3_CDTI0_PD4 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x4) 2379 #define TIMER3_CDTI0_PD5 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x5) 2380 #define TIMER3_CDTI1_PC0 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x0) 2381 #define TIMER3_CDTI1_PC1 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x1) 2382 #define TIMER3_CDTI1_PC2 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x2) 2383 #define TIMER3_CDTI1_PC3 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x3) 2384 #define TIMER3_CDTI1_PC4 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x4) 2385 #define TIMER3_CDTI1_PC5 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x5) 2386 #define TIMER3_CDTI1_PC6 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x6) 2387 #define TIMER3_CDTI1_PC7 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x7) 2388 #define TIMER3_CDTI1_PC8 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x8) 2389 #define TIMER3_CDTI1_PC9 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x9) 2390 #define TIMER3_CDTI1_PD0 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x0) 2391 #define TIMER3_CDTI1_PD1 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x1) 2392 #define TIMER3_CDTI1_PD2 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x2) 2393 #define TIMER3_CDTI1_PD3 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x3) 2394 #define TIMER3_CDTI1_PD4 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x4) 2395 #define TIMER3_CDTI1_PD5 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x5) 2396 #define TIMER3_CDTI2_PC0 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x0) 2397 #define TIMER3_CDTI2_PC1 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x1) 2398 #define TIMER3_CDTI2_PC2 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x2) 2399 #define TIMER3_CDTI2_PC3 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x3) 2400 #define TIMER3_CDTI2_PC4 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x4) 2401 #define TIMER3_CDTI2_PC5 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x5) 2402 #define TIMER3_CDTI2_PC6 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x6) 2403 #define TIMER3_CDTI2_PC7 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x7) 2404 #define TIMER3_CDTI2_PC8 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x8) 2405 #define TIMER3_CDTI2_PC9 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x9) 2406 #define TIMER3_CDTI2_PD0 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x0) 2407 #define TIMER3_CDTI2_PD1 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x1) 2408 #define TIMER3_CDTI2_PD2 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x2) 2409 #define TIMER3_CDTI2_PD3 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x3) 2410 #define TIMER3_CDTI2_PD4 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x4) 2411 #define TIMER3_CDTI2_PD5 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x5) 2412 2413 #define TIMER4_CC0_PA0 SILABS_DBUS_TIMER4_CC0(0x0, 0x0) 2414 #define TIMER4_CC0_PA1 SILABS_DBUS_TIMER4_CC0(0x0, 0x1) 2415 #define TIMER4_CC0_PA2 SILABS_DBUS_TIMER4_CC0(0x0, 0x2) 2416 #define TIMER4_CC0_PA3 SILABS_DBUS_TIMER4_CC0(0x0, 0x3) 2417 #define TIMER4_CC0_PA4 SILABS_DBUS_TIMER4_CC0(0x0, 0x4) 2418 #define TIMER4_CC0_PA5 SILABS_DBUS_TIMER4_CC0(0x0, 0x5) 2419 #define TIMER4_CC0_PA6 SILABS_DBUS_TIMER4_CC0(0x0, 0x6) 2420 #define TIMER4_CC0_PA7 SILABS_DBUS_TIMER4_CC0(0x0, 0x7) 2421 #define TIMER4_CC0_PA8 SILABS_DBUS_TIMER4_CC0(0x0, 0x8) 2422 #define TIMER4_CC0_PA9 SILABS_DBUS_TIMER4_CC0(0x0, 0x9) 2423 #define TIMER4_CC0_PB0 SILABS_DBUS_TIMER4_CC0(0x1, 0x0) 2424 #define TIMER4_CC0_PB1 SILABS_DBUS_TIMER4_CC0(0x1, 0x1) 2425 #define TIMER4_CC0_PB2 SILABS_DBUS_TIMER4_CC0(0x1, 0x2) 2426 #define TIMER4_CC0_PB3 SILABS_DBUS_TIMER4_CC0(0x1, 0x3) 2427 #define TIMER4_CC0_PB4 SILABS_DBUS_TIMER4_CC0(0x1, 0x4) 2428 #define TIMER4_CC0_PB5 SILABS_DBUS_TIMER4_CC0(0x1, 0x5) 2429 #define TIMER4_CC1_PA0 SILABS_DBUS_TIMER4_CC1(0x0, 0x0) 2430 #define TIMER4_CC1_PA1 SILABS_DBUS_TIMER4_CC1(0x0, 0x1) 2431 #define TIMER4_CC1_PA2 SILABS_DBUS_TIMER4_CC1(0x0, 0x2) 2432 #define TIMER4_CC1_PA3 SILABS_DBUS_TIMER4_CC1(0x0, 0x3) 2433 #define TIMER4_CC1_PA4 SILABS_DBUS_TIMER4_CC1(0x0, 0x4) 2434 #define TIMER4_CC1_PA5 SILABS_DBUS_TIMER4_CC1(0x0, 0x5) 2435 #define TIMER4_CC1_PA6 SILABS_DBUS_TIMER4_CC1(0x0, 0x6) 2436 #define TIMER4_CC1_PA7 SILABS_DBUS_TIMER4_CC1(0x0, 0x7) 2437 #define TIMER4_CC1_PA8 SILABS_DBUS_TIMER4_CC1(0x0, 0x8) 2438 #define TIMER4_CC1_PA9 SILABS_DBUS_TIMER4_CC1(0x0, 0x9) 2439 #define TIMER4_CC1_PB0 SILABS_DBUS_TIMER4_CC1(0x1, 0x0) 2440 #define TIMER4_CC1_PB1 SILABS_DBUS_TIMER4_CC1(0x1, 0x1) 2441 #define TIMER4_CC1_PB2 SILABS_DBUS_TIMER4_CC1(0x1, 0x2) 2442 #define TIMER4_CC1_PB3 SILABS_DBUS_TIMER4_CC1(0x1, 0x3) 2443 #define TIMER4_CC1_PB4 SILABS_DBUS_TIMER4_CC1(0x1, 0x4) 2444 #define TIMER4_CC1_PB5 SILABS_DBUS_TIMER4_CC1(0x1, 0x5) 2445 #define TIMER4_CC2_PA0 SILABS_DBUS_TIMER4_CC2(0x0, 0x0) 2446 #define TIMER4_CC2_PA1 SILABS_DBUS_TIMER4_CC2(0x0, 0x1) 2447 #define TIMER4_CC2_PA2 SILABS_DBUS_TIMER4_CC2(0x0, 0x2) 2448 #define TIMER4_CC2_PA3 SILABS_DBUS_TIMER4_CC2(0x0, 0x3) 2449 #define TIMER4_CC2_PA4 SILABS_DBUS_TIMER4_CC2(0x0, 0x4) 2450 #define TIMER4_CC2_PA5 SILABS_DBUS_TIMER4_CC2(0x0, 0x5) 2451 #define TIMER4_CC2_PA6 SILABS_DBUS_TIMER4_CC2(0x0, 0x6) 2452 #define TIMER4_CC2_PA7 SILABS_DBUS_TIMER4_CC2(0x0, 0x7) 2453 #define TIMER4_CC2_PA8 SILABS_DBUS_TIMER4_CC2(0x0, 0x8) 2454 #define TIMER4_CC2_PA9 SILABS_DBUS_TIMER4_CC2(0x0, 0x9) 2455 #define TIMER4_CC2_PB0 SILABS_DBUS_TIMER4_CC2(0x1, 0x0) 2456 #define TIMER4_CC2_PB1 SILABS_DBUS_TIMER4_CC2(0x1, 0x1) 2457 #define TIMER4_CC2_PB2 SILABS_DBUS_TIMER4_CC2(0x1, 0x2) 2458 #define TIMER4_CC2_PB3 SILABS_DBUS_TIMER4_CC2(0x1, 0x3) 2459 #define TIMER4_CC2_PB4 SILABS_DBUS_TIMER4_CC2(0x1, 0x4) 2460 #define TIMER4_CC2_PB5 SILABS_DBUS_TIMER4_CC2(0x1, 0x5) 2461 #define TIMER4_CDTI0_PA0 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x0) 2462 #define TIMER4_CDTI0_PA1 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x1) 2463 #define TIMER4_CDTI0_PA2 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x2) 2464 #define TIMER4_CDTI0_PA3 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x3) 2465 #define TIMER4_CDTI0_PA4 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x4) 2466 #define TIMER4_CDTI0_PA5 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x5) 2467 #define TIMER4_CDTI0_PA6 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x6) 2468 #define TIMER4_CDTI0_PA7 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x7) 2469 #define TIMER4_CDTI0_PA8 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x8) 2470 #define TIMER4_CDTI0_PA9 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x9) 2471 #define TIMER4_CDTI0_PB0 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x0) 2472 #define TIMER4_CDTI0_PB1 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x1) 2473 #define TIMER4_CDTI0_PB2 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x2) 2474 #define TIMER4_CDTI0_PB3 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x3) 2475 #define TIMER4_CDTI0_PB4 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x4) 2476 #define TIMER4_CDTI0_PB5 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x5) 2477 #define TIMER4_CDTI1_PA0 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x0) 2478 #define TIMER4_CDTI1_PA1 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x1) 2479 #define TIMER4_CDTI1_PA2 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x2) 2480 #define TIMER4_CDTI1_PA3 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x3) 2481 #define TIMER4_CDTI1_PA4 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x4) 2482 #define TIMER4_CDTI1_PA5 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x5) 2483 #define TIMER4_CDTI1_PA6 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x6) 2484 #define TIMER4_CDTI1_PA7 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x7) 2485 #define TIMER4_CDTI1_PA8 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x8) 2486 #define TIMER4_CDTI1_PA9 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x9) 2487 #define TIMER4_CDTI1_PB0 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x0) 2488 #define TIMER4_CDTI1_PB1 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x1) 2489 #define TIMER4_CDTI1_PB2 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x2) 2490 #define TIMER4_CDTI1_PB3 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x3) 2491 #define TIMER4_CDTI1_PB4 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x4) 2492 #define TIMER4_CDTI1_PB5 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x5) 2493 #define TIMER4_CDTI2_PA0 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x0) 2494 #define TIMER4_CDTI2_PA1 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x1) 2495 #define TIMER4_CDTI2_PA2 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x2) 2496 #define TIMER4_CDTI2_PA3 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x3) 2497 #define TIMER4_CDTI2_PA4 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x4) 2498 #define TIMER4_CDTI2_PA5 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x5) 2499 #define TIMER4_CDTI2_PA6 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x6) 2500 #define TIMER4_CDTI2_PA7 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x7) 2501 #define TIMER4_CDTI2_PA8 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x8) 2502 #define TIMER4_CDTI2_PA9 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x9) 2503 #define TIMER4_CDTI2_PB0 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x0) 2504 #define TIMER4_CDTI2_PB1 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x1) 2505 #define TIMER4_CDTI2_PB2 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x2) 2506 #define TIMER4_CDTI2_PB3 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x3) 2507 #define TIMER4_CDTI2_PB4 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x4) 2508 #define TIMER4_CDTI2_PB5 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x5) 2509 2510 #define USART0_CS_PA0 SILABS_DBUS_USART0_CS(0x0, 0x0) 2511 #define USART0_CS_PA1 SILABS_DBUS_USART0_CS(0x0, 0x1) 2512 #define USART0_CS_PA2 SILABS_DBUS_USART0_CS(0x0, 0x2) 2513 #define USART0_CS_PA3 SILABS_DBUS_USART0_CS(0x0, 0x3) 2514 #define USART0_CS_PA4 SILABS_DBUS_USART0_CS(0x0, 0x4) 2515 #define USART0_CS_PA5 SILABS_DBUS_USART0_CS(0x0, 0x5) 2516 #define USART0_CS_PA6 SILABS_DBUS_USART0_CS(0x0, 0x6) 2517 #define USART0_CS_PA7 SILABS_DBUS_USART0_CS(0x0, 0x7) 2518 #define USART0_CS_PA8 SILABS_DBUS_USART0_CS(0x0, 0x8) 2519 #define USART0_CS_PA9 SILABS_DBUS_USART0_CS(0x0, 0x9) 2520 #define USART0_CS_PB0 SILABS_DBUS_USART0_CS(0x1, 0x0) 2521 #define USART0_CS_PB1 SILABS_DBUS_USART0_CS(0x1, 0x1) 2522 #define USART0_CS_PB2 SILABS_DBUS_USART0_CS(0x1, 0x2) 2523 #define USART0_CS_PB3 SILABS_DBUS_USART0_CS(0x1, 0x3) 2524 #define USART0_CS_PB4 SILABS_DBUS_USART0_CS(0x1, 0x4) 2525 #define USART0_CS_PB5 SILABS_DBUS_USART0_CS(0x1, 0x5) 2526 #define USART0_CS_PC0 SILABS_DBUS_USART0_CS(0x2, 0x0) 2527 #define USART0_CS_PC1 SILABS_DBUS_USART0_CS(0x2, 0x1) 2528 #define USART0_CS_PC2 SILABS_DBUS_USART0_CS(0x2, 0x2) 2529 #define USART0_CS_PC3 SILABS_DBUS_USART0_CS(0x2, 0x3) 2530 #define USART0_CS_PC4 SILABS_DBUS_USART0_CS(0x2, 0x4) 2531 #define USART0_CS_PC5 SILABS_DBUS_USART0_CS(0x2, 0x5) 2532 #define USART0_CS_PC6 SILABS_DBUS_USART0_CS(0x2, 0x6) 2533 #define USART0_CS_PC7 SILABS_DBUS_USART0_CS(0x2, 0x7) 2534 #define USART0_CS_PC8 SILABS_DBUS_USART0_CS(0x2, 0x8) 2535 #define USART0_CS_PC9 SILABS_DBUS_USART0_CS(0x2, 0x9) 2536 #define USART0_CS_PD0 SILABS_DBUS_USART0_CS(0x3, 0x0) 2537 #define USART0_CS_PD1 SILABS_DBUS_USART0_CS(0x3, 0x1) 2538 #define USART0_CS_PD2 SILABS_DBUS_USART0_CS(0x3, 0x2) 2539 #define USART0_CS_PD3 SILABS_DBUS_USART0_CS(0x3, 0x3) 2540 #define USART0_CS_PD4 SILABS_DBUS_USART0_CS(0x3, 0x4) 2541 #define USART0_CS_PD5 SILABS_DBUS_USART0_CS(0x3, 0x5) 2542 #define USART0_RTS_PA0 SILABS_DBUS_USART0_RTS(0x0, 0x0) 2543 #define USART0_RTS_PA1 SILABS_DBUS_USART0_RTS(0x0, 0x1) 2544 #define USART0_RTS_PA2 SILABS_DBUS_USART0_RTS(0x0, 0x2) 2545 #define USART0_RTS_PA3 SILABS_DBUS_USART0_RTS(0x0, 0x3) 2546 #define USART0_RTS_PA4 SILABS_DBUS_USART0_RTS(0x0, 0x4) 2547 #define USART0_RTS_PA5 SILABS_DBUS_USART0_RTS(0x0, 0x5) 2548 #define USART0_RTS_PA6 SILABS_DBUS_USART0_RTS(0x0, 0x6) 2549 #define USART0_RTS_PA7 SILABS_DBUS_USART0_RTS(0x0, 0x7) 2550 #define USART0_RTS_PA8 SILABS_DBUS_USART0_RTS(0x0, 0x8) 2551 #define USART0_RTS_PA9 SILABS_DBUS_USART0_RTS(0x0, 0x9) 2552 #define USART0_RTS_PB0 SILABS_DBUS_USART0_RTS(0x1, 0x0) 2553 #define USART0_RTS_PB1 SILABS_DBUS_USART0_RTS(0x1, 0x1) 2554 #define USART0_RTS_PB2 SILABS_DBUS_USART0_RTS(0x1, 0x2) 2555 #define USART0_RTS_PB3 SILABS_DBUS_USART0_RTS(0x1, 0x3) 2556 #define USART0_RTS_PB4 SILABS_DBUS_USART0_RTS(0x1, 0x4) 2557 #define USART0_RTS_PB5 SILABS_DBUS_USART0_RTS(0x1, 0x5) 2558 #define USART0_RTS_PC0 SILABS_DBUS_USART0_RTS(0x2, 0x0) 2559 #define USART0_RTS_PC1 SILABS_DBUS_USART0_RTS(0x2, 0x1) 2560 #define USART0_RTS_PC2 SILABS_DBUS_USART0_RTS(0x2, 0x2) 2561 #define USART0_RTS_PC3 SILABS_DBUS_USART0_RTS(0x2, 0x3) 2562 #define USART0_RTS_PC4 SILABS_DBUS_USART0_RTS(0x2, 0x4) 2563 #define USART0_RTS_PC5 SILABS_DBUS_USART0_RTS(0x2, 0x5) 2564 #define USART0_RTS_PC6 SILABS_DBUS_USART0_RTS(0x2, 0x6) 2565 #define USART0_RTS_PC7 SILABS_DBUS_USART0_RTS(0x2, 0x7) 2566 #define USART0_RTS_PC8 SILABS_DBUS_USART0_RTS(0x2, 0x8) 2567 #define USART0_RTS_PC9 SILABS_DBUS_USART0_RTS(0x2, 0x9) 2568 #define USART0_RTS_PD0 SILABS_DBUS_USART0_RTS(0x3, 0x0) 2569 #define USART0_RTS_PD1 SILABS_DBUS_USART0_RTS(0x3, 0x1) 2570 #define USART0_RTS_PD2 SILABS_DBUS_USART0_RTS(0x3, 0x2) 2571 #define USART0_RTS_PD3 SILABS_DBUS_USART0_RTS(0x3, 0x3) 2572 #define USART0_RTS_PD4 SILABS_DBUS_USART0_RTS(0x3, 0x4) 2573 #define USART0_RTS_PD5 SILABS_DBUS_USART0_RTS(0x3, 0x5) 2574 #define USART0_RX_PA0 SILABS_DBUS_USART0_RX(0x0, 0x0) 2575 #define USART0_RX_PA1 SILABS_DBUS_USART0_RX(0x0, 0x1) 2576 #define USART0_RX_PA2 SILABS_DBUS_USART0_RX(0x0, 0x2) 2577 #define USART0_RX_PA3 SILABS_DBUS_USART0_RX(0x0, 0x3) 2578 #define USART0_RX_PA4 SILABS_DBUS_USART0_RX(0x0, 0x4) 2579 #define USART0_RX_PA5 SILABS_DBUS_USART0_RX(0x0, 0x5) 2580 #define USART0_RX_PA6 SILABS_DBUS_USART0_RX(0x0, 0x6) 2581 #define USART0_RX_PA7 SILABS_DBUS_USART0_RX(0x0, 0x7) 2582 #define USART0_RX_PA8 SILABS_DBUS_USART0_RX(0x0, 0x8) 2583 #define USART0_RX_PA9 SILABS_DBUS_USART0_RX(0x0, 0x9) 2584 #define USART0_RX_PB0 SILABS_DBUS_USART0_RX(0x1, 0x0) 2585 #define USART0_RX_PB1 SILABS_DBUS_USART0_RX(0x1, 0x1) 2586 #define USART0_RX_PB2 SILABS_DBUS_USART0_RX(0x1, 0x2) 2587 #define USART0_RX_PB3 SILABS_DBUS_USART0_RX(0x1, 0x3) 2588 #define USART0_RX_PB4 SILABS_DBUS_USART0_RX(0x1, 0x4) 2589 #define USART0_RX_PB5 SILABS_DBUS_USART0_RX(0x1, 0x5) 2590 #define USART0_RX_PC0 SILABS_DBUS_USART0_RX(0x2, 0x0) 2591 #define USART0_RX_PC1 SILABS_DBUS_USART0_RX(0x2, 0x1) 2592 #define USART0_RX_PC2 SILABS_DBUS_USART0_RX(0x2, 0x2) 2593 #define USART0_RX_PC3 SILABS_DBUS_USART0_RX(0x2, 0x3) 2594 #define USART0_RX_PC4 SILABS_DBUS_USART0_RX(0x2, 0x4) 2595 #define USART0_RX_PC5 SILABS_DBUS_USART0_RX(0x2, 0x5) 2596 #define USART0_RX_PC6 SILABS_DBUS_USART0_RX(0x2, 0x6) 2597 #define USART0_RX_PC7 SILABS_DBUS_USART0_RX(0x2, 0x7) 2598 #define USART0_RX_PC8 SILABS_DBUS_USART0_RX(0x2, 0x8) 2599 #define USART0_RX_PC9 SILABS_DBUS_USART0_RX(0x2, 0x9) 2600 #define USART0_RX_PD0 SILABS_DBUS_USART0_RX(0x3, 0x0) 2601 #define USART0_RX_PD1 SILABS_DBUS_USART0_RX(0x3, 0x1) 2602 #define USART0_RX_PD2 SILABS_DBUS_USART0_RX(0x3, 0x2) 2603 #define USART0_RX_PD3 SILABS_DBUS_USART0_RX(0x3, 0x3) 2604 #define USART0_RX_PD4 SILABS_DBUS_USART0_RX(0x3, 0x4) 2605 #define USART0_RX_PD5 SILABS_DBUS_USART0_RX(0x3, 0x5) 2606 #define USART0_CLK_PA0 SILABS_DBUS_USART0_CLK(0x0, 0x0) 2607 #define USART0_CLK_PA1 SILABS_DBUS_USART0_CLK(0x0, 0x1) 2608 #define USART0_CLK_PA2 SILABS_DBUS_USART0_CLK(0x0, 0x2) 2609 #define USART0_CLK_PA3 SILABS_DBUS_USART0_CLK(0x0, 0x3) 2610 #define USART0_CLK_PA4 SILABS_DBUS_USART0_CLK(0x0, 0x4) 2611 #define USART0_CLK_PA5 SILABS_DBUS_USART0_CLK(0x0, 0x5) 2612 #define USART0_CLK_PA6 SILABS_DBUS_USART0_CLK(0x0, 0x6) 2613 #define USART0_CLK_PA7 SILABS_DBUS_USART0_CLK(0x0, 0x7) 2614 #define USART0_CLK_PA8 SILABS_DBUS_USART0_CLK(0x0, 0x8) 2615 #define USART0_CLK_PA9 SILABS_DBUS_USART0_CLK(0x0, 0x9) 2616 #define USART0_CLK_PB0 SILABS_DBUS_USART0_CLK(0x1, 0x0) 2617 #define USART0_CLK_PB1 SILABS_DBUS_USART0_CLK(0x1, 0x1) 2618 #define USART0_CLK_PB2 SILABS_DBUS_USART0_CLK(0x1, 0x2) 2619 #define USART0_CLK_PB3 SILABS_DBUS_USART0_CLK(0x1, 0x3) 2620 #define USART0_CLK_PB4 SILABS_DBUS_USART0_CLK(0x1, 0x4) 2621 #define USART0_CLK_PB5 SILABS_DBUS_USART0_CLK(0x1, 0x5) 2622 #define USART0_CLK_PC0 SILABS_DBUS_USART0_CLK(0x2, 0x0) 2623 #define USART0_CLK_PC1 SILABS_DBUS_USART0_CLK(0x2, 0x1) 2624 #define USART0_CLK_PC2 SILABS_DBUS_USART0_CLK(0x2, 0x2) 2625 #define USART0_CLK_PC3 SILABS_DBUS_USART0_CLK(0x2, 0x3) 2626 #define USART0_CLK_PC4 SILABS_DBUS_USART0_CLK(0x2, 0x4) 2627 #define USART0_CLK_PC5 SILABS_DBUS_USART0_CLK(0x2, 0x5) 2628 #define USART0_CLK_PC6 SILABS_DBUS_USART0_CLK(0x2, 0x6) 2629 #define USART0_CLK_PC7 SILABS_DBUS_USART0_CLK(0x2, 0x7) 2630 #define USART0_CLK_PC8 SILABS_DBUS_USART0_CLK(0x2, 0x8) 2631 #define USART0_CLK_PC9 SILABS_DBUS_USART0_CLK(0x2, 0x9) 2632 #define USART0_CLK_PD0 SILABS_DBUS_USART0_CLK(0x3, 0x0) 2633 #define USART0_CLK_PD1 SILABS_DBUS_USART0_CLK(0x3, 0x1) 2634 #define USART0_CLK_PD2 SILABS_DBUS_USART0_CLK(0x3, 0x2) 2635 #define USART0_CLK_PD3 SILABS_DBUS_USART0_CLK(0x3, 0x3) 2636 #define USART0_CLK_PD4 SILABS_DBUS_USART0_CLK(0x3, 0x4) 2637 #define USART0_CLK_PD5 SILABS_DBUS_USART0_CLK(0x3, 0x5) 2638 #define USART0_TX_PA0 SILABS_DBUS_USART0_TX(0x0, 0x0) 2639 #define USART0_TX_PA1 SILABS_DBUS_USART0_TX(0x0, 0x1) 2640 #define USART0_TX_PA2 SILABS_DBUS_USART0_TX(0x0, 0x2) 2641 #define USART0_TX_PA3 SILABS_DBUS_USART0_TX(0x0, 0x3) 2642 #define USART0_TX_PA4 SILABS_DBUS_USART0_TX(0x0, 0x4) 2643 #define USART0_TX_PA5 SILABS_DBUS_USART0_TX(0x0, 0x5) 2644 #define USART0_TX_PA6 SILABS_DBUS_USART0_TX(0x0, 0x6) 2645 #define USART0_TX_PA7 SILABS_DBUS_USART0_TX(0x0, 0x7) 2646 #define USART0_TX_PA8 SILABS_DBUS_USART0_TX(0x0, 0x8) 2647 #define USART0_TX_PA9 SILABS_DBUS_USART0_TX(0x0, 0x9) 2648 #define USART0_TX_PB0 SILABS_DBUS_USART0_TX(0x1, 0x0) 2649 #define USART0_TX_PB1 SILABS_DBUS_USART0_TX(0x1, 0x1) 2650 #define USART0_TX_PB2 SILABS_DBUS_USART0_TX(0x1, 0x2) 2651 #define USART0_TX_PB3 SILABS_DBUS_USART0_TX(0x1, 0x3) 2652 #define USART0_TX_PB4 SILABS_DBUS_USART0_TX(0x1, 0x4) 2653 #define USART0_TX_PB5 SILABS_DBUS_USART0_TX(0x1, 0x5) 2654 #define USART0_TX_PC0 SILABS_DBUS_USART0_TX(0x2, 0x0) 2655 #define USART0_TX_PC1 SILABS_DBUS_USART0_TX(0x2, 0x1) 2656 #define USART0_TX_PC2 SILABS_DBUS_USART0_TX(0x2, 0x2) 2657 #define USART0_TX_PC3 SILABS_DBUS_USART0_TX(0x2, 0x3) 2658 #define USART0_TX_PC4 SILABS_DBUS_USART0_TX(0x2, 0x4) 2659 #define USART0_TX_PC5 SILABS_DBUS_USART0_TX(0x2, 0x5) 2660 #define USART0_TX_PC6 SILABS_DBUS_USART0_TX(0x2, 0x6) 2661 #define USART0_TX_PC7 SILABS_DBUS_USART0_TX(0x2, 0x7) 2662 #define USART0_TX_PC8 SILABS_DBUS_USART0_TX(0x2, 0x8) 2663 #define USART0_TX_PC9 SILABS_DBUS_USART0_TX(0x2, 0x9) 2664 #define USART0_TX_PD0 SILABS_DBUS_USART0_TX(0x3, 0x0) 2665 #define USART0_TX_PD1 SILABS_DBUS_USART0_TX(0x3, 0x1) 2666 #define USART0_TX_PD2 SILABS_DBUS_USART0_TX(0x3, 0x2) 2667 #define USART0_TX_PD3 SILABS_DBUS_USART0_TX(0x3, 0x3) 2668 #define USART0_TX_PD4 SILABS_DBUS_USART0_TX(0x3, 0x4) 2669 #define USART0_TX_PD5 SILABS_DBUS_USART0_TX(0x3, 0x5) 2670 #define USART0_CTS_PA0 SILABS_DBUS_USART0_CTS(0x0, 0x0) 2671 #define USART0_CTS_PA1 SILABS_DBUS_USART0_CTS(0x0, 0x1) 2672 #define USART0_CTS_PA2 SILABS_DBUS_USART0_CTS(0x0, 0x2) 2673 #define USART0_CTS_PA3 SILABS_DBUS_USART0_CTS(0x0, 0x3) 2674 #define USART0_CTS_PA4 SILABS_DBUS_USART0_CTS(0x0, 0x4) 2675 #define USART0_CTS_PA5 SILABS_DBUS_USART0_CTS(0x0, 0x5) 2676 #define USART0_CTS_PA6 SILABS_DBUS_USART0_CTS(0x0, 0x6) 2677 #define USART0_CTS_PA7 SILABS_DBUS_USART0_CTS(0x0, 0x7) 2678 #define USART0_CTS_PA8 SILABS_DBUS_USART0_CTS(0x0, 0x8) 2679 #define USART0_CTS_PA9 SILABS_DBUS_USART0_CTS(0x0, 0x9) 2680 #define USART0_CTS_PB0 SILABS_DBUS_USART0_CTS(0x1, 0x0) 2681 #define USART0_CTS_PB1 SILABS_DBUS_USART0_CTS(0x1, 0x1) 2682 #define USART0_CTS_PB2 SILABS_DBUS_USART0_CTS(0x1, 0x2) 2683 #define USART0_CTS_PB3 SILABS_DBUS_USART0_CTS(0x1, 0x3) 2684 #define USART0_CTS_PB4 SILABS_DBUS_USART0_CTS(0x1, 0x4) 2685 #define USART0_CTS_PB5 SILABS_DBUS_USART0_CTS(0x1, 0x5) 2686 #define USART0_CTS_PC0 SILABS_DBUS_USART0_CTS(0x2, 0x0) 2687 #define USART0_CTS_PC1 SILABS_DBUS_USART0_CTS(0x2, 0x1) 2688 #define USART0_CTS_PC2 SILABS_DBUS_USART0_CTS(0x2, 0x2) 2689 #define USART0_CTS_PC3 SILABS_DBUS_USART0_CTS(0x2, 0x3) 2690 #define USART0_CTS_PC4 SILABS_DBUS_USART0_CTS(0x2, 0x4) 2691 #define USART0_CTS_PC5 SILABS_DBUS_USART0_CTS(0x2, 0x5) 2692 #define USART0_CTS_PC6 SILABS_DBUS_USART0_CTS(0x2, 0x6) 2693 #define USART0_CTS_PC7 SILABS_DBUS_USART0_CTS(0x2, 0x7) 2694 #define USART0_CTS_PC8 SILABS_DBUS_USART0_CTS(0x2, 0x8) 2695 #define USART0_CTS_PC9 SILABS_DBUS_USART0_CTS(0x2, 0x9) 2696 #define USART0_CTS_PD0 SILABS_DBUS_USART0_CTS(0x3, 0x0) 2697 #define USART0_CTS_PD1 SILABS_DBUS_USART0_CTS(0x3, 0x1) 2698 #define USART0_CTS_PD2 SILABS_DBUS_USART0_CTS(0x3, 0x2) 2699 #define USART0_CTS_PD3 SILABS_DBUS_USART0_CTS(0x3, 0x3) 2700 #define USART0_CTS_PD4 SILABS_DBUS_USART0_CTS(0x3, 0x4) 2701 #define USART0_CTS_PD5 SILABS_DBUS_USART0_CTS(0x3, 0x5) 2702 2703 #endif /* ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_XG24_PINCTRL_H_ */ 2704
