1 /* 2 * Copyright (c) 2019 Piotr Mienkowski 3 * Copyright (c) 2018 Linaro Limited 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_GPIO_H_ 8 #define ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_GPIO_H_ 9 10 /** 11 * @brief GPIO Driver APIs 12 * @defgroup gpio_interface GPIO Driver APIs 13 * @ingroup io_interfaces 14 * @{ 15 */ 16 17 /** 18 * @name GPIO pin active level flags 19 * @{ 20 */ 21 22 /** GPIO pin is active (has logical value '1') in low state. */ 23 #define GPIO_ACTIVE_LOW (1 << 0) 24 /** GPIO pin is active (has logical value '1') in high state. */ 25 #define GPIO_ACTIVE_HIGH (0 << 0) 26 27 /** @} */ 28 29 /** 30 * @name GPIO pin drive flags 31 * @{ 32 */ 33 34 /** @cond INTERNAL_HIDDEN */ 35 36 /* Configures GPIO output in single-ended mode (open drain or open source). */ 37 #define GPIO_SINGLE_ENDED (1 << 1) 38 /* Configures GPIO output in push-pull mode */ 39 #define GPIO_PUSH_PULL (0 << 1) 40 41 /* Indicates single ended open drain mode (wired AND). */ 42 #define GPIO_LINE_OPEN_DRAIN (1 << 2) 43 /* Indicates single ended open source mode (wired OR). */ 44 #define GPIO_LINE_OPEN_SOURCE (0 << 2) 45 46 /** @endcond */ 47 48 /** Configures GPIO output in open drain mode (wired AND). 49 * 50 * @note 'Open Drain' mode also known as 'Open Collector' is an output 51 * configuration which behaves like a switch that is either connected to ground 52 * or disconnected. 53 */ 54 #define GPIO_OPEN_DRAIN (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_DRAIN) 55 /** Configures GPIO output in open source mode (wired OR). 56 * 57 * @note 'Open Source' is a term used by software engineers to describe output 58 * mode opposite to 'Open Drain'. It behaves like a switch that is either 59 * connected to power supply or disconnected. There exist no corresponding 60 * hardware schematic and the term is generally unknown to hardware engineers. 61 */ 62 #define GPIO_OPEN_SOURCE (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_SOURCE) 63 64 /** @} */ 65 66 /** 67 * @name GPIO pin bias flags 68 * @{ 69 */ 70 71 /** Enables GPIO pin pull-up. */ 72 #define GPIO_PULL_UP (1 << 4) 73 74 /** Enable GPIO pin pull-down. */ 75 #define GPIO_PULL_DOWN (1 << 5) 76 77 /** @} */ 78 79 /** 80 * @name GPIO pin voltage flags 81 * 82 * The voltage flags are a Zephyr specific extension of the standard GPIO 83 * flags specified by the Linux GPIO binding. Only applicable if SoC allows 84 * to configure pin voltage per individual pin. 85 * 86 * @{ 87 */ 88 89 /** @cond INTERNAL_HIDDEN */ 90 #define GPIO_VOLTAGE_POS 6 91 #define GPIO_VOLTAGE_MASK (3U << GPIO_VOLTAGE_POS) 92 /** @endcond */ 93 94 /** Set pin at the default voltage level */ 95 #define GPIO_VOLTAGE_DEFAULT (0U << GPIO_VOLTAGE_POS) 96 /** Set pin voltage level at 1.8 V */ 97 #define GPIO_VOLTAGE_1P8 (1U << GPIO_VOLTAGE_POS) 98 /** Set pin voltage level at 3.3 V */ 99 #define GPIO_VOLTAGE_3P3 (2U << GPIO_VOLTAGE_POS) 100 /** Set pin voltage level at 5.0 V */ 101 #define GPIO_VOLTAGE_5P0 (3U << GPIO_VOLTAGE_POS) 102 103 /** @} */ 104 105 /** 106 * @} 107 */ 108 109 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_GPIO_H_ */ 110
