1# STM32 IWDG configuration
2
3# Copyright (c) 2016 Open-RnD Sp. z o.o.
4# Copyright (c) 2017 RnDity Sp. z o.o.
5# Copyright (c) 2019 Centaur Analytics, Inc
6# SPDX-License-Identifier: Apache-2.0
7
8config IWDG_STM32
9	bool "Independent Watchdog (IWDG) Driver for STM32 family of MCUs"
10	default y
11	depends on DT_HAS_ST_STM32_WATCHDOG_ENABLED
12	help
13	  Enable IWDG driver for STM32 line of MCUs
14
15config IWDG_STM32_INITIAL_TIMEOUT
16	int "Value for IWDG timeout in ms"
17	depends on IWDG_STM32
18	default 100
19	range 1 26214
20	help
21	  Set initial timeout value for IWDG in ms if enabled at boot.
22
23	  The min timeout supported is 1 ms. The max timeout depends on the
24	  MCU's LSI clock frequency and can be calculated with:
25
26	    max. prescaler value (256) * max. reload ticks (4096) / LSI freq.
27
28	  Limiting maximum timeout to a safe value of 26214 ms here, which was
29	  calculated for highest LSI frequency among STM32 MCUs of 40 kHz.
30
31config WWDG_STM32
32	bool "System Window Watchdog (WWDG) Driver for STM32 family of MCUs"
33	default y
34	depends on DT_HAS_ST_STM32_WINDOW_WATCHDOG_ENABLED
35	help
36	  Enable WWDG driver for STM32 line of MCUs
37