1# Copyright (c) 2014-2015 Wind River Systems, Inc.
2# Copyright (c) 2016 Cadence Design Systems, Inc.
3# Copyright (c) 2019 Intel Corp.
4# SPDX-License-Identifier: Apache-2.0
5
6DT_CHOSEN_IDLE_TIMER := zephyr,cortex-m-idle-timer
7
8config CORTEX_M_SYSTICK
9	bool "Cortex-M SYSTICK timer"
10	depends on CPU_CORTEX_M_HAS_SYSTICK
11	default y
12	depends on DT_HAS_ARM_ARMV6M_SYSTICK_ENABLED || \
13		   DT_HAS_ARM_ARMV7M_SYSTICK_ENABLED || \
14		   DT_HAS_ARM_ARMV8M_SYSTICK_ENABLED || \
15		   DT_HAS_ARM_ARMV8_1M_SYSTICK_ENABLED
16	select TICKLESS_CAPABLE
17	select SYSTEM_TIMER_HAS_DISABLE_SUPPORT
18	select CORTEX_M_SYSTICK_INSTALL_ISR
19	help
20	  This module implements a kernel device driver for the Cortex-M processor
21	  SYSTICK timer and provides the standard "system clock driver" interfaces.
22
23config CORTEX_M_SYSTICK_INSTALL_ISR
24	bool
25	depends on CPU_CORTEX_M_HAS_SYSTICK
26	help
27	  This option should be selected by SysTick-based drivers so that the
28	  sys_clock_isr() function is installed.
29
30config CORTEX_M_SYSTICK_64BIT_CYCLE_COUNTER
31	bool "Cortex-M SYSTICK timer with sys_clock_cycle_get_64() support"
32	depends on CORTEX_M_SYSTICK
33	default y if (SYS_CLOCK_HW_CYCLES_PER_SEC > 60000000)
34	select TIMER_HAS_64BIT_CYCLE_COUNTER
35	help
36	  This driver, due to its limited 24-bits hardware counter, is already
37	  tracking a separate cycle count in software. This option make that
38	  count a 64-bits value to support sys_clock_cycle_get_64().
39	  This is cheap to do as expensive math operations (i.e. divisions)
40	  are performed only on counter interval values that always fit in
41	  32 bits.
42
43	  This is set to y by default when the hardware clock is fast enough
44	  to wrap sys_clock_cycle_get_32() in about a minute or less.
45
46choice CORTEX_M_SYSTICK_LPM_TIMER
47	prompt "SysTick companion low-power mode timer"
48	# If all dependencies are enabled, and /chosen/cortex-m-idle-timer
49	# is enabled, default to using the Counter API-based LPM timer.
50	# Otherwise, the first choice (LPM_TIMER_NONE) will be selected
51	# automatically, and no LPM timer will be enabled.
52	default CORTEX_M_SYSTICK_LPM_TIMER_COUNTER
53	help
54	  It is common for SoCs equipped with SysTick to use it as system timer.
55	  However, depending on the SoC implementation, entering low-power mode
56	  may turn off the SysTick clock or place SysTick under reset.
57
58	  On such SoCs, a vendor-specific timer that remains active in low-power
59	  mode will usually be provided - however, it may be unfit for usage as
60	  system timer, for example because its frequency is too low.
61
62	  With this option, such vendor-specific timer can be selected and used by
63	  the SysTick driver to ensure proper system operation in low-power mode.
64
65	  NOTE: since Power Management has to be enabled if the SoC may enter in
66	  low-power mode, no LPM timer can be selected if PM is not enabled.
67	  Tickless kernel must also be enabled, since periodic interrupts would
68	  prevent the system from entering in low-power modes.
69
70config CORTEX_M_SYSTICK_LPM_TIMER_NONE
71	bool "None"
72	help
73	  Use no additional device as low-power mode timer.
74
75	  The SoC must never enter a low-power mode where SysTick is disabled when
76	  this option is selected; otherwise, system behavior becomes unpredictable.
77
78if TICKLESS_KERNEL && PM
79
80config CORTEX_M_SYSTICK_LPM_TIMER_COUNTER
81	bool "Counter API timer"
82	depends on $(dt_chosen_enabled,$(DT_CHOSEN_IDLE_TIMER))
83	depends on COUNTER
84	help
85	  Use a device that implements the counter API as low-power mode timer.
86
87	  The device is selected by property "/chosen/cortex-m-idle-timer".
88
89config CORTEX_M_SYSTICK_LPM_TIMER_HOOKS
90	bool "Hook-based timer"
91	help
92	  Use hooks in the SysTick driver to configure the low-power mode timer.
93	  Refer to `include/drivers/timer/cortex_m_systick.h` for more details.
94
95endif # PM
96endchoice # CORTEX_M_SYSTICK_LPM_TIMER
97
98config CORTEX_M_SYSTICK_RESET_BY_LPM
99	bool
100	depends on !CORTEX_M_SYSTICK_LPM_TIMER_NONE
101	help
102	  Some SoCs provide one or more low-power mode which, as part of their
103	  operation, place SysTick or the entire CPU under reset. This requires
104	  special care from the driver - notably, SysTick needs to be restarted
105	  after waking up from such a low-power mode.
106
107	  Select this symbol if your SoC has a low-power mode that places SysTick
108	  under reset. Note that this requires that the platform provides a timer
109	  active in low-power mode, since SysTick cannot be used for timekeeping.
110
111	  Refer to CONFIG_CORTEX_M_SYSTICK_LPM_TIMER for more details.
112