1 /**
2 ******************************************************************************
3 * @file stm32wbaxx_hal_flash_ex.c
4 * @author MCD Application Team
5 * @brief Extended FLASH HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the FLASH extended peripheral:
8 * + Extended programming operations functions
9 *
10 ******************************************************************************
11 * @attention
12 *
13 * Copyright (c) 2022 STMicroelectronics.
14 * All rights reserved.
15 *
16 * This software is licensed under terms that can be found in the LICENSE file
17 * in the root directory of this software component.
18 * If no LICENSE file comes with this software, it is provided AS-IS.
19 *
20 ******************************************************************************
21 @verbatim
22 ==============================================================================
23 ##### Flash Extended features #####
24 ==============================================================================
25
26 [..] Comparing to other previous devices, the FLASH interface for STM32WBAxx
27 devices contains the following additional features
28
29 (+) Capacity up to 2 Mbyte
30 (+) Watermark-based secure area including the secure hide areas
31 (+) Block-based secure pages
32
33 ##### How to use this driver #####
34 ==============================================================================
35 [..] This driver provides functions to configure and program the FLASH memory
36 of all STM32WBAxx devices. It includes:
37 (#) Flash Memory Erase functions:
38 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
39 HAL_FLASH_Lock() functions
40 (++) Erase function: page Erase and Mass Erase
41 (++) There are two modes of erase :
42 (+++) Polling Mode using HAL_FLASHEx_Erase()
43 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
44
45 (#) Option Bytes Programming function: Use HAL_FLASHEx_OBProgram() to:
46 (++) Configure the write protection for each area
47 (++) Set the Read protection Level
48 (++) Program the user Option Bytes
49 (++) Configure the watermark security for each area including the secure hide areas
50 (++) Configure the boot lock (BOOT_LOCK)
51 (++) Configure the Boot addresses
52
53 (#) Get Option Bytes Configuration function: Use HAL_FLASHEx_OBGetConfig() to:
54 (++) Get the value of a write protection area
55 (++) Know if the read protection is activated
56 (++) Get the value of the user Option Bytes
57 (++) Get the configuration of a watermark security area including the secure hide areas
58 (++) Get the boot lock (BOOT_LOCK) configuration
59 (++) Get the value of a boot address
60
61 (#) Block-based secure / privilege area configuration function: Use HAL_FLASHEx_ConfigBBAttributes()
62 (++) Bit-field allowing to secure or un-secure each page
63 (++) Bit-field allowing to privilege or un-privilege each page
64
65 (#) Get the block-based secure / privilege area configuration function: Use HAL_FLASHEx_GetBBSec()
66 (++) Return the configuration of the block-based security and privilege for all the pages
67
68 (#) Activation of the secure hide area function: Use HAL_FLASHEx_EnableSecHideProtection()
69 (++) Deny the access to the secure hide area
70
71 (#) Privilege mode configuration function: Use HAL_FLASHEx_ConfigPrivMode()
72 (++) FLASH register can be protected against non-privilege accesses
73
74 (#) Get the privilege mode configuration function: Use HAL_FLASHEx_GetPrivMode()
75 (++) Return if the FLASH registers are protected against non-privilege accesses
76
77 (#) Security inversion configuration function: Use HAL_FLASHEx_ConfigSecInversion()
78 (++) FLASH secure state can be override
79
80 (#) Get the security inversion configuration function: Use HAL_FLASHEx_GetSecInversion()
81 (++) Return if FLASH secure state is override
82
83 (#) Enable low-power mode function: Use HAL_FLASHEx_EnablePowerDown()
84 (++) Enable low-power mode for Flash
85
86 (#) Enable low-power read mode function: Use HAL_FLASHEx_ConfigLowPowerRead()
87 (++) Enable low-power read mode for Flash memory
88
89 (#) Get the low-power read mode configuration function: Use HAL_FLASHEx_GetLowPowerRead()
90 (++) Return if FLASH is in low-power read mode or normal read mode
91
92 (#) Get Flash operation function: Use HAL_FLASHEx_GetOperation()
93 (++) Return information about the on-going Flash operation. After a
94 system reset, return information about the interrupted Flash operation, if any.
95
96 @endverbatim
97 ******************************************************************************
98 */
99
100 /* Includes ------------------------------------------------------------------*/
101 #include "stm32wbaxx_hal.h"
102
103 /** @addtogroup STM32WBAxx_HAL_Driver
104 * @{
105 */
106
107 /** @defgroup FLASHEx FLASHEx
108 * @brief FLASH Extended HAL module driver
109 * @{
110 */
111
112 #ifdef HAL_FLASH_MODULE_ENABLED
113
114 /* Private typedef -----------------------------------------------------------*/
115 /* Private define ------------------------------------------------------------*/
116 /* Private macro -------------------------------------------------------------*/
117 /* Private variables ---------------------------------------------------------*/
118 /* Private function prototypes -----------------------------------------------*/
119 /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions
120 * @{
121 */
122 static void FLASH_MassErase(void);
123 static void FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRPEndOffset,
124 FunctionalState WRPLock);
125 static void FLASH_OB_RDPConfig(uint32_t RDPLevel);
126 static void FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig);
127 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
128 static void FLASH_OB_WMSECConfig(uint32_t WMSecConfig, uint32_t WMSecStartPage, uint32_t WMSecEndPage,
129 uint32_t WMHDPEndPage);
130 static void FLASH_OB_BootLockConfig(uint32_t BootLockConfig);
131 #endif /* __ARM_FEATURE_CMSE */
132 static void FLASH_OB_BootAddrConfig(uint32_t BootAddrConfig, uint32_t BootAddr);
133 static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t *WRPStartOffset, uint32_t *WRPEndOffset,
134 FunctionalState *WRPLock);
135 static uint32_t FLASH_OB_GetRDP(void);
136 static uint32_t FLASH_OB_GetUser(void);
137 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
138 static void FLASH_OB_GetWMSEC(uint32_t *WMSecConfig, uint32_t *WMSecStartPage, uint32_t *WMSecEndPage,
139 uint32_t *WMHDPEndPage);
140 static uint32_t FLASH_OB_GetBootLock(void);
141 #endif /* __ARM_FEATURE_CMSE */
142 static void FLASH_OB_GetBootAddr(uint32_t BootAddrConfig, uint32_t *BootAddr);
143 static void FLASH_OB_RDPKeyConfig(uint32_t RDPKeyType, uint32_t RDPKey1, uint32_t RDPKey2);
144 /**
145 * @}
146 */
147
148 /* Exported functions -------------------------------------------------------*/
149 /** @defgroup FLASHEx_Exported_Functions FLASH Extended Exported Functions
150 * @{
151 */
152
153 /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
154 * @brief Extended IO operation functions
155 *
156 @verbatim
157 ===============================================================================
158 ##### Extended programming operation functions #####
159 ===============================================================================
160 [..]
161 This subsection provides a set of functions allowing to manage the Extended FLASH
162 programming operations Operations.
163
164 @endverbatim
165 * @{
166 */
167
168 /**
169 * @brief Perform a mass erase or erase the specified FLASH memory pages.
170 * @note Before any operation, it is possible to check there is no operation suspended
171 * by call HAL_FLASHEx_IsOperationSuspended()
172 * @param[in] pEraseInit Pointer to an @ref FLASH_EraseInitTypeDef structure that
173 * contains the configuration information for the erasing.
174 *
175 * @param[out] PageError Pointer to variable that contains the configuration
176 * information on faulty page in case of error (0xFFFFFFFF means that all
177 * the pages have been correctly erased)
178 *
179 * @retval HAL Status
180 */
HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef * pEraseInit,uint32_t * PageError)181 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
182 {
183 HAL_StatusTypeDef status;
184 uint32_t page_index;
185 __IO uint32_t *reg_cr;
186
187 /* Check the parameters */
188 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
189
190 /* Process Locked */
191 __HAL_LOCK(&pFlash);
192
193 /* Reset error code */
194 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
195
196 /* Verify that next operation can be proceed */
197 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
198
199 if (status == HAL_OK)
200 {
201 /* Current operation type */
202 pFlash.ProcedureOnGoing = pEraseInit->TypeErase;
203
204 /* Access to SECCR1 or NSCR1 depends on operation type */
205 #if defined(FLASH_SECCR1_LOCK)
206 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR1) : &(FLASH_NS->NSCR1);
207 #else
208 reg_cr = &(FLASH_NS->NSCR1);
209 #endif /* FLASH_SECCR1_LOCK */
210
211 if ((pEraseInit->TypeErase & (~FLASH_NON_SECURE_MASK)) == FLASH_TYPEERASE_MASSERASE)
212 {
213 /* Mass erase to be done */
214 FLASH_MassErase();
215
216 /* Wait for last operation to be completed */
217 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
218 }
219 else
220 {
221 /*Initialization of PageError variable*/
222 *PageError = 0xFFFFFFFFU;
223
224 for (page_index = pEraseInit->Page; page_index < (pEraseInit->Page + pEraseInit->NbPages); page_index++)
225 {
226 /* Start erase page */
227 FLASH_PageErase(page_index);
228
229 /* Wait for last operation to be completed */
230 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
231
232 if (status != HAL_OK)
233 {
234 /* In case of error, stop erase procedure and return the faulty page */
235 *PageError = page_index;
236 break;
237 }
238 }
239 }
240
241 /* If the erase operation is completed, disable the associated bits */
242 CLEAR_BIT((*reg_cr), (((pEraseInit->TypeErase) & (~(FLASH_NON_SECURE_MASK))) | FLASH_NSCR1_PNB));
243 }
244
245 /* Process Unlocked */
246 __HAL_UNLOCK(&pFlash);
247
248 return status;
249 }
250
251 /**
252 * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled.
253 * @note Before any operation, it is possible to check there is no operation suspended
254 * by call HAL_FLASHEx_IsOperationSuspended()
255 * @param pEraseInit Pointer to an @ref FLASH_EraseInitTypeDef structure that
256 * contains the configuration information for the erasing.
257 *
258 * @retval HAL Status
259 */
HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef * pEraseInit)260 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
261 {
262 HAL_StatusTypeDef status;
263 __IO uint32_t *reg_cr;
264
265 /* Check the parameters */
266 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
267
268 /* Process Locked */
269 __HAL_LOCK(&pFlash);
270
271 /* Reset error code */
272 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
273
274 /* Verify that next operation can be proceed */
275 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
276
277 if (status != HAL_OK)
278 {
279 /* Process Unlocked */
280 __HAL_UNLOCK(&pFlash);
281 }
282 else
283 {
284 /* Set internal variables used by the IRQ handler */
285 pFlash.ProcedureOnGoing = pEraseInit->TypeErase;
286
287 /* Access to SECCR1 or NSCR1 depends on operation type */
288 #if defined(FLASH_SECCR1_LOCK)
289 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR1) : &(FLASH_NS->NSCR1);
290 #else
291 reg_cr = &(FLASH_NS->NSCR1);
292 #endif /* FLASH_SECCR1_LOCK */
293
294 /* Enable End of Operation and Error interrupts */
295 (*reg_cr) |= (FLASH_IT_EOP | FLASH_IT_OPERR);
296
297 if ((pEraseInit->TypeErase & (~FLASH_NON_SECURE_MASK)) == FLASH_TYPEERASE_MASSERASE)
298 {
299 /* Mass erase to be done */
300 FLASH_MassErase();
301 }
302 else
303 {
304 /* Erase by page to be done */
305 pFlash.NbPagesToErase = pEraseInit->NbPages;
306 pFlash.Page = pEraseInit->Page;
307
308 /* Erase first page and wait for IT */
309 FLASH_PageErase(pEraseInit->Page);
310 }
311 }
312
313 /* return status */
314 return status;
315 }
316
317 /**
318 * @brief Program Option bytes.
319 * @param pOBInit Pointer to an @ref FLASH_OBProgramInitTypeDef structure that
320 * contains the configuration information for the programming.
321 *
322 * @note To configure any option bytes, the option lock bit OPTLOCK must be
323 * cleared with the call of @ref HAL_FLASH_OB_Unlock() function.
324 * @note New option bytes configuration will be taken into account in two cases:
325 * - after an option bytes launch through the call of @ref HAL_FLASH_OB_Launch()
326 * - after a power reset (BOR reset or exit from Standby/Shutdown modes)
327 *
328 * @retval HAL Status
329 */
HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef * pOBInit)330 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
331 {
332 HAL_StatusTypeDef status;
333
334 /* Check the parameters */
335 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
336
337 /* Process Locked */
338 __HAL_LOCK(&pFlash);
339
340 /* Reset error code */
341 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
342
343 /* Verify that next operation can be proceed */
344 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
345
346 if (status == HAL_OK)
347 {
348 /* Write protection configuration */
349 if ((pOBInit->OptionType & OPTIONBYTE_WRP) != 0U)
350 {
351 /* Configure of Write protection on the selected area */
352 FLASH_OB_WRPConfig(pOBInit->WRPArea, pOBInit->WRPStartOffset, pOBInit->WRPEndOffset, pOBInit->WRPLock);
353 }
354
355 /* Read protection configuration */
356 if ((pOBInit->OptionType & OPTIONBYTE_RDP) != 0U)
357 {
358 /* Configure the Read protection level */
359 FLASH_OB_RDPConfig(pOBInit->RDPLevel);
360 }
361
362 /* Read protection key configuration */
363 if ((pOBInit->OptionType & OPTIONBYTE_RDPKEY) != 0U)
364 {
365 /* Configure the Read protection key */
366 FLASH_OB_RDPKeyConfig(pOBInit->RDPKeyType, pOBInit->RDPKey1, pOBInit->RDPKey2);
367 }
368
369 /* User Configuration */
370 if ((pOBInit->OptionType & OPTIONBYTE_USER) != 0U)
371 {
372 /* Configure the user option bytes */
373 FLASH_OB_UserConfig(pOBInit->USERType, pOBInit->USERConfig);
374 }
375
376 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
377 /* Watermark secure configuration */
378 if ((pOBInit->OptionType & OPTIONBYTE_WMSEC) != 0U)
379 {
380 /* Configure the watermark-based secure area */
381 FLASH_OB_WMSECConfig(pOBInit->WMSecConfig, pOBInit->WMSecStartPage, pOBInit->WMSecEndPage,
382 pOBInit->WMHDPEndPage);
383 }
384
385 /* Unique boot entry point configuration */
386 if ((pOBInit->OptionType & OPTIONBYTE_BOOT_LOCK) != 0U)
387 {
388 /* Configure the unique boot entry point */
389 FLASH_OB_BootLockConfig(pOBInit->BootLock);
390 }
391 #endif /* __ARM_FEATURE_CMSE */
392
393 /* Boot address configuration */
394 if ((pOBInit->OptionType & OPTIONBYTE_BOOTADDR) != 0U)
395 {
396 /* Configure the boot address */
397 FLASH_OB_BootAddrConfig(pOBInit->BootAddrConfig, pOBInit->BootAddr);
398 }
399
400 /* Set OPTSTRT Bit */
401 SET_BIT(FLASH->NSCR1, FLASH_NSCR1_OPTSTRT);
402
403 /* Wait for last operation to be completed */
404 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
405 }
406
407 /* Process Unlocked */
408 __HAL_UNLOCK(&pFlash);
409
410 /* return status */
411 return status;
412 }
413
414 /**
415 * @brief Get the Option bytes configuration.
416 * @param pOBInit Pointer to an @ref FLASH_OBProgramInitTypeDef structure that contains the
417 * configuration information.
418 * @note The fields pOBInit->WRPArea, pOBInit->WMSecConfig and pOBInit->BootAddrConfig
419 * should indicate which area/address is requested for the WRP, WM Security or
420 * Boot Address, else no information will be returned
421 *
422 * @retval None
423 */
HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef * pOBInit)424 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
425 {
426 pOBInit->OptionType = (OPTIONBYTE_RDP | OPTIONBYTE_USER);
427
428 if ((pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAA) || (pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAB))
429 {
430 pOBInit->OptionType |= OPTIONBYTE_WRP;
431 /* Get write protection on the selected area */
432 FLASH_OB_GetWRP(pOBInit->WRPArea, &(pOBInit->WRPStartOffset), &(pOBInit->WRPEndOffset), &(pOBInit->WRPLock));
433 }
434
435 /* Get Read protection level */
436 pOBInit->RDPLevel = FLASH_OB_GetRDP();
437
438 /* Get the user option bytes */
439 pOBInit->USERConfig = FLASH_OB_GetUser();
440
441 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
442 /* Get the configuration of the watermark secure area for the selected area */
443 if (pOBInit->WMSecConfig == OB_WMSEC_AREA1)
444 {
445 pOBInit->OptionType |= OPTIONBYTE_WMSEC;
446 FLASH_OB_GetWMSEC(&(pOBInit->WMSecConfig), &(pOBInit->WMSecStartPage), &(pOBInit->WMSecEndPage),
447 &(pOBInit->WMHDPEndPage));
448 }
449
450 pOBInit->OptionType |= OPTIONBYTE_BOOT_LOCK;
451
452 /* Get the configuration of the unique boot entry point */
453 pOBInit->BootLock = FLASH_OB_GetBootLock();
454 #endif /* __ARM_FEATURE_CMSE */
455
456 /* Get the value of the selected boot address */
457 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
458 if ((pOBInit->BootAddrConfig == OB_BOOTADDR_NS0) || (pOBInit->BootAddrConfig == OB_BOOTADDR_NS1) ||
459 (pOBInit->BootAddrConfig == OB_BOOTADDR_SEC0))
460 #else
461 if ((pOBInit->BootAddrConfig == OB_BOOTADDR_NS0) || (pOBInit->BootAddrConfig == OB_BOOTADDR_NS1))
462 #endif /* __ARM_FEATURE_CMSE */
463 {
464 pOBInit->OptionType |= OPTIONBYTE_BOOTADDR;
465 FLASH_OB_GetBootAddr(pOBInit->BootAddrConfig, &(pOBInit->BootAddr));
466 }
467 }
468
469 #if defined(FLASH_SECBBR1_SECBB0) || defined(FLASH_PRIVBBR1_PRIVBB0) || defined(FLASH_SECBB1R1_SECBB0) || defined(FLASH_PRIVBB1R1_PRIVBB0)
470 /**
471 * @brief Configure the block-based secure area.
472 *
473 * @param pBBAttributes pointer to an @ref FLASH_BBAttributesTypeDef structure that
474 * contains the configuration information for the programming.
475 *
476 * @note The field pBBAttributes->Bank should indicate which area is requested
477 * for the block-based attributes.
478 * @note The field pBBAttributes->BBAttributesType should indicate which
479 * block-base attribute type is requested: Secure or Privilege.
480 *
481 * @retval HAL Status
482 */
HAL_FLASHEx_ConfigBBAttributes(FLASH_BBAttributesTypeDef * pBBAttributes)483 HAL_StatusTypeDef HAL_FLASHEx_ConfigBBAttributes(FLASH_BBAttributesTypeDef *pBBAttributes)
484 {
485 HAL_StatusTypeDef status;
486 uint8_t index;
487 __IO uint32_t *reg;
488
489 /* Check the parameters */
490 assert_param(IS_FLASH_BB_EXCLUSIVE(pBBAttributes->BBAttributesType));
491
492 /* Wait for last operation to be completed */
493 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
494
495 if (status == HAL_OK)
496 {
497 /* Set the first Block-Based register to write */
498 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
499 if (pBBAttributes->BBAttributesType == FLASH_BB_SEC)
500 {
501 reg = &(FLASH->SECBBR1);
502 }
503 else
504 #endif /* __ARM_FEATURE_CMSE */
505 {
506 reg = &(FLASH->PRIVBBR1);
507 }
508
509 /* Modify the register values and check that new attributes are taken in account */
510 for (index = 0; index < FLASH_BLOCKBASED_NB_REG; index++)
511 {
512 *reg = pBBAttributes->BBAttributes_array[index];
513 if ((*reg) != pBBAttributes->BBAttributes_array[index])
514 {
515 status = HAL_ERROR;
516 }
517 reg++;
518 }
519
520 /* ISB instruction is called to be sure next instructions are performed with correct attributes */
521 __ISB();
522 }
523
524 /* Process Unlocked */
525 __HAL_UNLOCK(&pFlash);
526
527 return status;
528 }
529
530 /**
531 * @brief Return the block-based attributes.
532 *
533 * @param pBBAttributes [in/out] pointer to an FLASH_BBAttributesTypeDef structure
534 * that contains the configuration information.
535 * @note The field pBBAttributes->BBAttributesType should indicate which
536 * block-base attribute type is requested: Secure or Privilege.
537 *
538 * @retval None
539 */
HAL_FLASHEx_GetConfigBBAttributes(FLASH_BBAttributesTypeDef * pBBAttributes)540 void HAL_FLASHEx_GetConfigBBAttributes(FLASH_BBAttributesTypeDef *pBBAttributes)
541 {
542 uint8_t index;
543 __IO uint32_t *reg;
544
545 /* Check the parameters */
546 assert_param(IS_FLASH_BB_EXCLUSIVE(pBBAttributes->BBAttributesType));
547
548 /* Set the first Block-Based register to read */
549 if (pBBAttributes->BBAttributesType == FLASH_BB_SEC)
550 {
551 reg = &(FLASH->SECBBR1);
552 }
553 else
554 {
555 reg = &(FLASH->PRIVBBR1);
556 }
557
558 /* Read the register values */
559 for (index = 0; index < FLASH_BLOCKBASED_NB_REG; index++)
560 {
561 pBBAttributes->BBAttributes_array[index] = (*reg);
562 reg++;
563 }
564 }
565 #endif /* FLASH_SECBBR1_SECBB0 || FLASH_PRIVBBR1_PRIVBB0 */
566
567 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
568 /**
569 * @brief Activation of the protection of the secure hide area.
570 *
571 * @param Banks indicate the bank concerned by the activation
572 * This parameter can be one of the following values:
573 * @arg FLASH_BANK_1: Bank1 to be protected
574 *
575 * @retval None
576 */
HAL_FLASHEx_EnableSecHideProtection(uint32_t Banks)577 void HAL_FLASHEx_EnableSecHideProtection(uint32_t Banks)
578 {
579 /* Check the parameters */
580 assert_param(IS_FLASH_BANK(Banks));
581
582 SET_BIT(FLASH->SECHDPCR, FLASH_SECHDPCR_HDP_ACCDIS);
583
584 }
585
586 #endif /* __ARM_FEATURE_CMSE */
587
588
589 /**
590 * @}
591 */
592
593 /** @defgroup FLASHEx_Exported_Functions_Group2 Extended Peripheral Control functions
594 * @brief Extended Peripheral Control functions
595 *
596 @verbatim
597 ===============================================================================
598 ##### Extended Peripheral Control functions #####
599 ===============================================================================
600 [..]
601 This subsection provides a set of functions allowing to control the FLASH
602 memory operations.
603
604 @endverbatim
605 * @{
606 */
607
608 /**
609 * @brief Suspend new program or erase operation request.
610 * @param Request Indicate the suspend operation request
611 * This parameter can be a value of @ref FLASHEx_Suspend_Request
612 * @retval None
613 */
HAL_FLASHEx_SuspendOperation(uint32_t Request)614 void HAL_FLASHEx_SuspendOperation(uint32_t Request)
615 {
616 /* Check the parameter */
617 assert_param(IS_FLASH_SUSPEND_REQ(Request));
618
619 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
620 SET_BIT(FLASH->SECCR2, Request);
621 #else
622 SET_BIT(FLASH->NSCR2, Request);
623 #endif /* __ARM_FEATURE_CMSE */
624 }
625
626 /**
627 * @brief Allow new program or erase operation request.
628 * @param Request Indicate the allow operation request
629 * This parameter can be a value of @ref FLASHEx_Allow_Request
630 * @retval None
631 */
HAL_FLASHEx_AllowOperation(uint32_t Request)632 void HAL_FLASHEx_AllowOperation(uint32_t Request)
633 {
634 /* Check the parameter */
635 assert_param(IS_FLASH_ALLOW_REQ(Request));
636
637 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
638 CLEAR_BIT(FLASH->SECCR2, Request);
639 #else
640 CLEAR_BIT(FLASH->NSCR2, Request);
641 #endif /* __ARM_FEATURE_CMSE */
642 }
643
644 /**
645 * @brief Check if new program or erase operation request is suspended
646 * @retval Status
647 * - 0 : No suspended flash operation
648 * - FLASH_SUSPEND_PROGRAM : Program operations are suspended
649 * - FLASH_SUSPEND_ERASE : Erase operations are suspended
650 * - FLASH_SUSPEND_PROGRAM_ERASE : Program and erase operations are suspended
651 */
HAL_FLASHEx_IsOperationSuspended(void)652 uint32_t HAL_FLASHEx_IsOperationSuspended(void)
653 {
654 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
655 return (FLASH->SECCR2 & FLASH_SUSPEND_PROGRAM_ERASE);
656 #else
657 return (FLASH->NSCR2 & FLASH_SUSPEND_PROGRAM_ERASE);
658 #endif /* __ARM_FEATURE_CMSE */
659 }
660
661 #if defined(FLASH_PRIVCFGR_SPRIV)
662 /**
663 * @brief Configuration of the privilege attribute.
664 *
665 * @param PrivMode indicate privilege mode configuration
666 * This parameter can be one of the following values:
667 * @arg FLASH_SPRIV_GRANTED: access to secure Flash registers is granted to privileged or unprivileged access
668 * @arg FLASH_SPRIV_DENIED: access to secure Flash registers is denied to unprivileged access
669 * @arg FLASH_NSPRIV_GRANTED: access to non-secure Flash registers is granted to privileged or unprivileged access
670 * @arg FLASH_NSPRIV_DENIED: access to non-secure Flash registers is denied to unprivilege access
671 *
672 * @retval None
673 */
HAL_FLASHEx_ConfigPrivMode(uint32_t PrivMode)674 void HAL_FLASHEx_ConfigPrivMode(uint32_t PrivMode)
675 {
676 /* Check the parameters */
677 assert_param(IS_FLASH_CFGPRIVMODE(PrivMode));
678
679 MODIFY_REG(FLASH->PRIVCFGR, (FLASH_PRIVCFGR_SPRIV | FLASH_PRIVCFGR_NSPRIV), PrivMode);
680 }
681
682 /**
683 * @brief Return the value of the privilege attribute.
684 *
685 * @retval It indicates the privilege mode configuration.
686 * This return value can be one of the following values:
687 * @arg FLASH_SPRIV_GRANTED: access to secure Flash registers is granted to privileged or unprivileged access
688 * @arg FLASH_SPRIV_DENIED: access to secure Flash registers is denied to unprivileged access
689 * @arg FLASH_NSPRIV_GRANTED: access to non-secure Flash registers is granted to privileged or unprivileged access
690 * @arg FLASH_NSPRIV_DENIED: access to Flash registers is denied to unprivilege accessP
691 */
HAL_FLASHEx_GetPrivMode(void)692 uint32_t HAL_FLASHEx_GetPrivMode(void)
693 {
694 return (FLASH->PRIVCFGR & (FLASH_PRIVCFGR_SPRIV | FLASH_PRIVCFGR_NSPRIV));
695 }
696 #endif /* FLASH_PRIVCFGR_SPRIV */
697
698 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
699 /**
700 * @brief Configuration of the security inversion.
701 *
702 * @param SecInvState indicate the flash security state configuration
703 * This parameter can be one of the following values:
704 * @arg FLASH_SEC_INV_DISABLE: Security state of Flash is not inverted
705 * @arg FLASH_SEC_INV_ENABLE: Security state of Flash is inverted
706 *
707 * @retval HAL Status
708 */
HAL_FLASHEx_ConfigSecInversion(uint32_t SecInvState)709 HAL_StatusTypeDef HAL_FLASHEx_ConfigSecInversion(uint32_t SecInvState)
710 {
711 HAL_StatusTypeDef status;
712
713 /* Check the parameters */
714 assert_param(IS_FLASH_CFGSECINV(SecInvState));
715
716 /* Process Locked */
717 __HAL_LOCK(&pFlash);
718
719 /* Wait for last operation to be completed */
720 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
721
722 if (status == HAL_OK)
723 {
724 MODIFY_REG(FLASH->SECCR1, FLASH_SECCR1_INV, SecInvState);
725 }
726
727 /* Process Unlocked */
728 __HAL_UNLOCK(&pFlash);
729
730 return status;
731 }
732
733 /**
734 * @brief Return the value of the security inversion.
735 *
736 * @retval It indicates the flash security state configuration
737 * This return value can be one of the following values:
738 * @arg FLASH_SEC_INV_DISABLE: Security state of Flash is not inverted
739 * @arg FLASH_SEC_INV_ENABLE: Security state of Flash is inverted
740 */
HAL_FLASHEx_GetSecInversion(void)741 uint32_t HAL_FLASHEx_GetSecInversion(void)
742 {
743 return (FLASH->SECCR1 & FLASH_SECCR1_INV);
744 }
745 #endif /* __ARM_FEATURE_CMSE */
746
747 /**
748 * @brief Enable the Power-down Mode for Flash Banks
749 * @retval HAL Status
750 */
HAL_FLASHEx_EnablePowerDown()751 HAL_StatusTypeDef HAL_FLASHEx_EnablePowerDown()
752 {
753 HAL_StatusTypeDef status = HAL_OK;
754 uint32_t tickstart;
755
756 /* Check PD and PDREQ bits (Flash is not in power-down mode and not being
757 already under power-down request) */
758 if ((FLASH->NSSR & FLASH_NSSR_PD) != 0U)
759 {
760 status = HAL_ERROR;
761 }
762 else if ((FLASH->ACR & FLASH_ACR_PDREQ) != 0U)
763 {
764 status = HAL_ERROR;
765 }
766 else
767 {
768 /* Unlock PDREQ bit */
769 WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1);
770 WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2);
771
772 /* Set PDREQ in FLASH_ACR register */
773 SET_BIT(FLASH->ACR, FLASH_ACR_PDREQ);
774
775 /* Check PD1 bit */
776 tickstart = HAL_GetTick();
777 while (((FLASH->NSSR & FLASH_NSSR_PD) != FLASH_NSSR_PD))
778 {
779 if ((HAL_GetTick() - tickstart) > FLASH_TIMEOUT_VALUE)
780 {
781 return HAL_TIMEOUT;
782 }
783 }
784 }
785
786 return status;
787 }
788
789 /**
790 * @brief Configuration of the Low-Power read Mode.
791 *
792 * @param ConfigLPM indicate the Low-Power read Mode configuration.
793 * This parameter can be one of the following values:
794 * @arg FLASH_LPM_ENABLE: Flash is in low-power read mode
795 * @arg FLASH_LPM_DISABLE: Flash is in normal read mode
796 *
797 * @retval HAL Status
798 */
HAL_FLASHEx_ConfigLowPowerRead(uint32_t ConfigLPM)799 HAL_StatusTypeDef HAL_FLASHEx_ConfigLowPowerRead(uint32_t ConfigLPM)
800 {
801 HAL_StatusTypeDef status = HAL_OK;
802
803 /* Check the parameters */
804 assert_param(IS_FLASH_CFGLPM(ConfigLPM));
805
806 /* Set LPM Bit in FLASH_ACR register */
807 MODIFY_REG(FLASH->ACR, FLASH_ACR_LPM, ConfigLPM);
808
809 /* Check that low power read mode has been activated */
810 if (READ_BIT(FLASH->ACR, FLASH_ACR_LPM) != ConfigLPM)
811 {
812 status = HAL_ERROR;
813 }
814
815 return status;
816 }
817
818 /**
819 * @brief Return the value of the Low-Power read Mode.
820 *
821 * @retval It indicates the flash low-power read mode configuration
822 * This return value can be one of the following values:
823 * @arg FLASH_LPM_ENABLE: Flash is in low-power read mode
824 * @arg FLASH_LPM_DISABLE: Flash is in normal read mode
825 */
HAL_FLASHEx_GetLowPowerRead(void)826 uint32_t HAL_FLASHEx_GetLowPowerRead(void)
827 {
828 return (FLASH->ACR & FLASH_ACR_LPM);
829 }
830
831 /**
832 * @brief Return the on-going Flash Operation. After a system reset, return
833 * the interrupted Flash operation, if any.
834 * @param pFlashOperation [out] pointer to a FLASH_OperationTypeDef structure
835 * that contains the Flash operation information.
836 *
837 * @retval None
838 */
HAL_FLASHEx_GetOperation(FLASH_OperationTypeDef * pFlashOperation)839 void HAL_FLASHEx_GetOperation(FLASH_OperationTypeDef *pFlashOperation)
840 {
841 uint32_t opsr_reg = FLASH->OPSR;
842
843 /* Get Flash operation Type */
844 pFlashOperation->OperationType = opsr_reg & FLASH_OPSR_CODE_OP;
845
846 /* Get Flash operation memory */
847 pFlashOperation->FlashArea = opsr_reg & FLASH_OPSR_SYSF_OP;
848
849 /* Get Flash operation address */
850 pFlashOperation->Address = opsr_reg & FLASH_OPSR_ADDR_OP;
851 }
852
853 /**
854 * @}
855 */
856
857 /** @defgroup FLASHEx_Exported_Functions_Group3 Extended ECC operation functions
858 * @brief Extended ECC operation functions
859 *
860 @verbatim
861 ===============================================================================
862 ##### Extended ECC operation functions #####
863 ===============================================================================
864 [..]
865 This subsection provides a set of functions allowing to manage the Extended FLASH
866 ECC Operations.
867
868 @endverbatim
869 * @{
870 */
871 /**
872 * @brief Enable ECC correction interrupt
873 * @note ECC detection does not need to be enabled as directly linked to
874 * Non-Maskable Interrupt (NMI)
875 * @retval None
876 */
HAL_FLASHEx_EnableEccCorrectionInterrupt(void)877 void HAL_FLASHEx_EnableEccCorrectionInterrupt(void)
878 {
879 __HAL_FLASH_ENABLE_IT(FLASH_IT_ECCC);
880 }
881
882 /**
883 * @brief Disable ECC correction interrupt
884 * @retval None
885 */
HAL_FLASHEx_DisableEccCorrectionInterrupt(void)886 void HAL_FLASHEx_DisableEccCorrectionInterrupt(void)
887 {
888 __HAL_FLASH_DISABLE_IT(FLASH_IT_ECCC);
889 }
890
891 /**
892 * @brief Get the ECC error information.
893 * @param pData Pointer to an FLASH_EccInfoTypeDef structure that contains the
894 * ECC error information.
895 * @note This function should be called before ECC bit is cleared
896 * (in callback function)
897 * @retval None
898 */
HAL_FLASHEx_GetEccInfo(FLASH_EccInfoTypeDef * pData)899 void HAL_FLASHEx_GetEccInfo(FLASH_EccInfoTypeDef *pData)
900 {
901 uint32_t eccr;
902 /* Check Null pointer */
903 assert_param(pData != NULL);
904
905 /* Get back information from ECC register */
906 eccr = FLASH->ECCR;
907
908 /* Retrieve and sort information */
909 pData->Area = (eccr & FLASH_ECCR_SYSF_ECC);
910 pData->Address = ((eccr & FLASH_ECCR_ADDR_ECC) << 3U);
911
912 /* Add Base address depending on targeted area */
913 if (pData->Area == FLASH_ECC_AREA_USER_BANK1)
914 {
915 pData->Address |= FLASH_BASE;
916 }
917 else
918 {
919 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
920 pData->Address |= SYSTEM_FLASH_BASE_S;
921 #else
922 pData->Address |= SYSTEM_FLASH_BASE_NS;
923 #endif /* __ARM_FEATURE_CMSE */
924 }
925
926 /* Set Master which initiates transaction. On WBA, it's necessary CPU1 */
927 pData->MasterID = FLASH_ECC_MASTER_CPU1;
928 }
929
930 /**
931 * @brief Handle Flash ECC Detection interrupt request.
932 * @note On STM32WBA, this Irq Handler should be called in Non-Maskable Interrupt (NMI)
933 * interrupt subroutine.
934 * @retval None
935 */
HAL_FLASHEx_ECCD_IRQHandler(void)936 void HAL_FLASHEx_ECCD_IRQHandler(void)
937 {
938 /* Check ECC Detection Error */
939 if ((FLASH->ECCR & FLASH_ECCR_ECCD) != 0U)
940 {
941 /* Call User callback */
942 HAL_FLASHEx_EccDetectionCallback();
943
944 /* Clear ECC detection flag in order to allow new ECC error record */
945 SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCD);
946 }
947 }
948
949 /**
950 * @brief FLASH ECC Correction interrupt callback.
951 * @retval None
952 */
HAL_FLASHEx_EccCorrectionCallback(void)953 __weak void HAL_FLASHEx_EccCorrectionCallback(void)
954 {
955 /* NOTE : This function should not be modified, when the callback is needed,
956 the HAL_FLASHEx_EccCorrectionCallback could be implemented in the user file
957 */
958 }
959
960 /**
961 * @brief FLASH ECC Detection interrupt callback.
962 * @retval None
963 */
HAL_FLASHEx_EccDetectionCallback(void)964 __weak void HAL_FLASHEx_EccDetectionCallback(void)
965 {
966 /* NOTE : This function should not be modified, when the callback is needed,
967 the HAL_FLASHEx_EccDetectionCallback could be implemented in the user file
968 */
969 }
970
971 /**
972 * @}
973 */
974
975 /**
976 * @}
977 */
978
979 /* Private functions ---------------------------------------------------------*/
980
981 /** @addtogroup FLASHEx_Private_Functions
982 * @{
983 */
984 /**
985 * @brief Mass erase of FLASH memory.
986 * @retval None
987 */
FLASH_MassErase()988 static void FLASH_MassErase()
989 {
990 __IO uint32_t *reg_cr;
991
992
993 /* Access to SECCR1 or NSCR1 registers depends on operation type */
994 #if defined(FLASH_SECCR1_LOCK)
995 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR1) : &(FLASH_NS->NSCR1);
996 #else
997 reg_cr = &(FLASH_NS->NSCR1);
998 #endif /* FLASH_SECCR1_LOCK */
999
1000 /* Set the Mass Erase Bit for the bank 1 and proceed to erase */
1001 SET_BIT((*reg_cr), FLASH_NSCR1_MER | FLASH_NSCR1_STRT);
1002 }
1003
1004 /**
1005 * @brief Erase the specified FLASH memory page.
1006 * @param Page FLASH page to erase
1007 * This parameter must be a value between 0 and (max number of pages in the bank - 1)
1008 * @retval None
1009 */
FLASH_PageErase(uint32_t Page)1010 void FLASH_PageErase(uint32_t Page)
1011 {
1012 __IO uint32_t *reg_cr;
1013
1014 /* Check the parameters */
1015 assert_param(IS_FLASH_PAGE(Page));
1016
1017 /* Access to SECCR1 or NSCR1 registers depends on operation type */
1018 #if defined(FLASH_SECCR1_LOCK)
1019 reg_cr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECCR1) : &(FLASH_NS->NSCR1);
1020 #else
1021 reg_cr = &(FLASH_NS->NSCR1);
1022 #endif /* FLASH_SECCR1_LOCK */
1023
1024
1025 /* Proceed to erase the page */
1026 MODIFY_REG((*reg_cr), (FLASH_NSCR1_PNB | FLASH_NSCR1_PER | FLASH_NSCR1_STRT), ((Page << FLASH_NSCR1_PNB_Pos) | FLASH_NSCR1_PER | FLASH_NSCR1_STRT));
1027 }
1028
1029 /**
1030 * @brief Configure the write protection of the desired pages.
1031 *
1032 * @note When WRP is active in a zone, it cannot be erased or programmed.
1033 * Consequently, a software mass erase cannot be performed if one zone
1034 * is write-protected.
1035 * @note When the memory read protection level is selected (RDP level = 1),
1036 * it is not possible to program or erase Flash memory if the CPU debug
1037 * features are connected (JTAG or single wire) or boot code is being
1038 * executed from RAM or System flash, even if WRP is not activated.
1039 * @note To configure the WRP options, the option lock bit OPTLOCK must be
1040 * cleared with the call of the @ref HAL_FLASH_OB_Unlock() function.
1041 * @note To validate the WRP options, the option bytes must be reloaded
1042 * through the call of the @ref HAL_FLASH_OB_Launch() function.
1043 *
1044 * @param WRPArea Specifies the area to be configured.
1045 * This parameter can be one of the following values:
1046 * @arg @ref OB_WRPAREA_BANK1_AREAA Flash Bank 1 Area A
1047 * @arg @ref OB_WRPAREA_BANK1_AREAB Flash Bank 1 Area B
1048 *
1049 * @param WRPStartOffset Specifies the start page of the write protected area
1050 * This parameter can be page number between 0 and (max number of pages in the Flash - 1)
1051 *
1052 * @param WRPEndOffset Specifies the end page of the write protected area
1053 * This parameter can be page number between WRPStartOffset and (max number of pages in the Flash - 1)
1054 *
1055 * @param WRPLock Enables the lock of the write protected area
1056 * This parameter can be set to ENABLE or DISABLE
1057 *
1058 * @retval None
1059 */
FLASH_OB_WRPConfig(uint32_t WRPArea,uint32_t WRPStartOffset,uint32_t WRPEndOffset,FunctionalState WRPLock)1060 static void FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRPEndOffset, FunctionalState WRPLock)
1061 {
1062 /* Check the parameters */
1063 assert_param(IS_OB_WRPAREA(WRPArea));
1064 assert_param(IS_FLASH_PAGE(WRPStartOffset));
1065 assert_param(IS_FLASH_PAGE(WRPEndOffset));
1066 assert_param(IS_FUNCTIONAL_STATE(WRPLock));
1067
1068 /* Configure the write protected area */
1069 if (WRPArea == OB_WRPAREA_BANK1_AREAA)
1070 {
1071 FLASH->WRPAR = (((uint32_t)(~WRPLock) << FLASH_WRPAR_UNLOCK_Pos) | \
1072 (WRPEndOffset << FLASH_WRPAR_WRPA_PEND_Pos) | \
1073 WRPStartOffset);
1074 }
1075 else if (WRPArea == OB_WRPAREA_BANK1_AREAB)
1076 {
1077 FLASH->WRPBR = (((uint32_t)(~WRPLock) << FLASH_WRPBR_UNLOCK_Pos) | \
1078 (WRPEndOffset << FLASH_WRPBR_WRPB_PEND_Pos) | \
1079 WRPStartOffset);
1080 }
1081 else
1082 {
1083 /* Empty statement (to be compliant MISRA 15.7) */
1084 }
1085 }
1086
1087 /**
1088 * @brief Set the read protection level.
1089 *
1090 * @note To configure the RDP level, the option lock bit OPTLOCK must be
1091 * cleared with the call of the @ref HAL_FLASH_OB_Unlock() function.
1092 * @note To validate the RDP level, the option bytes must be reloaded
1093 * through the call of the @ref HAL_FLASH_OB_Launch() function.
1094 * @note !!! Warning : When enabling OB_RDP level 2 it's no more possible
1095 * to go back to other levels !!!
1096 *
1097 * @param RDPLevel specifies the read protection level.
1098 * This parameter can be one of the following values:
1099 * @arg @ref OB_RDP_LEVEL_0 No protection
1100 * @arg @ref OB_RDP_LEVEL_0_5 No debug access to secure area
1101 * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory
1102 * @arg @ref OB_RDP_LEVEL_2 Full chip protection
1103 *
1104 * @retval None
1105 */
FLASH_OB_RDPConfig(uint32_t RDPLevel)1106 static void FLASH_OB_RDPConfig(uint32_t RDPLevel)
1107 {
1108 /* Check the parameters */
1109 assert_param(IS_OB_RDP_LEVEL(RDPLevel));
1110
1111 /* Configure the RDP level in the option bytes register */
1112 MODIFY_REG(FLASH->OPTR, FLASH_OPTR_RDP, RDPLevel);
1113 }
1114
1115 /**
1116 * @brief Set the read protection key.
1117 * @param RDPKeyType Specifies the read protection key type.
1118 * This parameter can be one of the following values:
1119 * @arg @ref OB_RDP_KEY_OEM1 OEM1 key
1120 * @arg @ref OB_RDP_KEY_OEM2 OEM2 key
1121 * @param RDPKey1 Specifies the RDP key bits[0:31].
1122 * @param RDPKey2 Specifies the RDP key bits[32:63].
1123 * @retval None
1124 */
FLASH_OB_RDPKeyConfig(uint32_t RDPKeyType,uint32_t RDPKey1,uint32_t RDPKey2)1125 static void FLASH_OB_RDPKeyConfig(uint32_t RDPKeyType, uint32_t RDPKey1, uint32_t RDPKey2)
1126 {
1127 /* Check the parameters */
1128 assert_param(IS_OB_RDP_KEY_TYPE(RDPKeyType));
1129
1130 /* Configure the RDP OEM key */
1131 if (RDPKeyType == OB_RDP_KEY_OEM1)
1132 {
1133 WRITE_REG(FLASH->OEM1KEYR1, RDPKey1);
1134 WRITE_REG(FLASH->OEM1KEYR2, RDPKey2);
1135 }
1136 else
1137 {
1138 WRITE_REG(FLASH->OEM2KEYR1, RDPKey1);
1139 WRITE_REG(FLASH->OEM2KEYR2, RDPKey2);
1140 }
1141 }
1142
1143 /**
1144 * @brief Program the FLASH User Option Byte.
1145 *
1146 * @note To configure the user option bytes, the option lock bit OPTLOCK must
1147 * be cleared with the call of the @ref HAL_FLASH_OB_Unlock() function.
1148 * @note To validate the user option bytes, the option bytes must be reloaded
1149 * through the call of the @ref HAL_FLASH_OB_Launch() function.
1150 *
1151 * @param UserType The FLASH User Option Bytes to be modified.
1152 * This parameter can be a combination of @ref FLASH_OB_USER_Type
1153 * @param UserConfig The selected User Option Bytes values.
1154 * This parameter can be a combination of @ref FLASH_OB_USER_BOR_LEVEL,
1155 * @ref FLASH_OB_USER_nRST_STOP, @ref FLASH_OB_USER_nRST_STANDBY,
1156 * @ref FLASH_OB_USER_SRAM1_RST, @ref FLASH_OB_USER_IWDG_SW,
1157 * @ref FLASH_OB_USER_IWDG_STOP, @ref FLASH_OB_USER_IWDG_STANDBY,
1158 * @ref FLASH_OB_USER_WWDG_SW, @ref FLASH_OB_USER_SRAM2_PAR,
1159 * @ref FLASH_OB_USER_SRAM2_RST, @ref FLASH_OB_USER_nSWBOOT0,
1160 * @ref FLASH_OB_USER_nBOOT0 and @ref OB_USER_TZEN(*)
1161 * (*) Feature not available on all devices of the family
1162 * @retval None
1163 */
FLASH_OB_UserConfig(uint32_t UserType,uint32_t UserConfig)1164 static void FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig)
1165 {
1166 uint32_t optr_reg_val = 0;
1167 uint32_t optr_reg_mask = 0;
1168
1169 /* Check the parameters */
1170 assert_param(IS_OB_USER_TYPE(UserType));
1171
1172 if ((UserType & OB_USER_BOR_LEV) != 0U)
1173 {
1174 /* BOR level option byte should be modified */
1175 assert_param(IS_OB_USER_BOR_LEVEL(UserConfig & FLASH_OPTR_BOR_LEV));
1176
1177 /* Set value and mask for BOR level option byte */
1178 optr_reg_val |= (UserConfig & FLASH_OPTR_BOR_LEV);
1179 optr_reg_mask |= FLASH_OPTR_BOR_LEV;
1180 }
1181
1182 if ((UserType & OB_USER_nRST_STOP) != 0U)
1183 {
1184 /* nRST_STOP option byte should be modified */
1185 assert_param(IS_OB_USER_STOP(UserConfig & FLASH_OPTR_nRST_STOP));
1186
1187 /* Set value and mask for nRST_STOP option byte */
1188 optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STOP);
1189 optr_reg_mask |= FLASH_OPTR_nRST_STOP;
1190 }
1191
1192 if ((UserType & OB_USER_nRST_STDBY) != 0U)
1193 {
1194 /* nRST_STDBY option byte should be modified */
1195 assert_param(IS_OB_USER_STANDBY(UserConfig & FLASH_OPTR_nRST_STDBY));
1196
1197 /* Set value and mask for nRST_STDBY option byte */
1198 optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STDBY);
1199 optr_reg_mask |= FLASH_OPTR_nRST_STDBY;
1200 }
1201
1202 if ((UserType & OB_USER_SRAM1_RST) != 0U)
1203 {
1204 /* SRAM1_RST option byte should be modified */
1205 assert_param(IS_OB_USER_SRAM1_RST(UserConfig & FLASH_OPTR_SRAM1_RST));
1206
1207 /* Set value and mask for SRAM1_RST option byte */
1208 optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM1_RST);
1209 optr_reg_mask |= FLASH_OPTR_SRAM1_RST;
1210 }
1211
1212 if ((UserType & OB_USER_IWDG_SW) != 0U)
1213 {
1214 /* IWDG_SW option byte should be modified */
1215 assert_param(IS_OB_USER_IWDG(UserConfig & FLASH_OPTR_IWDG_SW));
1216
1217 /* Set value and mask for IWDG_SW option byte */
1218 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_SW);
1219 optr_reg_mask |= FLASH_OPTR_IWDG_SW;
1220 }
1221
1222 if ((UserType & OB_USER_IWDG_STOP) != 0U)
1223 {
1224 /* IWDG_STOP option byte should be modified */
1225 assert_param(IS_OB_USER_IWDG_STOP(UserConfig & FLASH_OPTR_IWDG_STOP));
1226
1227 /* Set value and mask for IWDG_STOP option byte */
1228 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STOP);
1229 optr_reg_mask |= FLASH_OPTR_IWDG_STOP;
1230 }
1231
1232 if ((UserType & OB_USER_IWDG_STDBY) != 0U)
1233 {
1234 /* IWDG_STDBY option byte should be modified */
1235 assert_param(IS_OB_USER_IWDG_STDBY(UserConfig & FLASH_OPTR_IWDG_STDBY));
1236
1237 /* Set value and mask for IWDG_STDBY option byte */
1238 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STDBY);
1239 optr_reg_mask |= FLASH_OPTR_IWDG_STDBY;
1240 }
1241
1242 if ((UserType & OB_USER_WWDG_SW) != 0U)
1243 {
1244 /* WWDG_SW option byte should be modified */
1245 assert_param(IS_OB_USER_WWDG(UserConfig & FLASH_OPTR_WWDG_SW));
1246
1247 /* Set value and mask for WWDG_SW option byte */
1248 optr_reg_val |= (UserConfig & FLASH_OPTR_WWDG_SW);
1249 optr_reg_mask |= FLASH_OPTR_WWDG_SW;
1250 }
1251
1252
1253 if ((UserType & OB_USER_SRAM2_PE) != 0U)
1254 {
1255 /* SRAM2_PAR option byte should be modified */
1256 assert_param(IS_OB_USER_SRAM2_PARITY(UserConfig & FLASH_OPTR_SRAM2_PE));
1257
1258 /* Set value and mask for SRAM2_PAR option byte */
1259 optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_PE);
1260 optr_reg_mask |= FLASH_OPTR_SRAM2_PE;
1261 }
1262
1263 if ((UserType & OB_USER_SRAM2_RST) != 0U)
1264 {
1265 /* SRAM2_RST option byte should be modified */
1266 assert_param(IS_OB_USER_SRAM2_RST(UserConfig & FLASH_OPTR_SRAM2_RST));
1267
1268 /* Set value and mask for SRAM2_RST option byte */
1269 optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_RST);
1270 optr_reg_mask |= FLASH_OPTR_SRAM2_RST;
1271 }
1272
1273 if ((UserType & OB_USER_nSWBOOT0) != 0U)
1274 {
1275 /* nSWBOOT0 option byte should be modified */
1276 assert_param(IS_OB_USER_SWBOOT0(UserConfig & FLASH_OPTR_nSWBOOT0));
1277
1278 /* Set value and mask for nSWBOOT0 option byte */
1279 optr_reg_val |= (UserConfig & FLASH_OPTR_nSWBOOT0);
1280 optr_reg_mask |= FLASH_OPTR_nSWBOOT0;
1281 }
1282
1283 if ((UserType & OB_USER_nBOOT0) != 0U)
1284 {
1285 /* nBOOT0 option byte should be modified */
1286 assert_param(IS_OB_USER_BOOT0(UserConfig & FLASH_OPTR_nBOOT0));
1287
1288 /* Set value and mask for nBOOT0 option byte */
1289 optr_reg_val |= (UserConfig & FLASH_OPTR_nBOOT0);
1290 optr_reg_mask |= FLASH_OPTR_nBOOT0;
1291 }
1292
1293
1294
1295 #if defined(FLASH_OPTR_TZEN)
1296 if ((UserType & OB_USER_TZEN) != 0U)
1297 {
1298 /* TZEN option byte should be modified */
1299 assert_param(IS_OB_USER_TZEN(UserConfig & FLASH_OPTR_TZEN));
1300
1301 /* Set value and mask for TZEN option byte */
1302 optr_reg_val |= (UserConfig & FLASH_OPTR_TZEN);
1303 optr_reg_mask |= FLASH_OPTR_TZEN;
1304 }
1305 #endif /* FLASH_OPTR_TZEN */
1306
1307 /* Configure the option bytes register */
1308 MODIFY_REG(FLASH->OPTR, optr_reg_mask, optr_reg_val);
1309 }
1310
1311 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1312 /**
1313 * @brief Configure the watermarked-based secure area.
1314 *
1315 * @param WMSecConfig specifies the area to be configured.
1316 * This parameter can be a combination of the following values:
1317 * @arg @ref OB_WMSEC_AREA1 Select Flash Secure Area 1
1318 * @arg @ref OB_WMSEC_SECURE_AREA_CONFIG Configure Flash Secure Area
1319 * @arg @ref OB_WMSEC_HDP_AREA_CONFIG Configure Flash secure hide Area
1320 * @arg @ref OB_WMSEC_HDP_AREA_ENABLE Enable secure hide Area in Secure Area
1321 * @arg @ref OB_WMSEC_HDP_AREA_DISABLE Disable secure hide Area in Secure Area
1322 *
1323 * @param WMSecStartPage Specifies the start page of the secure area
1324 * This parameter can be page number between 0 and (max number of pages in the bank - 1)
1325 *
1326 * @param WMSecEndPage Specifies the end page of the secure area
1327 * This parameter can be page number between WMSecStartPage and (max number of pages in the bank - 1)
1328 *
1329 * @param WMHDPEndPage Specifies the end page of the secure hide area
1330 * This parameter can be a page number between WMSecStartPage and WMSecEndPage
1331 *
1332 * @retval None
1333 */
FLASH_OB_WMSECConfig(uint32_t WMSecConfig,uint32_t WMSecStartPage,uint32_t WMSecEndPage,uint32_t WMHDPEndPage)1334 static void FLASH_OB_WMSECConfig(uint32_t WMSecConfig, uint32_t WMSecStartPage, uint32_t WMSecEndPage,
1335 uint32_t WMHDPEndPage)
1336 {
1337 uint32_t tmp_secwm1 = 0U;
1338 uint32_t tmp_secwm2 = 0U;
1339
1340 /* Check the parameters */
1341 assert_param(IS_OB_WMSEC_CONFIG(WMSecConfig));
1342 assert_param(IS_OB_WMSEC_AREA_EXCLUSIVE(WMSecConfig & FLASH_BANK_1));
1343 assert_param(IS_FLASH_PAGE(WMSecStartPage));
1344 assert_param(IS_FLASH_PAGE(WMSecEndPage));
1345 assert_param(IS_FLASH_PAGE(WMHDPEndPage));
1346
1347 /* Read SECWM registers */
1348 if ((WMSecConfig & OB_WMSEC_AREA1) != 0U)
1349 {
1350 tmp_secwm1 = FLASH->SECWMR1;
1351 tmp_secwm2 = FLASH->SECWMR2;
1352 }
1353 else
1354 {
1355 /* Nothing to do */
1356 }
1357
1358 /* Configure Secure Area */
1359 if ((WMSecConfig & OB_WMSEC_SECURE_AREA_CONFIG) != 0U)
1360 {
1361 MODIFY_REG(tmp_secwm1, (FLASH_SECWMR1_SECWM_PSTRT | FLASH_SECWMR1_SECWM_PEND),
1362 ((WMSecEndPage << FLASH_SECWMR1_SECWM_PEND_Pos) | WMSecStartPage));
1363 }
1364
1365 /* Configure Secure Hide Area */
1366 if ((WMSecConfig & OB_WMSEC_HDP_AREA_CONFIG) != 0U)
1367 {
1368 tmp_secwm2 &= (~FLASH_SECWMR2_HDP_PEND);
1369 tmp_secwm2 |= (WMHDPEndPage << FLASH_SECWMR2_HDP_PEND_Pos);
1370 }
1371
1372 /* Enable Secure Hide Area */
1373 if ((WMSecConfig & OB_WMSEC_HDP_AREA_ENABLE) != 0U)
1374 {
1375 tmp_secwm2 |= FLASH_SECWMR2_HDPEN;
1376 }
1377
1378 /* Disable Secure Hide Area */
1379 if ((WMSecConfig & OB_WMSEC_HDP_AREA_DISABLE) != 0U)
1380 {
1381 tmp_secwm2 &= (~FLASH_SECWMR2_HDPEN);
1382 }
1383
1384 /* Write SECWM registers */
1385 if ((WMSecConfig & OB_WMSEC_AREA1) != 0U)
1386 {
1387 FLASH->SECWMR1 = tmp_secwm1;
1388 FLASH->SECWMR2 = tmp_secwm2;
1389 }
1390 else
1391 {
1392 /* Nothing to do */
1393 }
1394 }
1395
1396 /**
1397 * @brief Configure the boot lock.
1398 * @param BootLockConfig Specifies the activation of the BOOT_LOCK.
1399 * This parameter can be one of the following values:
1400 * @arg @ref OB_BOOT_LOCK_DISABLE Boot Lock mode deactivated
1401 * @arg @ref OB_BOOT_LOCK_ENABLE Boot Lock mode activated
1402 * @retval None
1403 */
FLASH_OB_BootLockConfig(uint32_t BootLockConfig)1404 static void FLASH_OB_BootLockConfig(uint32_t BootLockConfig)
1405 {
1406 /* Check the parameters */
1407 assert_param(IS_OB_BOOT_LOCK(BootLockConfig));
1408
1409 /* Configure the option bytes register */
1410 MODIFY_REG(FLASH->SECBOOTADD0R, FLASH_SECBOOTADD0R_BOOT_LOCK, BootLockConfig);
1411 }
1412 #endif /* __ARM_FEATURE_CMSE */
1413
1414 /**
1415 * @brief Configure the boot address.
1416 *
1417 * @param BootAddrConfig specifies the area to be configured.
1418 * This parameter can be one of the following values:
1419 * @arg @ref OB_BOOTADDR_NS0 Non-secure boot address 0
1420 * @arg @ref OB_BOOTADDR_NS1 Non-secure boot address 1
1421 * @arg @ref OB_BOOTADDR_SEC0 Secure boot address 0
1422 *
1423 * @param BootAddr Specifies the address used for the boot
1424 * This parameter can be page number between 0 and 0xFFFFFF00
1425 *
1426 * @retval None
1427 */
FLASH_OB_BootAddrConfig(uint32_t BootAddrConfig,uint32_t BootAddr)1428 static void FLASH_OB_BootAddrConfig(uint32_t BootAddrConfig, uint32_t BootAddr)
1429 {
1430 /* Check the parameters */
1431 assert_param(IS_OB_BOOTADDR_CONFIG(BootAddrConfig));
1432
1433 if (BootAddrConfig == OB_BOOTADDR_NS0)
1434 {
1435 MODIFY_REG(FLASH->NSBOOTADD0R, FLASH_NSBOOTADD0R_NSBOOTADD0, BootAddr);
1436 }
1437 else if (BootAddrConfig == OB_BOOTADDR_NS1)
1438 {
1439 MODIFY_REG(FLASH->NSBOOTADD1R, FLASH_NSBOOTADD1R_NSBOOTADD1, BootAddr);
1440 }
1441 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1442 else if (BootAddrConfig == OB_BOOTADDR_SEC0)
1443 {
1444 MODIFY_REG(FLASH->SECBOOTADD0R, FLASH_SECBOOTADD0R_SECBOOTADD0, BootAddr);
1445 }
1446 #endif /* __ARM_FEATURE_CMSE */
1447 else
1448 {
1449 /* Empty statement (to be compliant MISRA 15.7) */
1450 }
1451 }
1452
1453 /**
1454 * @brief Return the FLASH Write Protection Option Bytes value.
1455 *
1456 * @param[in] WRPArea Specifies the area to be returned.
1457 * This parameter can be one of the following values:
1458 * @arg @ref OB_WRPAREA_BANK1_AREAA Flash Bank 1 Area A
1459 * @arg @ref OB_WRPAREA_BANK1_AREAB Flash Bank 1 Area B
1460 *
1461 * @param[out] WRPStartOffset Specifies the address where to copied the start page
1462 * of the write protected area
1463 *
1464 * @param[out] WRPEndOffset Specifies the address where to copied the end page of
1465 * the write protected area
1466 *
1467 * @param[out] WRPLock Specifies the lock status of the write protected area.
1468 * The returned value can be ENABLE or DISABLE
1469 *
1470 * @retval None
1471 */
FLASH_OB_GetWRP(uint32_t WRPArea,uint32_t * WRPStartOffset,uint32_t * WRPEndOffset,FunctionalState * WRPLock)1472 static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t *WRPStartOffset, uint32_t *WRPEndOffset, FunctionalState *WRPLock)
1473 {
1474 /* Get the configuration of the write protected area */
1475 if (WRPArea == OB_WRPAREA_BANK1_AREAA)
1476 {
1477 *WRPStartOffset = READ_BIT(FLASH->WRPAR, FLASH_WRPAR_WRPA_PSTRT);
1478 *WRPEndOffset = (READ_BIT(FLASH->WRPAR, FLASH_WRPAR_WRPA_PEND) >> FLASH_WRPAR_WRPA_PEND_Pos);
1479 *WRPLock = (READ_BIT(FLASH->WRPAR, FLASH_WRPAR_UNLOCK) != 0U) ? DISABLE : ENABLE;
1480 }
1481 else if (WRPArea == OB_WRPAREA_BANK1_AREAB)
1482 {
1483 *WRPStartOffset = READ_BIT(FLASH->WRPBR, FLASH_WRPBR_WRPB_PSTRT);
1484 *WRPEndOffset = (READ_BIT(FLASH->WRPBR, FLASH_WRPBR_WRPB_PEND) >> FLASH_WRPBR_WRPB_PEND_Pos);
1485 *WRPLock = (READ_BIT(FLASH->WRPBR, FLASH_WRPBR_UNLOCK) != 0U) ? DISABLE : ENABLE;
1486 }
1487 else
1488 {
1489 /* Empty statement (to be compliant MISRA 15.7) */
1490 }
1491 }
1492
1493 /**
1494 * @brief Return the FLASH Read Protection level.
1495 * @retval FLASH ReadOut Protection Level
1496 * This return value can be one of the following values:
1497 * @arg @ref OB_RDP_LEVEL_0 No protection
1498 * @arg @ref OB_RDP_LEVEL_0_5 No debug access to secure area
1499 * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory
1500 * @arg @ref OB_RDP_LEVEL_2 Full chip protection
1501 */
FLASH_OB_GetRDP(void)1502 static uint32_t FLASH_OB_GetRDP(void)
1503 {
1504 uint32_t rdp_level = READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP);
1505
1506 if ((rdp_level != OB_RDP_LEVEL_0) && (rdp_level != OB_RDP_LEVEL_0_5) && (rdp_level != OB_RDP_LEVEL_2))
1507 {
1508 return (OB_RDP_LEVEL_1);
1509 }
1510 else
1511 {
1512 return (rdp_level);
1513 }
1514 }
1515
1516 /**
1517 * @brief Return the FLASH User Option Byte value.
1518 * @retval The FLASH User Option Bytes values.
1519 * The return value can be a combination of @ref FLASH_OB_USER_BOR_LEVEL,
1520 * @arg @ref FLASH_OB_USER_nRST_STOP, @arg @ref FLASH_OB_USER_nRST_STANDBY,
1521 * @arg @ref FLASH_OB_USER_SRAM1_RST, @arg @ref FLASH_OB_USER_IWDG_SW,
1522 * @arg @ref FLASH_OB_USER_IWDG_STOP, @arg @ref FLASH_OB_USER_IWDG_STANDBY,
1523 * @arg @ref FLASH_OB_USER_WWDG_SW, @arg @ref FLASH_OB_USER_SRAM2_PAR,
1524 * @arg @ref FLASH_OB_USER_SRAM2_RST, @arg @ref FLASH_OB_USER_nSWBOOT0,
1525 * @arg @ref FLASH_OB_USER_nBOOT0 and @arg @ref OB_USER_TZEN(*)
1526 * (*) Feature not available on all devices of the family
1527 */
FLASH_OB_GetUser(void)1528 static uint32_t FLASH_OB_GetUser(void)
1529 {
1530 uint32_t user_config = READ_REG(FLASH->OPTR);
1531 CLEAR_BIT(user_config, FLASH_OPTR_RDP);
1532
1533 return user_config;
1534 }
1535
1536 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1537 /**
1538 * @brief Return the watermarked-based secure area configuration.
1539 *
1540 * @param WMSecConfig [in/out] Specifies the area to be returned.
1541 * This parameter can be one of the following values:
1542 * @arg @ref OB_WMSEC_AREA1 select Flash Secure Area 1
1543 * When return from the function, this parameter will be a combinaison of the following values:
1544 * @arg @ref OB_WMSEC_AREA1 selected Flash Secure Area 1
1545 * @arg @ref OB_WMSEC_HDP_AREA_ENABLE Secure Hide Area in Secure Area enabled
1546 * @arg @ref OB_WMSEC_HDP_AREA_DISABLE Secure Hide Area in Secure Area disabled
1547 *
1548 * @param WMSecStartPage [out] Specifies the start page of the secure area
1549 *
1550 * @param WMSecEndPage [out] Specifies the end page of the secure area
1551 *
1552 * @param WMHDPEndPage [out] Specifies the end page of the secure hide area
1553 *
1554 * @retval None
1555 */
FLASH_OB_GetWMSEC(uint32_t * WMSecConfig,uint32_t * WMSecStartPage,uint32_t * WMSecEndPage,uint32_t * WMHDPEndPage)1556 static void FLASH_OB_GetWMSEC(uint32_t *WMSecConfig, uint32_t *WMSecStartPage, uint32_t *WMSecEndPage,
1557 uint32_t *WMHDPEndPage)
1558 {
1559 uint32_t tmp_secwm1 = 0U;
1560 uint32_t tmp_secwm2 = 0U;
1561
1562 /* Check the parameters */
1563 assert_param(IS_OB_WMSEC_CONFIG(*WMSecConfig));
1564 assert_param(IS_FLASH_BANK_EXCLUSIVE((*WMSecConfig) & FLASH_BANK_1));
1565
1566 /* Read SECWM registers */
1567 if (((*WMSecConfig) & OB_WMSEC_AREA1) != 0U)
1568 {
1569 tmp_secwm1 = FLASH->SECWMR1;
1570 tmp_secwm2 = FLASH->SECWMR2;
1571 }
1572 else
1573 {
1574 /* Empty statement (to be compliant MISRA 15.7) */
1575 }
1576
1577 /* Configuration of secure area */
1578 *WMSecStartPage = (tmp_secwm1 & FLASH_SECWMR1_SECWM_PSTRT);
1579 *WMSecEndPage = ((tmp_secwm1 & FLASH_SECWMR1_SECWM_PEND) >> FLASH_SECWMR1_SECWM_PEND_Pos);
1580
1581 /* Configuration of secure hide area */
1582 *WMHDPEndPage = ((tmp_secwm2 & FLASH_SECWMR2_HDP_PEND) >> FLASH_SECWMR2_HDP_PEND_Pos);
1583
1584 if ((tmp_secwm2 & FLASH_SECWMR2_HDPEN) == 0U)
1585 {
1586 *WMSecConfig = ((*WMSecConfig) | OB_WMSEC_HDP_AREA_DISABLE);
1587 }
1588 else
1589 {
1590 *WMSecConfig = ((*WMSecConfig) | OB_WMSEC_HDP_AREA_ENABLE);
1591 }
1592 }
1593
1594 /**
1595 * @brief Return the boot lock configuration.
1596 *
1597 * @retval Value of Boot Lock configuration
1598 * It can be one of the following values:
1599 * @arg @ref OB_BOOT_LOCK_DISABLE Boot Lock mode deactivated
1600 * @arg @ref OB_BOOT_LOCK_ENABLE Boot Lock mode activated
1601 */
FLASH_OB_GetBootLock(void)1602 static uint32_t FLASH_OB_GetBootLock(void)
1603 {
1604 return (FLASH->SECBOOTADD0R & FLASH_SECBOOTADD0R_BOOT_LOCK);
1605 }
1606 #endif /* __ARM_FEATURE_CMSE */
1607
1608 /**
1609 * @brief Return the boot address.
1610 *
1611 * @param[in] BootAddrConfig Specifies the area to be returned
1612 * This parameter can be one of the following values:
1613 * @arg @ref OB_BOOTADDR_NS0 Non-secure boot address 0
1614 * @arg @ref OB_BOOTADDR_NS1 Non-secure boot address 1
1615 * @arg @ref OB_BOOTADDR_SEC0 Secure boot address 0
1616 *
1617 * @param[out] BootAddr specifies the boot address value
1618 *
1619 * @retval None
1620 */
FLASH_OB_GetBootAddr(uint32_t BootAddrConfig,uint32_t * BootAddr)1621 static void FLASH_OB_GetBootAddr(uint32_t BootAddrConfig, uint32_t *BootAddr)
1622 {
1623 if (BootAddrConfig == OB_BOOTADDR_NS0)
1624 {
1625 *BootAddr = (FLASH->NSBOOTADD0R & FLASH_NSBOOTADD0R_NSBOOTADD0);
1626 }
1627 else if (BootAddrConfig == OB_BOOTADDR_NS1)
1628 {
1629 *BootAddr = (FLASH->NSBOOTADD1R & FLASH_NSBOOTADD1R_NSBOOTADD1);
1630 }
1631 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1632 else if (BootAddrConfig == OB_BOOTADDR_SEC0)
1633 {
1634 *BootAddr = (FLASH->SECBOOTADD0R & FLASH_SECBOOTADD0R_SECBOOTADD0);
1635 }
1636 #endif /* __ARM_FEATURE_CMSE */
1637 else
1638 {
1639 /* Empty statement (to be compliant MISRA 15.7) */
1640 }
1641 }
1642
1643 /**
1644 * @}
1645 */
1646
1647 /**
1648 * @}
1649 */
1650
1651 #endif /* HAL_FLASH_MODULE_ENABLED */
1652
1653 /**
1654 * @}
1655 */
1656
1657 /**
1658 * @}
1659 */
1660
