1 /**
2 ******************************************************************************
3 * @file stm32u5xx_hal.c
4 * @author MCD Application Team
5 * @brief HAL module driver.
6 * This is the common part of the HAL initialization
7 *
8 ******************************************************************************
9 * @attention
10 *
11 * Copyright (c) 2021 STMicroelectronics.
12 * All rights reserved.
13 *
14 * This software is licensed under terms that can be found in the LICENSE file
15 * in the root directory of this software component.
16 * If no LICENSE file comes with this software, it is provided AS-IS.
17 *
18 ******************************************************************************
19 @verbatim
20 ==============================================================================
21 ##### How to use this driver #####
22 ==============================================================================
23 [..]
24 The common HAL driver contains a set of generic and common APIs that can be
25 used by the PPP peripheral drivers and the user to start using the HAL.
26 [..]
27 The HAL contains two APIs' categories:
28 (+) Common HAL APIs
29 (+) Services HAL APIs
30
31 @endverbatim
32 ******************************************************************************
33 */
34
35 /* Includes ------------------------------------------------------------------*/
36 #include "stm32u5xx_hal.h"
37
38 /** @addtogroup STM32U5xx_HAL_Driver
39 * @{
40 */
41
42 /** @defgroup HAL HAL
43 * @brief HAL module driver
44 * @{
45 */
46
47 #ifdef HAL_MODULE_ENABLED
48
49 /* Private typedef -----------------------------------------------------------*/
50 /* Private define ------------------------------------------------------------*/
51 /** @defgroup HAL_Private_Defines HAL Private Defines
52 * @{
53 */
54 /**
55 * @brief STM32U5xx HAL Driver version number 1.6.1
56 */
57 #define __STM32U5xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
58 #define __STM32U5xx_HAL_VERSION_SUB1 (0x06U) /*!< [23:16] sub1 version */
59 #define __STM32U5xx_HAL_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */
60 #define __STM32U5xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
61 #define __STM32U5xx_HAL_VERSION ((__STM32U5xx_HAL_VERSION_MAIN << 24U)\
62 |(__STM32U5xx_HAL_VERSION_SUB1 << 16U)\
63 |(__STM32U5xx_HAL_VERSION_SUB2 << 8U )\
64 |(__STM32U5xx_HAL_VERSION_RC))
65
66 #define VREFBUF_TIMEOUT_VALUE 10U /* 10 ms (to be confirmed) */
67 /**
68 * @}
69 */
70 /* Private macro -------------------------------------------------------------*/
71 /* Private variables ---------------------------------------------------------*/
72 /* Exported variables --------------------------------------------------------*/
73
74 /** @defgroup HAL_Exported_Variables HAL Exported Variables
75 * @{
76 */
77 __IO uint32_t uwTick;
78 uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */
79 HAL_TickFreqTypeDef uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */
80 /**
81 * @}
82 */
83
84 /* Private function prototypes -----------------------------------------------*/
85 /* Exported functions --------------------------------------------------------*/
86
87 /** @defgroup HAL_Exported_Functions HAL Exported Functions
88 * @{
89 */
90
91 /** @defgroup HAL_Exported_Functions_Group1 HAL Initialization and de-initialization Functions
92 * @brief Initialization and de-initialization functions
93 *
94 @verbatim
95 ===============================================================================
96 ##### Initialization and de-initialization functions #####
97 ===============================================================================
98 [..] This section provides functions allowing to:
99 (+) Initializes the Flash interface the NVIC allocation and initial clock
100 configuration. It initializes the systick also when timeout is needed
101 and the backup domain when enabled.
102 (+) De-Initializes common part of the HAL.
103 (+) Configure The time base source to have 1ms time base with a dedicated
104 Tick interrupt priority.
105 (++) SysTick timer is used by default as source of time base, but user
106 can eventually implement his proper time base source (a general purpose
107 timer for example or other time source), keeping in mind that Time base
108 duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
109 handled in milliseconds basis.
110 (++) Time base configuration function (HAL_InitTick ()) is called automatically
111 at the beginning of the program after reset by HAL_Init() or at any time
112 when clock is configured, by HAL_RCC_ClockConfig().
113 (++) Source of time base is configured to generate interrupts at regular
114 time intervals. Care must be taken if HAL_Delay() is called from a
115 peripheral ISR process, the Tick interrupt line must have higher priority
116 (numerically lower) than the peripheral interrupt. Otherwise the caller
117 ISR process will be blocked.
118 (++) functions affecting time base configurations are declared as __weak
119 to make override possible in case of other implementations in user file.
120 @endverbatim
121 * @{
122 */
123
124 /**
125 * @brief Configure the Flash prefetch, the time base source, NVIC and any required global low
126 * level hardware by calling the HAL_MspInit() callback function to be optionally defined
127 * in user file stm32u5xx_hal_msp.c.
128 *
129 * @note HAL_Init() function is called at the beginning of program after reset and before
130 * the clock configuration.
131 *
132 * @note In the default implementation the System Timer (SysTick) is used as source of time base.
133 * The SysTick configuration is based on MSI clock, as MSI is the clock
134 * used after a system Reset and the NVIC configuration is set to Priority group 4.
135 * Once done, time base tick starts incrementing: the tick variable counter is incremented
136 * each 1ms in the SysTick_Handler() interrupt handler.
137 *
138 * @retval HAL status
139 */
HAL_Init(void)140 HAL_StatusTypeDef HAL_Init(void)
141 {
142 /* Configure Flash prefetch */
143 #if (PREFETCH_ENABLE != 0U)
144 __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
145 #endif /* PREFETCH_ENABLE */
146
147 /* Set Interrupt Group Priority */
148 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
149
150 /* Update the SystemCoreClock global variable */
151 SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos];
152
153 /* Select HCLK as SysTick clock source */
154 HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
155
156 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
157 if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
158 {
159 return HAL_ERROR;
160 }
161
162 /* Init the low level hardware */
163 HAL_MspInit();
164
165 /* Return function status */
166 return HAL_OK;
167 }
168
169 /**
170 * @brief This function de-Initializes common part of the HAL and stops the systick.
171 * This function is optional.
172 * @retval HAL status
173 */
HAL_DeInit(void)174 HAL_StatusTypeDef HAL_DeInit(void)
175 {
176 /* Reset of all peripherals */
177 __HAL_RCC_APB1_FORCE_RESET();
178 __HAL_RCC_APB1_RELEASE_RESET();
179
180 __HAL_RCC_APB2_FORCE_RESET();
181 __HAL_RCC_APB2_RELEASE_RESET();
182
183 __HAL_RCC_AHB1_FORCE_RESET();
184 __HAL_RCC_AHB1_RELEASE_RESET();
185
186 __HAL_RCC_AHB2_FORCE_RESET();
187 __HAL_RCC_AHB2_RELEASE_RESET();
188
189 __HAL_RCC_AHB3_FORCE_RESET();
190 __HAL_RCC_AHB3_RELEASE_RESET();
191
192 /* De-Init the low level hardware */
193 HAL_MspDeInit();
194
195 /* Return function status */
196 return HAL_OK;
197 }
198
199 /**
200 * @brief Initializes the MSP.
201 * @retval None
202 */
HAL_MspInit(void)203 __weak void HAL_MspInit(void)
204 {
205 /* NOTE : This function Should not be modified, when the callback is needed,
206 the HAL_MspInit could be implemented in the user file
207 */
208 }
209
210 /**
211 * @brief DeInitializes the MSP.
212 * @retval None
213 */
HAL_MspDeInit(void)214 __weak void HAL_MspDeInit(void)
215 {
216 /* NOTE : This function Should not be modified, when the callback is needed,
217 the HAL_MspDeInit could be implemented in the user file
218 */
219 }
220
221 /**
222 * @brief This function configures the source of the time base.
223 * The time source is configured to have 1ms time base with a dedicated
224 * Tick interrupt priority.
225 * @note This function is called automatically at the beginning of program after
226 * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
227 * @note In the default implementation, SysTick timer is the source of time base.
228 * It is used to generate interrupts at regular time intervals.
229 * Care must be taken if HAL_Delay() is called from a peripheral ISR process,
230 * The SysTick interrupt must have higher priority (numerically lower)
231 * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
232 * The function is declared as __weak to be overwritten in case of other
233 * implementation in user file.
234 * @param TickPriority: Tick interrupt priority.
235 * @retval HAL status
236 */
HAL_InitTick(uint32_t TickPriority)237 __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
238 {
239 uint32_t ticknumber = 0U;
240 uint32_t systicksel;
241
242 /* Check uwTickFreq for MisraC 2012 (even if uwTickFreq is a enum type that don't take the value zero)*/
243 if ((uint32_t)uwTickFreq == 0UL)
244 {
245 return HAL_ERROR;
246 }
247
248 /* Check Clock source to calculate the tickNumber */
249 if (READ_BIT(SysTick->CTRL, SysTick_CTRL_CLKSOURCE_Msk) == SysTick_CTRL_CLKSOURCE_Msk)
250 {
251 /* HCLK selected as SysTick clock source */
252 ticknumber = SystemCoreClock / (1000UL / (uint32_t)uwTickFreq);
253 }
254 else
255 {
256 systicksel = HAL_SYSTICK_GetCLKSourceConfig();
257 switch (systicksel)
258 {
259 /* HCLK_DIV8 selected as SysTick clock source */
260 case SYSTICK_CLKSOURCE_HCLK_DIV8:
261 /* Calculate tick value */
262 ticknumber = (SystemCoreClock / (8000UL / (uint32_t)uwTickFreq));
263 break;
264 /* LSI selected as SysTick clock source */
265 case SYSTICK_CLKSOURCE_LSI:
266 /* Calculate tick value */
267 ticknumber = (LSI_VALUE / (1000UL / (uint32_t)uwTickFreq));
268 break;
269 /* LSE selected as SysTick clock source */
270 case SYSTICK_CLKSOURCE_LSE:
271 /* Calculate tick value */
272 ticknumber = (LSE_VALUE / (1000UL / (uint32_t)uwTickFreq));
273 break;
274 default:
275 /* Nothing to do */
276 break;
277 }
278 }
279
280 /* Configure the SysTick to have interrupt in 1ms time basis*/
281 if (HAL_SYSTICK_Config(ticknumber) > 0U)
282 {
283 return HAL_ERROR;
284 }
285
286 /* Configure the SysTick IRQ priority */
287 HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
288 uwTickPrio = TickPriority;
289
290 /* Return function status */
291 return HAL_OK;
292 }
293
294 /**
295 * @}
296 */
297
298 /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions
299 * @brief HAL Control functions
300 *
301 @verbatim
302 ===============================================================================
303 ##### HAL Control functions #####
304 ===============================================================================
305 [..] This section provides functions allowing to:
306 (+) Provide a tick value in millisecond
307 (+) Provide a blocking delay in millisecond
308 (+) Suspend the time base source interrupt
309 (+) Resume the time base source interrupt
310 (+) Get the HAL API driver version
311 (+) Get the device identifier
312 (+) Get the device revision identifier
313 (+) Enable/Disable Debug module during SLEEP mode
314 (+) Enable/Disable Debug module during STOP mode
315 (+) Enable/Disable Debug module during STANDBY mode
316
317 @endverbatim
318 * @{
319 */
320
321 /**
322 * @brief This function is called to increment a global variable "uwTick"
323 * used as application time base.
324 * @note In the default implementation, this variable is incremented each 1ms
325 * in SysTick ISR.
326 * @note This function is declared as __weak to be overwritten in case of other
327 * implementations in user file.
328 * @retval None
329 */
HAL_IncTick(void)330 __weak void HAL_IncTick(void)
331 {
332 uwTick += (uint32_t)uwTickFreq;
333 }
334
335 /**
336 * @brief Provides a tick value in millisecond.
337 * @note This function is declared as __weak to be overwritten in case of other
338 * implementations in user file.
339 * @retval tick value
340 */
HAL_GetTick(void)341 __weak uint32_t HAL_GetTick(void)
342 {
343 return uwTick;
344 }
345
346 /**
347 * @brief This function returns a tick priority.
348 * @retval tick priority
349 */
HAL_GetTickPrio(void)350 uint32_t HAL_GetTickPrio(void)
351 {
352 return uwTickPrio;
353 }
354
355 /**
356 * @brief Set new tick Freq.
357 * @retval Status
358 */
HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)359 HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
360 {
361 HAL_StatusTypeDef status = HAL_OK;
362 assert_param(IS_TICKFREQ(Freq));
363
364 if (uwTickFreq != Freq)
365 {
366 /* Apply the new tick Freq */
367 status = HAL_InitTick(uwTickPrio);
368
369 if (status == HAL_OK)
370 {
371 uwTickFreq = Freq;
372 }
373 }
374
375 return status;
376 }
377
378 /**
379 * @brief Return tick frequency.
380 * @retval Tick frequency.
381 * Value of @ref HAL_TickFreqTypeDef.
382 */
HAL_GetTickFreq(void)383 HAL_TickFreqTypeDef HAL_GetTickFreq(void)
384 {
385 return uwTickFreq;
386 }
387
388 /**
389 * @brief This function provides minimum delay (in milliseconds) based
390 * on variable incremented.
391 * @note In the default implementation , SysTick timer is the source of time base.
392 * It is used to generate interrupts at regular time intervals where uwTick
393 * is incremented.
394 * @note This function is declared as __weak to be overwritten in case of other
395 * implementations in user file.
396 * @param Delay specifies the delay time length, in milliseconds.
397 * @retval None
398 */
HAL_Delay(uint32_t Delay)399 __weak void HAL_Delay(uint32_t Delay)
400 {
401 uint32_t tickstart = HAL_GetTick();
402 uint32_t wait = Delay;
403
404 /* Add a freq to guarantee minimum wait */
405 if (wait < HAL_MAX_DELAY)
406 {
407 wait += (uint32_t)(uwTickFreq);
408 }
409
410 while ((HAL_GetTick() - tickstart) < wait)
411 {
412 }
413 }
414
415 /**
416 * @brief Suspend Tick increment.
417 * @note In the default implementation , SysTick timer is the source of time base. It is
418 * used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
419 * is called, the SysTick interrupt will be disabled and so Tick increment
420 * is suspended.
421 * @note This function is declared as __weak to be overwritten in case of other
422 * implementations in user file.
423 * @retval None
424 */
HAL_SuspendTick(void)425 __weak void HAL_SuspendTick(void)
426 {
427 /* Disable SysTick Interrupt */
428 SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
429 }
430
431 /**
432 * @brief Resume Tick increment.
433 * @note In the default implementation , SysTick timer is the source of time base. It is
434 * used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
435 * is called, the SysTick interrupt will be enabled and so Tick increment
436 * is resumed.
437 * @note This function is declared as __weak to be overwritten in case of other
438 * implementations in user file.
439 * @retval None
440 */
HAL_ResumeTick(void)441 __weak void HAL_ResumeTick(void)
442 {
443 /* Enable SysTick Interrupt */
444 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
445 }
446
447 /**
448 * @brief Returns the HAL revision
449 * @retval version : 0xXYZR (8bits for each decimal, R for RC)
450 */
HAL_GetHalVersion(void)451 uint32_t HAL_GetHalVersion(void)
452 {
453 return __STM32U5xx_HAL_VERSION;
454 }
455
456 /**
457 * @brief Returns the device revision identifier.
458 * @retval Device revision identifier
459 */
HAL_GetREVID(void)460 uint32_t HAL_GetREVID(void)
461 {
462 return ((DBGMCU->IDCODE & DBGMCU_IDCODE_REV_ID) >> 16);
463 }
464
465 /**
466 * @brief Returns the device identifier.
467 * @retval Device identifier
468 */
HAL_GetDEVID(void)469 uint32_t HAL_GetDEVID(void)
470 {
471 return (DBGMCU->IDCODE & DBGMCU_IDCODE_DEV_ID);
472 }
473
474 /**
475 * @brief Return the first word of the unique device identifier (UID based on 96 bits)
476 * @retval Device identifier
477 */
HAL_GetUIDw0(void)478 uint32_t HAL_GetUIDw0(void)
479 {
480 return (READ_REG(*((uint32_t *)UID_BASE)));
481 }
482
483 /**
484 * @brief Return the second word of the unique device identifier (UID based on 96 bits)
485 * @retval Device identifier
486 */
HAL_GetUIDw1(void)487 uint32_t HAL_GetUIDw1(void)
488 {
489 return (READ_REG(*((uint32_t *)(UID_BASE + 4U))));
490 }
491
492 /**
493 * @brief Return the third word of the unique device identifier (UID based on 96 bits)
494 * @retval Device identifier
495 */
HAL_GetUIDw2(void)496 uint32_t HAL_GetUIDw2(void)
497 {
498 return (READ_REG(*((uint32_t *)(UID_BASE + 8U))));
499 }
500
501 /**
502 * @}
503 */
504
505
506 /** @defgroup HAL_Exported_Functions_Group3 HAL Debug functions
507 * @brief HAL Debug functions
508 *
509 @verbatim
510 ===============================================================================
511 ##### HAL Debug functions #####
512 ===============================================================================
513 [..] This section provides functions allowing to:
514 (+) Enable/Disable Debug module during STOP0/STOP1/STOP2 modes
515 (+) Enable/Disable Debug module during STANDBY mode
516
517 @endverbatim
518 * @{
519 */
520
521 /**
522 * @brief Enable the Debug Module during STOP0/STOP1/STOP2 modes.
523 * @retval None
524 */
HAL_DBGMCU_EnableDBGStopMode(void)525 void HAL_DBGMCU_EnableDBGStopMode(void)
526 {
527 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
528 }
529
530 /**
531 * @brief Disable the Debug Module during STOP0/STOP1/STOP2 modes.
532 * @retval None
533 */
HAL_DBGMCU_DisableDBGStopMode(void)534 void HAL_DBGMCU_DisableDBGStopMode(void)
535 {
536 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
537 }
538
539 /**
540 * @brief Enable the Debug Module during STANDBY mode.
541 * @retval None
542 */
HAL_DBGMCU_EnableDBGStandbyMode(void)543 void HAL_DBGMCU_EnableDBGStandbyMode(void)
544 {
545 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
546 }
547
548 /**
549 * @brief Disable the Debug Module during STANDBY mode.
550 * @retval None
551 */
HAL_DBGMCU_DisableDBGStandbyMode(void)552 void HAL_DBGMCU_DisableDBGStandbyMode(void)
553 {
554 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
555 }
556
557 /**
558 * @}
559 */
560
561 /** @defgroup HAL_Exported_Functions_Group4 HAL SYSCFG configuration functions
562 * @brief HAL SYSCFG configuration functions
563 *
564 @verbatim
565 ===============================================================================
566 ##### HAL SYSCFG configuration functions #####
567 ===============================================================================
568 [..] This section provides functions allowing to:
569 (+) Configure the Voltage reference buffer
570 (+) Enable/Disable the Voltage reference buffer
571 (+) Enable/Disable the I/O analog switch voltage booster
572
573 @endverbatim
574 * @{
575 */
576
577 /**
578 * @brief Configure the internal voltage reference buffer voltage scale.
579 * @param VoltageScaling: specifies the output voltage to achieve
580 * This parameter can be one of the following values:
581 * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE0: VREF_OUT1 around 1.5 V.
582 * This requires VDDA equal to or higher than 1.8 V.
583 * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE1: VREF_OUT1 around 1.8 V.
584 * This requires VDDA equal to or higher than 2.1 V.
585 * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE2: VREF_OUT1 around 2.048 V.
586 * This requires VDDA equal to or higher than 2.4 V.
587 * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE3: VREF_OUT1 around 2.5 V.
588 * This requires VDDA equal to or higher than 2.8 V.
589 * @retval None
590 */
HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling)591 void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling)
592 {
593 /* Check the parameters */
594 assert_param(IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(VoltageScaling));
595
596 MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_VRS, VoltageScaling);
597 }
598
599 /**
600 * @brief Configure the internal voltage reference buffer high impedance mode.
601 * @param Mode: specifies the high impedance mode
602 * This parameter can be one of the following values:
603 * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE: VREF+ pin is internally connect to VREFINT output.
604 * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE: VREF+ pin is high impedance.
605 * @retval None
606 */
HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode)607 void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode)
608 {
609 /* Check the parameters */
610 assert_param(IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(Mode));
611
612 MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_HIZ, Mode);
613 }
614
615 /**
616 * @brief Tune the Internal Voltage Reference buffer (VREFBUF).
617 * @retval None
618 */
HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue)619 void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue)
620 {
621 /* Check the parameters */
622 assert_param(IS_SYSCFG_VREFBUF_TRIMMING(TrimmingValue));
623
624 MODIFY_REG(VREFBUF->CCR, VREFBUF_CCR_TRIM, TrimmingValue);
625 }
626
627 /**
628 * @brief Enable the Internal Voltage Reference buffer (VREFBUF).
629 * @retval HAL_OK/HAL_TIMEOUT
630 */
HAL_SYSCFG_EnableVREFBUF(void)631 HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void)
632 {
633 uint32_t tickstart;
634
635 SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
636
637 /* Get Start Tick*/
638 tickstart = HAL_GetTick();
639
640 /* Wait for VRR bit */
641 while (READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRR) == 0UL)
642 {
643 if ((HAL_GetTick() - tickstart) > VREFBUF_TIMEOUT_VALUE)
644 {
645 return HAL_TIMEOUT;
646 }
647 }
648
649 return HAL_OK;
650 }
651
652 /**
653 * @brief Disable the Internal Voltage Reference buffer (VREFBUF).
654 *
655 * @retval None
656 */
HAL_SYSCFG_DisableVREFBUF(void)657 void HAL_SYSCFG_DisableVREFBUF(void)
658 {
659 CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
660 }
661
662 /**
663 * @brief Enable the I/O analog switch voltage booster
664 *
665 * @retval None
666 */
HAL_SYSCFG_EnableIOAnalogBooster(void)667 void HAL_SYSCFG_EnableIOAnalogBooster(void)
668 {
669 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
670 }
671
672 /**
673 * @brief Disable the I/O analog switch voltage booster
674 *
675 * @retval None
676 */
HAL_SYSCFG_DisableIOAnalogBooster(void)677 void HAL_SYSCFG_DisableIOAnalogBooster(void)
678 {
679 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
680 }
681
682 /**
683 * @brief Enable the I/O analog switch voltage selection
684 *
685 * @retval None
686 */
HAL_SYSCFG_EnableIOAnalogVoltageSelection(void)687 void HAL_SYSCFG_EnableIOAnalogVoltageSelection(void)
688 {
689 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD);
690 }
691
692 /**
693 * @brief Disable the I/O analog switch voltage selection
694 *
695 * @retval None
696 */
HAL_SYSCFG_DisableIOAnalogVoltageSelection(void)697 void HAL_SYSCFG_DisableIOAnalogVoltageSelection(void)
698 {
699 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD);
700 }
701
702 #if defined(SYSCFG_CFGR1_ENDCAP)
703 /**
704 * @brief Set decoupling capacitance on HSPI supply.
705 * @rmtoll SYSCFG_CFGR1 ENDCAP HAL_SYSCFG_SetHSPIDecouplingCapacitance
706 * @param Capacitance This parameter can be one of the following values:
707 * @arg @ref SYSCFG_HSPI_CAPACITANCE_OFF
708 * @arg @ref SYSCFG_HSPI_CAPACITANCE_1_DIV_3
709 * @arg @ref SYSCFG_HSPI_CAPACITANCE_2_DIV_3
710 * @arg @ref SYSCFG_HSPI_CAPACITANCE_FULL
711 * @retval None
712 */
HAL_SYSCFG_SetHSPIDecouplingCapacitance(uint32_t Capacitance)713 void HAL_SYSCFG_SetHSPIDecouplingCapacitance(uint32_t Capacitance)
714 {
715 /* Check the parameters */
716 assert_param(IS_SYSCFG_DECOUPLING_CAPACITANCE(Capacitance));
717
718 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_ENDCAP, Capacitance);
719 }
720
721 /**
722 * @brief Get decoupling capacitance on HSPI supply.
723 * @rmtoll SYSCFG_CFGR1 ENDCAP HAL_SYSCFG_GetHSPIDecouplingCapacitance
724 * @retval Returned value can be one of the following values:
725 * @arg @ref SYSCFG_HSPI_CAPACITANCE_OFF
726 * @arg @ref SYSCFG_HSPI_CAPACITANCE_1_DIV_3
727 * @arg @ref SYSCFG_HSPI_CAPACITANCE_2_DIV_3
728 * @arg @ref SYSCFG_HSPI_CAPACITANCE_FULL
729 */
HAL_SYSCFG_GetHSPIDecouplingCapacitance(void)730 uint32_t HAL_SYSCFG_GetHSPIDecouplingCapacitance(void)
731 {
732 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ENDCAP));
733 }
734 #endif /* SYSCFG_CFGR1_ENDCAP */
735
736 #if defined(SYSCFG_CFGR1_SRAMCACHED)
737 /**
738 * @brief Enable the Cacheability of internal SRAMx by DCACHE2
739 *
740 * @retval None
741 */
HAL_SYSCFG_EnableSRAMCached(void)742 void HAL_SYSCFG_EnableSRAMCached(void)
743 {
744 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_SRAMCACHED);
745 }
746
747 /**
748 * @brief Disable the Cacheability of internal SRAMx by DCACHE2
749 *
750 * @retval None
751 */
HAL_SYSCFG_DisableSRAMCached(void)752 void HAL_SYSCFG_DisableSRAMCached(void)
753 {
754 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_SRAMCACHED);
755 }
756 #endif /* SYSCFG_CFGR1_SRAMCACHED */
757
758 /**
759 * @brief Enable the Compensation Cell of GPIO supplied by VDD
760 * @rmtoll CCCSR EN1 HAL_SYSCFG_EnableVddCompensationCell
761 * @note The vdd compensation cell can be used only when the device supply
762 * voltage ranges from 1.71 to 3.6 V
763 * @retval None
764 */
HAL_SYSCFG_EnableVddCompensationCell(void)765 void HAL_SYSCFG_EnableVddCompensationCell(void)
766 {
767 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN1);
768 }
769
770 /**
771 * @brief Enable the Compensation Cell of GPIO supplied by VDDIO2
772 * @rmtoll CCCSR EN2 HAL_SYSCFG_EnableVddIO2CompensationCell
773 * @note The Vdd I/O compensation cell can be used only when the device supply
774 * voltage ranges from 1.08 to 3.6 V
775 * @retval None
776 */
HAL_SYSCFG_EnableVddIO2CompensationCell(void)777 void HAL_SYSCFG_EnableVddIO2CompensationCell(void)
778 {
779 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN2);
780 }
781
782 #if defined(SYSCFG_CCCSR_EN3)
783 /**
784 * @brief Enable the Compensation Cell of HSPI IO supplied by VDD
785 * @rmtoll CCCSR EN3 HAL_SYSCFG_EnableVddHSPICompensationCell
786 * @retval None
787 */
HAL_SYSCFG_EnableVddHSPICompensationCell(void)788 void HAL_SYSCFG_EnableVddHSPICompensationCell(void)
789 {
790 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN3);
791 }
792 #endif /* SYSCFG_CCCSR_EN3 */
793
794 /**
795 * @brief Disable the Compensation Cell of GPIO supplied by VDD
796 * @rmtoll CCCSR EN1 HAL_SYSCFG_DisableVddCompensationCell
797 * @note The Vdd compensation cell can be used only when the device supply
798 * voltage ranges from 1.71 to 3.6 V
799 * @retval None
800 */
HAL_SYSCFG_DisableVddCompensationCell(void)801 void HAL_SYSCFG_DisableVddCompensationCell(void)
802 {
803 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN1);
804 }
805
806 /**
807 * @brief Disable the Compensation Cell of GPIO supplied by VDDIO2
808 * @rmtoll CCCSR EN2 HAL_SYSCFG_DisableVddIO2CompensationCell
809 * @note The Vdd I/O compensation cell can be used only when the device supply
810 * voltage ranges from 1.08 to 3.6 V
811 * @retval None
812 */
HAL_SYSCFG_DisableVddIO2CompensationCell(void)813 void HAL_SYSCFG_DisableVddIO2CompensationCell(void)
814 {
815 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN2);
816 }
817
818 #if defined(SYSCFG_CCCSR_EN3)
819 /**
820 * @brief Disable the Compensation Cell of HSPI IO supplied by VDD
821 * @rmtoll CCCSR EN3 HAL_SYSCFG_DisableVddHSPICompensationCell
822 * @retval None
823 */
HAL_SYSCFG_DisableVddHSPICompensationCell(void)824 void HAL_SYSCFG_DisableVddHSPICompensationCell(void)
825 {
826 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN3);
827 }
828 #endif /* SYSCFG_CCCSR_EN3 */
829 /**
830 * @}
831 */
832
833 /** @defgroup HAL_Exported_Functions_Group5 HAL SYSCFG lock management functions
834 * @brief SYSCFG lock management functions.
835 *
836 @verbatim
837 ===============================================================================
838 ##### SYSCFG lock functions #####
839 ===============================================================================
840
841 @endverbatim
842 * @{
843 */
844
845 /**
846 * @brief Lock the SYSCFG item(s).
847 * @note Setting lock(s) depends on privilege mode in secure/non-secure code
848 * Lock(s) cleared only at system reset
849 * @param Item Item(s) to set lock on.
850 * This parameter can be a combination of @ref SYSCFG_Lock_items
851 * @retval None
852 */
HAL_SYSCFG_Lock(uint32_t Item)853 void HAL_SYSCFG_Lock(uint32_t Item)
854 {
855 /* Check the parameters */
856 assert_param(IS_SYSCFG_LOCK_ITEMS(Item));
857
858 /* Privilege secure/non-secure locks */
859 SYSCFG->CNSLCKR = (0xFFFFU & Item); /* non-secure lock item in 16 lowest bits */
860
861 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
862 /* Privilege secure only locks */
863 SYSCFG->CSLCKR = ((0xFFFF0000U & Item) >> 16U); /* Secure-only lock item in 16 highest bits */
864 #endif /* __ARM_FEATURE_CMSE */
865 }
866
867 /**
868 * @brief Get the lock state of SYSCFG item.
869 * @note Getting lock(s) depends on privilege mode in secure/non-secure code
870 * @param pItem pointer to return locked items
871 * the return value can be a combination of @ref SYSCFG_Lock_items
872 * @retval HAL status
873 */
HAL_SYSCFG_GetLock(uint32_t * pItem)874 HAL_StatusTypeDef HAL_SYSCFG_GetLock(uint32_t *pItem)
875 {
876 uint32_t tmp_lock;
877
878 /* Check null pointer */
879 if (pItem == NULL)
880 {
881 return HAL_ERROR;
882 }
883
884 /* Get the non-secure lock state */
885 tmp_lock = SYSCFG->CNSLCKR;
886
887 /* Get the secure lock state in secure code */
888 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
889 tmp_lock |= (SYSCFG->CSLCKR << 16U);
890 #endif /* __ARM_FEATURE_CMSE */
891
892 /* Return overall lock status */
893 *pItem = tmp_lock;
894
895 return HAL_OK;
896 }
897
898 /**
899 * @}
900 */
901
902 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
903 /** @defgroup HAL_Exported_Functions_Group6 HAL SYSCFG attributes management functions
904 * @brief SYSCFG attributes management functions.
905 *
906 @verbatim
907 ===============================================================================
908 ##### SYSCFG attributes functions #####
909 ===============================================================================
910
911 @endverbatim
912 * @{
913 */
914
915 /**
916 * @brief Configure the SYSCFG item attribute(s).
917 * @note Available attributes are to secure SYSCFG items, so this function is
918 * only available in secure
919 * @param Item Item(s) to set attributes on.
920 * This parameter can be a one or a combination of @ref SYSCFG_Attributes_items
921 * @param Attributes specifies the secure/non-secure attributes.
922 * @retval None
923 */
HAL_SYSCFG_ConfigAttributes(uint32_t Item,uint32_t Attributes)924 void HAL_SYSCFG_ConfigAttributes(uint32_t Item, uint32_t Attributes)
925 {
926 uint32_t tmp;
927
928 /* Check the parameters */
929 assert_param(IS_SYSCFG_ITEMS_ATTRIBUTES(Item));
930 assert_param(IS_SYSCFG_ATTRIBUTES(Attributes));
931
932 tmp = SYSCFG_S->SECCFGR;
933
934 /* Set or reset Item */
935 if ((Attributes & SYSCFG_SEC) != 0x00U)
936 {
937 tmp |= Item;
938 }
939 else
940 {
941 tmp &= ~Item;
942 }
943
944 /* Set secure attributes */
945 SYSCFG_S->SECCFGR = tmp;
946 }
947
948 /**
949 * @brief Get the attribute of a SYSCFG item.
950 * @note Available attributes are to secure SYSCFG items, so this function is
951 * only available in secure
952 * @param Item Single item to get secure/non-secure attribute from.
953 * @param pAttributes pointer to return the attribute.
954 * @retval HAL status
955 */
HAL_SYSCFG_GetConfigAttributes(uint32_t Item,uint32_t * pAttributes)956 HAL_StatusTypeDef HAL_SYSCFG_GetConfigAttributes(uint32_t Item, uint32_t *pAttributes)
957 {
958 /* Check null pointer */
959 if (pAttributes == NULL)
960 {
961 return HAL_ERROR;
962 }
963
964 /* Check the parameters */
965 assert_param(IS_SYSCFG_ITEMS_ATTRIBUTES(Item));
966
967 /* Get the secure attribute state */
968 if ((SYSCFG_S->SECCFGR & Item) != 0U)
969 {
970 *pAttributes = SYSCFG_SEC;
971 }
972 else
973 {
974 *pAttributes = SYSCFG_NSEC;
975 }
976
977 return HAL_OK;
978 }
979
980 /**
981 * @}
982 */
983
984 #endif /* __ARM_FEATURE_CMSE */
985
986 #ifdef SYSCFG_OTGHSPHYCR_EN
987 /**
988 * @brief Enable the OTG PHY .
989 * @param OTGPHYConfig Defines the OTG PHY configuration.
990 This parameter can be one of @ref SYSCFG_OTG_PHY_Enable
991 * @retval None
992 */
HAL_SYSCFG_EnableOTGPHY(uint32_t OTGPHYConfig)993 void HAL_SYSCFG_EnableOTGPHY(uint32_t OTGPHYConfig)
994 {
995 /* Check the parameter */
996 assert_param(IS_SYSCFG_OTGPHY_CONFIG(OTGPHYConfig));
997
998 MODIFY_REG(SYSCFG->OTGHSPHYCR, SYSCFG_OTGHSPHYCR_EN, OTGPHYConfig);
999 }
1000
1001 /**
1002 * @brief Set the OTG PHY Power Down config.
1003 * @param PowerDownConfig Defines the OTG PHY Power down configuration.
1004 This parameter can be one of @ref SYSCFG_OTG_PHY_PowerDown
1005 * @retval None
1006 */
HAL_SYSCFG_SetOTGPHYPowerDownConfig(uint32_t PowerDownConfig)1007 void HAL_SYSCFG_SetOTGPHYPowerDownConfig(uint32_t PowerDownConfig)
1008 {
1009 /* Check the parameter */
1010 assert_param(IS_SYSCFG_OTGPHY_POWERDOWN_CONFIG(PowerDownConfig));
1011
1012 MODIFY_REG(SYSCFG->OTGHSPHYCR, SYSCFG_OTGHSPHYCR_PDCTRL, PowerDownConfig);
1013 }
1014
1015 /**
1016 * @brief Set the OTG PHY reference clock selection.
1017 * @param RefClkSelection Defines the OTG PHY reference clock selection.
1018 This parameter can be one of the @ref SYSCFG_OTG_PHY_RefenceClockSelection
1019 * @retval None
1020 */
HAL_SYSCFG_SetOTGPHYReferenceClockSelection(uint32_t RefClkSelection)1021 void HAL_SYSCFG_SetOTGPHYReferenceClockSelection(uint32_t RefClkSelection)
1022 {
1023 /* Check the parameter */
1024 assert_param(IS_SYSCFG_OTGPHY_REFERENCE_CLOCK(RefClkSelection));
1025
1026 MODIFY_REG(SYSCFG->OTGHSPHYCR, SYSCFG_OTGHSPHYCR_CLKSEL, RefClkSelection);
1027 }
1028
1029 /**
1030 * @brief Set the OTG PHY Disconnect Threshold.
1031 * @param DisconnectThreshold Defines the voltage level for the threshold used to detect a disconnect event.
1032 This parameter can be one of the @ref SYSCFG_OTG_PHYTUNER_DisconnectThreshold
1033 * @retval None
1034 */
1035
HAL_SYSCFG_SetOTGPHYDisconnectThreshold(uint32_t DisconnectThreshold)1036 void HAL_SYSCFG_SetOTGPHYDisconnectThreshold(uint32_t DisconnectThreshold)
1037 {
1038 /* Check the parameter */
1039 assert_param(IS_SYSCFG_OTGPHY_DISCONNECT(DisconnectThreshold));
1040
1041 MODIFY_REG(SYSCFG->OTGHSPHYTUNER2, SYSCFG_OTGHSPHYTUNER2_COMPDISTUNE, DisconnectThreshold);
1042 }
1043
1044 /**
1045 * @brief Adjust the voltage level for the threshold used to detect valid high speed data.
1046 * @param SquelchThreshold Defines the voltage level.
1047 This parameter can be onez of the @ref SYSCFG_OTG_PHYTUNER_SquelchThreshold
1048
1049 * @retval None
1050 */
1051
HAL_SYSCFG_SetOTGPHYSquelchThreshold(uint32_t SquelchThreshold)1052 void HAL_SYSCFG_SetOTGPHYSquelchThreshold(uint32_t SquelchThreshold)
1053 {
1054 /* Check the parameter */
1055 assert_param(IS_SYSCFG_OTGPHY_SQUELCH(SquelchThreshold));
1056
1057 MODIFY_REG(SYSCFG->OTGHSPHYTUNER2, SYSCFG_OTGHSPHYTUNER2_SQRXTUNE, SquelchThreshold);
1058 }
1059
1060 /**
1061 * @brief Set the OTG PHY Current config.
1062 * @param PreemphasisCurrent Defines the current configuration.
1063 This parameter can be one of the @ref SYSCFG_OTG_PHYTUNER_PreemphasisCurrent
1064
1065 * @retval None
1066 */
1067
HAL_SYSCFG_SetOTGPHYPreemphasisCurrent(uint32_t PreemphasisCurrent)1068 void HAL_SYSCFG_SetOTGPHYPreemphasisCurrent(uint32_t PreemphasisCurrent)
1069 {
1070 /* Check the parameter */
1071 assert_param(IS_SYSCFG_OTGPHY_PREEMPHASIS(PreemphasisCurrent));
1072
1073 MODIFY_REG(SYSCFG->OTGHSPHYTUNER2, SYSCFG_OTGHSPHYTUNER2_TXPREEMPAMPTUNE, PreemphasisCurrent);
1074 }
1075
1076 #endif /* SYSCFG_OTGHSPHYCR_EN */
1077
1078 /**
1079 * @}
1080 */
1081
1082 #endif /* HAL_MODULE_ENABLED */
1083 /**
1084 * @}
1085 */
1086
1087 /**
1088 * @}
1089 */
1090
