1 /**
2   ******************************************************************************
3   * @file    stm32u0xx_ll_usart.c
4   * @author  MCD Application Team
5   * @brief   USART LL module driver.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2023 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 #if defined(USE_FULL_LL_DRIVER)
19 
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32u0xx_ll_usart.h"
22 #include "stm32u0xx_ll_rcc.h"
23 #include "stm32u0xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29 
30 /** @addtogroup STM32U0xx_LL_Driver
31   * @{
32   */
33 
34 #if defined(USART1) || defined(USART2) || defined(USART3) || defined(USART4)
35 
36 /** @addtogroup USART_LL
37   * @{
38   */
39 
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /** @addtogroup USART_LL_Private_Constants
44   * @{
45   */
46 
47 /* Definition of default baudrate value used for USART initialisation */
48 #define USART_DEFAULT_BAUDRATE          (9600U)
49 
50 /**
51   * @}
52   */
53 
54 /* Private macros ------------------------------------------------------------*/
55 /** @addtogroup USART_LL_Private_Macros
56   * @{
57   */
58 
59 #define IS_LL_USART_PRESCALER(__VALUE__)  (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
60                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
61                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
62                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
63                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
64                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
65                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
66                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
67                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
68                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
69                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
70                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV256))
71 
72 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
73  *              divided by the smallest oversampling used on the USART (i.e. 8)    */
74 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 6000000U)
75 
76 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
77 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
78 
79 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
80                                           || ((__VALUE__) == LL_USART_DIRECTION_RX) \
81                                           || ((__VALUE__) == LL_USART_DIRECTION_TX) \
82                                           || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
83 
84 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
85                                        || ((__VALUE__) == LL_USART_PARITY_EVEN) \
86                                        || ((__VALUE__) == LL_USART_PARITY_ODD))
87 
88 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
89                                           || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
90                                           || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
91 
92 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
93                                              || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
94 
95 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
96                                                  || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
97 
98 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
99                                            || ((__VALUE__) == LL_USART_PHASE_2EDGE))
100 
101 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
102                                               || ((__VALUE__) == LL_USART_POLARITY_HIGH))
103 
104 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
105                                             || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
106 
107 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
108                                          || ((__VALUE__) == LL_USART_STOPBITS_1) \
109                                          || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
110                                          || ((__VALUE__) == LL_USART_STOPBITS_2))
111 
112 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
113                                           || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
114                                           || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
115                                           || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
116 
117 /**
118   * @}
119   */
120 
121 /* Private function prototypes -----------------------------------------------*/
122 
123 /* Exported functions --------------------------------------------------------*/
124 /** @addtogroup USART_LL_Exported_Functions
125   * @{
126   */
127 
128 /** @addtogroup USART_LL_EF_Init
129   * @{
130   */
131 
132 /**
133   * @brief  De-initialize USART registers (Registers restored to their default values).
134   * @param  USARTx USART Instance
135   * @retval An ErrorStatus enumeration value:
136   *          - SUCCESS: USART registers are de-initialized
137   *          - ERROR: USART registers are not de-initialized
138   */
LL_USART_DeInit(const USART_TypeDef * USARTx)139 ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
140 {
141   ErrorStatus status = SUCCESS;
142 
143   /* Check the parameters */
144   assert_param(IS_UART_INSTANCE(USARTx));
145 
146   if (USARTx == USART1)
147   {
148     /* Force reset of USART clock */
149     LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART1);
150 
151     /* Release reset of USART clock */
152     LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART1);
153   }
154   else if (USARTx == USART2)
155   {
156     /* Force reset of USART clock */
157     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
158 
159     /* Release reset of USART clock */
160     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
161   }
162   else if (USARTx == USART3)
163   {
164     /* Force reset of USART clock */
165     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
166 
167     /* Release reset of USART clock */
168     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
169   }
170   else if (USARTx == USART4)
171   {
172     /* Force reset of USART clock */
173     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART4);
174 
175     /* Release reset of USART clock */
176     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART4);
177   }
178   else
179   {
180     status = ERROR;
181   }
182 
183   return (status);
184 }
185 
186 /**
187   * @brief  Initialize USART registers according to the specified
188   *         parameters in USART_InitStruct.
189   * @note   As some bits in USART configuration registers can only be written when
190   *         the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
191   *         this function. Otherwise, ERROR result will be returned.
192   * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
193   * @param  USARTx USART Instance
194   * @param  USART_InitStruct pointer to a LL_USART_InitTypeDef structure
195   *         that contains the configuration information for the specified USART peripheral.
196   * @retval An ErrorStatus enumeration value:
197   *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
198   *          - ERROR: Problem occurred during USART Registers initialization
199   */
LL_USART_Init(USART_TypeDef * USARTx,const LL_USART_InitTypeDef * USART_InitStruct)200 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
201 {
202   ErrorStatus status = ERROR;
203   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
204 
205   /* Check the parameters */
206   assert_param(IS_UART_INSTANCE(USARTx));
207   assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
208   assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
209   assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
210   assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
211   assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
212   assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
213   assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
214   assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
215 
216   /* USART needs to be in disabled state, in order to be able to configure some bits in
217      CRx registers */
218   if (LL_USART_IsEnabled(USARTx) == 0U)
219   {
220     /*---------------------------- USART CR1 Configuration ---------------------
221      * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
222      * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
223      * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
224      * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
225      * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
226      */
227     MODIFY_REG(USARTx->CR1,
228                (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
229                 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
230                (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
231                 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
232 
233     /*---------------------------- USART CR2 Configuration ---------------------
234      * Configure USARTx CR2 (Stop bits) with parameters:
235      * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
236      * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
237      */
238     LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
239 
240     /*---------------------------- USART CR3 Configuration ---------------------
241      * Configure USARTx CR3 (Hardware Flow Control) with parameters:
242      * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
243      *   USART_InitStruct->HardwareFlowControl value.
244      */
245     LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
246 
247     /*---------------------------- USART BRR Configuration ---------------------
248      * Retrieve Clock frequency used for USART Peripheral
249      */
250     if (USARTx == USART1)
251     {
252       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
253     }
254     else if (USARTx == USART2)
255     {
256       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
257     }
258     else if (USARTx == USART3)
259     {
260       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
261     }
262     else if (USARTx == USART4)
263     {
264       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART4_CLKSOURCE);
265     }
266     else
267     {
268       /* Nothing to do, as error code is already assigned to ERROR value */
269     }
270 
271     /* Configure the USART Baud Rate :
272        - prescaler value is required
273        - valid baud rate value (different from 0) is required
274        - Peripheral clock as returned by RCC service, should be valid (different from 0).
275     */
276     if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
277         && (USART_InitStruct->BaudRate != 0U))
278     {
279       status = SUCCESS;
280       LL_USART_SetBaudRate(USARTx,
281                            periphclk,
282                            USART_InitStruct->PrescalerValue,
283                            USART_InitStruct->OverSampling,
284                            USART_InitStruct->BaudRate);
285 
286       /* Check BRR is greater than or equal to 16d */
287       assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
288     }
289 
290     /*---------------------------- USART PRESC Configuration -----------------------
291      * Configure USARTx PRESC (Prescaler) with parameters:
292      * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
293      */
294     LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
295   }
296   /* Endif (=> USART not in Disabled state => return ERROR) */
297 
298   return (status);
299 }
300 
301 /**
302   * @brief Set each @ref LL_USART_InitTypeDef field to default value.
303   * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
304   *                         whose fields will be set to default values.
305   * @retval None
306   */
307 
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)308 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
309 {
310   /* Set USART_InitStruct fields to default values */
311   USART_InitStruct->PrescalerValue      = LL_USART_PRESCALER_DIV1;
312   USART_InitStruct->BaudRate            = USART_DEFAULT_BAUDRATE;
313   USART_InitStruct->DataWidth           = LL_USART_DATAWIDTH_8B;
314   USART_InitStruct->StopBits            = LL_USART_STOPBITS_1;
315   USART_InitStruct->Parity              = LL_USART_PARITY_NONE ;
316   USART_InitStruct->TransferDirection   = LL_USART_DIRECTION_TX_RX;
317   USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
318   USART_InitStruct->OverSampling        = LL_USART_OVERSAMPLING_16;
319 }
320 
321 /**
322   * @brief  Initialize USART Clock related settings according to the
323   *         specified parameters in the USART_ClockInitStruct.
324   * @note   As some bits in USART configuration registers can only be written when
325   *         the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
326   *         this function. Otherwise, ERROR result will be returned.
327   * @param  USARTx USART Instance
328   * @param  USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
329   *         that contains the Clock configuration information for the specified USART peripheral.
330   * @retval An ErrorStatus enumeration value:
331   *          - SUCCESS: USART registers related to Clock settings are initialized according
332   *                     to USART_ClockInitStruct content
333   *          - ERROR: Problem occurred during USART Registers initialization
334   */
LL_USART_ClockInit(USART_TypeDef * USARTx,const LL_USART_ClockInitTypeDef * USART_ClockInitStruct)335 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
336 {
337   ErrorStatus status = SUCCESS;
338 
339   /* Check USART Instance and Clock signal output parameters */
340   assert_param(IS_UART_INSTANCE(USARTx));
341   assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
342 
343   /* USART needs to be in disabled state, in order to be able to configure some bits in
344      CRx registers */
345   if (LL_USART_IsEnabled(USARTx) == 0U)
346   {
347     /* Ensure USART instance is USART capable */
348     assert_param(IS_USART_INSTANCE(USARTx));
349 
350     /* Check clock related parameters */
351     assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
352     assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
353     assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
354 
355     /*---------------------------- USART CR2 Configuration -----------------------
356      * Configure USARTx CR2 (Clock signal related bits) with parameters:
357      * - Clock Output:                USART_CR2_CLKEN bit according to USART_ClockInitStruct->ClockOutput value
358      * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
359      * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
360      * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
361      */
362     MODIFY_REG(USARTx->CR2,
363                USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
364                USART_ClockInitStruct->ClockOutput | USART_ClockInitStruct->ClockPolarity |
365                USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
366   }
367   /* Else (USART not in Disabled state => return ERROR */
368   else
369   {
370     status = ERROR;
371   }
372 
373   return (status);
374 }
375 
376 /**
377   * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
378   * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
379   *                              whose fields will be set to default values.
380   * @retval None
381   */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)382 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
383 {
384   /* Set LL_USART_ClockInitStruct fields with default values */
385   USART_ClockInitStruct->ClockOutput       = LL_USART_CLOCK_DISABLE;
386   USART_ClockInitStruct->ClockPolarity     = LL_USART_POLARITY_LOW;            /* Not relevant when ClockOutput =
387                                                                                   LL_USART_CLOCK_DISABLE */
388   USART_ClockInitStruct->ClockPhase        = LL_USART_PHASE_1EDGE;             /* Not relevant when ClockOutput =
389                                                                                   LL_USART_CLOCK_DISABLE */
390   USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when ClockOutput =
391                                                                                   LL_USART_CLOCK_DISABLE */
392 }
393 
394 /**
395   * @}
396   */
397 
398 /**
399   * @}
400   */
401 
402 /**
403   * @}
404   */
405 
406 #endif /* USART1 || USART2 || USART3 || USART4 */
407 
408 /**
409   * @}
410   */
411 
412 #endif /* USE_FULL_LL_DRIVER */
413 
414 
415