1 /**
2 ******************************************************************************
3 * @file stm32n6xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2023 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32n6xx_ll_usart.h"
22 #include "stm32n6xx_ll_rcc.h"
23 #include "stm32n6xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29
30 /** @addtogroup STM32N6xx_LL_Driver
31 * @{
32 */
33
34 #if defined(USART1) || defined(USART2) || defined(USART3) || defined(UART4) || defined(UART5) || defined(USART6) \
35 || defined(UART7) || defined(UART8) || defined(UART9) || defined(USART10)
36
37 /** @addtogroup USART_LL
38 * @{
39 */
40
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /** @addtogroup USART_LL_Private_Constants
45 * @{
46 */
47
48 /* Definition of default baudrate value used for USART initialisation */
49 #define USART_DEFAULT_BAUDRATE (9600U)
50
51 /**
52 * @}
53 */
54
55 /* Private macros ------------------------------------------------------------*/
56 /** @addtogroup USART_LL_Private_Macros
57 * @{
58 */
59
60 #define IS_LL_USART_PRESCALER(__VALUE__) (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
61 || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
62 || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
63 || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
64 || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
65 || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
66 || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
67 || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
68 || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
69 || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
70 || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
71 || ((__VALUE__) == LL_USART_PRESCALER_DIV256))
72
73 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
74 * divided by the smallest oversampling used on the USART (i.e. 8) */
75 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500000U)
76
77 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
78 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
79
80 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
81 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
82 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
83 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
84
85 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
86 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
87 || ((__VALUE__) == LL_USART_PARITY_ODD))
88
89 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
90 || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
91 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
92
93 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
94 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
95
96 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
97 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
98
99 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
100 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
101
102 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
103 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
104
105 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
106 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
107
108 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
109 || ((__VALUE__) == LL_USART_STOPBITS_1) \
110 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
111 || ((__VALUE__) == LL_USART_STOPBITS_2))
112
113 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
114 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
115 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
116 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
117
118 /**
119 * @}
120 */
121
122 /* Private function prototypes -----------------------------------------------*/
123
124 /* Exported functions --------------------------------------------------------*/
125 /** @addtogroup USART_LL_Exported_Functions
126 * @{
127 */
128
129 /** @addtogroup USART_LL_EF_Init
130 * @{
131 */
132
133 /**
134 * @brief De-initialize USART registers (Registers restored to their default values).
135 * @param USARTx USART Instance
136 * @retval An ErrorStatus enumeration value:
137 * - SUCCESS: USART registers are de-initialized
138 * - ERROR: USART registers are not de-initialized
139 */
LL_USART_DeInit(const USART_TypeDef * USARTx)140 ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
141 {
142 ErrorStatus status = SUCCESS;
143
144 /* Check the parameters */
145 assert_param(IS_UART_INSTANCE(USARTx));
146
147 if (USARTx == USART1)
148 {
149 /* Force reset of USART clock */
150 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
151
152 /* Release reset of USART clock */
153 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
154 }
155 else if (USARTx == USART2)
156 {
157 /* Force reset of USART clock */
158 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
159
160 /* Release reset of USART clock */
161 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
162 }
163 else if (USARTx == USART3)
164 {
165 /* Force reset of USART clock */
166 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
167
168 /* Release reset of USART clock */
169 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
170 }
171 else if (USARTx == UART4)
172 {
173 /* Force reset of UART clock */
174 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
175
176 /* Release reset of UART clock */
177 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
178 }
179 else if (USARTx == UART5)
180 {
181 /* Force reset of UART clock */
182 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
183
184 /* Release reset of UART clock */
185 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
186 }
187 else if (USARTx == USART6)
188 {
189 /* Force reset of USART clock */
190 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6);
191
192 /* Release reset of USART clock */
193 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6);
194 }
195 else if (USARTx == UART7)
196 {
197 /* Force reset of UART clock */
198 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
199
200 /* Release reset of UART clock */
201 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
202 }
203 else if (USARTx == UART8)
204 {
205 /* Force reset of UART clock */
206 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
207
208 /* Release reset of UART clock */
209 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
210 }
211 else if (USARTx == UART9)
212 {
213 /* Force reset of UART clock */
214 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART9);
215
216 /* Release reset of UART clock */
217 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART9);
218 }
219 else if (USARTx == USART10)
220 {
221 /* Force reset of USART clock */
222 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART10);
223
224 /* Release reset of USART clock */
225 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART10);
226 }
227 else
228 {
229 status = ERROR;
230 }
231
232 return (status);
233 }
234
235 /**
236 * @brief Initialize USART registers according to the specified
237 * parameters in USART_InitStruct.
238 * @note As some bits in USART configuration registers can only be written when
239 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
240 * this function. Otherwise, ERROR result will be returned.
241 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
242 * @param USARTx USART Instance
243 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
244 * that contains the configuration information for the specified USART peripheral.
245 * @retval An ErrorStatus enumeration value:
246 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
247 * - ERROR: Problem occurred during USART Registers initialization
248 */
LL_USART_Init(USART_TypeDef * USARTx,const LL_USART_InitTypeDef * USART_InitStruct)249 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
250 {
251 ErrorStatus status = ERROR;
252 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
253
254 /* Check the parameters */
255 assert_param(IS_UART_INSTANCE(USARTx));
256 assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
257 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
258 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
259 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
260 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
261 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
262 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
263 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
264
265 /* USART needs to be in disabled state, in order to be able to configure some bits in
266 CRx registers */
267 if (LL_USART_IsEnabled(USARTx) == 0U)
268 {
269 /*---------------------------- USART CR1 Configuration ---------------------
270 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
271 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
272 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
273 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
274 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
275 */
276 MODIFY_REG(USARTx->CR1,
277 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
278 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
279 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
280 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
281
282 /*---------------------------- USART CR2 Configuration ---------------------
283 * Configure USARTx CR2 (Stop bits) with parameters:
284 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
285 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
286 */
287 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
288
289 /*---------------------------- USART CR3 Configuration ---------------------
290 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
291 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
292 * USART_InitStruct->HardwareFlowControl value.
293 */
294 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
295
296 /*---------------------------- USART BRR Configuration ---------------------
297 * Retrieve Clock frequency used for USART Peripheral
298 */
299 if (USARTx == USART1)
300 {
301 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
302 }
303 else if (USARTx == USART2)
304 {
305 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
306 }
307 else if (USARTx == USART3)
308 {
309 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
310 }
311 else if (USARTx == UART4)
312 {
313 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
314 }
315 else if (USARTx == UART5)
316 {
317 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
318 }
319 else if (USARTx == USART6)
320 {
321 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART6_CLKSOURCE);
322 }
323 else if (USARTx == UART7)
324 {
325 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART7_CLKSOURCE);
326 }
327 else if (USARTx == UART8)
328 {
329 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART8_CLKSOURCE);
330 }
331 else if (USARTx == UART9)
332 {
333 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART9_CLKSOURCE);
334 }
335 else if (USARTx == USART10)
336 {
337 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART10_CLKSOURCE);
338 }
339 else
340 {
341 /* Nothing to do, as error code is already assigned to ERROR value */
342 }
343
344 /* Configure the USART Baud Rate :
345 - prescaler value is required
346 - valid baud rate value (different from 0) is required
347 - Peripheral clock as returned by RCC service, should be valid (different from 0).
348 */
349 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
350 && (USART_InitStruct->BaudRate != 0U))
351 {
352 status = SUCCESS;
353 LL_USART_SetBaudRate(USARTx,
354 periphclk,
355 USART_InitStruct->PrescalerValue,
356 USART_InitStruct->OverSampling,
357 USART_InitStruct->BaudRate);
358
359 /* Check BRR is greater than or equal to 16d */
360 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
361 }
362
363 /*---------------------------- USART PRESC Configuration -----------------------
364 * Configure USARTx PRESC (Prescaler) with parameters:
365 * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
366 */
367 LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
368 }
369 /* Endif (=> USART not in Disabled state => return ERROR) */
370
371 return (status);
372 }
373
374 /**
375 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
376 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
377 * whose fields will be set to default values.
378 * @retval None
379 */
380
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)381 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
382 {
383 /* Set USART_InitStruct fields to default values */
384 USART_InitStruct->PrescalerValue = LL_USART_PRESCALER_DIV1;
385 USART_InitStruct->BaudRate = USART_DEFAULT_BAUDRATE;
386 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
387 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
388 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
389 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
390 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
391 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
392 }
393
394 /**
395 * @brief Initialize USART Clock related settings according to the
396 * specified parameters in the USART_ClockInitStruct.
397 * @note As some bits in USART configuration registers can only be written when
398 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
399 * this function. Otherwise, ERROR result will be returned.
400 * @param USARTx USART Instance
401 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
402 * that contains the Clock configuration information for the specified USART peripheral.
403 * @retval An ErrorStatus enumeration value:
404 * - SUCCESS: USART registers related to Clock settings are initialized according
405 * to USART_ClockInitStruct content
406 * - ERROR: Problem occurred during USART Registers initialization
407 */
LL_USART_ClockInit(USART_TypeDef * USARTx,const LL_USART_ClockInitTypeDef * USART_ClockInitStruct)408 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
409 {
410 ErrorStatus status = SUCCESS;
411
412 /* Check USART Instance and Clock signal output parameters */
413 assert_param(IS_UART_INSTANCE(USARTx));
414 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
415
416 /* USART needs to be in disabled state, in order to be able to configure some bits in
417 CRx registers */
418 if (LL_USART_IsEnabled(USARTx) == 0U)
419 {
420 /* Ensure USART instance is USART capable */
421 assert_param(IS_USART_INSTANCE(USARTx));
422
423 /* Check clock related parameters */
424 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
425 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
426 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
427
428 /*---------------------------- USART CR2 Configuration -----------------------
429 * Configure USARTx CR2 (Clock signal related bits) with parameters:
430 * - Clock Output: USART_CR2_CLKEN bit according to USART_ClockInitStruct->ClockOutput value
431 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
432 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
433 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
434 */
435 MODIFY_REG(USARTx->CR2,
436 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
437 USART_ClockInitStruct->ClockOutput | USART_ClockInitStruct->ClockPolarity |
438 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
439 }
440 /* Else (USART not in Disabled state => return ERROR */
441 else
442 {
443 status = ERROR;
444 }
445
446 return (status);
447 }
448
449 /**
450 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
451 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
452 * whose fields will be set to default values.
453 * @retval None
454 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)455 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
456 {
457 /* Set LL_USART_ClockInitStruct fields with default values */
458 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
459 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
460 LL_USART_CLOCK_DISABLE */
461 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
462 LL_USART_CLOCK_DISABLE */
463 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
464 LL_USART_CLOCK_DISABLE */
465 }
466
467 /**
468 * @}
469 */
470
471 /**
472 * @}
473 */
474
475 /**
476 * @}
477 */
478
479 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 || USART6 || UART7 || UART8 || UART9 || USART10 */
480
481 /**
482 * @}
483 */
484
485 #endif /* USE_FULL_LL_DRIVER */
486
487
488
