1 /**
2 ******************************************************************************
3 * @file stm32n6xx_hal_gpio.c
4 * @author GPM Application Team
5 * @brief GPIO HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the General Purpose Input/Output (GPIO) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 *
11 ******************************************************************************
12 * @attention
13 *
14 * Copyright (c) 2023 STMicroelectronics.
15 * All rights reserved.
16 *
17 * This software is licensed under terms that can be found in the LICENSE file
18 * in the root directory of this software component.
19 * If no LICENSE file comes with this software, it is provided AS-IS.
20 *
21 ******************************************************************************
22 @verbatim
23 ==============================================================================
24 ##### GPIO Peripheral features #####
25 ==============================================================================
26 [..]
27 (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually
28 configured by software in several modes:
29 (++) Input mode
30 (++) Analog mode
31 (++) Output mode
32 (++) Alternate function mode
33 (++) External interrupt/event lines
34
35 (+) During and just after reset, the alternate functions and external interrupt
36 lines are not active and the I/O ports are configured in analog mode.
37
38 (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be
39 activated or not.
40
41 (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull
42 type and the IO speed can be selected depending on the VDD value.
43
44 (+) The microcontroller IO pins are connected to onboard peripherals/modules through a
45 multiplexer that allows only one peripheral alternate function (AF) connected
46 to an IO pin at a time. In this way, there can be no conflict between peripherals
47 sharing the same IO pin.
48
49 (+) All ports have external interrupt/event capability. To use external interrupt
50 lines, the port must be configured in input mode. All available GPIO pins are
51 connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
52
53 (+) The external interrupt/event controller consists of up to 73 edge detectors
54 (16 lines are connected to GPIO) for generating event/interrupt requests (each
55 input line can be independently configured to select the type (interrupt or event)
56 and the corresponding trigger event (rising or falling or both). Each line can
57 also be masked independently.
58
59 ##### How to use this driver #####
60 ==============================================================================
61 [..]
62 (#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE().
63
64 (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
65 (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
66 (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
67 structure.
68 (++) In case of Output or alternate function mode selection: the speed is
69 configured through "Speed" member from GPIO_InitTypeDef structure.
70 (++) In alternate mode is selection, the alternate function connected to the IO
71 is configured through "Alternate" member from GPIO_InitTypeDef structure.
72 (++) Analog mode is required when a pin is to be used as ADC channel
73 or DAC output.
74 (++) In case of external interrupt/event selection the "Mode" member from
75 GPIO_InitTypeDef structure select the type (interrupt or event) and
76 the corresponding trigger event (rising or falling or both).
77
78 (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
79 mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
80 HAL_NVIC_EnableIRQ().
81
82 (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
83
84 (#) To set/reset the level of a pin configured in output mode use
85 HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
86
87 (#) To set the level of several pins and reset level of several other pins in
88 same cycle, use HAL_GPIO_WriteMultipleStatePin().
89
90 (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
91
92 (#) During and just after reset, the alternate functions are not
93 active and the GPIO pins are configured in analog mode (except JTAG
94 pins).
95
96 (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
97 (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
98 priority over the GPIO function.
99
100 (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
101 general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
102 The HSE has priority over the GPIO function.
103
104 @endverbatim
105 */
106
107 /* Includes ------------------------------------------------------------------*/
108 #include "stm32n6xx_hal.h"
109
110 /** @addtogroup STM32N6xx_HAL_Driver
111 * @{
112 */
113
114 /** @addtogroup GPIO
115 * @{
116 */
117 /** MISRA C:2012 deviation rule has been granted for following rules:
118 * Rule-12.2 - Medium: RHS argument is in interval [0,INF] which is out of
119 * range of the shift operator in following API :
120 * HAL_GPIO_Init
121 * HAL_GPIO_DeInit
122 */
123
124 #ifdef HAL_GPIO_MODULE_ENABLED
125
126 /* Private typedef -----------------------------------------------------------*/
127 /* Private defines ------------------------------------------------------------*/
128 /** @addtogroup GPIO_Private_Constants
129 * @{
130 */
131 #define GPIO_NUMBER (16u)
132 /**
133 * @}
134 */
135
136 /* Private macros ------------------------------------------------------------*/
137 /* Private variables ---------------------------------------------------------*/
138 /* Private function prototypes -----------------------------------------------*/
139 /* Exported functions --------------------------------------------------------*/
140
141 /** @addtogroup GPIO_Exported_Functions
142 * @{
143 */
144
145 /** @addtogroup GPIO_Exported_Functions_Group1
146 * @brief Initialization and Configuration functions
147 *
148 @verbatim
149 ===============================================================================
150 ##### Initialization and de-initialization functions #####
151 ===============================================================================
152
153 @endverbatim
154 * @{
155 */
156
157 /**
158 * @brief Initialize the GPIOx peripheral according to the specified parameters in the GPIO_Init.
159 * @note If GPIOx peripheral pin is used in EXTI_MODE and the pin is secure/privilege, it is up
160 * to the application to insure that the corresponding EXTI line is set secure/privilege.
161 * @param GPIOx where x can be (A..H and N..Q) to select the GPIO peripheral for STM32N6xx family
162 * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
163 * the configuration information for the specified GPIO peripheral.
164 * @retval None
165 */
HAL_GPIO_Init(GPIO_TypeDef * GPIOx,const GPIO_InitTypeDef * GPIO_Init)166 void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, const GPIO_InitTypeDef *GPIO_Init)
167 {
168 uint32_t position = 0x00u;
169 uint32_t iocurrent;
170 uint32_t temp;
171
172 /* Check the parameters */
173 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
174 assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
175 assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
176
177 /* Configure the port pins */
178 while (((GPIO_Init->Pin) >> position) != 0x00u)
179 {
180 /* Get current io position */
181 iocurrent = (GPIO_Init->Pin) & (1uL << position);
182
183 if (iocurrent != 0x00u)
184 {
185 /*--------------------- GPIO Mode Configuration ------------------------*/
186 /* In case of Output or Alternate function mode selection */
187 if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
188 {
189 /* Check the Speed parameter */
190 assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
191
192 /* Configure the IO Speed */
193 temp = GPIOx->OSPEEDR;
194 temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * GPIO_OSPEEDR_OSPEED1_Pos));
195 temp |= (GPIO_Init->Speed << (position * GPIO_OSPEEDR_OSPEED1_Pos));
196 GPIOx->OSPEEDR = temp;
197
198 /* Configure the IO Output Type */
199 temp = GPIOx->OTYPER;
200 temp &= ~(GPIO_OTYPER_OT0 << position) ;
201 temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
202 GPIOx->OTYPER = temp;
203 }
204
205 if (((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) ||
206 (((GPIO_Init->Mode & GPIO_MODE) == MODE_ANALOG) && (GPIO_Init->Pull != GPIO_PULLUP)))
207 {
208 /* Check the Pull parameter */
209 assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
210
211 /* Activate the Pull-up or Pull down resistor for the current IO */
212 temp = GPIOx->PUPDR;
213 temp &= ~(GPIO_PUPDR_PUPD0 << (position * GPIO_PUPDR_PUPD1_Pos));
214 temp |= ((GPIO_Init->Pull) << (position * GPIO_PUPDR_PUPD1_Pos));
215 GPIOx->PUPDR = temp;
216 }
217
218 /* In case of Alternate function mode selection */
219 if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
220 {
221 /* Check the Alternate function parameters */
222 assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
223 assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
224
225 /* Configure Alternate function mapped with the current IO */
226 temp = GPIOx->AFR[position >> 3u];
227 temp &= ~(0xFu << ((position & 0x07u) * GPIO_AFRL_AFSEL1_Pos));
228 temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * GPIO_AFRL_AFSEL1_Pos));
229 GPIOx->AFR[position >> 3u] = temp;
230 }
231
232 /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
233 temp = GPIOx->MODER;
234 temp &= ~(GPIO_MODER_MODE0 << (position * GPIO_MODER_MODE1_Pos));
235 temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * GPIO_MODER_MODE1_Pos));
236 GPIOx->MODER = temp;
237
238 /*--------------------- EXTI Mode Configuration ------------------------*/
239 /* Configure the External Interrupt or event for the current IO */
240 if ((GPIO_Init->Mode & EXTI_MODE) != 0x00u)
241 {
242 temp = EXTI->EXTICR[position >> 2u];
243 temp &= ~(0x0FuL << ((position & 0x03u) * EXTI_EXTICR1_EXTI1_Pos));
244 temp |= (GPIO_GET_INDEX(GPIOx) << ((position & 0x03u) * EXTI_EXTICR1_EXTI1_Pos));
245 EXTI->EXTICR[position >> 2u] = temp;
246
247 /* Clear EXTI line configuration */
248 temp = EXTI->IMR1;
249 temp &= ~(iocurrent);
250 if ((GPIO_Init->Mode & EXTI_IT) != 0x00u)
251 {
252 temp |= iocurrent;
253 }
254 EXTI->IMR1 = temp;
255
256 temp = EXTI->EMR1;
257 temp &= ~(iocurrent);
258 if ((GPIO_Init->Mode & EXTI_EVT) != 0x00u)
259 {
260 temp |= iocurrent;
261 }
262 EXTI->EMR1 = temp;
263
264 /* Clear Rising Falling edge configuration */
265 temp = EXTI->RTSR1;
266 temp &= ~(iocurrent);
267 if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u)
268 {
269 temp |= iocurrent;
270 }
271 EXTI->RTSR1 = temp;
272
273 temp = EXTI->FTSR1;
274 temp &= ~(iocurrent);
275 if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u)
276 {
277 temp |= iocurrent;
278 }
279 EXTI->FTSR1 = temp;
280 }
281 }
282
283 position++;
284 }
285 }
286
287 /**
288 * @brief De-initialize the GPIOx peripheral registers to their default reset values.
289 * @param GPIOx where x can be (A..H and N..Q) to select the GPIO peripheral for STM32N6xx family
290 * @param GPIO_Pin specifies the port bit to be written.
291 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
292 * @retval None
293 */
HAL_GPIO_DeInit(GPIO_TypeDef * GPIOx,uint32_t GPIO_Pin)294 void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
295 {
296 uint32_t position = 0x00u;
297 uint32_t iocurrent;
298 uint32_t tmp;
299
300 /* Check the parameters */
301 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
302 assert_param(IS_GPIO_PIN(GPIO_Pin));
303
304 /* Configure the port pins */
305 while ((GPIO_Pin >> position) != 0x00u)
306 {
307 /* Get current io position */
308 iocurrent = (GPIO_Pin) & (1uL << position);
309
310 if (iocurrent != 0x00u)
311 {
312 /*------------------------- EXTI Mode Configuration --------------------*/
313 /* Clear the External Interrupt or Event for the current IO */
314
315 tmp = EXTI->EXTICR[position >> 2u];
316 tmp &= (0x0FuL << ((position & 0x03u) * EXTI_EXTICR1_EXTI1_Pos));
317 if (tmp == (GPIO_GET_INDEX(GPIOx) << ((position & 0x03u) * EXTI_EXTICR1_EXTI1_Pos)))
318 {
319 /* Clear EXTI line configuration */
320 EXTI->IMR1 &= ~(iocurrent);
321 EXTI->EMR1 &= ~(iocurrent);
322
323 /* Clear Rising Falling edge configuration */
324 EXTI->RTSR1 &= ~(iocurrent);
325 EXTI->FTSR1 &= ~(iocurrent);
326
327 tmp = 0x0FuL << ((position & 0x03u) * EXTI_EXTICR1_EXTI1_Pos);
328 EXTI->EXTICR[position >> 2u] &= ~tmp;
329 }
330
331 /*------------------------- GPIO Mode Configuration --------------------*/
332 /* Configure IO in Analog Mode */
333 GPIOx->MODER |= (GPIO_MODER_MODE0 << (position * GPIO_MODER_MODE1_Pos));
334
335 /* Configure the default Alternate Function in current IO */
336 GPIOx->AFR[position >> 3u] &= ~(0xFu << ((position & 0x07u) * GPIO_AFRL_AFSEL1_Pos)) ;
337
338 /* Configure the default value for IO Speed */
339 GPIOx->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEED0 << (position * GPIO_OSPEEDR_OSPEED1_Pos));
340
341 /* Configure the default value IO Output Type */
342 GPIOx->OTYPER &= ~(GPIO_OTYPER_OT0 << position) ;
343
344 /* Deactivate the Pull-up and Pull-down resistor for the current IO */
345 GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * GPIO_PUPDR_PUPD1_Pos));
346
347 /* Reset delay settings for the current IO */
348 GPIOx->DELAYR[position >> 3u] &= ~(0xFu << ((position & 0x07u) * GPIO_DELAYRL_DLY1_Pos)) ;
349
350 /* Reset control settings for the current IO */
351 GPIOx->ADVCFGR[position >> 3u] &= ~(0xFu << ((position & 0x07u) * GPIO_ADVCFGRL_1_Pos)) ;
352 }
353
354 position++;
355 }
356 }
357
358 /**
359 * @}
360 */
361
362 /** @addtogroup GPIO_Exported_Functions_Group2
363 * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions.
364 *
365 @verbatim
366 ===============================================================================
367 ##### IO operation functions #####
368 ===============================================================================
369
370 @endverbatim
371 * @{
372 */
373
374 /**
375 * @brief Read the specified input port pin.
376 * @param GPIOx where x can be (A..H and N..Q) to select the GPIO peripheral for STM32N6xx family
377 * @param GPIO_Pin specifies the port bit to read.
378 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
379 * @retval The input port pin value.
380 */
HAL_GPIO_ReadPin(const GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)381 GPIO_PinState HAL_GPIO_ReadPin(const GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
382 {
383 GPIO_PinState bitstatus;
384
385 /* Check the parameters */
386 assert_param(IS_GPIO_PIN(GPIO_Pin));
387
388 if ((GPIOx->IDR & GPIO_Pin) != 0x00u)
389 {
390 bitstatus = GPIO_PIN_SET;
391 }
392 else
393 {
394 bitstatus = GPIO_PIN_RESET;
395 }
396 return bitstatus;
397 }
398
399 /**
400 * @brief Set or clear the selected data port bit.
401 * @note This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify
402 * accesses. In this way, there is no risk of an IRQ occurring between
403 * the read and the modify access.
404 * @param GPIOx where x can be (A..H and N..Q) to select the GPIO peripheral for STM32N6xx family
405 * @param GPIO_Pin specifies the port bit to be written.
406 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
407 * @param PinState specifies the value to be written to the selected bit.
408 * This parameter can be one of the GPIO_PinState enum values:
409 * @arg GPIO_PIN_RESET: to clear the port pin
410 * @arg GPIO_PIN_SET: to set the port pin
411 * @retval None
412 */
HAL_GPIO_WritePin(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin,GPIO_PinState PinState)413 void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
414 {
415 /* Check the parameters */
416 assert_param(IS_GPIO_PIN(GPIO_Pin));
417 assert_param(IS_GPIO_PIN_ACTION(PinState));
418
419 if (PinState != GPIO_PIN_RESET)
420 {
421 GPIOx->BSRR = (uint32_t)GPIO_Pin;
422 }
423 else
424 {
425 GPIOx->BRR = (uint32_t)GPIO_Pin;
426 }
427 }
428
429 /**
430 * @brief Toggle the specified GPIO pin.
431 * @param GPIOx where x can be (A..H and N..Q) to select the GPIO peripheral for STM32N6xx family
432 * @param GPIO_Pin specifies the pin to be toggled.
433 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
434 * @retval None
435 */
HAL_GPIO_TogglePin(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)436 void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
437 {
438 uint32_t odr;
439
440 /* Check the parameters */
441 assert_param(IS_GPIO_PIN(GPIO_Pin));
442
443 /* get current Output Data Register value */
444 odr = GPIOx->ODR;
445
446 /* Set selected pins that were at low level, and reset ones that were high */
447 GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
448 }
449
450 /**
451 * @brief Set and clear several pins of a dedicated port in same cycle.
452 * @param GPIOx where x can be (A..H and N..Q) to select the GPIO peripheral for STM32N6xx family
453 * @param PinReset specifies the port bits to be reset
454 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15) or zero.
455 * @param PinSet specifies the port bits to be set
456 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15) or zero.
457 * @note Both PinReset and PinSet combinations shall not get any common bit, else
458 * assert would be triggered.
459 * @note At least one of the two parameters used to set or reset shall be different from zero.
460 * @retval None
461 */
HAL_GPIO_WriteMultipleStatePin(GPIO_TypeDef * GPIOx,uint16_t PinReset,uint16_t PinSet)462 void HAL_GPIO_WriteMultipleStatePin(GPIO_TypeDef *GPIOx, uint16_t PinReset, uint16_t PinSet)
463 {
464 uint32_t tmp;
465
466 /* Check the parameters */
467 /* Make sure at least one parameter is different from zero and that there is no common pin */
468 assert_param(IS_GPIO_PIN((uint32_t)PinReset | (uint32_t)PinSet));
469 assert_param(IS_GPIO_COMMON_PIN(PinReset, PinSet));
470
471 tmp = (((uint32_t)PinReset << 16) | PinSet);
472 GPIOx->BSRR = tmp;
473 }
474
475 /**
476 * @brief Lock GPIO Pins configuration registers.
477 * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
478 * GPIOx_PUPDR, GPIOx_AFRL, GPIOx_AFRH, GPIOx_DELAYRL, GPIOx_DELAYRH, GPIOx_ADVCFGRL, GPIOx_ADVCFGRH.
479 * @note The configuration of the locked GPIO pins can no longer be modified until the next reset.
480 * @param GPIOx where x can be (A..H and N..Q) to select the GPIO peripheral for STM32N6xx family
481 * @param GPIO_Pin specifies the port bits to be locked.
482 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
483 * @retval HAL_OK if success, HAL_ERROR otherwise
484 */
HAL_GPIO_LockPin(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)485 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
486 {
487 __IO uint32_t tmp = GPIO_LCKR_LCKK;
488
489 /* Check the parameters */
490 assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx));
491 assert_param(IS_GPIO_PIN(GPIO_Pin));
492
493 /* Apply lock key write sequence */
494 tmp |= GPIO_Pin;
495 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
496 GPIOx->LCKR = tmp;
497 /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
498 GPIOx->LCKR = GPIO_Pin;
499 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
500 GPIOx->LCKR = tmp;
501 /* Read LCKK register. This read is mandatory to complete key lock sequence */
502 tmp = GPIOx->LCKR;
503
504 /* read again in order to confirm lock is active */
505 if ((GPIOx->LCKR & GPIO_LCKR_LCKK) != 0x00u)
506 {
507 return HAL_OK;
508 }
509 else
510 {
511 return HAL_ERROR;
512 }
513 }
514
515 /**
516 * @brief Configure GPIO retime on specified GPIO pin.
517 * @param GPIOx where x can be (A..H and N..Q)
518 * @param GPIO_Pin specifies the port bit to be written.
519 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
520 * @param pRet_Init pointer to a GPIO_RetimeTypeDef structure that contains
521 * the retime configuration information for the specified GPIO peripheral.
522 * @retval None
523 */
HAL_GPIO_SetRetime(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin,const GPIO_RetimeTypeDef * pRet_Init)524 void HAL_GPIO_SetRetime(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, const GPIO_RetimeTypeDef *pRet_Init)
525 {
526 uint32_t position = 0x00u;
527 uint32_t iocurrent;
528 uint32_t temp;
529
530 /* Check the parameters */
531 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
532 assert_param(IS_GPIO_PIN(GPIO_Pin));
533 assert_param(IS_GPIO_RETIME(pRet_Init->Retime));
534 assert_param(IS_GPIO_CLOCK(pRet_Init->Edge));
535
536 /* Configure the port pins */
537 while ((GPIO_Pin >> position) != 0x00u)
538 {
539 /* Get current io position */
540 iocurrent = (GPIO_Pin) & (1uL << position);
541
542 if (iocurrent != 0x00u)
543 {
544 /* Configure the IO Retime */
545 temp = GPIOx->ADVCFGR[position >> 3u];
546 temp &= ~((GPIO_ADVCFGRL_RET0 | GPIO_ADVCFGRL_INVCLK0 | GPIO_ADVCFGRL_DE0)
547 << ((position & 0x07u) * GPIO_ADVCFGRL_1_Pos));
548 temp |= (pRet_Init->Retime << ((position & 0x07u) * GPIO_ADVCFGRL_1_Pos));
549 temp |= (pRet_Init->Edge << ((position & 0x07u) * GPIO_ADVCFGRL_1_Pos));
550 GPIOx->ADVCFGR[position >> 3u] = temp;
551 }
552 position++;
553 }
554 }
555
556 /**
557 * @brief Get GPIO retime configuration on specified GPIO pin.
558 * @param GPIOx where x can be (A..H and N..Q)
559 * @param GPIO_Pin specifies the port bit to read.
560 * This parameter can be GPIO_PIN_x where x can be (0..15).
561 * @param pRet_Init pointer to the return GPIO_RetimeTypeDef structure that contains the retime information
562 * @retval HAL Status
563 */
HAL_GPIO_GetRetime(const GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin,GPIO_RetimeTypeDef * pRet_Init)564 HAL_StatusTypeDef HAL_GPIO_GetRetime(const GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_RetimeTypeDef *pRet_Init)
565 {
566 uint32_t position;
567 uint32_t index;
568
569 /* Check the parameters */
570 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
571 assert_param(IS_GPIO_SINGLE_PIN(GPIO_Pin));
572
573 /* Check null pointer */
574 if (pRet_Init == NULL)
575 {
576 return HAL_ERROR;
577 }
578
579 /* get IO position */
580 position = POSITION_VAL(GPIO_Pin);
581
582 /* Get the IO advanced configuration */
583 index = (position & 0x07u) * GPIO_ADVCFGRL_1_Pos;
584 pRet_Init->Edge = ((GPIOx->ADVCFGR[position >> 3u]
585 & ((GPIO_ADVCFGRL_DE0 << index) | (GPIO_ADVCFGRL_INVCLK0 << index))) >> index);
586 pRet_Init->Retime = ((GPIOx->ADVCFGR[position >> 3u] & (GPIO_ADVCFGRL_RET0 << index)) >> index);
587
588 return HAL_OK;
589 }
590
591
592 /**
593 * @brief Configure GPIO delay on specified GPIO pin.
594 * @param GPIOx where x can be (A..H and N..Q)
595 * @param GPIO_Pin specifies the port bit to be written.
596 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
597 * @param pDly_Init pointer to a GPIO_DelayTypeDef structure that contains
598 * the delay configuration information for the specified GPIO peripheral.
599 * @retval None
600 */
HAL_GPIO_SetDelay(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin,const GPIO_DelayTypeDef * pDly_Init)601 void HAL_GPIO_SetDelay(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, const GPIO_DelayTypeDef *pDly_Init)
602 {
603 uint32_t position = 0x00u;
604 uint32_t iocurrent;
605 uint32_t temp;
606
607 /* Check the parameters */
608 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
609 assert_param(IS_GPIO_PIN(GPIO_Pin));
610 assert_param(IS_GPIO_DELAY(pDly_Init->Delay));
611 assert_param(IS_GPIO_PATH(pDly_Init->Path));
612
613 /* Configure the port pins */
614 while ((GPIO_Pin >> position) != 0x00u)
615 {
616 /* Get current io position */
617 iocurrent = (GPIO_Pin) & (1uL << position);
618
619 if (iocurrent != 0x00u)
620 {
621 /* Configure the IO Delay path */
622 temp = GPIOx->ADVCFGR[position >> 3u];
623 temp &= ~(GPIO_ADVCFGRL_DLYPATH0 << ((position & 0x07u) * GPIO_ADVCFGRL_1_Pos));
624 temp |= (pDly_Init->Path << ((position & 0x07u) * GPIO_ADVCFGRL_1_Pos));
625 GPIOx->ADVCFGR[position >> 3u] = temp;
626
627 /* Configure the IO Delay */
628 temp = GPIOx->DELAYR[position >> 3u];
629 temp &= ~(GPIO_DELAYRL_DLY0_Msk << ((position & 0x07u) * GPIO_ADVCFGRL_1_Pos));
630 temp |= (pDly_Init->Delay << ((position & 0x07u) * GPIO_ADVCFGRL_1_Pos));
631 GPIOx->DELAYR[position >> 3u] = temp;
632 }
633 position++;
634 }
635 }
636
637 /**
638 * @brief Get GPIO delay configuration on specified GPIO pin.
639 * @param GPIOx where x can be (A..H and N..Q)
640 * @param GPIO_Pin specifies the port bit to read.
641 * This parameter can be GPIO_PIN_x where x can be (0..15).
642 * @param pDly_Init pointer to the return GPIO_DelayTypeDef structure that contains the delay information
643 * @retval HAL Status
644 */
HAL_GPIO_GetDelay(const GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin,GPIO_DelayTypeDef * pDly_Init)645 HAL_StatusTypeDef HAL_GPIO_GetDelay(const GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_DelayTypeDef *pDly_Init)
646 {
647 uint32_t position;
648 uint32_t index;
649
650 /* Check the parameters */
651 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
652 assert_param(IS_GPIO_SINGLE_PIN(GPIO_Pin));
653
654 /* Check null pointer */
655 if (pDly_Init == NULL)
656 {
657 return HAL_ERROR;
658 }
659
660 /* get IO position */
661 position = POSITION_VAL(GPIO_Pin);
662
663 /* Get the IO advanced configuration */
664 index = (position & 0x07u) * GPIO_ADVCFGRL_1_Pos;
665 pDly_Init->Delay = ((GPIOx->DELAYR[position >> 3u] & (GPIO_DELAYRL_DLY0_Msk << index)) >> index);
666 pDly_Init->Path = ((GPIOx->ADVCFGR[position >> 3u] & (GPIO_ADVCFGRL_DLYPATH0 << index)) >> index);
667
668 return HAL_OK;
669 }
670
671 /**
672 * @brief Handle EXTI interrupt request.
673 * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
674 * @retval None
675 */
HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)676 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
677 {
678 /* EXTI line interrupt detected */
679 if (__HAL_GPIO_EXTI_GET_RISING_IT(GPIO_Pin) != 0x00u)
680 {
681 __HAL_GPIO_EXTI_CLEAR_RISING_IT(GPIO_Pin);
682 HAL_GPIO_EXTI_Rising_Callback(GPIO_Pin);
683 }
684
685 if (__HAL_GPIO_EXTI_GET_FALLING_IT(GPIO_Pin) != 0x00u)
686 {
687 __HAL_GPIO_EXTI_CLEAR_FALLING_IT(GPIO_Pin);
688 HAL_GPIO_EXTI_Falling_Callback(GPIO_Pin);
689 }
690 }
691
692 /**
693 * @brief EXTI line rising detection callback.
694 * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
695 * @retval None
696 */
HAL_GPIO_EXTI_Rising_Callback(uint16_t GPIO_Pin)697 __weak void HAL_GPIO_EXTI_Rising_Callback(uint16_t GPIO_Pin)
698 {
699 /* Prevent unused argument(s) compilation warning */
700 UNUSED(GPIO_Pin);
701
702 /* NOTE: This function should not be modified, when the callback is needed,
703 the HAL_GPIO_EXTI_Rising_Callback could be implemented in the user file
704 */
705 }
706
707 /**
708 * @brief EXTI line falling detection callback.
709 * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
710 * @retval None
711 */
HAL_GPIO_EXTI_Falling_Callback(uint16_t GPIO_Pin)712 __weak void HAL_GPIO_EXTI_Falling_Callback(uint16_t GPIO_Pin)
713 {
714 /* Prevent unused argument(s) compilation warning */
715 UNUSED(GPIO_Pin);
716
717 /* NOTE: This function should not be modified, when the callback is needed,
718 the HAL_GPIO_EXTI_Falling_Callback could be implemented in the user file
719 */
720 }
721
722 /**
723 * @}
724 */
725
726 /** @defgroup GPIO_Exported_Functions_Group3 IO attributes management functions
727 * @brief GPIO attributes management functions.
728 *
729 @verbatim
730 ===============================================================================
731 ##### IO attributes functions #####
732 ===============================================================================
733
734 @endverbatim
735 * @{
736 */
737
738 #if defined (CPU_IN_SECURE_STATE)
739
740 /**
741 * @brief Lock security and privilege configuration of several pins for a dedicated port.
742 * @note When the lock sequence has been applied on a port bit, the value of this port bit can no longer
743 * be modified until the next reset. Set sequence only available in secure and privilege.
744 * @note Each lock bit freezes a security configuration register (control and alternate function registers).
745 * @param GPIOx GPIO Port
746 * @param GPIO_Pin specifies the port bit to be locked.
747 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
748 * @retval None
749 */
HAL_GPIO_LockPinAttributes(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)750 void HAL_GPIO_LockPinAttributes(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
751 {
752
753 /* Check the parameters */
754 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
755 assert_param(IS_GPIO_PIN(GPIO_Pin));
756
757 /* Lock the pins */
758 GPIOx->RCFGLOCKR = (uint32_t)GPIO_Pin;
759 }
760
761 /**
762 * @brief Get lock security and privilege configuration of several pins for a dedicated port.
763 * @param GPIOx GPIO Port
764 * @retval Lock status for all pins. Bitx are set to 1 for pinx locked, otherwise 0.
765 */
HAL_GPIO_GetLockPinAttributes(const GPIO_TypeDef * GPIOx)766 uint32_t HAL_GPIO_GetLockPinAttributes(const GPIO_TypeDef *GPIOx)
767 {
768
769 /* Check the parameters */
770 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
771
772 /* Lock the pins */
773 return (GPIOx->RCFGLOCKR);
774
775 }
776
777 #endif /* CPU_IN_SECURE_STATE */
778
779 /**
780 * @brief Configure the GPIO pins attributes.
781 * @note Set a pin to secure is only available in secure and privilege
782 * Set a pin to privilege is only available in privilege
783 * @param GPIOx where x can be (A..H and N..Q) to select the GPIO peripheral for STM32N6xx family
784 * @param GPIO_Pin : GPIO_Pin specifies the pin(s) to configure the secure/privilege attribute
785 * @param PinAttributes: PinAttributes can be one or a combination of the following values :
786 * @arg @ref GPIO_PIN_PRIV Privileged-only access
787 * @arg @ref GPIO_PIN_NPRIV Privileged/Non-privileged access
788 * @arg @ref GPIO_PIN_SEC Secure-only access
789 * @arg @ref GPIO_PIN_NSEC Secure/Non-secure access
790 * @retval None.
791 */
HAL_GPIO_ConfigPinAttributes(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin,uint32_t PinAttributes)792 void HAL_GPIO_ConfigPinAttributes(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, uint32_t PinAttributes)
793 {
794 #if defined CPU_IN_SECURE_STATE
795 uint32_t sec;
796 #endif /* CPU_IN_SECURE_STATE */
797 uint32_t priv;
798
799 /* Check the parameters */
800 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
801 assert_param(IS_GPIO_PIN(GPIO_Pin));
802 assert_param(IS_GPIO_PIN_ATTRIBUTES(PinAttributes));
803
804 #if defined CPU_IN_SECURE_STATE
805 /* Configure the port pins */
806 sec = GPIOx->SECCFGR;
807 if ((PinAttributes & GPIO_PIN_SEC) == GPIO_PIN_SEC)
808 {
809 sec |= (uint32_t)GPIO_Pin;
810 }
811 else if ((PinAttributes & GPIO_PIN_NSEC) == GPIO_PIN_NSEC)
812 {
813 sec &= ~((uint32_t)GPIO_Pin);
814 }
815 else
816 {
817 /* do nothing */
818 }
819 GPIOx->SECCFGR = sec;
820 #endif /* CPU_IN_SECURE_STATE */
821
822 priv = GPIOx->PRIVCFGR;
823 if ((PinAttributes & GPIO_PIN_PRIV) == GPIO_PIN_PRIV)
824 {
825 priv |= (uint32_t)GPIO_Pin;
826 }
827 else if ((PinAttributes & GPIO_PIN_NPRIV) == GPIO_PIN_NPRIV)
828 {
829 priv &= ~((uint32_t)GPIO_Pin);
830 }
831 else
832 {
833 /* do nothing */
834 }
835
836 GPIOx->PRIVCFGR = priv;
837 }
838
839 /**
840 * @brief Get the GPIO pins attributes.
841 * @param GPIOx where x can be (A..H and N..Q) to select the GPIO peripheral for STM32N6xx family
842 * @param GPIO_Pin specifies the port bit to read.
843 * This parameter can be GPIO_PIN_x where x can be (0..15).
844 * @param pPinAttributes: pPinAttributes pointer to return the pin attributes.
845 * @retval HAL Status.
846 */
HAL_GPIO_GetConfigPinAttributes(const GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin,uint32_t * pPinAttributes)847 HAL_StatusTypeDef HAL_GPIO_GetConfigPinAttributes(const GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin,
848 uint32_t *pPinAttributes)
849 {
850
851 /* Check the parameters */
852 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
853 assert_param(IS_GPIO_SINGLE_PIN(GPIO_Pin));
854
855 /* Check null pointer */
856 if (pPinAttributes == NULL)
857 {
858 return HAL_ERROR;
859 }
860
861 if ((GPIOx->SECCFGR & GPIO_Pin) != 0x00U)
862 {
863 *pPinAttributes = GPIO_PIN_SEC;
864 }
865 else
866 {
867 *pPinAttributes = GPIO_PIN_NSEC;
868 }
869
870 if ((GPIOx->PRIVCFGR & GPIO_Pin) != 0x00U)
871 {
872 *pPinAttributes |= GPIO_PIN_PRIV;
873 }
874 else
875 {
876 *pPinAttributes |= GPIO_PIN_NPRIV;
877 }
878
879 return HAL_OK;
880 }
881
882 /**
883 * @}
884 */
885
886 /**
887 * @}
888 */
889
890 #endif /* HAL_GPIO_MODULE_ENABLED */
891 /**
892 * @}
893 */
894
895 /**
896 * @}
897 */
898
