1 /**
2   ******************************************************************************
3   * @file    stm32l5xx_ll_icache.c
4   * @author  MCD Application Team
5   * @brief   ICACHE LL module driver.
6   ******************************************************************************
7   * @attention
8   *
9   * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10   * All rights reserved.</center></h2>
11   *
12   * This software component is licensed by ST under BSD 3-Clause license,
13   * the "License"; You may not use this file except in compliance with the
14   * License. You may obtain a copy of the License at:
15   *                        opensource.org/licenses/BSD-3-Clause
16   *
17   ******************************************************************************
18   */
19 #if defined(USE_FULL_LL_DRIVER)
20 
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32l5xx_ll_icache.h"
23 #ifdef  USE_FULL_ASSERT
24 #include "stm32_assert.h"
25 #else
26 #define assert_param(expr) ((void)0U)
27 #endif /* USE_FULL_ASSERT */
28 
29 /** @addtogroup STM32L5xx_LL_Driver
30   * @{
31   */
32 
33 #if defined(ICACHE)
34 
35 /** @defgroup ICACHE_LL ICACHE
36   * @{
37   */
38 
39 /* Private types -------------------------------------------------------------*/
40 /* Private variables ---------------------------------------------------------*/
41 /* Private constants ---------------------------------------------------------*/
42 /* Private macros ------------------------------------------------------------*/
43 /** @defgroup ICACHE_LL_Private_Macros ICACHE Private Macros
44   * @{
45   */
46 
47 #define IS_LL_ICACHE_REGION(__VALUE__)    (((__VALUE__) == LL_ICACHE_REGION_0) || \
48                                            ((__VALUE__) == LL_ICACHE_REGION_1) || \
49                                            ((__VALUE__) == LL_ICACHE_REGION_2) || \
50                                            ((__VALUE__) == LL_ICACHE_REGION_3))
51 
52 #define IS_LL_ICACHE_REGION_SIZE(__VALUE__) (((__VALUE__) == LL_ICACHE_REGIONSIZE_2MB)  || \
53                                              ((__VALUE__) == LL_ICACHE_REGIONSIZE_4MB)  || \
54                                              ((__VALUE__) == LL_ICACHE_REGIONSIZE_8MB)  || \
55                                              ((__VALUE__) == LL_ICACHE_REGIONSIZE_16MB) || \
56                                              ((__VALUE__) == LL_ICACHE_REGIONSIZE_32MB) || \
57                                              ((__VALUE__) == LL_ICACHE_REGIONSIZE_64MB) || \
58                                              ((__VALUE__) == LL_ICACHE_REGIONSIZE_128MB))
59 
60 #define IS_LL_ICACHE_MASTER_PORT(__VALUE__) (((__VALUE__) == LL_ICACHE_MASTER1_PORT) || \
61                                              ((__VALUE__) == LL_ICACHE_MASTER2_PORT))
62 
63 #define IS_LL_ICACHE_OUTPUT_BURST(__VALUE__) (((__VALUE__) == LL_ICACHE_OUTPUT_BURST_WRAP) || \
64                                               ((__VALUE__) == LL_ICACHE_OUTPUT_BURST_INCR))
65 
66 /**
67   * @}
68   */
69 
70 /* Private function prototypes -----------------------------------------------*/
71 
72 /* Exported functions --------------------------------------------------------*/
73 /** @addtogroup ICACHE_LL_Exported_Functions
74   * @{
75   */
76 
77 /** @addtogroup ICACHE_LL_EF_REGION_Init
78   * @{
79   */
80 
81 /**
82   * @brief  Configure and enable the memory remapped region.
83   * @note   The Instruction Cache and corresponding region must be disabled.
84   * @param  Region This parameter can be one of the following values:
85   *         @arg @ref LL_ICACHE_REGION_0
86   *         @arg @ref LL_ICACHE_REGION_1
87   *         @arg @ref LL_ICACHE_REGION_2
88   *         @arg @ref LL_ICACHE_REGION_3
89   * @param  ICACHE_RegionStruct pointer to a @ref LL_ICACHE_RegionTypeDef structure.
90   * @retval None
91   */
LL_ICACHE_ConfigRegion(uint32_t Region,LL_ICACHE_RegionTypeDef * ICACHE_RegionStruct)92 void LL_ICACHE_ConfigRegion(uint32_t Region, LL_ICACHE_RegionTypeDef *ICACHE_RegionStruct)
93 {
94   __IO uint32_t *reg;
95   uint32_t value;
96 
97   /* Check the parameters */
98   assert_param(IS_LL_ICACHE_REGION(Region));
99   assert_param(IS_LL_ICACHE_REGION_SIZE(ICACHE_RegionStruct->Size));
100   assert_param(IS_LL_ICACHE_MASTER_PORT(ICACHE_RegionStruct->TrafficRoute));
101   assert_param(IS_LL_ICACHE_OUTPUT_BURST(ICACHE_RegionStruct->OutputBurstType));
102 
103   /* Get region control register address */
104   reg = &(ICACHE->CRR0) + (1U * Region);
105 
106   /* Region 2MB:   BaseAddress size 8 bits, RemapAddress size 11 bits */
107   /* Region 4MB:   BaseAddress size 7 bits, RemapAddress size 10 bits */
108   /* Region 8MB:   BaseAddress size 6 bits, RemapAddress size 9 bits  */
109   /* Region 16MB:  BaseAddress size 5 bits, RemapAddress size 8 bits  */
110   /* Region 32MB:  BaseAddress size 4 bits, RemapAddress size 7 bits  */
111   /* Region 64MB:  BaseAddress size 3 bits, RemapAddress size 6 bits  */
112   /* Region 128MB: BaseAddress size 2 bits, RemapAddress size 5 bits  */
113   value  = ((ICACHE_RegionStruct->BaseAddress & 0x1FFFFFFFU) >> 21U) & (0xFFU & ~(ICACHE_RegionStruct->Size - 1U));
114   value |= ((ICACHE_RegionStruct->RemapAddress >> 5U) & ((uint32_t)(0x7FFU & ~(ICACHE_RegionStruct->Size - 1U)) << ICACHE_CRRx_REMAPADDR_Pos));
115   value |= (ICACHE_RegionStruct->Size << ICACHE_CRRx_RSIZE_Pos) | ICACHE_RegionStruct->TrafficRoute | ICACHE_RegionStruct->OutputBurstType;
116   *reg = (value | ICACHE_CRRx_REN);  /* Configure and enable region */
117 }
118 
119 /**
120   * @}
121   */
122 
123 /**
124   * @}
125   */
126 
127 /**
128   * @}
129   */
130 
131 #endif /* ICACHE */
132 
133 /**
134   * @}
135   */
136 
137 #endif /* USE_FULL_LL_DRIVER */
138 
139 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
140