1 /**
2 ******************************************************************************
3 * @file stm32l5xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 @verbatim
15 ==============================================================================
16 ##### How to use this driver #####
17 ==============================================================================
18 [..]
19 The LPTIM HAL driver can be used as follows:
20
21 (#)Initialize the LPTIM low level resources by implementing the
22 HAL_LPTIM_MspInit():
23 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
24 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
25 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
26 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
27 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
28
29 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
30 configures mainly:
31 (++) The instance: LPTIM1, LPTIM2 or LPTIM3.
32 (++) Clock: the counter clock.
33 (+++) Source : it can be either the ULPTIM input (IN1) or one of
34 the internal clock; (APB, LSE, LSI or HSI).
35 (+++) Prescaler: select the clock divider.
36 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
37 as counter clock source.
38 (+++) Polarity: polarity of the active edge for the counter unit
39 if the ULPTIM input is selected.
40 (+++) SampleTime: clock sampling time to configure the clock glitch
41 filter.
42 (++) Trigger: How the counter start.
43 (+++) Source: trigger can be software or one of the hardware triggers.
44 (+++) ActiveEdge : only for hardware trigger.
45 (+++) SampleTime : trigger sampling time to configure the trigger
46 glitch filter.
47 (++) OutputPolarity : 2 opposite polarities are possible.
48 (++) UpdateMode: specifies whether the update of the autoreload and
49 the compare values is done immediately or after the end of current
50 period.
51 (++) Input1Source: Source selected for input1 (GPIO or comparator output).
52 (++) Input2Source: Source selected for input2 (GPIO or comparator output).
53 Input2 is used only for encoder feature so is used only for LPTIM1 instance.
54
55 (#)Six modes are available:
56
57 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
58 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
59 mode.
60
61 (++) One Pulse Mode: To generate pulse with specified width in response
62 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
63 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
64
65 (++) Set once Mode: In this mode, the output changes the level (from
66 low level to high level if the output polarity is configured high, else
67 the opposite) when a compare match occurs. To start this mode, call
68 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
69 interruption mode.
70
71 (++) Encoder Mode: To use the encoder interface call
72 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
73 interruption mode. Only available for LPTIM1 instance.
74
75 (++) Time out Mode: an active edge on one selected trigger input rests
76 the counter. The first trigger event will start the timer, any
77 successive trigger event will reset the counter and the timer will
78 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
79 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
80
81 (++) Counter Mode: counter can be used to count external events on
82 the LPTIM Input1 or it can be used to count internal clock cycles.
83 To start this mode, call HAL_LPTIM_Counter_Start() or
84 HAL_LPTIM_Counter_Start_IT() for interruption mode.
85
86
87 (#) User can stop any process by calling the corresponding API:
88 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
89 already started in interruption mode.
90
91 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
92
93 *** Callback registration ***
94 =============================================
95 [..]
96 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
97 allows the user to configure dynamically the driver callbacks.
98 [..]
99 Use Function @ref HAL_LPTIM_RegisterCallback() to register a callback.
100 @ref HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
101 the Callback ID and a pointer to the user callback function.
102 [..]
103 Use function @ref HAL_LPTIM_UnRegisterCallback() to reset a callback to the
104 default weak function.
105 @ref HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
106 and the Callback ID.
107 [..]
108 These functions allow to register/unregister following callbacks:
109
110 (+) MspInitCallback : LPTIM Base Msp Init Callback.
111 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
112 (+) CompareMatchCallback : Compare match Callback.
113 (+) AutoReloadMatchCallback : Auto-reload match Callback.
114 (+) TriggerCallback : External trigger event detection Callback.
115 (+) CompareWriteCallback : Compare register write complete Callback.
116 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
117 (+) DirectionUpCallback : Up-counting direction change Callback.
118 (+) DirectionDownCallback : Down-counting direction change Callback.
119 (+) UpdateEventCallback : Update event detection Callback.
120 (+) RepCounterWriteCallback : Repetition counter register write complete Callback.
121
122 [..]
123 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
124 all interrupt callbacks are set to the corresponding weak functions:
125 examples @ref HAL_LPTIM_TriggerCallback(), @ref HAL_LPTIM_CompareMatchCallback().
126
127 [..]
128 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
129 functionalities in the Init/DeInit only when these callbacks are null
130 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
131 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
132
133 [..]
134 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
135 Exception done MspInit/MspDeInit that can be registered/unregistered
136 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
137 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
138 In that case first register the MspInit/MspDeInit user callbacks
139 using @ref HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
140
141 [..]
142 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
143 not defined, the callback registration feature is not available and all callbacks
144 are set to the corresponding weak functions.
145
146 @endverbatim
147 ******************************************************************************
148 * @attention
149 *
150 * <h2><center>© Copyright (c) 2019 STMicroelectronics.
151 * All rights reserved.</center></h2>
152 *
153 * This software component is licensed by ST under BSD 3-Clause license,
154 * the "License"; You may not use this file except in compliance with the
155 * License. You may obtain a copy of the License at:
156 * opensource.org/licenses/BSD-3-Clause
157 *
158 ******************************************************************************
159 */
160
161 /* Includes ------------------------------------------------------------------*/
162 #include "stm32l5xx_hal.h"
163
164 /** @addtogroup STM32L5xx_HAL_Driver
165 * @{
166 */
167
168 /** @defgroup LPTIM LPTIM
169 * @brief LPTIM HAL module driver.
170 * @{
171 */
172
173 #ifdef HAL_LPTIM_MODULE_ENABLED
174
175 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3)
176
177 /* Private typedef -----------------------------------------------------------*/
178 /* Private define ------------------------------------------------------------*/
179 /** @addtogroup LPTIM_Private_Constants
180 * @{
181 */
182 #define TIMEOUT 1000UL /* Timeout is 1s */
183 /**
184 * @}
185 */
186
187 /* Private macro -------------------------------------------------------------*/
188 /** @addtogroup LPTIM_Private_Macros
189 * @{
190 */
191 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(__INSTANCE__) \
192 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT() :\
193 ((__INSTANCE__) == LPTIM2) ? __HAL_LPTIM_LPTIM2_EXTI_ENABLE_IT() : __HAL_LPTIM_LPTIM3_EXTI_ENABLE_IT())
194
195 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(__INSTANCE__) \
196 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT() :\
197 ((__INSTANCE__) == LPTIM2) ? __HAL_LPTIM_LPTIM2_EXTI_DISABLE_IT() : __HAL_LPTIM_LPTIM3_EXTI_DISABLE_IT())
198 /**
199 * @}
200 */
201
202 /* Private variables ---------------------------------------------------------*/
203 /* Private function prototypes -----------------------------------------------*/
204 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
205 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
206 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
207 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
208
209 /* Exported functions --------------------------------------------------------*/
210
211 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
212 * @{
213 */
214
215 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
216 * @brief Initialization and Configuration functions.
217 *
218 @verbatim
219 ==============================================================================
220 ##### Initialization and de-initialization functions #####
221 ==============================================================================
222 [..] This section provides functions allowing to:
223 (+) Initialize the LPTIM according to the specified parameters in the
224 LPTIM_InitTypeDef and initialize the associated handle.
225 (+) DeInitialize the LPTIM peripheral.
226 (+) Initialize the LPTIM MSP.
227 (+) DeInitialize the LPTIM MSP.
228
229 @endverbatim
230 * @{
231 */
232
233 /**
234 * @brief Initialize the LPTIM according to the specified parameters in the
235 * LPTIM_InitTypeDef and initialize the associated handle.
236 * @param hlptim LPTIM handle
237 * @retval HAL status
238 */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)239 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
240 {
241 uint32_t tmpcfgr;
242
243 /* Check the LPTIM handle allocation */
244 if (hlptim == NULL)
245 {
246 return HAL_ERROR;
247 }
248
249 /* Check the parameters */
250 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
251
252 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
253 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
254 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
255 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
256 {
257 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
258 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
259 }
260 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
261 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
262 {
263 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
264 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
265 }
266 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
267 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
268 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
269 assert_param(IS_LPTIM_REPETITION(hlptim->Init.RepetitionCounter));
270
271 if (hlptim->State == HAL_LPTIM_STATE_RESET)
272 {
273 /* Allocate lock resource and initialize it */
274 hlptim->Lock = HAL_UNLOCKED;
275
276 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
277 /* Reset interrupt callbacks to legacy weak callbacks */
278 LPTIM_ResetCallback(hlptim);
279
280 if (hlptim->MspInitCallback == NULL)
281 {
282 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
283 }
284
285 /* Init the low level hardware : GPIO, CLOCK, NVIC */
286 hlptim->MspInitCallback(hlptim);
287 #else
288 /* Init the low level hardware : GPIO, CLOCK, NVIC */
289 HAL_LPTIM_MspInit(hlptim);
290 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
291 }
292
293 /* Change the LPTIM state */
294 hlptim->State = HAL_LPTIM_STATE_BUSY;
295
296 /* Enable the Peripheral */
297 __HAL_LPTIM_ENABLE(hlptim);
298
299 /* Clear flag */
300 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
301
302 /* Set the repetition counter */
303 __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
304
305 /* Wait for the completion of the write operation to the LPTIM_RCR register */
306 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_REPOK) == HAL_TIMEOUT)
307 {
308 return HAL_TIMEOUT;
309 }
310
311 /* Disable the Peripheral */
312 __HAL_LPTIM_DISABLE(hlptim);
313
314 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
315 {
316 return HAL_TIMEOUT;
317 }
318
319
320 /* Get the LPTIMx CFGR value */
321 tmpcfgr = hlptim->Instance->CFGR;
322
323 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
324 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
325 {
326 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
327 }
328 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
329 {
330 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
331 }
332
333 /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
334 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
335 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
336
337 /* Set initialization parameters */
338 tmpcfgr |= (hlptim->Init.Clock.Source |
339 hlptim->Init.Clock.Prescaler |
340 hlptim->Init.OutputPolarity |
341 hlptim->Init.UpdateMode |
342 hlptim->Init.CounterSource);
343
344 /* Glitch filters for internal triggers and external inputs are configured
345 * only if an internal clock source is provided to the LPTIM
346 */
347 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
348 {
349 tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
350 hlptim->Init.UltraLowPowerClock.SampleTime);
351 }
352
353 /* Configure LPTIM external clock polarity and digital filter */
354 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
355 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
356 {
357 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
358 hlptim->Init.UltraLowPowerClock.SampleTime);
359 }
360
361 /* Configure LPTIM external trigger */
362 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
363 {
364 /* Enable External trigger and set the trigger source */
365 tmpcfgr |= (hlptim->Init.Trigger.Source |
366 hlptim->Init.Trigger.ActiveEdge |
367 hlptim->Init.Trigger.SampleTime);
368 }
369
370 /* Write to LPTIMx CFGR */
371 hlptim->Instance->CFGR = tmpcfgr;
372
373 /* Configure LPTIM input sources */
374 if (hlptim->Instance == LPTIM1)
375 {
376 /* Check LPTIM Input1 and Input2 sources */
377 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
378 assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
379
380 /* Configure LPTIM Input1 and Input2 sources */
381 hlptim->Instance->OR = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
382 }
383 else
384 {
385 /* Check LPTIM2 and LPTIM3 Input1 source */
386 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
387
388 /* Configure LPTIM2 and LPTIM3 Input1 source */
389 hlptim->Instance->OR = hlptim->Init.Input1Source;
390 }
391
392 /* Change the LPTIM state */
393 hlptim->State = HAL_LPTIM_STATE_READY;
394
395 /* Return function status */
396 return HAL_OK;
397 }
398
399 /**
400 * @brief DeInitialize the LPTIM peripheral.
401 * @param hlptim LPTIM handle
402 * @retval HAL status
403 */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)404 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
405 {
406 /* Check the LPTIM handle allocation */
407 if (hlptim == NULL)
408 {
409 return HAL_ERROR;
410 }
411
412 /* Change the LPTIM state */
413 hlptim->State = HAL_LPTIM_STATE_BUSY;
414
415 /* Disable the LPTIM Peripheral Clock */
416 __HAL_LPTIM_DISABLE(hlptim);
417
418 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
419 {
420 return HAL_TIMEOUT;
421 }
422
423 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
424 if (hlptim->MspDeInitCallback == NULL)
425 {
426 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
427 }
428
429 /* DeInit the low level hardware: CLOCK, NVIC.*/
430 hlptim->MspDeInitCallback(hlptim);
431 #else
432 /* DeInit the low level hardware: CLOCK, NVIC.*/
433 HAL_LPTIM_MspDeInit(hlptim);
434 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
435
436 /* Change the LPTIM state */
437 hlptim->State = HAL_LPTIM_STATE_RESET;
438
439 /* Release Lock */
440 __HAL_UNLOCK(hlptim);
441
442 /* Return function status */
443 return HAL_OK;
444 }
445
446 /**
447 * @brief Initialize the LPTIM MSP.
448 * @param hlptim LPTIM handle
449 * @retval None
450 */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)451 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
452 {
453 /* Prevent unused argument(s) compilation warning */
454 UNUSED(hlptim);
455
456 /* NOTE : This function should not be modified, when the callback is needed,
457 the HAL_LPTIM_MspInit could be implemented in the user file
458 */
459 }
460
461 /**
462 * @brief DeInitialize LPTIM MSP.
463 * @param hlptim LPTIM handle
464 * @retval None
465 */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)466 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
467 {
468 /* Prevent unused argument(s) compilation warning */
469 UNUSED(hlptim);
470
471 /* NOTE : This function should not be modified, when the callback is needed,
472 the HAL_LPTIM_MspDeInit could be implemented in the user file
473 */
474 }
475
476 /**
477 * @}
478 */
479
480 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
481 * @brief Start-Stop operation functions.
482 *
483 @verbatim
484 ==============================================================================
485 ##### LPTIM Start Stop operation functions #####
486 ==============================================================================
487 [..] This section provides functions allowing to:
488 (+) Start the PWM mode.
489 (+) Stop the PWM mode.
490 (+) Start the One pulse mode.
491 (+) Stop the One pulse mode.
492 (+) Start the Set once mode.
493 (+) Stop the Set once mode.
494 (+) Start the Encoder mode.
495 (+) Stop the Encoder mode.
496 (+) Start the Timeout mode.
497 (+) Stop the Timeout mode.
498 (+) Start the Counter mode.
499 (+) Stop the Counter mode.
500
501
502 @endverbatim
503 * @{
504 */
505
506 /**
507 * @brief Start the LPTIM PWM generation.
508 * @param hlptim LPTIM handle
509 * @param Period Specifies the Autoreload value.
510 * This parameter must be a value between 0x0000 and 0xFFFF.
511 * @param Pulse Specifies the compare value.
512 * This parameter must be a value between 0x0000 and 0xFFFF.
513 * @retval HAL status
514 */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)515 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
516 {
517 /* Check the parameters */
518 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
519 assert_param(IS_LPTIM_PERIOD(Period));
520 assert_param(IS_LPTIM_PULSE(Pulse));
521
522 /* Set the LPTIM state */
523 hlptim->State = HAL_LPTIM_STATE_BUSY;
524
525 /* Reset WAVE bit to set PWM mode */
526 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
527
528 /* Enable the Peripheral */
529 __HAL_LPTIM_ENABLE(hlptim);
530
531 /* Clear flag */
532 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
533
534 /* Load the period value in the autoreload register */
535 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
536
537 /* Wait for the completion of the write operation to the LPTIM_ARR register */
538 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
539 {
540 return HAL_TIMEOUT;
541 }
542
543 /* Clear flag */
544 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
545
546 /* Load the pulse value in the compare register */
547 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
548
549 /* Wait for the completion of the write operation to the LPTIM_CMP register */
550 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
551 {
552 return HAL_TIMEOUT;
553 }
554
555 /* Start timer in continuous mode */
556 __HAL_LPTIM_START_CONTINUOUS(hlptim);
557
558 /* Change the TIM state*/
559 hlptim->State = HAL_LPTIM_STATE_READY;
560
561 /* Return function status */
562 return HAL_OK;
563 }
564
565 /**
566 * @brief Stop the LPTIM PWM generation.
567 * @param hlptim LPTIM handle
568 * @retval HAL status
569 */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)570 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
571 {
572 /* Check the parameters */
573 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
574
575 /* Set the LPTIM state */
576 hlptim->State = HAL_LPTIM_STATE_BUSY;
577
578 /* Disable the Peripheral */
579 __HAL_LPTIM_DISABLE(hlptim);
580
581 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
582 {
583 return HAL_TIMEOUT;
584 }
585
586 /* Change the TIM state*/
587 hlptim->State = HAL_LPTIM_STATE_READY;
588
589 /* Return function status */
590 return HAL_OK;
591 }
592
593 /**
594 * @brief Start the LPTIM PWM generation in interrupt mode.
595 * @param hlptim LPTIM handle
596 * @param Period Specifies the Autoreload value.
597 * This parameter must be a value between 0x0000 and 0xFFFF
598 * @param Pulse Specifies the compare value.
599 * This parameter must be a value between 0x0000 and 0xFFFF
600 * @retval HAL status
601 */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)602 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
603 {
604 /* Check the parameters */
605 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
606 assert_param(IS_LPTIM_PERIOD(Period));
607 assert_param(IS_LPTIM_PULSE(Pulse));
608
609 /* Set the LPTIM state */
610 hlptim->State = HAL_LPTIM_STATE_BUSY;
611
612 /* Reset WAVE bit to set PWM mode */
613 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
614
615 /* Enable the Peripheral */
616 __HAL_LPTIM_ENABLE(hlptim);
617
618 /* Clear flag */
619 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
620
621 /* Load the period value in the autoreload register */
622 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
623
624 /* Wait for the completion of the write operation to the LPTIM_ARR register */
625 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
626 {
627 return HAL_TIMEOUT;
628 }
629
630 /* Clear flag */
631 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
632
633 /* Load the pulse value in the compare register */
634 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
635
636 /* Wait for the completion of the write operation to the LPTIM_CMP register */
637 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
638 {
639 return HAL_TIMEOUT;
640 }
641
642 /* Disable the Peripheral */
643 __HAL_LPTIM_DISABLE(hlptim);
644
645 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
646 {
647 return HAL_TIMEOUT;
648 }
649
650 /* Enable Autoreload write complete interrupt */
651 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
652
653 /* Enable Compare write complete interrupt */
654 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
655
656 /* Enable Autoreload match interrupt */
657 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
658
659 /* Enable Compare match interrupt */
660 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
661
662 /* If external trigger source is used, then enable external trigger interrupt */
663 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
664 {
665 /* Enable external trigger interrupt */
666 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
667 }
668
669 /* Enable Rep Update Ok interrupt */
670 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
671
672 /* Enable Update Event interrupt */
673 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
674
675 /* Enable the Peripheral */
676 __HAL_LPTIM_ENABLE(hlptim);
677
678 /* Start timer in continuous mode */
679 __HAL_LPTIM_START_CONTINUOUS(hlptim);
680
681 /* Change the TIM state*/
682 hlptim->State = HAL_LPTIM_STATE_READY;
683
684 /* Return function status */
685 return HAL_OK;
686 }
687
688 /**
689 * @brief Stop the LPTIM PWM generation in interrupt mode.
690 * @param hlptim LPTIM handle
691 * @retval HAL status
692 */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)693 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
694 {
695 /* Check the parameters */
696 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
697
698 /* Set the LPTIM state */
699 hlptim->State = HAL_LPTIM_STATE_BUSY;
700
701 /* Disable the Peripheral */
702 __HAL_LPTIM_DISABLE(hlptim);
703
704 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
705 {
706 return HAL_TIMEOUT;
707 }
708
709 /* Disable Autoreload write complete interrupt */
710 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
711
712 /* Disable Compare write complete interrupt */
713 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
714
715 /* Disable Autoreload match interrupt */
716 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
717
718 /* Disable Compare match interrupt */
719 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
720
721 /* If external trigger source is used, then disable external trigger interrupt */
722 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
723 {
724 /* Disable external trigger interrupt */
725 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
726 }
727
728 /* Enable Rep Update Ok interrupt */
729 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
730
731 /* Enable Update Event interrupt */
732 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
733
734 /* Change the TIM state*/
735 hlptim->State = HAL_LPTIM_STATE_READY;
736
737 /* Return function status */
738 return HAL_OK;
739 }
740
741 /**
742 * @brief Start the LPTIM One pulse generation.
743 * @param hlptim LPTIM handle
744 * @param Period Specifies the Autoreload value.
745 * This parameter must be a value between 0x0000 and 0xFFFF.
746 * @param Pulse Specifies the compare value.
747 * This parameter must be a value between 0x0000 and 0xFFFF.
748 * @retval HAL status
749 */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)750 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
751 {
752 /* Check the parameters */
753 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
754 assert_param(IS_LPTIM_PERIOD(Period));
755 assert_param(IS_LPTIM_PULSE(Pulse));
756
757 /* Set the LPTIM state */
758 hlptim->State = HAL_LPTIM_STATE_BUSY;
759
760 /* Reset WAVE bit to set one pulse mode */
761 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
762
763 /* Enable the Peripheral */
764 __HAL_LPTIM_ENABLE(hlptim);
765
766 /* Clear flag */
767 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
768
769 /* Load the period value in the autoreload register */
770 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
771
772 /* Wait for the completion of the write operation to the LPTIM_ARR register */
773 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
774 {
775 return HAL_TIMEOUT;
776 }
777
778 /* Clear flag */
779 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
780
781 /* Load the pulse value in the compare register */
782 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
783
784 /* Wait for the completion of the write operation to the LPTIM_CMP register */
785 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
786 {
787 return HAL_TIMEOUT;
788 }
789
790 /* Start timer in single (one shot) mode */
791 __HAL_LPTIM_START_SINGLE(hlptim);
792
793 /* Change the TIM state*/
794 hlptim->State = HAL_LPTIM_STATE_READY;
795
796 /* Return function status */
797 return HAL_OK;
798 }
799
800 /**
801 * @brief Stop the LPTIM One pulse generation.
802 * @param hlptim LPTIM handle
803 * @retval HAL status
804 */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)805 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
806 {
807 /* Check the parameters */
808 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
809
810 /* Set the LPTIM state */
811 hlptim->State = HAL_LPTIM_STATE_BUSY;
812
813 /* Disable the Peripheral */
814 __HAL_LPTIM_DISABLE(hlptim);
815
816 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
817 {
818 return HAL_TIMEOUT;
819 }
820
821 /* Change the TIM state*/
822 hlptim->State = HAL_LPTIM_STATE_READY;
823
824 /* Return function status */
825 return HAL_OK;
826 }
827
828 /**
829 * @brief Start the LPTIM One pulse generation in interrupt mode.
830 * @param hlptim LPTIM handle
831 * @param Period Specifies the Autoreload value.
832 * This parameter must be a value between 0x0000 and 0xFFFF.
833 * @param Pulse Specifies the compare value.
834 * This parameter must be a value between 0x0000 and 0xFFFF.
835 * @retval HAL status
836 */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)837 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
838 {
839 /* Check the parameters */
840 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
841 assert_param(IS_LPTIM_PERIOD(Period));
842 assert_param(IS_LPTIM_PULSE(Pulse));
843
844 /* Set the LPTIM state */
845 hlptim->State = HAL_LPTIM_STATE_BUSY;
846
847 /* Reset WAVE bit to set one pulse mode */
848 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
849
850 /* Enable the Peripheral */
851 __HAL_LPTIM_ENABLE(hlptim);
852
853 /* Clear flag */
854 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
855
856 /* Load the period value in the autoreload register */
857 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
858
859 /* Wait for the completion of the write operation to the LPTIM_ARR register */
860 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
861 {
862 return HAL_TIMEOUT;
863 }
864
865 /* Clear flag */
866 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
867
868 /* Load the pulse value in the compare register */
869 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
870
871 /* Wait for the completion of the write operation to the LPTIM_CMP register */
872 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
873 {
874 return HAL_TIMEOUT;
875 }
876
877 /* Disable the Peripheral */
878 __HAL_LPTIM_DISABLE(hlptim);
879
880 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
881 {
882 return HAL_TIMEOUT;
883 }
884
885 /* Enable Autoreload write complete interrupt */
886 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
887
888 /* Enable Compare write complete interrupt */
889 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
890
891 /* Enable Autoreload match interrupt */
892 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
893
894 /* Enable Compare match interrupt */
895 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
896
897 /* If external trigger source is used, then enable external trigger interrupt */
898 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
899 {
900 /* Enable external trigger interrupt */
901 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
902 }
903
904 /* Enable Rep Update Ok interrupt */
905 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
906
907 /* Enable Update Event interrupt */
908 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
909
910 /* Enable the Peripheral */
911 __HAL_LPTIM_ENABLE(hlptim);
912
913 /* Start timer in single (one shot) mode */
914 __HAL_LPTIM_START_SINGLE(hlptim);
915
916 /* Change the TIM state*/
917 hlptim->State = HAL_LPTIM_STATE_READY;
918
919 /* Return function status */
920 return HAL_OK;
921 }
922
923 /**
924 * @brief Stop the LPTIM One pulse generation in interrupt mode.
925 * @param hlptim LPTIM handle
926 * @retval HAL status
927 */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)928 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
929 {
930 /* Check the parameters */
931 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
932
933 /* Set the LPTIM state */
934 hlptim->State = HAL_LPTIM_STATE_BUSY;
935
936 /* Disable the Peripheral */
937 __HAL_LPTIM_DISABLE(hlptim);
938
939 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
940 {
941 return HAL_TIMEOUT;
942 }
943
944 /* Disable Autoreload write complete interrupt */
945 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
946
947 /* Disable Compare write complete interrupt */
948 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
949
950 /* Disable Autoreload match interrupt */
951 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
952
953 /* Disable Compare match interrupt */
954 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
955
956 /* If external trigger source is used, then disable external trigger interrupt */
957 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
958 {
959 /* Disable external trigger interrupt */
960 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
961 }
962
963 /* Enable Rep Update Ok interrupt */
964 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
965
966 /* Enable Update Event interrupt */
967 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
968
969 /* Change the TIM state*/
970 hlptim->State = HAL_LPTIM_STATE_READY;
971
972 /* Return function status */
973 return HAL_OK;
974 }
975
976 /**
977 * @brief Start the LPTIM in Set once mode.
978 * @param hlptim LPTIM handle
979 * @param Period Specifies the Autoreload value.
980 * This parameter must be a value between 0x0000 and 0xFFFF.
981 * @param Pulse Specifies the compare value.
982 * This parameter must be a value between 0x0000 and 0xFFFF.
983 * @retval HAL status
984 */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)985 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
986 {
987 /* Check the parameters */
988 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
989 assert_param(IS_LPTIM_PERIOD(Period));
990 assert_param(IS_LPTIM_PULSE(Pulse));
991
992 /* Set the LPTIM state */
993 hlptim->State = HAL_LPTIM_STATE_BUSY;
994
995 /* Set WAVE bit to enable the set once mode */
996 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
997
998 /* Enable the Peripheral */
999 __HAL_LPTIM_ENABLE(hlptim);
1000
1001 /* Clear flag */
1002 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1003
1004 /* Load the period value in the autoreload register */
1005 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1006
1007 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1008 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1009 {
1010 return HAL_TIMEOUT;
1011 }
1012
1013 /* Clear flag */
1014 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1015
1016 /* Load the pulse value in the compare register */
1017 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1018
1019 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1020 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1021 {
1022 return HAL_TIMEOUT;
1023 }
1024
1025 /* Start timer in single (one shot) mode */
1026 __HAL_LPTIM_START_SINGLE(hlptim);
1027
1028 /* Change the TIM state*/
1029 hlptim->State = HAL_LPTIM_STATE_READY;
1030
1031 /* Return function status */
1032 return HAL_OK;
1033 }
1034
1035 /**
1036 * @brief Stop the LPTIM Set once mode.
1037 * @param hlptim LPTIM handle
1038 * @retval HAL status
1039 */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)1040 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
1041 {
1042 /* Check the parameters */
1043 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1044
1045 /* Set the LPTIM state */
1046 hlptim->State = HAL_LPTIM_STATE_BUSY;
1047
1048 /* Disable the Peripheral */
1049 __HAL_LPTIM_DISABLE(hlptim);
1050
1051 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1052 {
1053 return HAL_TIMEOUT;
1054 }
1055
1056 /* Change the TIM state*/
1057 hlptim->State = HAL_LPTIM_STATE_READY;
1058
1059 /* Return function status */
1060 return HAL_OK;
1061 }
1062
1063 /**
1064 * @brief Start the LPTIM Set once mode in interrupt mode.
1065 * @param hlptim LPTIM handle
1066 * @param Period Specifies the Autoreload value.
1067 * This parameter must be a value between 0x0000 and 0xFFFF.
1068 * @param Pulse Specifies the compare value.
1069 * This parameter must be a value between 0x0000 and 0xFFFF.
1070 * @retval HAL status
1071 */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)1072 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1073 {
1074 /* Check the parameters */
1075 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1076 assert_param(IS_LPTIM_PERIOD(Period));
1077 assert_param(IS_LPTIM_PULSE(Pulse));
1078
1079 /* Set the LPTIM state */
1080 hlptim->State = HAL_LPTIM_STATE_BUSY;
1081
1082 /* Set WAVE bit to enable the set once mode */
1083 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1084
1085 /* Enable the Peripheral */
1086 __HAL_LPTIM_ENABLE(hlptim);
1087
1088 /* Clear flag */
1089 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1090
1091 /* Load the period value in the autoreload register */
1092 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1093
1094 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1095 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1096 {
1097 return HAL_TIMEOUT;
1098 }
1099
1100 /* Clear flag */
1101 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1102
1103 /* Load the pulse value in the compare register */
1104 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1105
1106 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1107 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1108 {
1109 return HAL_TIMEOUT;
1110 }
1111
1112 /* Disable the Peripheral */
1113 __HAL_LPTIM_DISABLE(hlptim);
1114
1115 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1116 {
1117 return HAL_TIMEOUT;
1118 }
1119
1120 /* Enable Autoreload write complete interrupt */
1121 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1122
1123 /* Enable Compare write complete interrupt */
1124 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1125
1126 /* Enable Autoreload match interrupt */
1127 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1128
1129 /* Enable Compare match interrupt */
1130 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1131
1132 /* If external trigger source is used, then enable external trigger interrupt */
1133 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1134 {
1135 /* Enable external trigger interrupt */
1136 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1137 }
1138
1139 /* Enable the Peripheral */
1140 __HAL_LPTIM_ENABLE(hlptim);
1141
1142 /* Start timer in single (one shot) mode */
1143 __HAL_LPTIM_START_SINGLE(hlptim);
1144
1145 /* Change the TIM state*/
1146 hlptim->State = HAL_LPTIM_STATE_READY;
1147
1148 /* Return function status */
1149 return HAL_OK;
1150 }
1151
1152 /**
1153 * @brief Stop the LPTIM Set once mode in interrupt mode.
1154 * @param hlptim LPTIM handle
1155 * @retval HAL status
1156 */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1157 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1158 {
1159 /* Check the parameters */
1160 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1161
1162 /* Set the LPTIM state */
1163 hlptim->State = HAL_LPTIM_STATE_BUSY;
1164
1165 /* Disable the Peripheral */
1166 __HAL_LPTIM_DISABLE(hlptim);
1167
1168 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1169 {
1170 return HAL_TIMEOUT;
1171 }
1172
1173 /* Disable Autoreload write complete interrupt */
1174 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1175
1176 /* Disable Compare write complete interrupt */
1177 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1178
1179 /* Disable Autoreload match interrupt */
1180 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1181
1182 /* Disable Compare match interrupt */
1183 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1184
1185 /* If external trigger source is used, then disable external trigger interrupt */
1186 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1187 {
1188 /* Disable external trigger interrupt */
1189 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1190 }
1191
1192 /* Change the TIM state*/
1193 hlptim->State = HAL_LPTIM_STATE_READY;
1194
1195 /* Return function status */
1196 return HAL_OK;
1197 }
1198
1199 /**
1200 * @brief Start the Encoder interface.
1201 * @param hlptim LPTIM handle
1202 * @param Period Specifies the Autoreload value.
1203 * This parameter must be a value between 0x0000 and 0xFFFF.
1204 * @retval HAL status
1205 */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1206 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1207 {
1208 uint32_t tmpcfgr;
1209
1210 /* Check the parameters */
1211 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1212 assert_param(IS_LPTIM_PERIOD(Period));
1213 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1214 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1215 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1216
1217 /* Set the LPTIM state */
1218 hlptim->State = HAL_LPTIM_STATE_BUSY;
1219
1220 /* Get the LPTIMx CFGR value */
1221 tmpcfgr = hlptim->Instance->CFGR;
1222
1223 /* Clear CKPOL bits */
1224 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1225
1226 /* Set Input polarity */
1227 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1228
1229 /* Write to LPTIMx CFGR */
1230 hlptim->Instance->CFGR = tmpcfgr;
1231
1232 /* Set ENC bit to enable the encoder interface */
1233 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1234
1235 /* Enable the Peripheral */
1236 __HAL_LPTIM_ENABLE(hlptim);
1237
1238 /* Clear flag */
1239 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1240
1241 /* Load the period value in the autoreload register */
1242 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1243
1244 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1245 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1246 {
1247 return HAL_TIMEOUT;
1248 }
1249
1250 /* Start timer in continuous mode */
1251 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1252
1253 /* Change the TIM state*/
1254 hlptim->State = HAL_LPTIM_STATE_READY;
1255
1256 /* Return function status */
1257 return HAL_OK;
1258 }
1259
1260 /**
1261 * @brief Stop the Encoder interface.
1262 * @param hlptim LPTIM handle
1263 * @retval HAL status
1264 */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1265 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1266 {
1267 /* Check the parameters */
1268 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1269
1270 /* Set the LPTIM state */
1271 hlptim->State = HAL_LPTIM_STATE_BUSY;
1272
1273 /* Disable the Peripheral */
1274 __HAL_LPTIM_DISABLE(hlptim);
1275
1276 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1277 {
1278 return HAL_TIMEOUT;
1279 }
1280
1281 /* Reset ENC bit to disable the encoder interface */
1282 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1283
1284 /* Change the TIM state*/
1285 hlptim->State = HAL_LPTIM_STATE_READY;
1286
1287 /* Return function status */
1288 return HAL_OK;
1289 }
1290
1291 /**
1292 * @brief Start the Encoder interface in interrupt mode.
1293 * @param hlptim LPTIM handle
1294 * @param Period Specifies the Autoreload value.
1295 * This parameter must be a value between 0x0000 and 0xFFFF.
1296 * @retval HAL status
1297 */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1298 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1299 {
1300 uint32_t tmpcfgr;
1301
1302 /* Check the parameters */
1303 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1304 assert_param(IS_LPTIM_PERIOD(Period));
1305 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1306 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1307 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1308
1309 /* Set the LPTIM state */
1310 hlptim->State = HAL_LPTIM_STATE_BUSY;
1311
1312 /* Configure edge sensitivity for encoder mode */
1313 /* Get the LPTIMx CFGR value */
1314 tmpcfgr = hlptim->Instance->CFGR;
1315
1316 /* Clear CKPOL bits */
1317 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1318
1319 /* Set Input polarity */
1320 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1321
1322 /* Write to LPTIMx CFGR */
1323 hlptim->Instance->CFGR = tmpcfgr;
1324
1325 /* Set ENC bit to enable the encoder interface */
1326 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1327
1328 /* Enable the Peripheral */
1329 __HAL_LPTIM_ENABLE(hlptim);
1330
1331 /* Clear flag */
1332 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1333
1334 /* Load the period value in the autoreload register */
1335 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1336
1337 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1338 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1339 {
1340 return HAL_TIMEOUT;
1341 }
1342
1343 /* Disable the Peripheral */
1344 __HAL_LPTIM_DISABLE(hlptim);
1345
1346 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1347 {
1348 return HAL_TIMEOUT;
1349 }
1350
1351 /* Enable "switch to down direction" interrupt */
1352 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1353
1354 /* Enable "switch to up direction" interrupt */
1355 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1356
1357 /* Enable the Peripheral */
1358 __HAL_LPTIM_ENABLE(hlptim);
1359
1360 /* Start timer in continuous mode */
1361 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1362
1363 /* Change the TIM state*/
1364 hlptim->State = HAL_LPTIM_STATE_READY;
1365
1366 /* Return function status */
1367 return HAL_OK;
1368 }
1369
1370 /**
1371 * @brief Stop the Encoder interface in interrupt mode.
1372 * @param hlptim LPTIM handle
1373 * @retval HAL status
1374 */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1375 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1376 {
1377 /* Check the parameters */
1378 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1379
1380 /* Set the LPTIM state */
1381 hlptim->State = HAL_LPTIM_STATE_BUSY;
1382
1383 /* Disable the Peripheral */
1384 __HAL_LPTIM_DISABLE(hlptim);
1385
1386 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1387 {
1388 return HAL_TIMEOUT;
1389 }
1390
1391 /* Reset ENC bit to disable the encoder interface */
1392 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1393
1394 /* Disable "switch to down direction" interrupt */
1395 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1396
1397 /* Disable "switch to up direction" interrupt */
1398 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1399
1400 /* Change the TIM state*/
1401 hlptim->State = HAL_LPTIM_STATE_READY;
1402
1403 /* Return function status */
1404 return HAL_OK;
1405 }
1406
1407 /**
1408 * @brief Start the Timeout function.
1409 * @note The first trigger event will start the timer, any successive
1410 * trigger event will reset the counter and the timer restarts.
1411 * @param hlptim LPTIM handle
1412 * @param Period Specifies the Autoreload value.
1413 * This parameter must be a value between 0x0000 and 0xFFFF.
1414 * @param Timeout Specifies the TimeOut value to reset the counter.
1415 * This parameter must be a value between 0x0000 and 0xFFFF.
1416 * @retval HAL status
1417 */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1418 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1419 {
1420 /* Check the parameters */
1421 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1422 assert_param(IS_LPTIM_PERIOD(Period));
1423 assert_param(IS_LPTIM_PULSE(Timeout));
1424
1425 /* Set the LPTIM state */
1426 hlptim->State = HAL_LPTIM_STATE_BUSY;
1427
1428 /* Set TIMOUT bit to enable the timeout function */
1429 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1430
1431 /* Enable the Peripheral */
1432 __HAL_LPTIM_ENABLE(hlptim);
1433
1434 /* Clear flag */
1435 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1436
1437 /* Load the period value in the autoreload register */
1438 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1439
1440 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1441 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1442 {
1443 return HAL_TIMEOUT;
1444 }
1445
1446 /* Clear flag */
1447 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1448
1449 /* Load the Timeout value in the compare register */
1450 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1451
1452 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1453 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1454 {
1455 return HAL_TIMEOUT;
1456 }
1457
1458 /* Start timer in continuous mode */
1459 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1460
1461 /* Change the TIM state*/
1462 hlptim->State = HAL_LPTIM_STATE_READY;
1463
1464 /* Return function status */
1465 return HAL_OK;
1466 }
1467
1468 /**
1469 * @brief Stop the Timeout function.
1470 * @param hlptim LPTIM handle
1471 * @retval HAL status
1472 */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1473 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1474 {
1475 /* Check the parameters */
1476 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1477
1478 /* Set the LPTIM state */
1479 hlptim->State = HAL_LPTIM_STATE_BUSY;
1480
1481 /* Disable the Peripheral */
1482 __HAL_LPTIM_DISABLE(hlptim);
1483
1484 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1485 {
1486 return HAL_TIMEOUT;
1487 }
1488
1489 /* Reset TIMOUT bit to enable the timeout function */
1490 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1491
1492 /* Change the TIM state*/
1493 hlptim->State = HAL_LPTIM_STATE_READY;
1494
1495 /* Return function status */
1496 return HAL_OK;
1497 }
1498
1499 /**
1500 * @brief Start the Timeout function in interrupt mode.
1501 * @note The first trigger event will start the timer, any successive
1502 * trigger event will reset the counter and the timer restarts.
1503 * @param hlptim LPTIM handle
1504 * @param Period Specifies the Autoreload value.
1505 * This parameter must be a value between 0x0000 and 0xFFFF.
1506 * @param Timeout Specifies the TimeOut value to reset the counter.
1507 * This parameter must be a value between 0x0000 and 0xFFFF.
1508 * @retval HAL status
1509 */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1510 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1511 {
1512 /* Check the parameters */
1513 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1514 assert_param(IS_LPTIM_PERIOD(Period));
1515 assert_param(IS_LPTIM_PULSE(Timeout));
1516
1517 /* Set the LPTIM state */
1518 hlptim->State = HAL_LPTIM_STATE_BUSY;
1519
1520 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1521 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1522
1523 /* Set TIMOUT bit to enable the timeout function */
1524 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1525
1526 /* Enable the Peripheral */
1527 __HAL_LPTIM_ENABLE(hlptim);
1528
1529 /* Clear flag */
1530 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1531
1532 /* Load the period value in the autoreload register */
1533 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1534
1535 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1536 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1537 {
1538 return HAL_TIMEOUT;
1539 }
1540
1541 /* Clear flag */
1542 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1543
1544 /* Load the Timeout value in the compare register */
1545 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1546
1547 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1548 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1549 {
1550 return HAL_TIMEOUT;
1551 }
1552
1553 /* Disable the Peripheral */
1554 __HAL_LPTIM_DISABLE(hlptim);
1555
1556 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1557 {
1558 return HAL_TIMEOUT;
1559 }
1560
1561 /* Enable Compare match interrupt */
1562 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1563
1564 /* Enable the Peripheral */
1565 __HAL_LPTIM_ENABLE(hlptim);
1566
1567 /* Start timer in continuous mode */
1568 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1569
1570 /* Change the TIM state*/
1571 hlptim->State = HAL_LPTIM_STATE_READY;
1572
1573 /* Return function status */
1574 return HAL_OK;
1575 }
1576
1577 /**
1578 * @brief Stop the Timeout function in interrupt mode.
1579 * @param hlptim LPTIM handle
1580 * @retval HAL status
1581 */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1582 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1583 {
1584 /* Check the parameters */
1585 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1586
1587 /* Set the LPTIM state */
1588 hlptim->State = HAL_LPTIM_STATE_BUSY;
1589
1590 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1591 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1592
1593 /* Disable the Peripheral */
1594 __HAL_LPTIM_DISABLE(hlptim);
1595
1596 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1597 {
1598 return HAL_TIMEOUT;
1599 }
1600
1601 /* Reset TIMOUT bit to enable the timeout function */
1602 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1603
1604 /* Disable Compare match interrupt */
1605 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1606
1607 /* Change the TIM state*/
1608 hlptim->State = HAL_LPTIM_STATE_READY;
1609
1610 /* Return function status */
1611 return HAL_OK;
1612 }
1613
1614 /**
1615 * @brief Start the Counter mode.
1616 * @param hlptim LPTIM handle
1617 * @param Period Specifies the Autoreload value.
1618 * This parameter must be a value between 0x0000 and 0xFFFF.
1619 * @retval HAL status
1620 */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1621 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1622 {
1623 /* Check the parameters */
1624 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1625 assert_param(IS_LPTIM_PERIOD(Period));
1626
1627 /* Set the LPTIM state */
1628 hlptim->State = HAL_LPTIM_STATE_BUSY;
1629
1630 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1631 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1632 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1633 {
1634 /* Check if clock is prescaled */
1635 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1636 /* Set clock prescaler to 0 */
1637 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1638 }
1639
1640 /* Enable the Peripheral */
1641 __HAL_LPTIM_ENABLE(hlptim);
1642
1643 /* Clear flag */
1644 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1645
1646 /* Load the period value in the autoreload register */
1647 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1648
1649 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1650 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1651 {
1652 return HAL_TIMEOUT;
1653 }
1654
1655 /* Start timer in continuous mode */
1656 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1657
1658 /* Change the TIM state*/
1659 hlptim->State = HAL_LPTIM_STATE_READY;
1660
1661 /* Return function status */
1662 return HAL_OK;
1663 }
1664
1665 /**
1666 * @brief Stop the Counter mode.
1667 * @param hlptim LPTIM handle
1668 * @retval HAL status
1669 */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1670 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1671 {
1672 /* Check the parameters */
1673 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1674
1675 /* Set the LPTIM state */
1676 hlptim->State = HAL_LPTIM_STATE_BUSY;
1677
1678 /* Disable the Peripheral */
1679 __HAL_LPTIM_DISABLE(hlptim);
1680
1681 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1682 {
1683 return HAL_TIMEOUT;
1684 }
1685
1686 /* Change the TIM state*/
1687 hlptim->State = HAL_LPTIM_STATE_READY;
1688
1689 /* Return function status */
1690 return HAL_OK;
1691 }
1692
1693 /**
1694 * @brief Start the Counter mode in interrupt mode.
1695 * @param hlptim LPTIM handle
1696 * @param Period Specifies the Autoreload value.
1697 * This parameter must be a value between 0x0000 and 0xFFFF.
1698 * @retval HAL status
1699 */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1700 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1701 {
1702 /* Check the parameters */
1703 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1704 assert_param(IS_LPTIM_PERIOD(Period));
1705
1706 /* Set the LPTIM state */
1707 hlptim->State = HAL_LPTIM_STATE_BUSY;
1708
1709 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1710 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1711
1712 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1713 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1714 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1715 {
1716 /* Check if clock is prescaled */
1717 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1718 /* Set clock prescaler to 0 */
1719 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1720 }
1721
1722 /* Enable the Peripheral */
1723 __HAL_LPTIM_ENABLE(hlptim);
1724
1725 /* Clear flag */
1726 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1727
1728 /* Load the period value in the autoreload register */
1729 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1730
1731 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1732 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1733 {
1734 return HAL_TIMEOUT;
1735 }
1736
1737 /* Disable the Peripheral */
1738 __HAL_LPTIM_DISABLE(hlptim);
1739
1740 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1741 {
1742 return HAL_TIMEOUT;
1743 }
1744
1745 /* Enable Autoreload write complete interrupt */
1746 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1747
1748 /* Enable Autoreload match interrupt */
1749 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1750
1751 /* Enable Rep Update Ok interrupt */
1752 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
1753
1754 /* Enable Update Event interrupt */
1755 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
1756
1757 /* Enable the Peripheral */
1758 __HAL_LPTIM_ENABLE(hlptim);
1759
1760 /* Start timer in continuous mode */
1761 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1762
1763 /* Change the TIM state*/
1764 hlptim->State = HAL_LPTIM_STATE_READY;
1765
1766 /* Return function status */
1767 return HAL_OK;
1768 }
1769
1770 /**
1771 * @brief Stop the Counter mode in interrupt mode.
1772 * @param hlptim LPTIM handle
1773 * @retval HAL status
1774 */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1775 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1776 {
1777 /* Check the parameters */
1778 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1779
1780 /* Set the LPTIM state */
1781 hlptim->State = HAL_LPTIM_STATE_BUSY;
1782
1783 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1784 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1785
1786 /* Disable the Peripheral */
1787 __HAL_LPTIM_DISABLE(hlptim);
1788
1789 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1790 {
1791 return HAL_TIMEOUT;
1792 }
1793
1794 /* Disable Autoreload write complete interrupt */
1795 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1796
1797 /* Disable Autoreload match interrupt */
1798 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1799
1800 /* Disable Rep Update Ok interrupt */
1801 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
1802
1803 /* Disable Update Event interrupt */
1804 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
1805 /* Change the TIM state*/
1806 hlptim->State = HAL_LPTIM_STATE_READY;
1807
1808 /* Return function status */
1809 return HAL_OK;
1810 }
1811
1812 /**
1813 * @}
1814 */
1815
1816 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1817 * @brief Read operation functions.
1818 *
1819 @verbatim
1820 ==============================================================================
1821 ##### LPTIM Read operation functions #####
1822 ==============================================================================
1823 [..] This section provides LPTIM Reading functions.
1824 (+) Read the counter value.
1825 (+) Read the period (Auto-reload) value.
1826 (+) Read the pulse (Compare)value.
1827 @endverbatim
1828 * @{
1829 */
1830
1831 /**
1832 * @brief Return the current counter value.
1833 * @param hlptim LPTIM handle
1834 * @retval Counter value.
1835 */
HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef * hlptim)1836 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
1837 {
1838 /* Check the parameters */
1839 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1840
1841 return (hlptim->Instance->CNT);
1842 }
1843
1844 /**
1845 * @brief Return the current Autoreload (Period) value.
1846 * @param hlptim LPTIM handle
1847 * @retval Autoreload value.
1848 */
HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef * hlptim)1849 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
1850 {
1851 /* Check the parameters */
1852 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1853
1854 return (hlptim->Instance->ARR);
1855 }
1856
1857 /**
1858 * @brief Return the current Compare (Pulse) value.
1859 * @param hlptim LPTIM handle
1860 * @retval Compare value.
1861 */
HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef * hlptim)1862 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
1863 {
1864 /* Check the parameters */
1865 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1866
1867 return (hlptim->Instance->CMP);
1868 }
1869
1870 /**
1871 * @}
1872 */
1873
1874 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1875 * @brief LPTIM IRQ handler.
1876 *
1877 @verbatim
1878 ==============================================================================
1879 ##### LPTIM IRQ handler and callbacks #####
1880 ==============================================================================
1881 [..] This section provides LPTIM IRQ handler and callback functions called within
1882 the IRQ handler:
1883 (+) LPTIM interrupt request handler
1884 (+) Compare match Callback
1885 (+) Auto-reload match Callback
1886 (+) External trigger event detection Callback
1887 (+) Compare register write complete Callback
1888 (+) Auto-reload register write complete Callback
1889 (+) Up-counting direction change Callback
1890 (+) Down-counting direction change Callback
1891
1892 @endverbatim
1893 * @{
1894 */
1895
1896 /**
1897 * @brief Handle LPTIM interrupt request.
1898 * @param hlptim LPTIM handle
1899 * @retval None
1900 */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1901 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1902 {
1903 /* Compare match interrupt */
1904 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1905 {
1906 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1907 {
1908 /* Clear Compare match flag */
1909 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1910
1911 /* Compare match Callback */
1912 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1913 hlptim->CompareMatchCallback(hlptim);
1914 #else
1915 HAL_LPTIM_CompareMatchCallback(hlptim);
1916 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1917 }
1918 }
1919
1920 /* Autoreload match interrupt */
1921 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1922 {
1923 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1924 {
1925 /* Clear Autoreload match flag */
1926 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1927
1928 /* Autoreload match Callback */
1929 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1930 hlptim->AutoReloadMatchCallback(hlptim);
1931 #else
1932 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1933 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1934 }
1935 }
1936
1937 /* Trigger detected interrupt */
1938 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1939 {
1940 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1941 {
1942 /* Clear Trigger detected flag */
1943 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1944
1945 /* Trigger detected callback */
1946 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1947 hlptim->TriggerCallback(hlptim);
1948 #else
1949 HAL_LPTIM_TriggerCallback(hlptim);
1950 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1951 }
1952 }
1953
1954 /* Compare write interrupt */
1955 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1956 {
1957 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1958 {
1959 /* Clear Compare write flag */
1960 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1961
1962 /* Compare write Callback */
1963 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1964 hlptim->CompareWriteCallback(hlptim);
1965 #else
1966 HAL_LPTIM_CompareWriteCallback(hlptim);
1967 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1968 }
1969 }
1970
1971 /* Autoreload write interrupt */
1972 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1973 {
1974 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1975 {
1976 /* Clear Autoreload write flag */
1977 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1978
1979 /* Autoreload write Callback */
1980 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1981 hlptim->AutoReloadWriteCallback(hlptim);
1982 #else
1983 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1984 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1985 }
1986 }
1987
1988 /* Direction counter changed from Down to Up interrupt */
1989 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1990 {
1991 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1992 {
1993 /* Clear Direction counter changed from Down to Up flag */
1994 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1995
1996 /* Direction counter changed from Down to Up Callback */
1997 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1998 hlptim->DirectionUpCallback(hlptim);
1999 #else
2000 HAL_LPTIM_DirectionUpCallback(hlptim);
2001 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2002 }
2003 }
2004
2005 /* Direction counter changed from Up to Down interrupt */
2006 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
2007 {
2008 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
2009 {
2010 /* Clear Direction counter changed from Up to Down flag */
2011 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
2012
2013 /* Direction counter changed from Up to Down Callback */
2014 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2015 hlptim->DirectionDownCallback(hlptim);
2016 #else
2017 HAL_LPTIM_DirectionDownCallback(hlptim);
2018 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2019 }
2020 }
2021
2022 /* Repetition counter underflowed (or contains zero) and the LPTIM counter
2023 overflowed */
2024 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UPDATE) != RESET)
2025 {
2026 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UPDATE) != RESET)
2027 {
2028 /* Clear update event flag */
2029 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UPDATE);
2030
2031 /* Update event Callback */
2032 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2033 hlptim->UpdateEventCallback(hlptim);
2034 #else
2035 HAL_LPTIM_UpdateEventCallback(hlptim);
2036 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2037 }
2038 }
2039
2040 /* Successful APB bus write to repetition counter register */
2041 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_REPOK) != RESET)
2042 {
2043 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_REPOK) != RESET)
2044 {
2045 /* Clear successful APB bus write to repetition counter flag */
2046 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
2047
2048 /* Successful APB bus write to repetition counter Callback */
2049 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2050 hlptim->RepCounterWriteCallback(hlptim);
2051 #else
2052 HAL_LPTIM_RepCounterWriteCallback(hlptim);
2053 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2054 }
2055 }
2056 }
2057
2058 /**
2059 * @brief Compare match callback in non-blocking mode.
2060 * @param hlptim LPTIM handle
2061 * @retval None
2062 */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)2063 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
2064 {
2065 /* Prevent unused argument(s) compilation warning */
2066 UNUSED(hlptim);
2067
2068 /* NOTE : This function should not be modified, when the callback is needed,
2069 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
2070 */
2071 }
2072
2073 /**
2074 * @brief Autoreload match callback in non-blocking mode.
2075 * @param hlptim LPTIM handle
2076 * @retval None
2077 */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)2078 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
2079 {
2080 /* Prevent unused argument(s) compilation warning */
2081 UNUSED(hlptim);
2082
2083 /* NOTE : This function should not be modified, when the callback is needed,
2084 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
2085 */
2086 }
2087
2088 /**
2089 * @brief Trigger detected callback in non-blocking mode.
2090 * @param hlptim LPTIM handle
2091 * @retval None
2092 */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)2093 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
2094 {
2095 /* Prevent unused argument(s) compilation warning */
2096 UNUSED(hlptim);
2097
2098 /* NOTE : This function should not be modified, when the callback is needed,
2099 the HAL_LPTIM_TriggerCallback could be implemented in the user file
2100 */
2101 }
2102
2103 /**
2104 * @brief Compare write callback in non-blocking mode.
2105 * @param hlptim LPTIM handle
2106 * @retval None
2107 */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)2108 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
2109 {
2110 /* Prevent unused argument(s) compilation warning */
2111 UNUSED(hlptim);
2112
2113 /* NOTE : This function should not be modified, when the callback is needed,
2114 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
2115 */
2116 }
2117
2118 /**
2119 * @brief Autoreload write callback in non-blocking mode.
2120 * @param hlptim LPTIM handle
2121 * @retval None
2122 */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)2123 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2124 {
2125 /* Prevent unused argument(s) compilation warning */
2126 UNUSED(hlptim);
2127
2128 /* NOTE : This function should not be modified, when the callback is needed,
2129 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2130 */
2131 }
2132
2133 /**
2134 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2135 * @param hlptim LPTIM handle
2136 * @retval None
2137 */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2138 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2139 {
2140 /* Prevent unused argument(s) compilation warning */
2141 UNUSED(hlptim);
2142
2143 /* NOTE : This function should not be modified, when the callback is needed,
2144 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2145 */
2146 }
2147
2148 /**
2149 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2150 * @param hlptim LPTIM handle
2151 * @retval None
2152 */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2153 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2154 {
2155 /* Prevent unused argument(s) compilation warning */
2156 UNUSED(hlptim);
2157
2158 /* NOTE : This function should not be modified, when the callback is needed,
2159 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2160 */
2161 }
2162
2163 /**
2164 * @brief Repetition counter underflowed (or contains zero) and LPTIM counter overflowed callback in non-blocking mode.
2165 * @param hlptim LPTIM handle
2166 * @retval None
2167 */
HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef * hlptim)2168 __weak void HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef *hlptim)
2169 {
2170 /* Prevent unused argument(s) compilation warning */
2171 UNUSED(hlptim);
2172
2173 /* NOTE : This function should not be modified, when the callback is needed,
2174 the HAL_LPTIM_UpdateEventCallback could be implemented in the user file
2175 */
2176 }
2177
2178 /**
2179 * @brief Successful APB bus write to repetition counter register callback in non-blocking mode.
2180 * @param hlptim LPTIM handle
2181 * @retval None
2182 */
HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef * hlptim)2183 __weak void HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef *hlptim)
2184 {
2185 /* Prevent unused argument(s) compilation warning */
2186 UNUSED(hlptim);
2187
2188 /* NOTE : This function should not be modified, when the callback is needed,
2189 the HAL_LPTIM_RepCounterWriteCallback could be implemented in the user file
2190 */
2191 }
2192
2193 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2194 /**
2195 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2196 * @param hlptim LPTIM handle
2197 * @param CallbackID ID of the callback to be registered
2198 * This parameter can be one of the following values:
2199 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2200 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2201 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2202 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2203 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2204 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2205 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2206 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2207 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2208 * @arg @ref HAL_LPTIM_UPDATE_EVENT_CB_ID Update event detection Callback ID
2209 * @arg @ref HAL_LPTIM_REP_COUNTER_WRITE_CB_ID Repetition counter register write complete Callback ID
2210 * @param pCallback pointer to the callback function
2211 * @retval status
2212 */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2213 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2214 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2215 pLPTIM_CallbackTypeDef pCallback)
2216 {
2217 HAL_StatusTypeDef status = HAL_OK;
2218
2219 if (pCallback == NULL)
2220 {
2221 return HAL_ERROR;
2222 }
2223
2224 /* Process locked */
2225 __HAL_LOCK(hlptim);
2226
2227 if (hlptim->State == HAL_LPTIM_STATE_READY)
2228 {
2229 switch (CallbackID)
2230 {
2231 case HAL_LPTIM_MSPINIT_CB_ID :
2232 hlptim->MspInitCallback = pCallback;
2233 break;
2234
2235 case HAL_LPTIM_MSPDEINIT_CB_ID :
2236 hlptim->MspDeInitCallback = pCallback;
2237 break;
2238
2239 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2240 hlptim->CompareMatchCallback = pCallback;
2241 break;
2242
2243 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2244 hlptim->AutoReloadMatchCallback = pCallback;
2245 break;
2246
2247 case HAL_LPTIM_TRIGGER_CB_ID :
2248 hlptim->TriggerCallback = pCallback;
2249 break;
2250
2251 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2252 hlptim->CompareWriteCallback = pCallback;
2253 break;
2254
2255 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2256 hlptim->AutoReloadWriteCallback = pCallback;
2257 break;
2258
2259 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2260 hlptim->DirectionUpCallback = pCallback;
2261 break;
2262
2263 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2264 hlptim->DirectionDownCallback = pCallback;
2265 break;
2266
2267 case HAL_LPTIM_UPDATE_EVENT_CB_ID :
2268 hlptim->UpdateEventCallback = pCallback;
2269 break;
2270
2271 case HAL_LPTIM_REP_COUNTER_WRITE_CB_ID :
2272 hlptim->RepCounterWriteCallback = pCallback;
2273 break;
2274
2275 default :
2276 /* Return error status */
2277 status = HAL_ERROR;
2278 break;
2279 }
2280 }
2281 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2282 {
2283 switch (CallbackID)
2284 {
2285 case HAL_LPTIM_MSPINIT_CB_ID :
2286 hlptim->MspInitCallback = pCallback;
2287 break;
2288
2289 case HAL_LPTIM_MSPDEINIT_CB_ID :
2290 hlptim->MspDeInitCallback = pCallback;
2291 break;
2292
2293 default :
2294 /* Return error status */
2295 status = HAL_ERROR;
2296 break;
2297 }
2298 }
2299 else
2300 {
2301 /* Return error status */
2302 status = HAL_ERROR;
2303 }
2304
2305 /* Release Lock */
2306 __HAL_UNLOCK(hlptim);
2307
2308 return status;
2309 }
2310
2311 /**
2312 * @brief Unregister a LPTIM callback
2313 * LLPTIM callback is redirected to the weak predefined callback
2314 * @param hlptim LPTIM handle
2315 * @param CallbackID ID of the callback to be unregistered
2316 * This parameter can be one of the following values:
2317 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2318 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2319 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2320 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2321 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2322 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2323 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2324 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2325 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2326 * @arg @ref HAL_LPTIM_UPDATE_EVENT_CB_ID Update event detection Callback ID
2327 * @arg @ref HAL_LPTIM_REP_COUNTER_WRITE_CB_ID Repetition counter register write complete Callback ID
2328 * @retval status
2329 */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2330 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2331 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2332 {
2333 HAL_StatusTypeDef status = HAL_OK;
2334
2335 /* Process locked */
2336 __HAL_LOCK(hlptim);
2337
2338 if (hlptim->State == HAL_LPTIM_STATE_READY)
2339 {
2340 switch (CallbackID)
2341 {
2342 case HAL_LPTIM_MSPINIT_CB_ID :
2343 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2344 break;
2345
2346 case HAL_LPTIM_MSPDEINIT_CB_ID :
2347 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2348 break;
2349
2350 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2351 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Legacy weak Compare match Callback */
2352 break;
2353
2354 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2355 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Legacy weak Auto-reload match Callback */
2356 break;
2357
2358 case HAL_LPTIM_TRIGGER_CB_ID :
2359 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* Legacy weak External trigger event detection Callback */
2360 break;
2361
2362 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2363 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Legacy weak Compare register write complete Callback */
2364 break;
2365
2366 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2367 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Legacy weak Auto-reload register write complete Callback */
2368 break;
2369
2370 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2371 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Legacy weak Up-counting direction change Callback */
2372 break;
2373
2374 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2375 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Legacy weak Down-counting direction change Callback */
2376 break;
2377
2378 case HAL_LPTIM_UPDATE_EVENT_CB_ID :
2379 hlptim->UpdateEventCallback = HAL_LPTIM_UpdateEventCallback; /* Legacy weak Update event detection Callback */
2380 break;
2381
2382 case HAL_LPTIM_REP_COUNTER_WRITE_CB_ID :
2383 hlptim->RepCounterWriteCallback = HAL_LPTIM_RepCounterWriteCallback; /* Legacy weak Repetition counter register write complete Callback */
2384 break;
2385
2386 default :
2387 /* Return error status */
2388 status = HAL_ERROR;
2389 break;
2390 }
2391 }
2392 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2393 {
2394 switch (CallbackID)
2395 {
2396 case HAL_LPTIM_MSPINIT_CB_ID :
2397 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2398 break;
2399
2400 case HAL_LPTIM_MSPDEINIT_CB_ID :
2401 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2402 break;
2403
2404 default :
2405 /* Return error status */
2406 status = HAL_ERROR;
2407 break;
2408 }
2409 }
2410 else
2411 {
2412 /* Return error status */
2413 status = HAL_ERROR;
2414 }
2415
2416 /* Release Lock */
2417 __HAL_UNLOCK(hlptim);
2418
2419 return status;
2420 }
2421 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2422
2423 /**
2424 * @}
2425 */
2426
2427 /** @defgroup LPTIM_Group5 Peripheral State functions
2428 * @brief Peripheral State functions.
2429 *
2430 @verbatim
2431 ==============================================================================
2432 ##### Peripheral State functions #####
2433 ==============================================================================
2434 [..]
2435 This subsection permits to get in run-time the status of the peripheral.
2436
2437 @endverbatim
2438 * @{
2439 */
2440
2441 /**
2442 * @brief Return the LPTIM handle state.
2443 * @param hlptim LPTIM handle
2444 * @retval HAL state
2445 */
HAL_LPTIM_GetState(LPTIM_HandleTypeDef * hlptim)2446 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2447 {
2448 /* Return LPTIM handle state */
2449 return hlptim->State;
2450 }
2451
2452 /**
2453 * @}
2454 */
2455
2456
2457 /**
2458 * @}
2459 */
2460
2461 /* Private functions ---------------------------------------------------------*/
2462
2463 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2464 * @{
2465 */
2466 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2467 /**
2468 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2469 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2470 * the configuration information for LPTIM module.
2471 * @retval None
2472 */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2473 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2474 {
2475 /* Reset the LPTIM callback to the legacy weak callbacks */
2476 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Compare match Callback */
2477 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Auto-reload match Callback */
2478 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* External trigger event detection Callback */
2479 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Compare register write complete Callback */
2480 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Auto-reload register write complete Callback */
2481 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Up-counting direction change Callback */
2482 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Down-counting direction change Callback */
2483 lptim->UpdateEventCallback = HAL_LPTIM_UpdateEventCallback; /* Update event detection Callback */
2484 lptim->RepCounterWriteCallback = HAL_LPTIM_RepCounterWriteCallback; /* Repetition counter register write complete Callback */
2485 }
2486 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2487
2488 /**
2489 * @brief LPTimer Wait for flag set
2490 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2491 * the configuration information for LPTIM module.
2492 * @param flag The lptim flag
2493 * @retval HAL status
2494 */
LPTIM_WaitForFlag(LPTIM_HandleTypeDef * hlptim,uint32_t flag)2495 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2496 {
2497 HAL_StatusTypeDef result = HAL_OK;
2498 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2499 do
2500 {
2501 count--;
2502 if (count == 0UL)
2503 {
2504 result = HAL_TIMEOUT;
2505 }
2506 } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2507
2508 return result;
2509 }
2510
2511 /**
2512 * @brief Disable LPTIM HW instance.
2513 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2514 * the configuration information for LPTIM module.
2515 * @note The following sequence is required to solve LPTIM disable HW limitation.
2516 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2517 * stuck in LPTIM interrupt when entering Stop mode" section.
2518 * @retval None
2519 */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2520 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2521 {
2522 uint32_t tmpclksource = 0;
2523 uint32_t tmpIER;
2524 uint32_t tmpCFGR;
2525 uint32_t tmpCMP;
2526 uint32_t tmpARR;
2527 uint32_t tmpOR;
2528 uint32_t tmpRCR;
2529
2530 __disable_irq();
2531
2532 /*********** Save LPTIM Config ***********/
2533 /* Save LPTIM source clock */
2534 switch ((uint32_t)hlptim->Instance)
2535 {
2536 case LPTIM1_BASE:
2537 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2538 break;
2539 case LPTIM2_BASE:
2540 tmpclksource = __HAL_RCC_GET_LPTIM2_SOURCE();
2541 break;
2542 case LPTIM3_BASE:
2543 tmpclksource = __HAL_RCC_GET_LPTIM3_SOURCE();
2544 break;
2545 default:
2546 break;
2547 }
2548
2549 /* Save LPTIM configuration registers */
2550 tmpIER = hlptim->Instance->IER;
2551 tmpCFGR = hlptim->Instance->CFGR;
2552 tmpCMP = hlptim->Instance->CMP;
2553 tmpARR = hlptim->Instance->ARR;
2554 tmpOR = hlptim->Instance->OR;
2555 tmpRCR = hlptim->Instance->RCR;
2556
2557 /*********** Reset LPTIM ***********/
2558 switch ((uint32_t)hlptim->Instance)
2559 {
2560 case LPTIM1_BASE:
2561 __HAL_RCC_LPTIM1_FORCE_RESET();
2562 __HAL_RCC_LPTIM1_RELEASE_RESET();
2563 break;
2564 case LPTIM2_BASE:
2565 __HAL_RCC_LPTIM2_FORCE_RESET();
2566 __HAL_RCC_LPTIM2_RELEASE_RESET();
2567 break;
2568 case LPTIM3_BASE:
2569 __HAL_RCC_LPTIM3_FORCE_RESET();
2570 __HAL_RCC_LPTIM3_RELEASE_RESET();
2571 break;
2572 default:
2573 break;
2574 }
2575
2576 /*********** Restore LPTIM Config ***********/
2577 if ((tmpCMP != 0UL) || (tmpARR != 0UL) || (tmpRCR != 0UL))
2578 {
2579 /* Force LPTIM source kernel clock from APB */
2580 switch ((uint32_t)hlptim->Instance)
2581 {
2582 case LPTIM1_BASE:
2583 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2584 break;
2585 case LPTIM2_BASE:
2586 __HAL_RCC_LPTIM2_CONFIG(RCC_LPTIM2CLKSOURCE_PCLK1);
2587 break;
2588 case LPTIM3_BASE:
2589 __HAL_RCC_LPTIM3_CONFIG(RCC_LPTIM3CLKSOURCE_PCLK1);
2590 break;
2591 default:
2592 break;
2593 }
2594
2595 if (tmpCMP != 0UL)
2596 {
2597 /* Restore CMP register (LPTIM should be enabled first) */
2598 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2599 hlptim->Instance->CMP = tmpCMP;
2600
2601 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2602 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2603 {
2604 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2605 }
2606 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2607 }
2608
2609 if (tmpARR != 0UL)
2610 {
2611 /* Restore ARR register (LPTIM should be enabled first) */
2612 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2613 hlptim->Instance->ARR = tmpARR;
2614
2615 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2616 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2617 {
2618 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2619 }
2620
2621 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2622 }
2623
2624 if (tmpRCR != 0UL)
2625 {
2626 /* Restore RCR register (LPTIM should be enabled first) */
2627 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2628 hlptim->Instance->RCR = tmpRCR;
2629
2630 /* Wait for the completion of the write operation to the LPTIM_RCR register */
2631 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_REPOK) == HAL_TIMEOUT)
2632 {
2633 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2634 }
2635 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
2636 }
2637
2638 /* Restore LPTIM source kernel clock */
2639 switch ((uint32_t)hlptim->Instance)
2640 {
2641 case LPTIM1_BASE:
2642 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2643 break;
2644 case LPTIM2_BASE:
2645 __HAL_RCC_LPTIM2_CONFIG(tmpclksource);
2646 break;
2647 case LPTIM3_BASE:
2648 __HAL_RCC_LPTIM3_CONFIG(tmpclksource);
2649 break;
2650 default:
2651 break;
2652 }
2653 }
2654
2655 /* Restore configuration registers (LPTIM should be disabled first) */
2656 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2657 hlptim->Instance->IER = tmpIER;
2658 hlptim->Instance->CFGR = tmpCFGR;
2659 hlptim->Instance->OR = tmpOR;
2660
2661 __enable_irq();
2662 }
2663 /**
2664 * @}
2665 */
2666 #endif /* LPTIM1 || LPTIM2 || LPTIM3 */
2667
2668 #endif /* HAL_LPTIM_MODULE_ENABLED */
2669 /**
2670 * @}
2671 */
2672
2673 /**
2674 * @}
2675 */
2676
2677 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
2678
