1 /**
2 ******************************************************************************
3 * @file stm32l5xx_hal_dac.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 * + Peripheral State and Errors functions
12 *
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2019 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### DAC Peripheral features #####
28 ==============================================================================
29 [..]
30 *** DAC Channels ***
31 ====================
32 [..]
33 STM32L5 devices integrate two 12-bit Digital Analog Converters
34
35 The 2 converters (i.e. channel1 & channel2)
36 can be used independently or simultaneously (dual mode):
37 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
38 peripherals (ex. timers).
39 (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip
40 peripherals (ex. timers).
41
42 *** DAC Triggers ***
43 ====================
44 [..]
45 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
46 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
47 [..]
48 Digital to Analog conversion can be triggered by:
49 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
50 The used pin (GPIOx_PIN_9) must be configured in input mode.
51
52 (#) Timers TRGO: TIM1, TIM2, TIM3, TIM4, TIM6, TIM7, TIM8 and TIM15
53 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...)
54
55 (#) Software using DAC_TRIGGER_SOFTWARE
56
57 *** DAC Buffer mode feature ***
58 ===============================
59 [..]
60 Each DAC channel integrates an output buffer that can be used to
61 reduce the output impedance, and to drive external loads directly
62 without having to add an external operational amplifier.
63 To enable, the output buffer use
64 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
65 [..]
66 (@) Refer to the device datasheet for more details about output
67 impedance value with and without output buffer.
68
69 *** GPIO configurations guidelines ***
70 =====================
71 [..]
72 When a DAC channel is used (ex channel1 on PA4) and the other is not
73 (ex channel2 on PA5 is configured in Analog and disabled).
74 Channel1 may disturb channel2 as coupling effect.
75 Note that there is no coupling on channel2 as soon as channel2 is turned on.
76 Coupling on adjacent channel could be avoided as follows:
77 when unused PA5 is configured as INPUT PULL-UP or DOWN.
78 PA5 is configured in ANALOG just before it is turned on.
79
80 *** DAC Sample and Hold feature ***
81 ========================
82 [..]
83 For each converter, 2 modes are supported: normal mode and
84 "sample and hold" mode (i.e. low power mode).
85 In the sample and hold mode, the DAC core converts data, then holds the
86 converted voltage on a capacitor. When not converting, the DAC cores and
87 buffer are completely turned off between samples and the DAC output is
88 tri-stated, therefore reducing the overall power consumption. A new
89 stabilization period is needed before each new conversion.
90
91 The sample and hold allow setting internal or external voltage @
92 low power consumption cost (output value can be at any given rate either
93 by CPU or DMA).
94
95 The Sample and hold block and registers uses either LSI & run in
96 several power modes: run mode, sleep mode, low power run, low power sleep
97 mode & stop1 mode.
98
99 Low power stop1 mode allows only static conversion.
100
101 To enable Sample and Hold mode
102 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
103 RCC_LSI_ON parameters.
104
105 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
106 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
107 DAC_HoldTime & DAC_RefreshTime;
108
109 *** DAC calibration feature ***
110 ===================================
111 [..]
112 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
113 (++) Calibration aims at correcting some offset of output buffer.
114 (++) The DAC uses either factory calibration settings OR user defined
115 calibration (trimming) settings (i.e. trimming mode).
116 (++) The user defined settings can be figured out using self calibration
117 handled by HAL_DACEx_SelfCalibrate.
118 (++) HAL_DACEx_SelfCalibrate:
119 (+++) Runs automatically the calibration.
120 (+++) Enables the user trimming mode
121 (+++) Updates a structure with trimming values with fresh calibration
122 results.
123 The user may store the calibration results for larger
124 (ex monitoring the trimming as a function of temperature
125 for instance)
126
127 *** DAC wave generation feature ***
128 ===================================
129 [..]
130 Both DAC channels can be used to generate
131 (#) Noise wave
132 (#) Triangle wave
133
134 *** DAC data format ***
135 =======================
136 [..]
137 The DAC data format can be:
138 (#) 8-bit right alignment using DAC_ALIGN_8B_R
139 (#) 12-bit left alignment using DAC_ALIGN_12B_L
140 (#) 12-bit right alignment using DAC_ALIGN_12B_R
141
142 *** DAC data value to voltage correspondence ***
143 ================================================
144 [..]
145 The analog output voltage on each DAC channel pin is determined
146 by the following equation:
147 [..]
148 DAC_OUTx = VREF+ * DOR / 4095
149 (+) with DOR is the Data Output Register
150 [..]
151 VREF+ is the input voltage reference (refer to the device datasheet)
152 [..]
153 e.g. To set DAC_OUT1 to 0.7V, use
154 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
155
156 *** DMA requests ***
157 =====================
158 [..]
159 A DMA request can be generated when an external trigger (but not a software trigger)
160 occurs if DMA requests are enabled using HAL_DAC_Start_DMA().
161 DMA requests are mapped as following:
162 (#) DAC channel1 mapped on DMA1/DMA2 request 7 (can be any DMA channel)
163 (#) DAC channel2 mapped on DMA1/DMA2 request 8 (can be any DMA channel)
164
165 *** High frequency interface mode ***
166 =====================================
167 [..]
168 The high frequency interface informs DAC instance about the bus frequency in use.
169 It is mandatory information for DAC (as internal timing of DAC is bus frequency dependent)
170 provided thanks to parameter DAC_HighFrequency handled in HAL_DAC_ConfigChannel () function.
171 Use of DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC value of DAC_HighFrequency is recommended
172 function figured out the correct setting.
173 The high frequency mode is same for all converters of a same DAC instance. Either same
174 parameter DAC_HighFrequency is used for all DAC converters or again self
175 DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC detection parameter.
176
177 [..]
178 (@) For Dual mode and specific signal (Triangle and noise) generation please
179 refer to Extended Features Driver description
180
181 ##### How to use this driver #####
182 ==============================================================================
183 [..]
184 (+) DAC APB clock must be enabled to get write access to DAC
185 registers using HAL_DAC_Init()
186 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
187 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
188 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
189
190 *** Calibration mode IO operation ***
191 ======================================
192 [..]
193 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
194 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
195 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
196
197 *** Polling mode IO operation ***
198 =================================
199 [..]
200 (+) Start the DAC peripheral using HAL_DAC_Start()
201 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
202 (+) Stop the DAC peripheral using HAL_DAC_Stop()
203
204 *** DMA mode IO operation ***
205 ==============================
206 [..]
207 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
208 of data to be transferred at each end of conversion
209 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue().
210 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
211 function is executed and user can add his own code by customization of function pointer
212 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
213 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
214 function is executed and user can add his own code by customization of function pointer
215 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
216 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
217 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
218 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
219 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
220 function is executed and user can add his own code by customization of function pointer
221 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
222 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
223 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
224
225 *** Callback registration ***
226 =============================================
227 [..]
228 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
229 allows the user to configure dynamically the driver callbacks.
230
231 Use Functions HAL_DAC_RegisterCallback() to register a user callback,
232 it allows to register following callbacks:
233 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
234 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
235 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
236 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
237 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
238 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
239 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
240 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
241 (+) MspInitCallback : DAC MspInit.
242 (+) MspDeInitCallback : DAC MspdeInit.
243 This function takes as parameters the HAL peripheral handle, the Callback ID
244 and a pointer to the user callback function.
245
246 Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default
247 weak (overridden) function. It allows to reset following callbacks:
248 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
249 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
250 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
251 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
252 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
253 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
254 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
255 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
256 (+) MspInitCallback : DAC MspInit.
257 (+) MspDeInitCallback : DAC MspdeInit.
258 (+) All Callbacks
259 This function) takes as parameters the HAL peripheral handle and the Callback ID.
260
261 By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
262 all callbacks are reset to the corresponding legacy weak (overridden) functions.
263 Exception done for MspInit and MspDeInit callbacks that are respectively
264 reset to the legacy weak (overridden) functions in the HAL_DAC_Init
265 and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
266 If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit
267 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
268
269 Callbacks can be registered/unregistered in READY state only.
270 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
271 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
272 during the Init/DeInit.
273 In that case first register the MspInit/MspDeInit user callbacks
274 using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit
275 or HAL_DAC_Init function.
276
277 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
278 not defined, the callback registering feature is not available
279 and weak (overridden) callbacks are used.
280
281 *** DAC HAL driver macros list ***
282 =============================================
283 [..]
284 Below the list of most used macros in DAC HAL driver.
285
286 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
287 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
288 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
289 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
290
291 [..]
292 (@) You can refer to the DAC HAL driver header file for more useful macros
293
294 @endverbatim
295 ******************************************************************************
296 */
297
298 /* Includes ------------------------------------------------------------------*/
299 #include "stm32l5xx_hal.h"
300
301 /** @addtogroup STM32L5xx_HAL_Driver
302 * @{
303 */
304
305 #ifdef HAL_DAC_MODULE_ENABLED
306 #if defined(DAC1)
307
308 /** @defgroup DAC DAC
309 * @brief DAC driver modules
310 * @{
311 */
312
313 /* Private typedef -----------------------------------------------------------*/
314 /* Private define ------------------------------------------------------------*/
315 /* Private constants ---------------------------------------------------------*/
316 /** @addtogroup DAC_Private_Constants DAC Private Constants
317 * @{
318 */
319 #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */
320 #define HFSEL_ENABLE_THRESHOLD_80MHZ 80000000U /* 80 MHz */
321
322 /**
323 * @}
324 */
325
326 /* Private macro -------------------------------------------------------------*/
327 /* Private variables ---------------------------------------------------------*/
328 /* Private function prototypes -----------------------------------------------*/
329 /* Exported functions -------------------------------------------------------*/
330
331 /** @defgroup DAC_Exported_Functions DAC Exported Functions
332 * @{
333 */
334
335 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
336 * @brief Initialization and Configuration functions
337 *
338 @verbatim
339 ==============================================================================
340 ##### Initialization and de-initialization functions #####
341 ==============================================================================
342 [..] This section provides functions allowing to:
343 (+) Initialize and configure the DAC.
344 (+) De-initialize the DAC.
345
346 @endverbatim
347 * @{
348 */
349
350 /**
351 * @brief Initialize the DAC peripheral according to the specified parameters
352 * in the DAC_InitStruct and initialize the associated handle.
353 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
354 * the configuration information for the specified DAC.
355 * @retval HAL status
356 */
HAL_DAC_Init(DAC_HandleTypeDef * hdac)357 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
358 {
359 /* Check the DAC peripheral handle */
360 if (hdac == NULL)
361 {
362 return HAL_ERROR;
363 }
364 /* Check the parameters */
365 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
366
367 if (hdac->State == HAL_DAC_STATE_RESET)
368 {
369 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
370 /* Init the DAC Callback settings */
371 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
372 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
373 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
374 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
375
376 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
377 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
378 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
379 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
380
381 if (hdac->MspInitCallback == NULL)
382 {
383 hdac->MspInitCallback = HAL_DAC_MspInit;
384 }
385 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
386
387 /* Allocate lock resource and initialize it */
388 hdac->Lock = HAL_UNLOCKED;
389
390 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
391 /* Init the low level hardware */
392 hdac->MspInitCallback(hdac);
393 #else
394 /* Init the low level hardware */
395 HAL_DAC_MspInit(hdac);
396 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
397 }
398
399 /* Initialize the DAC state*/
400 hdac->State = HAL_DAC_STATE_BUSY;
401
402 /* Set DAC error code to none */
403 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
404
405 /* Initialize the DAC state*/
406 hdac->State = HAL_DAC_STATE_READY;
407
408 /* Return function status */
409 return HAL_OK;
410 }
411
412 /**
413 * @brief Deinitialize the DAC peripheral registers to their default reset values.
414 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
415 * the configuration information for the specified DAC.
416 * @retval HAL status
417 */
HAL_DAC_DeInit(DAC_HandleTypeDef * hdac)418 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
419 {
420 /* Check the DAC peripheral handle */
421 if (hdac == NULL)
422 {
423 return HAL_ERROR;
424 }
425
426 /* Check the parameters */
427 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
428
429 /* Change DAC state */
430 hdac->State = HAL_DAC_STATE_BUSY;
431
432 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
433 if (hdac->MspDeInitCallback == NULL)
434 {
435 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
436 }
437 /* DeInit the low level hardware */
438 hdac->MspDeInitCallback(hdac);
439 #else
440 /* DeInit the low level hardware */
441 HAL_DAC_MspDeInit(hdac);
442 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
443
444 /* Set DAC error code to none */
445 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
446
447 /* Change DAC state */
448 hdac->State = HAL_DAC_STATE_RESET;
449
450 /* Release Lock */
451 __HAL_UNLOCK(hdac);
452
453 /* Return function status */
454 return HAL_OK;
455 }
456
457 /**
458 * @brief Initialize the DAC MSP.
459 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
460 * the configuration information for the specified DAC.
461 * @retval None
462 */
HAL_DAC_MspInit(DAC_HandleTypeDef * hdac)463 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
464 {
465 /* Prevent unused argument(s) compilation warning */
466 UNUSED(hdac);
467
468 /* NOTE : This function should not be modified, when the callback is needed,
469 the HAL_DAC_MspInit could be implemented in the user file
470 */
471 }
472
473 /**
474 * @brief DeInitialize the DAC MSP.
475 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
476 * the configuration information for the specified DAC.
477 * @retval None
478 */
HAL_DAC_MspDeInit(DAC_HandleTypeDef * hdac)479 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
480 {
481 /* Prevent unused argument(s) compilation warning */
482 UNUSED(hdac);
483
484 /* NOTE : This function should not be modified, when the callback is needed,
485 the HAL_DAC_MspDeInit could be implemented in the user file
486 */
487 }
488
489 /**
490 * @}
491 */
492
493 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
494 * @brief IO operation functions
495 *
496 @verbatim
497 ==============================================================================
498 ##### IO operation functions #####
499 ==============================================================================
500 [..] This section provides functions allowing to:
501 (+) Start conversion.
502 (+) Stop conversion.
503 (+) Start conversion and enable DMA transfer.
504 (+) Stop conversion and disable DMA transfer.
505 (+) Get result of conversion.
506
507 @endverbatim
508 * @{
509 */
510
511 /**
512 * @brief Enables DAC and starts conversion of channel.
513 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
514 * the configuration information for the specified DAC.
515 * @param Channel The selected DAC channel.
516 * This parameter can be one of the following values:
517 * @arg DAC_CHANNEL_1: DAC Channel1 selected
518 * @arg DAC_CHANNEL_2: DAC Channel2 selected
519 * @retval HAL status
520 */
HAL_DAC_Start(DAC_HandleTypeDef * hdac,uint32_t Channel)521 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
522 {
523 /* Check the DAC peripheral handle */
524 if (hdac == NULL)
525 {
526 return HAL_ERROR;
527 }
528
529 /* Check the parameters */
530 assert_param(IS_DAC_CHANNEL(Channel));
531
532 /* Process locked */
533 __HAL_LOCK(hdac);
534
535 /* Change DAC state */
536 hdac->State = HAL_DAC_STATE_BUSY;
537
538 /* Enable the Peripheral */
539 __HAL_DAC_ENABLE(hdac, Channel);
540
541 if (Channel == DAC_CHANNEL_1)
542 {
543 /* Check if software trigger enabled */
544 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
545 {
546 /* Enable the selected DAC software conversion */
547 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
548 }
549 }
550
551 else
552 {
553 /* Check if software trigger enabled */
554 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL)))
555 {
556 /* Enable the selected DAC software conversion*/
557 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
558 }
559 }
560
561
562 /* Change DAC state */
563 hdac->State = HAL_DAC_STATE_READY;
564
565 /* Process unlocked */
566 __HAL_UNLOCK(hdac);
567
568 /* Return function status */
569 return HAL_OK;
570 }
571
572 /**
573 * @brief Disables DAC and stop conversion of channel.
574 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
575 * the configuration information for the specified DAC.
576 * @param Channel The selected DAC channel.
577 * This parameter can be one of the following values:
578 * @arg DAC_CHANNEL_1: DAC Channel1 selected
579 * @arg DAC_CHANNEL_2: DAC Channel2 selected
580 * @retval HAL status
581 */
HAL_DAC_Stop(DAC_HandleTypeDef * hdac,uint32_t Channel)582 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
583 {
584 /* Check the DAC peripheral handle */
585 if (hdac == NULL)
586 {
587 return HAL_ERROR;
588 }
589
590 /* Check the parameters */
591 assert_param(IS_DAC_CHANNEL(Channel));
592
593 /* Disable the Peripheral */
594 __HAL_DAC_DISABLE(hdac, Channel);
595
596 /* Change DAC state */
597 hdac->State = HAL_DAC_STATE_READY;
598
599 /* Return function status */
600 return HAL_OK;
601 }
602
603 /**
604 * @brief Enables DAC and starts conversion of channel.
605 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
606 * the configuration information for the specified DAC.
607 * @param Channel The selected DAC channel.
608 * This parameter can be one of the following values:
609 * @arg DAC_CHANNEL_1: DAC Channel1 selected
610 * @arg DAC_CHANNEL_2: DAC Channel2 selected
611 * @param pData The source Buffer address.
612 * @param Length The length of data to be transferred from memory to DAC peripheral
613 * @param Alignment Specifies the data alignment for DAC channel.
614 * This parameter can be one of the following values:
615 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
616 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
617 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
618 * @retval HAL status
619 */
HAL_DAC_Start_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,const uint32_t * pData,uint32_t Length,uint32_t Alignment)620 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length,
621 uint32_t Alignment)
622 {
623 HAL_StatusTypeDef status;
624 uint32_t tmpreg;
625
626 /* Check the DAC peripheral handle */
627 if (hdac == NULL)
628 {
629 return HAL_ERROR;
630 }
631
632 /* Check the parameters */
633 assert_param(IS_DAC_CHANNEL(Channel));
634 assert_param(IS_DAC_ALIGN(Alignment));
635
636 /* Process locked */
637 __HAL_LOCK(hdac);
638
639 /* Change DAC state */
640 hdac->State = HAL_DAC_STATE_BUSY;
641
642 if (Channel == DAC_CHANNEL_1)
643 {
644 /* Set the DMA transfer complete callback for channel1 */
645 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
646
647 /* Set the DMA half transfer complete callback for channel1 */
648 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
649
650 /* Set the DMA error callback for channel1 */
651 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
652
653 /* Enable the selected DAC channel1 DMA request */
654 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
655
656 /* Case of use of channel 1 */
657 switch (Alignment)
658 {
659 case DAC_ALIGN_12B_R:
660 /* Get DHR12R1 address */
661 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
662 break;
663 case DAC_ALIGN_12B_L:
664 /* Get DHR12L1 address */
665 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
666 break;
667 default: /* case DAC_ALIGN_8B_R */
668 /* Get DHR8R1 address */
669 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
670 break;
671 }
672 }
673
674 else
675 {
676 /* Set the DMA transfer complete callback for channel2 */
677 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
678
679 /* Set the DMA half transfer complete callback for channel2 */
680 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
681
682 /* Set the DMA error callback for channel2 */
683 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
684
685 /* Enable the selected DAC channel2 DMA request */
686 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
687
688 /* Case of use of channel 2 */
689 switch (Alignment)
690 {
691 case DAC_ALIGN_12B_R:
692 /* Get DHR12R2 address */
693 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
694 break;
695 case DAC_ALIGN_12B_L:
696 /* Get DHR12L2 address */
697 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
698 break;
699 default: /* case DAC_ALIGN_8B_R */
700 /* Get DHR8R2 address */
701 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
702 break;
703 }
704 }
705
706 if (Channel == DAC_CHANNEL_1)
707 {
708 /* Enable the DAC DMA underrun interrupt */
709 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
710
711 /* Enable the DMA channel */
712 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
713 }
714
715 else
716 {
717 /* Enable the DAC DMA underrun interrupt */
718 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
719
720 /* Enable the DMA channel */
721 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
722 }
723
724
725 /* Process Unlocked */
726 __HAL_UNLOCK(hdac);
727
728 if (status == HAL_OK)
729 {
730 /* Enable the Peripheral */
731 __HAL_DAC_ENABLE(hdac, Channel);
732 }
733 else
734 {
735 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
736 }
737
738 /* Return function status */
739 return status;
740 }
741
742 /**
743 * @brief Disables DAC and stop conversion of channel.
744 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
745 * the configuration information for the specified DAC.
746 * @param Channel The selected DAC channel.
747 * This parameter can be one of the following values:
748 * @arg DAC_CHANNEL_1: DAC Channel1 selected
749 * @arg DAC_CHANNEL_2: DAC Channel2 selected
750 * @retval HAL status
751 */
HAL_DAC_Stop_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel)752 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
753 {
754 /* Check the DAC peripheral handle */
755 if (hdac == NULL)
756 {
757 return HAL_ERROR;
758 }
759
760 /* Check the parameters */
761 assert_param(IS_DAC_CHANNEL(Channel));
762
763 /* Disable the selected DAC channel DMA request */
764 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL));
765
766 /* Disable the Peripheral */
767 __HAL_DAC_DISABLE(hdac, Channel);
768
769 /* Disable the DMA channel */
770
771 /* Channel1 is used */
772 if (Channel == DAC_CHANNEL_1)
773 {
774 /* Disable the DMA channel */
775 (void)HAL_DMA_Abort(hdac->DMA_Handle1);
776
777 /* Disable the DAC DMA underrun interrupt */
778 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
779 }
780
781 else /* Channel2 is used for */
782 {
783 /* Disable the DMA channel */
784 (void)HAL_DMA_Abort(hdac->DMA_Handle2);
785
786 /* Disable the DAC DMA underrun interrupt */
787 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
788 }
789
790
791 /* Change DAC state */
792 hdac->State = HAL_DAC_STATE_READY;
793
794 /* Return function status */
795 return HAL_OK;
796 }
797
798 /**
799 * @brief Handles DAC interrupt request
800 * This function uses the interruption of DMA
801 * underrun.
802 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
803 * the configuration information for the specified DAC.
804 * @retval None
805 */
HAL_DAC_IRQHandler(DAC_HandleTypeDef * hdac)806 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
807 {
808 uint32_t itsource = hdac->Instance->CR;
809 uint32_t itflag = hdac->Instance->SR;
810
811 if ((itsource & DAC_IT_DMAUDR1) == DAC_IT_DMAUDR1)
812 {
813 /* Check underrun flag of DAC channel 1 */
814 if ((itflag & DAC_FLAG_DMAUDR1) == DAC_FLAG_DMAUDR1)
815 {
816 /* Change DAC state to error state */
817 hdac->State = HAL_DAC_STATE_ERROR;
818
819 /* Set DAC error code to channel1 DMA underrun error */
820 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
821
822 /* Clear the underrun flag */
823 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
824
825 /* Disable the selected DAC channel1 DMA request */
826 __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN1);
827
828 /* Error callback */
829 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
830 hdac->DMAUnderrunCallbackCh1(hdac);
831 #else
832 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
833 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
834 }
835 }
836
837
838 if ((itsource & DAC_IT_DMAUDR2) == DAC_IT_DMAUDR2)
839 {
840 /* Check underrun flag of DAC channel 2 */
841 if ((itflag & DAC_FLAG_DMAUDR2) == DAC_FLAG_DMAUDR2)
842 {
843 /* Change DAC state to error state */
844 hdac->State = HAL_DAC_STATE_ERROR;
845
846 /* Set DAC error code to channel2 DMA underrun error */
847 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
848
849 /* Clear the underrun flag */
850 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
851
852 /* Disable the selected DAC channel2 DMA request */
853 __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN2);
854
855 /* Error callback */
856 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
857 hdac->DMAUnderrunCallbackCh2(hdac);
858 #else
859 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
860 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
861 }
862 }
863
864 }
865
866 /**
867 * @brief Set the specified data holding register value for DAC channel.
868 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
869 * the configuration information for the specified DAC.
870 * @param Channel The selected DAC channel.
871 * This parameter can be one of the following values:
872 * @arg DAC_CHANNEL_1: DAC Channel1 selected
873 * @arg DAC_CHANNEL_2: DAC Channel2 selected
874 * @param Alignment Specifies the data alignment.
875 * This parameter can be one of the following values:
876 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
877 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
878 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
879 * @param Data Data to be loaded in the selected data holding register.
880 * @retval HAL status
881 */
HAL_DAC_SetValue(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Alignment,uint32_t Data)882 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
883 {
884 __IO uint32_t tmp = 0UL;
885
886 /* Check the DAC peripheral handle */
887 if (hdac == NULL)
888 {
889 return HAL_ERROR;
890 }
891
892 /* Check the parameters */
893 assert_param(IS_DAC_CHANNEL(Channel));
894 assert_param(IS_DAC_ALIGN(Alignment));
895 assert_param(IS_DAC_DATA(Data));
896
897 tmp = (uint32_t)hdac->Instance;
898 if (Channel == DAC_CHANNEL_1)
899 {
900 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
901 }
902
903 else
904 {
905 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
906 }
907
908
909 /* Set the DAC channel selected data holding register */
910 *(__IO uint32_t *) tmp = Data;
911
912 /* Return function status */
913 return HAL_OK;
914 }
915
916 /**
917 * @brief Conversion complete callback in non-blocking mode for Channel1
918 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
919 * the configuration information for the specified DAC.
920 * @retval None
921 */
HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef * hdac)922 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
923 {
924 /* Prevent unused argument(s) compilation warning */
925 UNUSED(hdac);
926
927 /* NOTE : This function should not be modified, when the callback is needed,
928 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
929 */
930 }
931
932 /**
933 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
934 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
935 * the configuration information for the specified DAC.
936 * @retval None
937 */
HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef * hdac)938 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
939 {
940 /* Prevent unused argument(s) compilation warning */
941 UNUSED(hdac);
942
943 /* NOTE : This function should not be modified, when the callback is needed,
944 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
945 */
946 }
947
948 /**
949 * @brief Error DAC callback for Channel1.
950 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
951 * the configuration information for the specified DAC.
952 * @retval None
953 */
HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef * hdac)954 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
955 {
956 /* Prevent unused argument(s) compilation warning */
957 UNUSED(hdac);
958
959 /* NOTE : This function should not be modified, when the callback is needed,
960 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
961 */
962 }
963
964 /**
965 * @brief DMA underrun DAC callback for channel1.
966 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
967 * the configuration information for the specified DAC.
968 * @retval None
969 */
HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef * hdac)970 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
971 {
972 /* Prevent unused argument(s) compilation warning */
973 UNUSED(hdac);
974
975 /* NOTE : This function should not be modified, when the callback is needed,
976 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
977 */
978 }
979
980 /**
981 * @}
982 */
983
984 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
985 * @brief Peripheral Control functions
986 *
987 @verbatim
988 ==============================================================================
989 ##### Peripheral Control functions #####
990 ==============================================================================
991 [..] This section provides functions allowing to:
992 (+) Configure channels.
993 (+) Set the specified data holding register value for DAC channel.
994
995 @endverbatim
996 * @{
997 */
998
999 /**
1000 * @brief Returns the last data output value of the selected DAC channel.
1001 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1002 * the configuration information for the specified DAC.
1003 * @param Channel The selected DAC channel.
1004 * This parameter can be one of the following values:
1005 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1006 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1007 * @retval The selected DAC channel data output value.
1008 */
HAL_DAC_GetValue(const DAC_HandleTypeDef * hdac,uint32_t Channel)1009 uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel)
1010 {
1011 uint32_t result;
1012
1013 /* Check the DAC peripheral handle */
1014 assert_param(hdac != NULL);
1015
1016 /* Check the parameters */
1017 assert_param(IS_DAC_CHANNEL(Channel));
1018
1019 if (Channel == DAC_CHANNEL_1)
1020 {
1021 result = hdac->Instance->DOR1;
1022 }
1023
1024 else
1025 {
1026 result = hdac->Instance->DOR2;
1027 }
1028
1029 /* Returns the DAC channel data output register value */
1030 return result;
1031 }
1032
1033 /**
1034 * @brief Configures the selected DAC channel.
1035 * @note By calling this function, the high frequency interface mode (HFSEL bits)
1036 * will be set. This parameter scope is the DAC instance. As the function
1037 * is called for each channel, the @ref DAC_HighFrequency of @arg sConfig
1038 * must be the same at each call.
1039 * (or DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC self detect).
1040 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1041 * the configuration information for the specified DAC.
1042 * @param sConfig DAC configuration structure.
1043 * @param Channel The selected DAC channel.
1044 * This parameter can be one of the following values:
1045 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1046 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1047 * @retval HAL status
1048 */
HAL_DAC_ConfigChannel(DAC_HandleTypeDef * hdac,const DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)1049 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac,
1050 const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
1051 {
1052 HAL_StatusTypeDef status = HAL_OK;
1053 uint32_t tmpreg1;
1054 uint32_t tmpreg2;
1055 uint32_t tickstart;
1056 uint32_t pclk1freq;
1057
1058 /* Check the DAC peripheral handle and channel configuration struct */
1059 if ((hdac == NULL) || (sConfig == NULL))
1060 {
1061 return HAL_ERROR;
1062 }
1063
1064 /* Check the DAC parameters */
1065 assert_param(IS_DAC_HIGH_FREQUENCY_MODE(sConfig->DAC_HighFrequency));
1066 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
1067 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
1068 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
1069 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
1070 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
1071 {
1072 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
1073 }
1074 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
1075 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
1076 {
1077 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
1078 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
1079 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
1080 }
1081 assert_param(IS_DAC_CHANNEL(Channel));
1082
1083 /* Process locked */
1084 __HAL_LOCK(hdac);
1085
1086 /* Change DAC state */
1087 hdac->State = HAL_DAC_STATE_BUSY;
1088
1089 /* Sample and hold configuration */
1090 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
1091 {
1092 /* Get timeout */
1093 tickstart = HAL_GetTick();
1094
1095 if (Channel == DAC_CHANNEL_1)
1096 {
1097 /* SHSR1 can be written when BWST1 is cleared */
1098 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1099 {
1100 /* Check for the Timeout */
1101 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1102 {
1103 /* New check to avoid false timeout detection in case of preemption */
1104 if (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1105 {
1106 /* Update error code */
1107 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1108
1109 /* Change the DMA state */
1110 hdac->State = HAL_DAC_STATE_TIMEOUT;
1111
1112 return HAL_TIMEOUT;
1113 }
1114 }
1115 }
1116 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1117 }
1118
1119 else /* Channel 2 */
1120 {
1121 /* SHSR2 can be written when BWST2 is cleared */
1122 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1123 {
1124 /* Check for the Timeout */
1125 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1126 {
1127 /* New check to avoid false timeout detection in case of preemption */
1128 if (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1129 {
1130 /* Update error code */
1131 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1132
1133 /* Change the DMA state */
1134 hdac->State = HAL_DAC_STATE_TIMEOUT;
1135
1136 return HAL_TIMEOUT;
1137 }
1138 }
1139 }
1140 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1141 }
1142
1143
1144 /* HoldTime */
1145 MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL),
1146 (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
1147 /* RefreshTime */
1148 MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL),
1149 (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
1150 }
1151
1152 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
1153 /* USER TRIMMING */
1154 {
1155 /* Get the DAC CCR value */
1156 tmpreg1 = hdac->Instance->CCR;
1157 /* Clear trimming value */
1158 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
1159 /* Configure for the selected trimming offset */
1160 tmpreg2 = sConfig->DAC_TrimmingValue;
1161 /* Calculate CCR register value depending on DAC_Channel */
1162 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1163 /* Write to DAC CCR */
1164 hdac->Instance->CCR = tmpreg1;
1165 }
1166 /* else factory trimming is used (factory setting are available at reset)*/
1167 /* SW Nothing has nothing to do */
1168
1169 /* Get the DAC MCR value */
1170 tmpreg1 = hdac->Instance->MCR;
1171 /* Clear DAC_MCR_MODEx bits */
1172 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
1173 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
1174 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral);
1175 /* Calculate MCR register value depending on DAC_Channel */
1176 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1177 /* Write to DAC MCR */
1178 hdac->Instance->MCR = tmpreg1;
1179
1180 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
1181 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
1182
1183 /* Get the DAC CR value */
1184 tmpreg1 = hdac->Instance->CR;
1185 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
1186 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
1187 /* Configure for the selected DAC channel: trigger */
1188 /* Set TSELx and TENx bits according to DAC_Trigger value */
1189 tmpreg2 = sConfig->DAC_Trigger;
1190 /* Calculate CR register value depending on DAC_Channel */
1191 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1192 if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ == sConfig->DAC_HighFrequency)
1193 {
1194 tmpreg1 |= DAC_CR_HFSEL;
1195 }
1196 else
1197 {
1198 if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE == sConfig->DAC_HighFrequency)
1199 {
1200 tmpreg1 &= ~(DAC_CR_HFSEL);
1201 }
1202 else /* Automatic selection */
1203 {
1204 pclk1freq = HAL_RCC_GetPCLK1Freq();
1205 if (pclk1freq > HFSEL_ENABLE_THRESHOLD_80MHZ)
1206 {
1207 /* High frequency enable when PCLK frequency higher than 80 */
1208 tmpreg1 |= DAC_CR_HFSEL;
1209 }
1210 else
1211 {
1212 /* High frequency disable when PCLK frequency higher than 80 */
1213 tmpreg1 &= ~(DAC_CR_HFSEL);
1214 }
1215 }
1216 }
1217 /* Write to DAC CR */
1218 hdac->Instance->CR = tmpreg1;
1219 /* Disable wave generation */
1220 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL)));
1221
1222 /* Change DAC state */
1223 hdac->State = HAL_DAC_STATE_READY;
1224
1225 /* Process unlocked */
1226 __HAL_UNLOCK(hdac);
1227
1228 /* Return function status */
1229 return status;
1230 }
1231
1232 /**
1233 * @}
1234 */
1235
1236 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
1237 * @brief Peripheral State and Errors functions
1238 *
1239 @verbatim
1240 ==============================================================================
1241 ##### Peripheral State and Errors functions #####
1242 ==============================================================================
1243 [..]
1244 This subsection provides functions allowing to
1245 (+) Check the DAC state.
1246 (+) Check the DAC Errors.
1247
1248 @endverbatim
1249 * @{
1250 */
1251
1252 /**
1253 * @brief return the DAC handle state
1254 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1255 * the configuration information for the specified DAC.
1256 * @retval HAL state
1257 */
HAL_DAC_GetState(const DAC_HandleTypeDef * hdac)1258 HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac)
1259 {
1260 /* Return DAC handle state */
1261 return hdac->State;
1262 }
1263
1264
1265 /**
1266 * @brief Return the DAC error code
1267 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1268 * the configuration information for the specified DAC.
1269 * @retval DAC Error Code
1270 */
HAL_DAC_GetError(const DAC_HandleTypeDef * hdac)1271 uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac)
1272 {
1273 return hdac->ErrorCode;
1274 }
1275
1276 /**
1277 * @}
1278 */
1279
1280 /**
1281 * @}
1282 */
1283
1284 /** @addtogroup DAC_Exported_Functions
1285 * @{
1286 */
1287
1288 /** @addtogroup DAC_Exported_Functions_Group1
1289 * @{
1290 */
1291 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1292 /**
1293 * @brief Register a User DAC Callback
1294 * To be used instead of the weak (overridden) predefined callback
1295 * @note The HAL_DAC_RegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to register
1296 * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID
1297 * @param hdac DAC handle
1298 * @param CallbackID ID of the callback to be registered
1299 * This parameter can be one of the following values:
1300 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID
1301 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID
1302 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1303 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1304 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1305 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1306 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1307 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1308 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1309 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1310 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1311 *
1312 * @param pCallback pointer to the Callback function
1313 * @retval status
1314 */
HAL_DAC_RegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID,pDAC_CallbackTypeDef pCallback)1315 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
1316 pDAC_CallbackTypeDef pCallback)
1317 {
1318 HAL_StatusTypeDef status = HAL_OK;
1319
1320 /* Check the DAC peripheral handle */
1321 if (hdac == NULL)
1322 {
1323 return HAL_ERROR;
1324 }
1325
1326 if (pCallback == NULL)
1327 {
1328 /* Update the error code */
1329 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1330 return HAL_ERROR;
1331 }
1332
1333 if (hdac->State == HAL_DAC_STATE_READY)
1334 {
1335 switch (CallbackID)
1336 {
1337 case HAL_DAC_CH1_COMPLETE_CB_ID :
1338 hdac->ConvCpltCallbackCh1 = pCallback;
1339 break;
1340 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1341 hdac->ConvHalfCpltCallbackCh1 = pCallback;
1342 break;
1343 case HAL_DAC_CH1_ERROR_ID :
1344 hdac->ErrorCallbackCh1 = pCallback;
1345 break;
1346 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1347 hdac->DMAUnderrunCallbackCh1 = pCallback;
1348 break;
1349
1350 case HAL_DAC_CH2_COMPLETE_CB_ID :
1351 hdac->ConvCpltCallbackCh2 = pCallback;
1352 break;
1353 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1354 hdac->ConvHalfCpltCallbackCh2 = pCallback;
1355 break;
1356 case HAL_DAC_CH2_ERROR_ID :
1357 hdac->ErrorCallbackCh2 = pCallback;
1358 break;
1359 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1360 hdac->DMAUnderrunCallbackCh2 = pCallback;
1361 break;
1362
1363 case HAL_DAC_MSPINIT_CB_ID :
1364 hdac->MspInitCallback = pCallback;
1365 break;
1366 case HAL_DAC_MSPDEINIT_CB_ID :
1367 hdac->MspDeInitCallback = pCallback;
1368 break;
1369 default :
1370 /* Update the error code */
1371 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1372 /* update return status */
1373 status = HAL_ERROR;
1374 break;
1375 }
1376 }
1377 else if (hdac->State == HAL_DAC_STATE_RESET)
1378 {
1379 switch (CallbackID)
1380 {
1381 case HAL_DAC_MSPINIT_CB_ID :
1382 hdac->MspInitCallback = pCallback;
1383 break;
1384 case HAL_DAC_MSPDEINIT_CB_ID :
1385 hdac->MspDeInitCallback = pCallback;
1386 break;
1387 default :
1388 /* Update the error code */
1389 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1390 /* update return status */
1391 status = HAL_ERROR;
1392 break;
1393 }
1394 }
1395 else
1396 {
1397 /* Update the error code */
1398 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1399 /* update return status */
1400 status = HAL_ERROR;
1401 }
1402
1403 return status;
1404 }
1405
1406 /**
1407 * @brief Unregister a User DAC Callback
1408 * DAC Callback is redirected to the weak (overridden) predefined callback
1409 * @note The HAL_DAC_UnRegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to un-register
1410 * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID
1411 * @param hdac DAC handle
1412 * @param CallbackID ID of the callback to be unregistered
1413 * This parameter can be one of the following values:
1414 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID
1415 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1416 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1417 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1418 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1419 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1420 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1421 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1422 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1423 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1424 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks
1425 * @retval status
1426 */
HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID)1427 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID)
1428 {
1429 HAL_StatusTypeDef status = HAL_OK;
1430
1431 /* Check the DAC peripheral handle */
1432 if (hdac == NULL)
1433 {
1434 return HAL_ERROR;
1435 }
1436
1437 if (hdac->State == HAL_DAC_STATE_READY)
1438 {
1439 switch (CallbackID)
1440 {
1441 case HAL_DAC_CH1_COMPLETE_CB_ID :
1442 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1443 break;
1444 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1445 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1446 break;
1447 case HAL_DAC_CH1_ERROR_ID :
1448 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1449 break;
1450 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1451 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1452 break;
1453
1454 case HAL_DAC_CH2_COMPLETE_CB_ID :
1455 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1456 break;
1457 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1458 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1459 break;
1460 case HAL_DAC_CH2_ERROR_ID :
1461 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1462 break;
1463 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1464 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1465 break;
1466
1467 case HAL_DAC_MSPINIT_CB_ID :
1468 hdac->MspInitCallback = HAL_DAC_MspInit;
1469 break;
1470 case HAL_DAC_MSPDEINIT_CB_ID :
1471 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1472 break;
1473 case HAL_DAC_ALL_CB_ID :
1474 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1475 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1476 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1477 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1478
1479 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1480 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1481 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1482 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1483
1484 hdac->MspInitCallback = HAL_DAC_MspInit;
1485 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1486 break;
1487 default :
1488 /* Update the error code */
1489 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1490 /* update return status */
1491 status = HAL_ERROR;
1492 break;
1493 }
1494 }
1495 else if (hdac->State == HAL_DAC_STATE_RESET)
1496 {
1497 switch (CallbackID)
1498 {
1499 case HAL_DAC_MSPINIT_CB_ID :
1500 hdac->MspInitCallback = HAL_DAC_MspInit;
1501 break;
1502 case HAL_DAC_MSPDEINIT_CB_ID :
1503 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1504 break;
1505 default :
1506 /* Update the error code */
1507 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1508 /* update return status */
1509 status = HAL_ERROR;
1510 break;
1511 }
1512 }
1513 else
1514 {
1515 /* Update the error code */
1516 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1517 /* update return status */
1518 status = HAL_ERROR;
1519 }
1520
1521 return status;
1522 }
1523 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1524
1525 /**
1526 * @}
1527 */
1528
1529 /**
1530 * @}
1531 */
1532
1533 /** @addtogroup DAC_Private_Functions
1534 * @{
1535 */
1536
1537 /**
1538 * @brief DMA conversion complete callback.
1539 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1540 * the configuration information for the specified DMA module.
1541 * @retval None
1542 */
DAC_DMAConvCpltCh1(DMA_HandleTypeDef * hdma)1543 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
1544 {
1545 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1546
1547 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1548 hdac->ConvCpltCallbackCh1(hdac);
1549 #else
1550 HAL_DAC_ConvCpltCallbackCh1(hdac);
1551 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1552
1553 hdac->State = HAL_DAC_STATE_READY;
1554 }
1555
1556 /**
1557 * @brief DMA half transfer complete callback.
1558 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1559 * the configuration information for the specified DMA module.
1560 * @retval None
1561 */
DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef * hdma)1562 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1563 {
1564 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1565 /* Conversion complete callback */
1566 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1567 hdac->ConvHalfCpltCallbackCh1(hdac);
1568 #else
1569 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1570 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1571 }
1572
1573 /**
1574 * @brief DMA error callback
1575 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1576 * the configuration information for the specified DMA module.
1577 * @retval None
1578 */
DAC_DMAErrorCh1(DMA_HandleTypeDef * hdma)1579 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1580 {
1581 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1582
1583 /* Set DAC error code to DMA error */
1584 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1585
1586 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1587 hdac->ErrorCallbackCh1(hdac);
1588 #else
1589 HAL_DAC_ErrorCallbackCh1(hdac);
1590 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1591
1592 hdac->State = HAL_DAC_STATE_READY;
1593 }
1594
1595 /**
1596 * @}
1597 */
1598
1599 /**
1600 * @}
1601 */
1602
1603 #endif /* DAC1 */
1604
1605 #endif /* HAL_DAC_MODULE_ENABLED */
1606 /**
1607 * @}
1608 */
1609
