1 /**
2 ******************************************************************************
3 * @file stm32l5xx_hal_dac.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 * + Peripheral State and Errors functions
12 *
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2019 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### DAC Peripheral features #####
28 ==============================================================================
29 [..]
30 *** DAC Channels ***
31 ====================
32 [..]
33 STM32L5 devices integrate two 12-bit Digital Analog Converters
34
35 The 2 converters (i.e. channel1 & channel2)
36 can be used independently or simultaneously (dual mode):
37 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
38 peripherals (ex. timers).
39 (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip
40 peripherals (ex. timers).
41
42 *** DAC Triggers ***
43 ====================
44 [..]
45 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
46 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
47 [..]
48 Digital to Analog conversion can be triggered by:
49 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
50 The used pin (GPIOx_PIN_9) must be configured in input mode.
51
52 (#) Timers TRGO: TIM1, TIM2, TIM3, TIM4, TIM6, TIM7, TIM8 and TIM15
53 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...)
54
55 (#) Software using DAC_TRIGGER_SOFTWARE
56
57 *** DAC Buffer mode feature ***
58 ===============================
59 [..]
60 Each DAC channel integrates an output buffer that can be used to
61 reduce the output impedance, and to drive external loads directly
62 without having to add an external operational amplifier.
63 To enable, the output buffer use
64 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
65 [..]
66 (@) Refer to the device datasheet for more details about output
67 impedance value with and without output buffer.
68
69 *** DAC connect feature ***
70 ===============================
71 [..]
72 Each DAC channel can be connected internally.
73 To connect, use
74 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_INTERNAL;
75 or
76 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_BOTH;
77
78 *** GPIO configurations guidelines ***
79 =====================
80 [..]
81 When a DAC channel is used (ex channel1 on PA4) and the other is not
82 (ex channel2 on PA5 is configured in Analog and disabled).
83 Channel1 may disturb channel2 as coupling effect.
84 Note that there is no coupling on channel2 as soon as channel2 is turned on.
85 Coupling on adjacent channel could be avoided as follows:
86 when unused PA5 is configured as INPUT PULL-UP or DOWN.
87 PA5 is configured in ANALOG just before it is turned on.
88
89 *** DAC Sample and Hold feature ***
90 ========================
91 [..]
92 For each converter, 2 modes are supported: normal mode and
93 "sample and hold" mode (i.e. low power mode).
94 In the sample and hold mode, the DAC core converts data, then holds the
95 converted voltage on a capacitor. When not converting, the DAC cores and
96 buffer are completely turned off between samples and the DAC output is
97 tri-stated, therefore reducing the overall power consumption. A new
98 stabilization period is needed before each new conversion.
99
100 The sample and hold allow setting internal or external voltage @
101 low power consumption cost (output value can be at any given rate either
102 by CPU or DMA).
103
104 The Sample and hold block and registers uses either LSI & run in
105 several power modes: run mode, sleep mode, low power run, low power sleep
106 mode & stop1 mode.
107
108 Low power stop1 mode allows only static conversion.
109
110 To enable Sample and Hold mode
111 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
112 RCC_LSI_ON parameters.
113
114 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
115 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
116 DAC_HoldTime & DAC_RefreshTime;
117
118 *** DAC calibration feature ***
119 ===================================
120 [..]
121 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
122 (++) Calibration aims at correcting some offset of output buffer.
123 (++) The DAC uses either factory calibration settings OR user defined
124 calibration (trimming) settings (i.e. trimming mode).
125 (++) The user defined settings can be figured out using self calibration
126 handled by HAL_DACEx_SelfCalibrate.
127 (++) HAL_DACEx_SelfCalibrate:
128 (+++) Runs automatically the calibration.
129 (+++) Enables the user trimming mode
130 (+++) Updates a structure with trimming values with fresh calibration
131 results.
132 The user may store the calibration results for larger
133 (ex monitoring the trimming as a function of temperature
134 for instance)
135
136 *** DAC wave generation feature ***
137 ===================================
138 [..]
139 Both DAC channels can be used to generate
140 (#) Noise wave
141 (#) Triangle wave
142
143 *** DAC data format ***
144 =======================
145 [..]
146 The DAC data format can be:
147 (#) 8-bit right alignment using DAC_ALIGN_8B_R
148 (#) 12-bit left alignment using DAC_ALIGN_12B_L
149 (#) 12-bit right alignment using DAC_ALIGN_12B_R
150
151 *** DAC data value to voltage correspondence ***
152 ================================================
153 [..]
154 The analog output voltage on each DAC channel pin is determined
155 by the following equation:
156 [..]
157 DAC_OUTx = VREF+ * DOR / 4095
158 (+) with DOR is the Data Output Register
159 [..]
160 VREF+ is the input voltage reference (refer to the device datasheet)
161 [..]
162 e.g. To set DAC_OUT1 to 0.7V, use
163 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
164
165 *** DMA requests ***
166 =====================
167 [..]
168 A DMA request can be generated when an external trigger (but not a software trigger)
169 occurs if DMA requests are enabled using HAL_DAC_Start_DMA().
170 DMA requests are mapped as following:
171 (#) DAC channel1 mapped on DMA1/DMA2 request 7 (can be any DMA channel)
172 (#) DAC channel2 mapped on DMA1/DMA2 request 8 (can be any DMA channel)
173
174 *** High frequency interface mode ***
175 =====================================
176 [..]
177 The high frequency interface informs DAC instance about the bus frequency in use.
178 It is mandatory information for DAC (as internal timing of DAC is bus frequency dependent)
179 provided thanks to parameter DAC_HighFrequency handled in HAL_DAC_ConfigChannel () function.
180 Use of DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC value of DAC_HighFrequency is recommended
181 function figured out the correct setting.
182 The high frequency mode is same for all converters of a same DAC instance. Either same
183 parameter DAC_HighFrequency is used for all DAC converters or again self
184 DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC detection parameter.
185
186 [..]
187 (@) For Dual mode and specific signal (Triangle and noise) generation please
188 refer to Extended Features Driver description
189
190 ##### How to use this driver #####
191 ==============================================================================
192 [..]
193 (+) DAC APB clock must be enabled to get write access to DAC
194 registers using HAL_DAC_Init()
195 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
196 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
197 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
198
199 *** Calibration mode IO operation ***
200 ======================================
201 [..]
202 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
203 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
204 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
205
206 *** Polling mode IO operation ***
207 =================================
208 [..]
209 (+) Start the DAC peripheral using HAL_DAC_Start()
210 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
211 (+) Stop the DAC peripheral using HAL_DAC_Stop()
212
213 *** DMA mode IO operation ***
214 ==============================
215 [..]
216 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
217 of data to be transferred at each end of conversion
218 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue().
219 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
220 function is executed and user can add his own code by customization of function pointer
221 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
222 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
223 function is executed and user can add his own code by customization of function pointer
224 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
225 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
226 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
227 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
228 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
229 function is executed and user can add his own code by customization of function pointer
230 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
231 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
232 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
233
234 *** Callback registration ***
235 =============================================
236 [..]
237 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
238 allows the user to configure dynamically the driver callbacks.
239
240 Use Functions HAL_DAC_RegisterCallback() to register a user callback,
241 it allows to register following callbacks:
242 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
243 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
244 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
245 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
246 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
247 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
248 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
249 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
250 (+) MspInitCallback : DAC MspInit.
251 (+) MspDeInitCallback : DAC MspdeInit.
252 This function takes as parameters the HAL peripheral handle, the Callback ID
253 and a pointer to the user callback function.
254
255 Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default
256 weak (surcharged) function. It allows to reset following callbacks:
257 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
258 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
259 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
260 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
261 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
262 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
263 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
264 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
265 (+) MspInitCallback : DAC MspInit.
266 (+) MspDeInitCallback : DAC MspdeInit.
267 (+) All Callbacks
268 This function) takes as parameters the HAL peripheral handle and the Callback ID.
269
270 By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
271 all callbacks are reset to the corresponding legacy weak (surcharged) functions.
272 Exception done for MspInit and MspDeInit callbacks that are respectively
273 reset to the legacy weak (surcharged) functions in the HAL_DAC_Init
274 and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
275 If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit
276 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
277
278 Callbacks can be registered/unregistered in READY state only.
279 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
280 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
281 during the Init/DeInit.
282 In that case first register the MspInit/MspDeInit user callbacks
283 using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit
284 or HAL_DAC_Init function.
285
286 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
287 not defined, the callback registering feature is not available
288 and weak (surcharged) callbacks are used.
289
290 *** DAC HAL driver macros list ***
291 =============================================
292 [..]
293 Below the list of most used macros in DAC HAL driver.
294
295 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
296 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
297 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
298 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
299
300 [..]
301 (@) You can refer to the DAC HAL driver header file for more useful macros
302
303 @endverbatim
304 ******************************************************************************
305 */
306
307 /* Includes ------------------------------------------------------------------*/
308 #include "stm32l5xx_hal.h"
309
310 /** @addtogroup STM32L5xx_HAL_Driver
311 * @{
312 */
313
314 #ifdef HAL_DAC_MODULE_ENABLED
315 #if defined(DAC1)
316
317 /** @defgroup DAC DAC
318 * @brief DAC driver modules
319 * @{
320 */
321
322 /* Private typedef -----------------------------------------------------------*/
323 /* Private define ------------------------------------------------------------*/
324 /* Private constants ---------------------------------------------------------*/
325 /** @addtogroup DAC_Private_Constants DAC Private Constants
326 * @{
327 */
328 #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */
329 #define HFSEL_ENABLE_THRESHOLD_80MHZ 80000000U /* 80 MHz */
330
331 /**
332 * @}
333 */
334
335 /* Private macro -------------------------------------------------------------*/
336 /* Private variables ---------------------------------------------------------*/
337 /* Private function prototypes -----------------------------------------------*/
338 /* Exported functions -------------------------------------------------------*/
339
340 /** @defgroup DAC_Exported_Functions DAC Exported Functions
341 * @{
342 */
343
344 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
345 * @brief Initialization and Configuration functions
346 *
347 @verbatim
348 ==============================================================================
349 ##### Initialization and de-initialization functions #####
350 ==============================================================================
351 [..] This section provides functions allowing to:
352 (+) Initialize and configure the DAC.
353 (+) De-initialize the DAC.
354
355 @endverbatim
356 * @{
357 */
358
359 /**
360 * @brief Initialize the DAC peripheral according to the specified parameters
361 * in the DAC_InitStruct and initialize the associated handle.
362 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
363 * the configuration information for the specified DAC.
364 * @retval HAL status
365 */
HAL_DAC_Init(DAC_HandleTypeDef * hdac)366 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
367 {
368 /* Check DAC handle */
369 if (hdac == NULL)
370 {
371 return HAL_ERROR;
372 }
373 /* Check the parameters */
374 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
375
376 if (hdac->State == HAL_DAC_STATE_RESET)
377 {
378 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
379 /* Init the DAC Callback settings */
380 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
381 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
382 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
383 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
384
385 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
386 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
387 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
388 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
389
390 if (hdac->MspInitCallback == NULL)
391 {
392 hdac->MspInitCallback = HAL_DAC_MspInit;
393 }
394 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
395
396 /* Allocate lock resource and initialize it */
397 hdac->Lock = HAL_UNLOCKED;
398
399 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
400 /* Init the low level hardware */
401 hdac->MspInitCallback(hdac);
402 #else
403 /* Init the low level hardware */
404 HAL_DAC_MspInit(hdac);
405 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
406 }
407
408 /* Initialize the DAC state*/
409 hdac->State = HAL_DAC_STATE_BUSY;
410
411 /* Set DAC error code to none */
412 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
413
414 /* Initialize the DAC state*/
415 hdac->State = HAL_DAC_STATE_READY;
416
417 /* Return function status */
418 return HAL_OK;
419 }
420
421 /**
422 * @brief Deinitialize the DAC peripheral registers to their default reset values.
423 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
424 * the configuration information for the specified DAC.
425 * @retval HAL status
426 */
HAL_DAC_DeInit(DAC_HandleTypeDef * hdac)427 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
428 {
429 /* Check DAC handle */
430 if (hdac == NULL)
431 {
432 return HAL_ERROR;
433 }
434
435 /* Check the parameters */
436 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
437
438 /* Change DAC state */
439 hdac->State = HAL_DAC_STATE_BUSY;
440
441 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
442 if (hdac->MspDeInitCallback == NULL)
443 {
444 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
445 }
446 /* DeInit the low level hardware */
447 hdac->MspDeInitCallback(hdac);
448 #else
449 /* DeInit the low level hardware */
450 HAL_DAC_MspDeInit(hdac);
451 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
452
453 /* Set DAC error code to none */
454 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
455
456 /* Change DAC state */
457 hdac->State = HAL_DAC_STATE_RESET;
458
459 /* Release Lock */
460 __HAL_UNLOCK(hdac);
461
462 /* Return function status */
463 return HAL_OK;
464 }
465
466 /**
467 * @brief Initialize the DAC MSP.
468 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
469 * the configuration information for the specified DAC.
470 * @retval None
471 */
HAL_DAC_MspInit(DAC_HandleTypeDef * hdac)472 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
473 {
474 /* Prevent unused argument(s) compilation warning */
475 UNUSED(hdac);
476
477 /* NOTE : This function should not be modified, when the callback is needed,
478 the HAL_DAC_MspInit could be implemented in the user file
479 */
480 }
481
482 /**
483 * @brief DeInitialize the DAC MSP.
484 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
485 * the configuration information for the specified DAC.
486 * @retval None
487 */
HAL_DAC_MspDeInit(DAC_HandleTypeDef * hdac)488 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
489 {
490 /* Prevent unused argument(s) compilation warning */
491 UNUSED(hdac);
492
493 /* NOTE : This function should not be modified, when the callback is needed,
494 the HAL_DAC_MspDeInit could be implemented in the user file
495 */
496 }
497
498 /**
499 * @}
500 */
501
502 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
503 * @brief IO operation functions
504 *
505 @verbatim
506 ==============================================================================
507 ##### IO operation functions #####
508 ==============================================================================
509 [..] This section provides functions allowing to:
510 (+) Start conversion.
511 (+) Stop conversion.
512 (+) Start conversion and enable DMA transfer.
513 (+) Stop conversion and disable DMA transfer.
514 (+) Get result of conversion.
515
516 @endverbatim
517 * @{
518 */
519
520 /**
521 * @brief Enables DAC and starts conversion of channel.
522 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
523 * the configuration information for the specified DAC.
524 * @param Channel The selected DAC channel.
525 * This parameter can be one of the following values:
526 * @arg DAC_CHANNEL_1: DAC Channel1 selected
527 * @arg DAC_CHANNEL_2: DAC Channel2 selected
528 * @retval HAL status
529 */
HAL_DAC_Start(DAC_HandleTypeDef * hdac,uint32_t Channel)530 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
531 {
532 /* Check the parameters */
533 assert_param(IS_DAC_CHANNEL(Channel));
534
535 /* Process locked */
536 __HAL_LOCK(hdac);
537
538 /* Change DAC state */
539 hdac->State = HAL_DAC_STATE_BUSY;
540
541 /* Enable the Peripheral */
542 __HAL_DAC_ENABLE(hdac, Channel);
543
544 if (Channel == DAC_CHANNEL_1)
545 {
546 /* Check if software trigger enabled */
547 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
548 {
549 /* Enable the selected DAC software conversion */
550 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
551 }
552 }
553
554 else
555 {
556 /* Check if software trigger enabled */
557 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL)))
558 {
559 /* Enable the selected DAC software conversion*/
560 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
561 }
562 }
563
564
565 /* Change DAC state */
566 hdac->State = HAL_DAC_STATE_READY;
567
568 /* Process unlocked */
569 __HAL_UNLOCK(hdac);
570
571 /* Return function status */
572 return HAL_OK;
573 }
574
575 /**
576 * @brief Disables DAC and stop conversion of channel.
577 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
578 * the configuration information for the specified DAC.
579 * @param Channel The selected DAC channel.
580 * This parameter can be one of the following values:
581 * @arg DAC_CHANNEL_1: DAC Channel1 selected
582 * @arg DAC_CHANNEL_2: DAC Channel2 selected
583 * @retval HAL status
584 */
HAL_DAC_Stop(DAC_HandleTypeDef * hdac,uint32_t Channel)585 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
586 {
587 /* Check the parameters */
588 assert_param(IS_DAC_CHANNEL(Channel));
589
590 /* Disable the Peripheral */
591 __HAL_DAC_DISABLE(hdac, Channel);
592
593 /* Change DAC state */
594 hdac->State = HAL_DAC_STATE_READY;
595
596 /* Return function status */
597 return HAL_OK;
598 }
599
600 /**
601 * @brief Enables DAC and starts conversion of channel.
602 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
603 * the configuration information for the specified DAC.
604 * @param Channel The selected DAC channel.
605 * This parameter can be one of the following values:
606 * @arg DAC_CHANNEL_1: DAC Channel1 selected
607 * @arg DAC_CHANNEL_2: DAC Channel2 selected
608 * @param pData The source Buffer address.
609 * @param Length The length of data to be transferred from memory to DAC peripheral
610 * @param Alignment Specifies the data alignment for DAC channel.
611 * This parameter can be one of the following values:
612 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
613 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
614 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
615 * @retval HAL status
616 */
HAL_DAC_Start_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t * pData,uint32_t Length,uint32_t Alignment)617 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
618 uint32_t Alignment)
619 {
620 HAL_StatusTypeDef status;
621 uint32_t tmpreg = 0U;
622
623 /* Check the parameters */
624 assert_param(IS_DAC_CHANNEL(Channel));
625 assert_param(IS_DAC_ALIGN(Alignment));
626
627 /* Process locked */
628 __HAL_LOCK(hdac);
629
630 /* Change DAC state */
631 hdac->State = HAL_DAC_STATE_BUSY;
632
633 if (Channel == DAC_CHANNEL_1)
634 {
635 /* Set the DMA transfer complete callback for channel1 */
636 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
637
638 /* Set the DMA half transfer complete callback for channel1 */
639 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
640
641 /* Set the DMA error callback for channel1 */
642 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
643
644 /* Enable the selected DAC channel1 DMA request */
645 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
646
647 /* Case of use of channel 1 */
648 switch (Alignment)
649 {
650 case DAC_ALIGN_12B_R:
651 /* Get DHR12R1 address */
652 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
653 break;
654 case DAC_ALIGN_12B_L:
655 /* Get DHR12L1 address */
656 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
657 break;
658 case DAC_ALIGN_8B_R:
659 /* Get DHR8R1 address */
660 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
661 break;
662 default:
663 break;
664 }
665 }
666
667 else
668 {
669 /* Set the DMA transfer complete callback for channel2 */
670 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
671
672 /* Set the DMA half transfer complete callback for channel2 */
673 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
674
675 /* Set the DMA error callback for channel2 */
676 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
677
678 /* Enable the selected DAC channel2 DMA request */
679 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
680
681 /* Case of use of channel 2 */
682 switch (Alignment)
683 {
684 case DAC_ALIGN_12B_R:
685 /* Get DHR12R2 address */
686 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
687 break;
688 case DAC_ALIGN_12B_L:
689 /* Get DHR12L2 address */
690 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
691 break;
692 case DAC_ALIGN_8B_R:
693 /* Get DHR8R2 address */
694 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
695 break;
696 default:
697 break;
698 }
699 }
700
701
702 /* Enable the DMA channel */
703 if (Channel == DAC_CHANNEL_1)
704 {
705 /* Enable the DAC DMA underrun interrupt */
706 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
707
708 /* Enable the DMA channel */
709 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
710 }
711
712 else
713 {
714 /* Enable the DAC DMA underrun interrupt */
715 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
716
717 /* Enable the DMA channel */
718 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
719 }
720
721
722 /* Process Unlocked */
723 __HAL_UNLOCK(hdac);
724
725 if (status == HAL_OK)
726 {
727 /* Enable the Peripheral */
728 __HAL_DAC_ENABLE(hdac, Channel);
729 }
730 else
731 {
732 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
733 }
734
735 /* Return function status */
736 return status;
737 }
738
739 /**
740 * @brief Disables DAC and stop conversion of channel.
741 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
742 * the configuration information for the specified DAC.
743 * @param Channel The selected DAC channel.
744 * This parameter can be one of the following values:
745 * @arg DAC_CHANNEL_1: DAC Channel1 selected
746 * @arg DAC_CHANNEL_2: DAC Channel2 selected
747 * @retval HAL status
748 */
HAL_DAC_Stop_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel)749 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
750 {
751 /* Check the parameters */
752 assert_param(IS_DAC_CHANNEL(Channel));
753
754 /* Disable the selected DAC channel DMA request */
755 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL));
756
757 /* Disable the Peripheral */
758 __HAL_DAC_DISABLE(hdac, Channel);
759
760 /* Disable the DMA channel */
761
762 /* Channel1 is used */
763 if (Channel == DAC_CHANNEL_1)
764 {
765 /* Disable the DMA channel */
766 (void)HAL_DMA_Abort(hdac->DMA_Handle1);
767
768 /* Disable the DAC DMA underrun interrupt */
769 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
770 }
771
772 else /* Channel2 is used for */
773 {
774 /* Disable the DMA channel */
775 (void)HAL_DMA_Abort(hdac->DMA_Handle2);
776
777 /* Disable the DAC DMA underrun interrupt */
778 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
779 }
780
781
782 /* Change DAC state */
783 hdac->State = HAL_DAC_STATE_READY;
784
785 /* Return function status */
786 return HAL_OK;
787 }
788
789 /**
790 * @brief Handles DAC interrupt request
791 * This function uses the interruption of DMA
792 * underrun.
793 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
794 * the configuration information for the specified DAC.
795 * @retval None
796 */
HAL_DAC_IRQHandler(DAC_HandleTypeDef * hdac)797 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
798 {
799 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
800 {
801 /* Check underrun flag of DAC channel 1 */
802 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
803 {
804 /* Change DAC state to error state */
805 hdac->State = HAL_DAC_STATE_ERROR;
806
807 /* Set DAC error code to channel1 DMA underrun error */
808 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
809
810 /* Clear the underrun flag */
811 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
812
813 /* Disable the selected DAC channel1 DMA request */
814 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
815
816 /* Error callback */
817 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
818 hdac->DMAUnderrunCallbackCh1(hdac);
819 #else
820 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
821 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
822 }
823 }
824
825
826 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
827 {
828 /* Check underrun flag of DAC channel 2 */
829 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
830 {
831 /* Change DAC state to error state */
832 hdac->State = HAL_DAC_STATE_ERROR;
833
834 /* Set DAC error code to channel2 DMA underrun error */
835 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
836
837 /* Clear the underrun flag */
838 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
839
840 /* Disable the selected DAC channel2 DMA request */
841 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
842
843 /* Error callback */
844 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
845 hdac->DMAUnderrunCallbackCh2(hdac);
846 #else
847 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
848 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
849 }
850 }
851
852 }
853
854 /**
855 * @brief Set the specified data holding register value for DAC channel.
856 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
857 * the configuration information for the specified DAC.
858 * @param Channel The selected DAC channel.
859 * This parameter can be one of the following values:
860 * @arg DAC_CHANNEL_1: DAC Channel1 selected
861 * @arg DAC_CHANNEL_2: DAC Channel2 selected
862 * @param Alignment Specifies the data alignment.
863 * This parameter can be one of the following values:
864 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
865 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
866 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
867 * @param Data Data to be loaded in the selected data holding register.
868 * @retval HAL status
869 */
HAL_DAC_SetValue(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Alignment,uint32_t Data)870 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
871 {
872 __IO uint32_t tmp = 0UL;
873
874 /* Check the parameters */
875 assert_param(IS_DAC_CHANNEL(Channel));
876 assert_param(IS_DAC_ALIGN(Alignment));
877 assert_param(IS_DAC_DATA(Data));
878
879 tmp = (uint32_t)hdac->Instance;
880 if (Channel == DAC_CHANNEL_1)
881 {
882 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
883 }
884
885 else
886 {
887 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
888 }
889
890
891 /* Set the DAC channel selected data holding register */
892 *(__IO uint32_t *) tmp = Data;
893
894 /* Return function status */
895 return HAL_OK;
896 }
897
898 /**
899 * @brief Conversion complete callback in non-blocking mode for Channel1
900 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
901 * the configuration information for the specified DAC.
902 * @retval None
903 */
HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef * hdac)904 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
905 {
906 /* Prevent unused argument(s) compilation warning */
907 UNUSED(hdac);
908
909 /* NOTE : This function should not be modified, when the callback is needed,
910 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
911 */
912 }
913
914 /**
915 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
916 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
917 * the configuration information for the specified DAC.
918 * @retval None
919 */
HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef * hdac)920 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
921 {
922 /* Prevent unused argument(s) compilation warning */
923 UNUSED(hdac);
924
925 /* NOTE : This function should not be modified, when the callback is needed,
926 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
927 */
928 }
929
930 /**
931 * @brief Error DAC callback for Channel1.
932 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
933 * the configuration information for the specified DAC.
934 * @retval None
935 */
HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef * hdac)936 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
937 {
938 /* Prevent unused argument(s) compilation warning */
939 UNUSED(hdac);
940
941 /* NOTE : This function should not be modified, when the callback is needed,
942 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
943 */
944 }
945
946 /**
947 * @brief DMA underrun DAC callback for channel1.
948 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
949 * the configuration information for the specified DAC.
950 * @retval None
951 */
HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef * hdac)952 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
953 {
954 /* Prevent unused argument(s) compilation warning */
955 UNUSED(hdac);
956
957 /* NOTE : This function should not be modified, when the callback is needed,
958 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
959 */
960 }
961
962 /**
963 * @}
964 */
965
966 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
967 * @brief Peripheral Control functions
968 *
969 @verbatim
970 ==============================================================================
971 ##### Peripheral Control functions #####
972 ==============================================================================
973 [..] This section provides functions allowing to:
974 (+) Configure channels.
975 (+) Set the specified data holding register value for DAC channel.
976
977 @endverbatim
978 * @{
979 */
980
981 /**
982 * @brief Returns the last data output value of the selected DAC channel.
983 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
984 * the configuration information for the specified DAC.
985 * @param Channel The selected DAC channel.
986 * This parameter can be one of the following values:
987 * @arg DAC_CHANNEL_1: DAC Channel1 selected
988 * @arg DAC_CHANNEL_2: DAC Channel2 selected
989 * @retval The selected DAC channel data output value.
990 */
HAL_DAC_GetValue(DAC_HandleTypeDef * hdac,uint32_t Channel)991 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel)
992 {
993 uint32_t result;
994
995 /* Check the parameters */
996 assert_param(IS_DAC_CHANNEL(Channel));
997
998 if (Channel == DAC_CHANNEL_1)
999 {
1000 result = hdac->Instance->DOR1;
1001 }
1002
1003 else
1004 {
1005 result = hdac->Instance->DOR2;
1006 }
1007
1008 /* Returns the DAC channel data output register value */
1009 return result;
1010 }
1011
1012 /**
1013 * @brief Configures the selected DAC channel.
1014 * @note By calling this function, the high frequency interface mode (HFSEL bits)
1015 * will be set. This parameter scope is the DAC instance. As the function
1016 * is called for each channel, the @ref DAC_HighFrequency of @arg sConfig
1017 * must be the same at each call.
1018 * (or DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC self detect).
1019 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1020 * the configuration information for the specified DAC.
1021 * @param sConfig DAC configuration structure.
1022 * @param Channel The selected DAC channel.
1023 * This parameter can be one of the following values:
1024 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1025 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1026 * @retval HAL status
1027 */
HAL_DAC_ConfigChannel(DAC_HandleTypeDef * hdac,DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)1028 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
1029 {
1030 uint32_t tmpreg1;
1031 uint32_t tmpreg2;
1032 uint32_t tickstart;
1033 uint32_t hclkfreq;
1034 uint32_t connectOnChip;
1035
1036 /* Check the DAC parameters */
1037 assert_param(IS_DAC_HIGH_FREQUENCY_MODE(sConfig->DAC_HighFrequency));
1038 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
1039 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
1040 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
1041 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
1042 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
1043 {
1044 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
1045 }
1046 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
1047 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
1048 {
1049 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
1050 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
1051 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
1052 }
1053 assert_param(IS_DAC_CHANNEL(Channel));
1054
1055 /* Process locked */
1056 __HAL_LOCK(hdac);
1057
1058 /* Change DAC state */
1059 hdac->State = HAL_DAC_STATE_BUSY;
1060
1061 /* Sample and hold configuration */
1062 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
1063 {
1064 /* Get timeout */
1065 tickstart = HAL_GetTick();
1066
1067 if (Channel == DAC_CHANNEL_1)
1068 {
1069 /* SHSR1 can be written when BWST1 is cleared */
1070 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1071 {
1072 /* Check for the Timeout */
1073 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1074 {
1075 /* New check to avoid false timeout detection in case of preemption */
1076 if(((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1077 {
1078 /* Update error code */
1079 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1080
1081 /* Change the DMA state */
1082 hdac->State = HAL_DAC_STATE_TIMEOUT;
1083
1084 return HAL_TIMEOUT;
1085 }
1086 }
1087 }
1088 HAL_Delay(1UL);
1089 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1090 }
1091
1092 else /* Channel 2 */
1093 {
1094 /* SHSR2 can be written when BWST2 is cleared */
1095 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1096 {
1097 /* Check for the Timeout */
1098 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1099 {
1100 /* New check to avoid false timeout detection in case of preemption */
1101 if(((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1102 {
1103 /* Update error code */
1104 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1105
1106 /* Change the DMA state */
1107 hdac->State = HAL_DAC_STATE_TIMEOUT;
1108
1109 return HAL_TIMEOUT;
1110 }
1111 }
1112 }
1113 HAL_Delay(1UL);
1114 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1115 }
1116
1117
1118 /* HoldTime */
1119 MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL),
1120 (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
1121 /* RefreshTime */
1122 MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL),
1123 (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
1124 }
1125
1126 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
1127 /* USER TRIMMING */
1128 {
1129 /* Get the DAC CCR value */
1130 tmpreg1 = hdac->Instance->CCR;
1131 /* Clear trimming value */
1132 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
1133 /* Configure for the selected trimming offset */
1134 tmpreg2 = sConfig->DAC_TrimmingValue;
1135 /* Calculate CCR register value depending on DAC_Channel */
1136 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1137 /* Write to DAC CCR */
1138 hdac->Instance->CCR = tmpreg1;
1139 }
1140 /* else factory trimming is used (factory setting are available at reset)*/
1141 /* SW Nothing has nothing to do */
1142
1143 /* Get the DAC MCR value */
1144 tmpreg1 = hdac->Instance->MCR;
1145 /* Clear DAC_MCR_MODEx bits */
1146 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
1147 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
1148 if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_EXTERNAL)
1149 {
1150 connectOnChip = 0x00000000UL;
1151 }
1152 else if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_INTERNAL)
1153 {
1154 connectOnChip = DAC_MCR_MODE1_0;
1155 }
1156 else /* (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_BOTH) */
1157 {
1158 if (sConfig->DAC_OutputBuffer == DAC_OUTPUTBUFFER_ENABLE)
1159 {
1160 connectOnChip = DAC_MCR_MODE1_0;
1161 }
1162 else
1163 {
1164 connectOnChip = 0x00000000UL;
1165 }
1166 }
1167 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | connectOnChip);
1168 /* Calculate MCR register value depending on DAC_Channel */
1169 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1170 /* Write to DAC MCR */
1171 hdac->Instance->MCR = tmpreg1;
1172
1173 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
1174 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
1175
1176 /* Get the DAC CR value */
1177 tmpreg1 = hdac->Instance->CR;
1178 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
1179 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
1180 /* Configure for the selected DAC channel: trigger */
1181 /* Set TSELx and TENx bits according to DAC_Trigger value */
1182 tmpreg2 = sConfig->DAC_Trigger;
1183 /* Calculate CR register value depending on DAC_Channel */
1184 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1185 if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ == sConfig->DAC_HighFrequency)
1186 {
1187 tmpreg1 |= DAC_CR_HFSEL;
1188 }
1189 else
1190 {
1191 if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE == sConfig->DAC_HighFrequency)
1192 {
1193 tmpreg1 &= ~(DAC_CR_HFSEL);
1194 }
1195 else /* Automatic selection */
1196 {
1197 hclkfreq = HAL_RCC_GetHCLKFreq();
1198 if (hclkfreq > HFSEL_ENABLE_THRESHOLD_80MHZ)
1199 {
1200 /* High frequency enable when HCLK frequency higher than 80 */
1201 tmpreg1 |= DAC_CR_HFSEL;
1202 }
1203 else
1204 {
1205 /* High frequency disable when HCLK frequency higher than 80 */
1206 tmpreg1 &= ~(DAC_CR_HFSEL);
1207 }
1208 }
1209 }
1210 /* Write to DAC CR */
1211 hdac->Instance->CR = tmpreg1;
1212 /* Disable wave generation */
1213 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL)));
1214
1215 /* Change DAC state */
1216 hdac->State = HAL_DAC_STATE_READY;
1217
1218 /* Process unlocked */
1219 __HAL_UNLOCK(hdac);
1220
1221 /* Return function status */
1222 return HAL_OK;
1223 }
1224
1225 /**
1226 * @}
1227 */
1228
1229 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
1230 * @brief Peripheral State and Errors functions
1231 *
1232 @verbatim
1233 ==============================================================================
1234 ##### Peripheral State and Errors functions #####
1235 ==============================================================================
1236 [..]
1237 This subsection provides functions allowing to
1238 (+) Check the DAC state.
1239 (+) Check the DAC Errors.
1240
1241 @endverbatim
1242 * @{
1243 */
1244
1245 /**
1246 * @brief return the DAC handle state
1247 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1248 * the configuration information for the specified DAC.
1249 * @retval HAL state
1250 */
HAL_DAC_GetState(DAC_HandleTypeDef * hdac)1251 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac)
1252 {
1253 /* Return DAC handle state */
1254 return hdac->State;
1255 }
1256
1257
1258 /**
1259 * @brief Return the DAC error code
1260 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1261 * the configuration information for the specified DAC.
1262 * @retval DAC Error Code
1263 */
HAL_DAC_GetError(DAC_HandleTypeDef * hdac)1264 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
1265 {
1266 return hdac->ErrorCode;
1267 }
1268
1269 /**
1270 * @}
1271 */
1272
1273 /**
1274 * @}
1275 */
1276
1277 /** @addtogroup DAC_Exported_Functions
1278 * @{
1279 */
1280
1281 /** @addtogroup DAC_Exported_Functions_Group1
1282 * @{
1283 */
1284 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1285 /**
1286 * @brief Register a User DAC Callback
1287 * To be used instead of the weak (surcharged) predefined callback
1288 * @param hdac DAC handle
1289 * @param CallbackID ID of the callback to be registered
1290 * This parameter can be one of the following values:
1291 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID
1292 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID
1293 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1294 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1295 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1296 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1297 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1298 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1299 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1300 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1301 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1302 *
1303 * @param pCallback pointer to the Callback function
1304 * @retval status
1305 */
HAL_DAC_RegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID,pDAC_CallbackTypeDef pCallback)1306 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
1307 pDAC_CallbackTypeDef pCallback)
1308 {
1309 HAL_StatusTypeDef status = HAL_OK;
1310
1311 if (pCallback == NULL)
1312 {
1313 /* Update the error code */
1314 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1315 return HAL_ERROR;
1316 }
1317
1318 /* Process locked */
1319 __HAL_LOCK(hdac);
1320
1321 if (hdac->State == HAL_DAC_STATE_READY)
1322 {
1323 switch (CallbackID)
1324 {
1325 case HAL_DAC_CH1_COMPLETE_CB_ID :
1326 hdac->ConvCpltCallbackCh1 = pCallback;
1327 break;
1328 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1329 hdac->ConvHalfCpltCallbackCh1 = pCallback;
1330 break;
1331 case HAL_DAC_CH1_ERROR_ID :
1332 hdac->ErrorCallbackCh1 = pCallback;
1333 break;
1334 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1335 hdac->DMAUnderrunCallbackCh1 = pCallback;
1336 break;
1337
1338 case HAL_DAC_CH2_COMPLETE_CB_ID :
1339 hdac->ConvCpltCallbackCh2 = pCallback;
1340 break;
1341 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1342 hdac->ConvHalfCpltCallbackCh2 = pCallback;
1343 break;
1344 case HAL_DAC_CH2_ERROR_ID :
1345 hdac->ErrorCallbackCh2 = pCallback;
1346 break;
1347 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1348 hdac->DMAUnderrunCallbackCh2 = pCallback;
1349 break;
1350
1351 case HAL_DAC_MSPINIT_CB_ID :
1352 hdac->MspInitCallback = pCallback;
1353 break;
1354 case HAL_DAC_MSPDEINIT_CB_ID :
1355 hdac->MspDeInitCallback = pCallback;
1356 break;
1357 default :
1358 /* Update the error code */
1359 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1360 /* update return status */
1361 status = HAL_ERROR;
1362 break;
1363 }
1364 }
1365 else if (hdac->State == HAL_DAC_STATE_RESET)
1366 {
1367 switch (CallbackID)
1368 {
1369 case HAL_DAC_MSPINIT_CB_ID :
1370 hdac->MspInitCallback = pCallback;
1371 break;
1372 case HAL_DAC_MSPDEINIT_CB_ID :
1373 hdac->MspDeInitCallback = pCallback;
1374 break;
1375 default :
1376 /* Update the error code */
1377 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1378 /* update return status */
1379 status = HAL_ERROR;
1380 break;
1381 }
1382 }
1383 else
1384 {
1385 /* Update the error code */
1386 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1387 /* update return status */
1388 status = HAL_ERROR;
1389 }
1390
1391 /* Release Lock */
1392 __HAL_UNLOCK(hdac);
1393 return status;
1394 }
1395
1396 /**
1397 * @brief Unregister a User DAC Callback
1398 * DAC Callback is redirected to the weak (surcharged) predefined callback
1399 * @param hdac DAC handle
1400 * @param CallbackID ID of the callback to be unregistered
1401 * This parameter can be one of the following values:
1402 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID
1403 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1404 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1405 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1406 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1407 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1408 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1409 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1410 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1411 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1412 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks
1413 * @retval status
1414 */
HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID)1415 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID)
1416 {
1417 HAL_StatusTypeDef status = HAL_OK;
1418
1419 /* Process locked */
1420 __HAL_LOCK(hdac);
1421
1422 if (hdac->State == HAL_DAC_STATE_READY)
1423 {
1424 switch (CallbackID)
1425 {
1426 case HAL_DAC_CH1_COMPLETE_CB_ID :
1427 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1428 break;
1429 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1430 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1431 break;
1432 case HAL_DAC_CH1_ERROR_ID :
1433 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1434 break;
1435 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1436 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1437 break;
1438
1439 case HAL_DAC_CH2_COMPLETE_CB_ID :
1440 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1441 break;
1442 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1443 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1444 break;
1445 case HAL_DAC_CH2_ERROR_ID :
1446 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1447 break;
1448 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1449 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1450 break;
1451
1452 case HAL_DAC_MSPINIT_CB_ID :
1453 hdac->MspInitCallback = HAL_DAC_MspInit;
1454 break;
1455 case HAL_DAC_MSPDEINIT_CB_ID :
1456 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1457 break;
1458 case HAL_DAC_ALL_CB_ID :
1459 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1460 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1461 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1462 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1463
1464 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1465 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1466 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1467 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1468
1469 hdac->MspInitCallback = HAL_DAC_MspInit;
1470 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1471 break;
1472 default :
1473 /* Update the error code */
1474 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1475 /* update return status */
1476 status = HAL_ERROR;
1477 break;
1478 }
1479 }
1480 else if (hdac->State == HAL_DAC_STATE_RESET)
1481 {
1482 switch (CallbackID)
1483 {
1484 case HAL_DAC_MSPINIT_CB_ID :
1485 hdac->MspInitCallback = HAL_DAC_MspInit;
1486 break;
1487 case HAL_DAC_MSPDEINIT_CB_ID :
1488 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1489 break;
1490 default :
1491 /* Update the error code */
1492 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1493 /* update return status */
1494 status = HAL_ERROR;
1495 break;
1496 }
1497 }
1498 else
1499 {
1500 /* Update the error code */
1501 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1502 /* update return status */
1503 status = HAL_ERROR;
1504 }
1505
1506 /* Release Lock */
1507 __HAL_UNLOCK(hdac);
1508 return status;
1509 }
1510 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1511
1512 /**
1513 * @}
1514 */
1515
1516 /**
1517 * @}
1518 */
1519
1520 /** @addtogroup DAC_Private_Functions
1521 * @{
1522 */
1523
1524 /**
1525 * @brief DMA conversion complete callback.
1526 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1527 * the configuration information for the specified DMA module.
1528 * @retval None
1529 */
DAC_DMAConvCpltCh1(DMA_HandleTypeDef * hdma)1530 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
1531 {
1532 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1533
1534 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1535 hdac->ConvCpltCallbackCh1(hdac);
1536 #else
1537 HAL_DAC_ConvCpltCallbackCh1(hdac);
1538 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1539
1540 hdac->State = HAL_DAC_STATE_READY;
1541 }
1542
1543 /**
1544 * @brief DMA half transfer complete callback.
1545 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1546 * the configuration information for the specified DMA module.
1547 * @retval None
1548 */
DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef * hdma)1549 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1550 {
1551 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1552 /* Conversion complete callback */
1553 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1554 hdac->ConvHalfCpltCallbackCh1(hdac);
1555 #else
1556 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1557 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1558 }
1559
1560 /**
1561 * @brief DMA error callback
1562 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1563 * the configuration information for the specified DMA module.
1564 * @retval None
1565 */
DAC_DMAErrorCh1(DMA_HandleTypeDef * hdma)1566 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1567 {
1568 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1569
1570 /* Set DAC error code to DMA error */
1571 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1572
1573 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1574 hdac->ErrorCallbackCh1(hdac);
1575 #else
1576 HAL_DAC_ErrorCallbackCh1(hdac);
1577 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1578
1579 hdac->State = HAL_DAC_STATE_READY;
1580 }
1581
1582 /**
1583 * @}
1584 */
1585
1586 /**
1587 * @}
1588 */
1589
1590 #endif /* DAC1 */
1591
1592 #endif /* HAL_DAC_MODULE_ENABLED */
1593
1594 /**
1595 * @}
1596 */
1597
1598
