1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_uart.c
4 * @author MCD Application Team
5 * @brief UART HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 *
12 *
13 ******************************************************************************
14 * @attention
15 *
16 * Copyright (c) 2017 STMicroelectronics.
17 * All rights reserved.
18 *
19 * This software is licensed under terms that can be found in the LICENSE file
20 * in the root directory of this software component.
21 * If no LICENSE file comes with this software, it is provided AS-IS.
22 *
23 ******************************************************************************
24 @verbatim
25 ===============================================================================
26 ##### How to use this driver #####
27 ===============================================================================
28 [..]
29 The UART HAL driver can be used as follows:
30
31 (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart).
32 (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
33 (++) Enable the USARTx interface clock.
34 (++) UART pins configuration:
35 (+++) Enable the clock for the UART GPIOs.
36 (+++) Configure these UART pins as alternate function pull-up.
37 (++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
38 and HAL_UART_Receive_IT() APIs):
39 (+++) Configure the USARTx interrupt priority.
40 (+++) Enable the NVIC USART IRQ handle.
41 (++) UART interrupts handling:
42 -@@- The specific UART interrupts (Transmission complete interrupt,
43 RXNE interrupt, RX/TX FIFOs related interrupts and Error Interrupts)
44 are managed using the macros __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT()
45 inside the transmit and receive processes.
46 (++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
47 and HAL_UART_Receive_DMA() APIs):
48 (+++) Declare a DMA handle structure for the Tx/Rx channel.
49 (+++) Enable the DMAx interface clock.
50 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
51 (+++) Configure the DMA Tx/Rx channel.
52 (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
53 (+++) Configure the priority and enable the NVIC for the transfer complete
54 interrupt on the DMA Tx/Rx channel.
55
56 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Prescaler value , Hardware
57 flow control and Mode (Receiver/Transmitter) in the huart handle Init structure.
58
59 (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...)
60 in the huart handle AdvancedInit structure.
61
62 (#) For the UART asynchronous mode, initialize the UART registers by calling
63 the HAL_UART_Init() API.
64
65 (#) For the UART Half duplex mode, initialize the UART registers by calling
66 the HAL_HalfDuplex_Init() API.
67
68 (#) For the UART LIN (Local Interconnection Network) mode, initialize the UART registers
69 by calling the HAL_LIN_Init() API.
70
71 (#) For the UART Multiprocessor mode, initialize the UART registers
72 by calling the HAL_MultiProcessor_Init() API.
73
74 (#) For the UART RS485 Driver Enabled mode, initialize the UART registers
75 by calling the HAL_RS485Ex_Init() API.
76
77 [..]
78 (@) These API's (HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(), HAL_MultiProcessor_Init(),
79 also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by
80 calling the customized HAL_UART_MspInit() API.
81
82 ##### Callback registration #####
83 ==================================
84
85 [..]
86 The compilation define USE_HAL_UART_REGISTER_CALLBACKS when set to 1
87 allows the user to configure dynamically the driver callbacks.
88
89 [..]
90 Use Function HAL_UART_RegisterCallback() to register a user callback.
91 Function HAL_UART_RegisterCallback() allows to register following callbacks:
92 (+) TxHalfCpltCallback : Tx Half Complete Callback.
93 (+) TxCpltCallback : Tx Complete Callback.
94 (+) RxHalfCpltCallback : Rx Half Complete Callback.
95 (+) RxCpltCallback : Rx Complete Callback.
96 (+) ErrorCallback : Error Callback.
97 (+) AbortCpltCallback : Abort Complete Callback.
98 (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback.
99 (+) AbortReceiveCpltCallback : Abort Receive Complete Callback.
100 (+) WakeupCallback : Wakeup Callback.
101 #if defined(USART_CR1_FIFOEN)
102 (+) RxFifoFullCallback : Rx Fifo Full Callback.
103 (+) TxFifoEmptyCallback : Tx Fifo Empty Callback.
104 #endif
105 (+) MspInitCallback : UART MspInit.
106 (+) MspDeInitCallback : UART MspDeInit.
107 This function takes as parameters the HAL peripheral handle, the Callback ID
108 and a pointer to the user callback function.
109
110 [..]
111 Use function HAL_UART_UnRegisterCallback() to reset a callback to the default
112 weak function.
113 HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
114 and the Callback ID.
115 This function allows to reset following callbacks:
116 (+) TxHalfCpltCallback : Tx Half Complete Callback.
117 (+) TxCpltCallback : Tx Complete Callback.
118 (+) RxHalfCpltCallback : Rx Half Complete Callback.
119 (+) RxCpltCallback : Rx Complete Callback.
120 (+) ErrorCallback : Error Callback.
121 (+) AbortCpltCallback : Abort Complete Callback.
122 (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback.
123 (+) AbortReceiveCpltCallback : Abort Receive Complete Callback.
124 (+) WakeupCallback : Wakeup Callback.
125 #if defined(USART_CR1_FIFOEN)
126 (+) RxFifoFullCallback : Rx Fifo Full Callback.
127 (+) TxFifoEmptyCallback : Tx Fifo Empty Callback.
128 #endif
129 (+) MspInitCallback : UART MspInit.
130 (+) MspDeInitCallback : UART MspDeInit.
131
132 [..]
133 For specific callback RxEventCallback, use dedicated registration/reset functions:
134 respectively HAL_UART_RegisterRxEventCallback() , HAL_UART_UnRegisterRxEventCallback().
135
136 [..]
137 By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET
138 all callbacks are set to the corresponding weak functions:
139 examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback().
140 Exception done for MspInit and MspDeInit functions that are respectively
141 reset to the legacy weak functions in the HAL_UART_Init()
142 and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand).
143 If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit()
144 keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
145
146 [..]
147 Callbacks can be registered/unregistered in HAL_UART_STATE_READY state only.
148 Exception done MspInit/MspDeInit that can be registered/unregistered
149 in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user)
150 MspInit/DeInit callbacks can be used during the Init/DeInit.
151 In that case first register the MspInit/MspDeInit user callbacks
152 using HAL_UART_RegisterCallback() before calling HAL_UART_DeInit()
153 or HAL_UART_Init() function.
154
155 [..]
156 When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or
157 not defined, the callback registration feature is not available
158 and weak callbacks are used.
159
160
161 @endverbatim
162 ******************************************************************************
163 */
164
165 /* Includes ------------------------------------------------------------------*/
166 #include "stm32l4xx_hal.h"
167
168 /** @addtogroup STM32L4xx_HAL_Driver
169 * @{
170 */
171
172 /** @defgroup UART UART
173 * @brief HAL UART module driver
174 * @{
175 */
176
177 #ifdef HAL_UART_MODULE_ENABLED
178
179 /* Private typedef -----------------------------------------------------------*/
180 /* Private define ------------------------------------------------------------*/
181 /** @defgroup UART_Private_Constants UART Private Constants
182 * @{
183 */
184 #if defined(USART_CR1_FIFOEN)
185 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | \
186 USART_CR1_OVER8 | USART_CR1_FIFOEN)) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */
187 #else
188 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | \
189 USART_CR1_OVER8)) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */
190 #endif /* USART_CR1_FIFOEN */
191
192 #if defined(USART_CR1_FIFOEN)
193 #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT | USART_CR3_TXFTCFG | \
194 USART_CR3_RXFTCFG)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */
195 #else
196 #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE |\
197 USART_CR3_ONEBIT)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */
198 #endif /* USART_CR1_FIFOEN */
199
200 #define LPUART_BRR_MIN 0x00000300U /* LPUART BRR minimum authorized value */
201 #define LPUART_BRR_MAX 0x000FFFFFU /* LPUART BRR maximum authorized value */
202
203 #define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */
204 #define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */
205 /**
206 * @}
207 */
208
209 /* Private macros ------------------------------------------------------------*/
210 /* Private function prototypes -----------------------------------------------*/
211 /** @addtogroup UART_Private_Functions
212 * @{
213 */
214 static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
215 static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
216 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
217 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
218 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
219 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
220 static void UART_DMAError(DMA_HandleTypeDef *hdma);
221 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
222 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
223 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
224 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
225 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
226 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart);
227 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart);
228 #if defined(USART_CR1_FIFOEN)
229 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
230 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
231 #endif /* USART_CR1_FIFOEN */
232 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart);
233 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart);
234 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart);
235 #if defined(USART_CR1_FIFOEN)
236 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
237 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
238 #endif /* USART_CR1_FIFOEN */
239 /**
240 * @}
241 */
242
243 /* Private variables ---------------------------------------------------------*/
244 #if defined(USART_PRESC_PRESCALER)
245 /** @addtogroup UART_Private_variables
246 * @{
247 */
248 const uint16_t UARTPrescTable[12] = {1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U, 128U, 256U};
249 /**
250 * @}
251 */
252
253 #endif /* USART_PRESC_PRESCALER */
254 /* Exported Constants --------------------------------------------------------*/
255 /* Exported functions --------------------------------------------------------*/
256
257 /** @defgroup UART_Exported_Functions UART Exported Functions
258 * @{
259 */
260
261 /** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
262 * @brief Initialization and Configuration functions
263 *
264 @verbatim
265 ===============================================================================
266 ##### Initialization and Configuration functions #####
267 ===============================================================================
268 [..]
269 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
270 in asynchronous mode.
271 (+) For the asynchronous mode the parameters below can be configured:
272 (++) Baud Rate
273 (++) Word Length
274 (++) Stop Bit
275 (++) Parity: If the parity is enabled, then the MSB bit of the data written
276 in the data register is transmitted but is changed by the parity bit.
277 (++) Hardware flow control
278 (++) Receiver/transmitter modes
279 (++) Over Sampling Method
280 (++) One-Bit Sampling Method
281 (+) For the asynchronous mode, the following advanced features can be configured as well:
282 (++) TX and/or RX pin level inversion
283 (++) data logical level inversion
284 (++) RX and TX pins swap
285 (++) RX overrun detection disabling
286 (++) DMA disabling on RX error
287 (++) MSB first on communication line
288 (++) auto Baud rate detection
289 [..]
290 The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init()and HAL_MultiProcessor_Init()API
291 follow respectively the UART asynchronous, UART Half duplex, UART LIN mode
292 and UART multiprocessor mode configuration procedures (details for the procedures
293 are available in reference manual).
294
295 @endverbatim
296
297 Depending on the frame length defined by the M1 and M0 bits (7-bit,
298 8-bit or 9-bit), the possible UART formats are listed in the
299 following table.
300
301 Table 1. UART frame format.
302 +-----------------------------------------------------------------------+
303 | M1 bit | M0 bit | PCE bit | UART frame |
304 |---------|---------|-----------|---------------------------------------|
305 | 0 | 0 | 0 | | SB | 8 bit data | STB | |
306 |---------|---------|-----------|---------------------------------------|
307 | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | |
308 |---------|---------|-----------|---------------------------------------|
309 | 0 | 1 | 0 | | SB | 9 bit data | STB | |
310 |---------|---------|-----------|---------------------------------------|
311 | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | |
312 |---------|---------|-----------|---------------------------------------|
313 | 1 | 0 | 0 | | SB | 7 bit data | STB | |
314 |---------|---------|-----------|---------------------------------------|
315 | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | |
316 +-----------------------------------------------------------------------+
317
318 * @{
319 */
320
321 /**
322 * @brief Initialize the UART mode according to the specified
323 * parameters in the UART_InitTypeDef and initialize the associated handle.
324 * @param huart UART handle.
325 * @retval HAL status
326 */
HAL_UART_Init(UART_HandleTypeDef * huart)327 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
328 {
329 /* Check the UART handle allocation */
330 if (huart == NULL)
331 {
332 return HAL_ERROR;
333 }
334
335 if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
336 {
337 /* Check the parameters */
338 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
339 }
340 else
341 {
342 /* Check the parameters */
343 assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
344 }
345
346 if (huart->gState == HAL_UART_STATE_RESET)
347 {
348 /* Allocate lock resource and initialize it */
349 huart->Lock = HAL_UNLOCKED;
350
351 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
352 UART_InitCallbacksToDefault(huart);
353
354 if (huart->MspInitCallback == NULL)
355 {
356 huart->MspInitCallback = HAL_UART_MspInit;
357 }
358
359 /* Init the low level hardware */
360 huart->MspInitCallback(huart);
361 #else
362 /* Init the low level hardware : GPIO, CLOCK */
363 HAL_UART_MspInit(huart);
364 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
365 }
366
367 huart->gState = HAL_UART_STATE_BUSY;
368
369 __HAL_UART_DISABLE(huart);
370
371 /* Perform advanced settings configuration */
372 /* For some items, configuration requires to be done prior TE and RE bits are set */
373 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
374 {
375 UART_AdvFeatureConfig(huart);
376 }
377
378 /* Set the UART Communication parameters */
379 if (UART_SetConfig(huart) == HAL_ERROR)
380 {
381 return HAL_ERROR;
382 }
383
384 /* In asynchronous mode, the following bits must be kept cleared:
385 - LINEN and CLKEN bits in the USART_CR2 register,
386 - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
387 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
388 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
389
390 __HAL_UART_ENABLE(huart);
391
392 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
393 return (UART_CheckIdleState(huart));
394 }
395
396 /**
397 * @brief Initialize the half-duplex mode according to the specified
398 * parameters in the UART_InitTypeDef and creates the associated handle.
399 * @param huart UART handle.
400 * @retval HAL status
401 */
HAL_HalfDuplex_Init(UART_HandleTypeDef * huart)402 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
403 {
404 /* Check the UART handle allocation */
405 if (huart == NULL)
406 {
407 return HAL_ERROR;
408 }
409
410 /* Check UART instance */
411 assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
412
413 if (huart->gState == HAL_UART_STATE_RESET)
414 {
415 /* Allocate lock resource and initialize it */
416 huart->Lock = HAL_UNLOCKED;
417
418 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
419 UART_InitCallbacksToDefault(huart);
420
421 if (huart->MspInitCallback == NULL)
422 {
423 huart->MspInitCallback = HAL_UART_MspInit;
424 }
425
426 /* Init the low level hardware */
427 huart->MspInitCallback(huart);
428 #else
429 /* Init the low level hardware : GPIO, CLOCK */
430 HAL_UART_MspInit(huart);
431 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
432 }
433
434 huart->gState = HAL_UART_STATE_BUSY;
435
436 __HAL_UART_DISABLE(huart);
437
438 /* Perform advanced settings configuration */
439 /* For some items, configuration requires to be done prior TE and RE bits are set */
440 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
441 {
442 UART_AdvFeatureConfig(huart);
443 }
444
445 /* Set the UART Communication parameters */
446 if (UART_SetConfig(huart) == HAL_ERROR)
447 {
448 return HAL_ERROR;
449 }
450
451 /* In half-duplex mode, the following bits must be kept cleared:
452 - LINEN and CLKEN bits in the USART_CR2 register,
453 - SCEN and IREN bits in the USART_CR3 register.*/
454 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
455 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
456
457 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
458 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
459
460 __HAL_UART_ENABLE(huart);
461
462 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
463 return (UART_CheckIdleState(huart));
464 }
465
466
467 /**
468 * @brief Initialize the LIN mode according to the specified
469 * parameters in the UART_InitTypeDef and creates the associated handle.
470 * @param huart UART handle.
471 * @param BreakDetectLength Specifies the LIN break detection length.
472 * This parameter can be one of the following values:
473 * @arg @ref UART_LINBREAKDETECTLENGTH_10B 10-bit break detection
474 * @arg @ref UART_LINBREAKDETECTLENGTH_11B 11-bit break detection
475 * @retval HAL status
476 */
HAL_LIN_Init(UART_HandleTypeDef * huart,uint32_t BreakDetectLength)477 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
478 {
479 /* Check the UART handle allocation */
480 if (huart == NULL)
481 {
482 return HAL_ERROR;
483 }
484
485 /* Check the LIN UART instance */
486 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
487 /* Check the Break detection length parameter */
488 assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
489
490 /* LIN mode limited to 16-bit oversampling only */
491 if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
492 {
493 return HAL_ERROR;
494 }
495 /* LIN mode limited to 8-bit data length */
496 if (huart->Init.WordLength != UART_WORDLENGTH_8B)
497 {
498 return HAL_ERROR;
499 }
500
501 if (huart->gState == HAL_UART_STATE_RESET)
502 {
503 /* Allocate lock resource and initialize it */
504 huart->Lock = HAL_UNLOCKED;
505
506 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
507 UART_InitCallbacksToDefault(huart);
508
509 if (huart->MspInitCallback == NULL)
510 {
511 huart->MspInitCallback = HAL_UART_MspInit;
512 }
513
514 /* Init the low level hardware */
515 huart->MspInitCallback(huart);
516 #else
517 /* Init the low level hardware : GPIO, CLOCK */
518 HAL_UART_MspInit(huart);
519 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
520 }
521
522 huart->gState = HAL_UART_STATE_BUSY;
523
524 __HAL_UART_DISABLE(huart);
525
526 /* Perform advanced settings configuration */
527 /* For some items, configuration requires to be done prior TE and RE bits are set */
528 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
529 {
530 UART_AdvFeatureConfig(huart);
531 }
532
533 /* Set the UART Communication parameters */
534 if (UART_SetConfig(huart) == HAL_ERROR)
535 {
536 return HAL_ERROR;
537 }
538
539 /* In LIN mode, the following bits must be kept cleared:
540 - LINEN and CLKEN bits in the USART_CR2 register,
541 - SCEN and IREN bits in the USART_CR3 register.*/
542 CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
543 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
544
545 /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
546 SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
547
548 /* Set the USART LIN Break detection length. */
549 MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
550
551 __HAL_UART_ENABLE(huart);
552
553 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
554 return (UART_CheckIdleState(huart));
555 }
556
557
558 /**
559 * @brief Initialize the multiprocessor mode according to the specified
560 * parameters in the UART_InitTypeDef and initialize the associated handle.
561 * @param huart UART handle.
562 * @param Address UART node address (4-, 6-, 7- or 8-bit long).
563 * @param WakeUpMethod Specifies the UART wakeup method.
564 * This parameter can be one of the following values:
565 * @arg @ref UART_WAKEUPMETHOD_IDLELINE WakeUp by an idle line detection
566 * @arg @ref UART_WAKEUPMETHOD_ADDRESSMARK WakeUp by an address mark
567 * @note If the user resorts to idle line detection wake up, the Address parameter
568 * is useless and ignored by the initialization function.
569 * @note If the user resorts to address mark wake up, the address length detection
570 * is configured by default to 4 bits only. For the UART to be able to
571 * manage 6-, 7- or 8-bit long addresses detection, the API
572 * HAL_MultiProcessorEx_AddressLength_Set() must be called after
573 * HAL_MultiProcessor_Init().
574 * @retval HAL status
575 */
HAL_MultiProcessor_Init(UART_HandleTypeDef * huart,uint8_t Address,uint32_t WakeUpMethod)576 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
577 {
578 /* Check the UART handle allocation */
579 if (huart == NULL)
580 {
581 return HAL_ERROR;
582 }
583
584 /* Check the wake up method parameter */
585 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
586
587 if (huart->gState == HAL_UART_STATE_RESET)
588 {
589 /* Allocate lock resource and initialize it */
590 huart->Lock = HAL_UNLOCKED;
591
592 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
593 UART_InitCallbacksToDefault(huart);
594
595 if (huart->MspInitCallback == NULL)
596 {
597 huart->MspInitCallback = HAL_UART_MspInit;
598 }
599
600 /* Init the low level hardware */
601 huart->MspInitCallback(huart);
602 #else
603 /* Init the low level hardware : GPIO, CLOCK */
604 HAL_UART_MspInit(huart);
605 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
606 }
607
608 huart->gState = HAL_UART_STATE_BUSY;
609
610 __HAL_UART_DISABLE(huart);
611
612 /* Perform advanced settings configuration */
613 /* For some items, configuration requires to be done prior TE and RE bits are set */
614 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
615 {
616 UART_AdvFeatureConfig(huart);
617 }
618
619 /* Set the UART Communication parameters */
620 if (UART_SetConfig(huart) == HAL_ERROR)
621 {
622 return HAL_ERROR;
623 }
624
625 /* In multiprocessor mode, the following bits must be kept cleared:
626 - LINEN and CLKEN bits in the USART_CR2 register,
627 - SCEN, HDSEL and IREN bits in the USART_CR3 register. */
628 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
629 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
630
631 if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
632 {
633 /* If address mark wake up method is chosen, set the USART address node */
634 MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
635 }
636
637 /* Set the wake up method by setting the WAKE bit in the CR1 register */
638 MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
639
640 __HAL_UART_ENABLE(huart);
641
642 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
643 return (UART_CheckIdleState(huart));
644 }
645
646
647 /**
648 * @brief DeInitialize the UART peripheral.
649 * @param huart UART handle.
650 * @retval HAL status
651 */
HAL_UART_DeInit(UART_HandleTypeDef * huart)652 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
653 {
654 /* Check the UART handle allocation */
655 if (huart == NULL)
656 {
657 return HAL_ERROR;
658 }
659
660 /* Check the parameters */
661 assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
662
663 huart->gState = HAL_UART_STATE_BUSY;
664
665 __HAL_UART_DISABLE(huart);
666
667 huart->Instance->CR1 = 0x0U;
668 huart->Instance->CR2 = 0x0U;
669 huart->Instance->CR3 = 0x0U;
670
671 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
672 if (huart->MspDeInitCallback == NULL)
673 {
674 huart->MspDeInitCallback = HAL_UART_MspDeInit;
675 }
676 /* DeInit the low level hardware */
677 huart->MspDeInitCallback(huart);
678 #else
679 /* DeInit the low level hardware */
680 HAL_UART_MspDeInit(huart);
681 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
682
683 huart->ErrorCode = HAL_UART_ERROR_NONE;
684 huart->gState = HAL_UART_STATE_RESET;
685 huart->RxState = HAL_UART_STATE_RESET;
686 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
687 huart->RxEventType = HAL_UART_RXEVENT_TC;
688
689 __HAL_UNLOCK(huart);
690
691 return HAL_OK;
692 }
693
694 /**
695 * @brief Initialize the UART MSP.
696 * @param huart UART handle.
697 * @retval None
698 */
HAL_UART_MspInit(UART_HandleTypeDef * huart)699 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
700 {
701 /* Prevent unused argument(s) compilation warning */
702 UNUSED(huart);
703
704 /* NOTE : This function should not be modified, when the callback is needed,
705 the HAL_UART_MspInit can be implemented in the user file
706 */
707 }
708
709 /**
710 * @brief DeInitialize the UART MSP.
711 * @param huart UART handle.
712 * @retval None
713 */
HAL_UART_MspDeInit(UART_HandleTypeDef * huart)714 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
715 {
716 /* Prevent unused argument(s) compilation warning */
717 UNUSED(huart);
718
719 /* NOTE : This function should not be modified, when the callback is needed,
720 the HAL_UART_MspDeInit can be implemented in the user file
721 */
722 }
723
724 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
725 /**
726 * @brief Register a User UART Callback
727 * To be used to override the weak predefined callback
728 * @note The HAL_UART_RegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(),
729 * HAL_LIN_Init(), HAL_MultiProcessor_Init() or HAL_RS485Ex_Init() in HAL_UART_STATE_RESET to register
730 * callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID
731 * @param huart uart handle
732 * @param CallbackID ID of the callback to be registered
733 * This parameter can be one of the following values:
734 * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID
735 * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID
736 * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID
737 * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID
738 * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID
739 * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID
740 * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID
741 * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID
742 * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID
743 #if defined(USART_CR1_FIFOEN)
744 * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID
745 * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID
746 #endif
747 * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
748 * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
749 * @param pCallback pointer to the Callback function
750 * @retval HAL status
751 */
HAL_UART_RegisterCallback(UART_HandleTypeDef * huart,HAL_UART_CallbackIDTypeDef CallbackID,pUART_CallbackTypeDef pCallback)752 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
753 pUART_CallbackTypeDef pCallback)
754 {
755 HAL_StatusTypeDef status = HAL_OK;
756
757 if (pCallback == NULL)
758 {
759 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
760
761 return HAL_ERROR;
762 }
763
764 if (huart->gState == HAL_UART_STATE_READY)
765 {
766 switch (CallbackID)
767 {
768 case HAL_UART_TX_HALFCOMPLETE_CB_ID :
769 huart->TxHalfCpltCallback = pCallback;
770 break;
771
772 case HAL_UART_TX_COMPLETE_CB_ID :
773 huart->TxCpltCallback = pCallback;
774 break;
775
776 case HAL_UART_RX_HALFCOMPLETE_CB_ID :
777 huart->RxHalfCpltCallback = pCallback;
778 break;
779
780 case HAL_UART_RX_COMPLETE_CB_ID :
781 huart->RxCpltCallback = pCallback;
782 break;
783
784 case HAL_UART_ERROR_CB_ID :
785 huart->ErrorCallback = pCallback;
786 break;
787
788 case HAL_UART_ABORT_COMPLETE_CB_ID :
789 huart->AbortCpltCallback = pCallback;
790 break;
791
792 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
793 huart->AbortTransmitCpltCallback = pCallback;
794 break;
795
796 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
797 huart->AbortReceiveCpltCallback = pCallback;
798 break;
799
800 case HAL_UART_WAKEUP_CB_ID :
801 huart->WakeupCallback = pCallback;
802 break;
803
804 #if defined(USART_CR1_FIFOEN)
805 case HAL_UART_RX_FIFO_FULL_CB_ID :
806 huart->RxFifoFullCallback = pCallback;
807 break;
808
809 case HAL_UART_TX_FIFO_EMPTY_CB_ID :
810 huart->TxFifoEmptyCallback = pCallback;
811 break;
812 #endif /* USART_CR1_FIFOEN */
813
814 case HAL_UART_MSPINIT_CB_ID :
815 huart->MspInitCallback = pCallback;
816 break;
817
818 case HAL_UART_MSPDEINIT_CB_ID :
819 huart->MspDeInitCallback = pCallback;
820 break;
821
822 default :
823 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
824
825 status = HAL_ERROR;
826 break;
827 }
828 }
829 else if (huart->gState == HAL_UART_STATE_RESET)
830 {
831 switch (CallbackID)
832 {
833 case HAL_UART_MSPINIT_CB_ID :
834 huart->MspInitCallback = pCallback;
835 break;
836
837 case HAL_UART_MSPDEINIT_CB_ID :
838 huart->MspDeInitCallback = pCallback;
839 break;
840
841 default :
842 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
843
844 status = HAL_ERROR;
845 break;
846 }
847 }
848 else
849 {
850 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
851
852 status = HAL_ERROR;
853 }
854
855 return status;
856 }
857
858 /**
859 * @brief Unregister an UART Callback
860 * UART callaback is redirected to the weak predefined callback
861 * @note The HAL_UART_UnRegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(),
862 * HAL_LIN_Init(), HAL_MultiProcessor_Init() or HAL_RS485Ex_Init() in HAL_UART_STATE_RESET to un-register
863 * callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID
864 * @param huart uart handle
865 * @param CallbackID ID of the callback to be unregistered
866 * This parameter can be one of the following values:
867 * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID
868 * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID
869 * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID
870 * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID
871 * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID
872 * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID
873 * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID
874 * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID
875 * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID
876 #if defined(USART_CR1_FIFOEN)
877 * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID
878 * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID
879 #endif
880 * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
881 * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
882 * @retval HAL status
883 */
HAL_UART_UnRegisterCallback(UART_HandleTypeDef * huart,HAL_UART_CallbackIDTypeDef CallbackID)884 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID)
885 {
886 HAL_StatusTypeDef status = HAL_OK;
887
888 if (HAL_UART_STATE_READY == huart->gState)
889 {
890 switch (CallbackID)
891 {
892 case HAL_UART_TX_HALFCOMPLETE_CB_ID :
893 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
894 break;
895
896 case HAL_UART_TX_COMPLETE_CB_ID :
897 huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
898 break;
899
900 case HAL_UART_RX_HALFCOMPLETE_CB_ID :
901 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
902 break;
903
904 case HAL_UART_RX_COMPLETE_CB_ID :
905 huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
906 break;
907
908 case HAL_UART_ERROR_CB_ID :
909 huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
910 break;
911
912 case HAL_UART_ABORT_COMPLETE_CB_ID :
913 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
914 break;
915
916 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
917 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak
918 AbortTransmitCpltCallback */
919 break;
920
921 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
922 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak
923 AbortReceiveCpltCallback */
924 break;
925
926 case HAL_UART_WAKEUP_CB_ID :
927 huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */
928 break;
929
930 #if defined(USART_CR1_FIFOEN)
931 case HAL_UART_RX_FIFO_FULL_CB_ID :
932 huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
933 break;
934
935 case HAL_UART_TX_FIFO_EMPTY_CB_ID :
936 huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
937 break;
938
939 #endif /* USART_CR1_FIFOEN */
940 case HAL_UART_MSPINIT_CB_ID :
941 huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */
942 break;
943
944 case HAL_UART_MSPDEINIT_CB_ID :
945 huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */
946 break;
947
948 default :
949 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
950
951 status = HAL_ERROR;
952 break;
953 }
954 }
955 else if (HAL_UART_STATE_RESET == huart->gState)
956 {
957 switch (CallbackID)
958 {
959 case HAL_UART_MSPINIT_CB_ID :
960 huart->MspInitCallback = HAL_UART_MspInit;
961 break;
962
963 case HAL_UART_MSPDEINIT_CB_ID :
964 huart->MspDeInitCallback = HAL_UART_MspDeInit;
965 break;
966
967 default :
968 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
969
970 status = HAL_ERROR;
971 break;
972 }
973 }
974 else
975 {
976 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
977
978 status = HAL_ERROR;
979 }
980
981 return status;
982 }
983
984 /**
985 * @brief Register a User UART Rx Event Callback
986 * To be used instead of the weak predefined callback
987 * @param huart Uart handle
988 * @param pCallback Pointer to the Rx Event Callback function
989 * @retval HAL status
990 */
HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef * huart,pUART_RxEventCallbackTypeDef pCallback)991 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback)
992 {
993 HAL_StatusTypeDef status = HAL_OK;
994
995 if (pCallback == NULL)
996 {
997 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
998
999 return HAL_ERROR;
1000 }
1001
1002 if (huart->RxState == HAL_UART_STATE_READY)
1003 {
1004 huart->RxEventCallback = pCallback;
1005 }
1006 else
1007 {
1008 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
1009
1010 status = HAL_ERROR;
1011 }
1012
1013 return status;
1014 }
1015
1016 /**
1017 * @brief UnRegister the UART Rx Event Callback
1018 * UART Rx Event Callback is redirected to the weak HAL_UARTEx_RxEventCallback() predefined callback
1019 * @param huart Uart handle
1020 * @retval HAL status
1021 */
HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef * huart)1022 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart)
1023 {
1024 HAL_StatusTypeDef status = HAL_OK;
1025
1026 if (huart->RxState == HAL_UART_STATE_READY)
1027 {
1028 huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */
1029 }
1030 else
1031 {
1032 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
1033
1034 status = HAL_ERROR;
1035 }
1036
1037 return status;
1038 }
1039
1040 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1041
1042 /**
1043 * @}
1044 */
1045
1046 /** @defgroup UART_Exported_Functions_Group2 IO operation functions
1047 * @brief UART Transmit/Receive functions
1048 *
1049 @verbatim
1050 ===============================================================================
1051 ##### IO operation functions #####
1052 ===============================================================================
1053 This subsection provides a set of functions allowing to manage the UART asynchronous
1054 and Half duplex data transfers.
1055
1056 (#) There are two mode of transfer:
1057 (+) Blocking mode: The communication is performed in polling mode.
1058 The HAL status of all data processing is returned by the same function
1059 after finishing transfer.
1060 (+) Non-Blocking mode: The communication is performed using Interrupts
1061 or DMA, These API's return the HAL status.
1062 The end of the data processing will be indicated through the
1063 dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
1064 using DMA mode.
1065 The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
1066 will be executed respectively at the end of the transmit or Receive process
1067 The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
1068
1069 (#) Blocking mode API's are :
1070 (+) HAL_UART_Transmit()
1071 (+) HAL_UART_Receive()
1072
1073 (#) Non-Blocking mode API's with Interrupt are :
1074 (+) HAL_UART_Transmit_IT()
1075 (+) HAL_UART_Receive_IT()
1076 (+) HAL_UART_IRQHandler()
1077
1078 (#) Non-Blocking mode API's with DMA are :
1079 (+) HAL_UART_Transmit_DMA()
1080 (+) HAL_UART_Receive_DMA()
1081 (+) HAL_UART_DMAPause()
1082 (+) HAL_UART_DMAResume()
1083 (+) HAL_UART_DMAStop()
1084
1085 (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode:
1086 (+) HAL_UART_TxHalfCpltCallback()
1087 (+) HAL_UART_TxCpltCallback()
1088 (+) HAL_UART_RxHalfCpltCallback()
1089 (+) HAL_UART_RxCpltCallback()
1090 (+) HAL_UART_ErrorCallback()
1091
1092 (#) Non-Blocking mode transfers could be aborted using Abort API's :
1093 (+) HAL_UART_Abort()
1094 (+) HAL_UART_AbortTransmit()
1095 (+) HAL_UART_AbortReceive()
1096 (+) HAL_UART_Abort_IT()
1097 (+) HAL_UART_AbortTransmit_IT()
1098 (+) HAL_UART_AbortReceive_IT()
1099
1100 (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
1101 (+) HAL_UART_AbortCpltCallback()
1102 (+) HAL_UART_AbortTransmitCpltCallback()
1103 (+) HAL_UART_AbortReceiveCpltCallback()
1104
1105 (#) A Rx Event Reception Callback (Rx event notification) is available for Non_Blocking modes of enhanced
1106 reception services:
1107 (+) HAL_UARTEx_RxEventCallback()
1108
1109 (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
1110 Errors are handled as follows :
1111 (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is
1112 to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error
1113 in Interrupt mode reception .
1114 Received character is then retrieved and stored in Rx buffer, Error code is set to allow user
1115 to identify error type, and HAL_UART_ErrorCallback() user callback is executed.
1116 Transfer is kept ongoing on UART side.
1117 If user wants to abort it, Abort services should be called by user.
1118 (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
1119 This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
1120 Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback()
1121 user callback is executed.
1122
1123 -@- In the Half duplex communication, it is forbidden to run the transmit
1124 and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
1125
1126 @endverbatim
1127 * @{
1128 */
1129
1130 /**
1131 * @brief Send an amount of data in blocking mode.
1132 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1133 * the sent data is handled as a set of u16. In this case, Size must indicate the number
1134 * of u16 provided through pData.
1135 * @note When FIFO mode is enabled, writing a data in the TDR register adds one
1136 * data to the TXFIFO. Write operations to the TDR register are performed
1137 * when TXFNF flag is set. From hardware perspective, TXFNF flag and
1138 * TXE are mapped on the same bit-field.
1139 * @param huart UART handle.
1140 * @param pData Pointer to data buffer (u8 or u16 data elements).
1141 * @param Size Amount of data elements (u8 or u16) to be sent.
1142 * @param Timeout Timeout duration.
1143 * @retval HAL status
1144 */
HAL_UART_Transmit(UART_HandleTypeDef * huart,const uint8_t * pData,uint16_t Size,uint32_t Timeout)1145 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
1146 {
1147 const uint8_t *pdata8bits;
1148 const uint16_t *pdata16bits;
1149 uint32_t tickstart;
1150
1151 /* Check that a Tx process is not already ongoing */
1152 if (huart->gState == HAL_UART_STATE_READY)
1153 {
1154 if ((pData == NULL) || (Size == 0U))
1155 {
1156 return HAL_ERROR;
1157 }
1158
1159 huart->ErrorCode = HAL_UART_ERROR_NONE;
1160 huart->gState = HAL_UART_STATE_BUSY_TX;
1161
1162 /* Init tickstart for timeout management */
1163 tickstart = HAL_GetTick();
1164
1165 huart->TxXferSize = Size;
1166 huart->TxXferCount = Size;
1167
1168 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
1169 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1170 {
1171 pdata8bits = NULL;
1172 pdata16bits = (const uint16_t *) pData;
1173 }
1174 else
1175 {
1176 pdata8bits = pData;
1177 pdata16bits = NULL;
1178 }
1179
1180 while (huart->TxXferCount > 0U)
1181 {
1182 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
1183 {
1184
1185 huart->gState = HAL_UART_STATE_READY;
1186
1187 return HAL_TIMEOUT;
1188 }
1189 if (pdata8bits == NULL)
1190 {
1191 huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
1192 pdata16bits++;
1193 }
1194 else
1195 {
1196 huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
1197 pdata8bits++;
1198 }
1199 huart->TxXferCount--;
1200 }
1201
1202 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
1203 {
1204 huart->gState = HAL_UART_STATE_READY;
1205
1206 return HAL_TIMEOUT;
1207 }
1208
1209 /* At end of Tx process, restore huart->gState to Ready */
1210 huart->gState = HAL_UART_STATE_READY;
1211
1212 return HAL_OK;
1213 }
1214 else
1215 {
1216 return HAL_BUSY;
1217 }
1218 }
1219
1220 /**
1221 * @brief Receive an amount of data in blocking mode.
1222 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1223 * the received data is handled as a set of u16. In this case, Size must indicate the number
1224 * of u16 available through pData.
1225 * @note When FIFO mode is enabled, the RXFNE flag is set as long as the RXFIFO
1226 * is not empty. Read operations from the RDR register are performed when
1227 * RXFNE flag is set. From hardware perspective, RXFNE flag and
1228 * RXNE are mapped on the same bit-field.
1229 * @param huart UART handle.
1230 * @param pData Pointer to data buffer (u8 or u16 data elements).
1231 * @param Size Amount of data elements (u8 or u16) to be received.
1232 * @param Timeout Timeout duration.
1233 * @retval HAL status
1234 */
HAL_UART_Receive(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size,uint32_t Timeout)1235 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1236 {
1237 uint8_t *pdata8bits;
1238 uint16_t *pdata16bits;
1239 uint16_t uhMask;
1240 uint32_t tickstart;
1241
1242 /* Check that a Rx process is not already ongoing */
1243 if (huart->RxState == HAL_UART_STATE_READY)
1244 {
1245 if ((pData == NULL) || (Size == 0U))
1246 {
1247 return HAL_ERROR;
1248 }
1249
1250 huart->ErrorCode = HAL_UART_ERROR_NONE;
1251 huart->RxState = HAL_UART_STATE_BUSY_RX;
1252 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1253
1254 /* Init tickstart for timeout management */
1255 tickstart = HAL_GetTick();
1256
1257 huart->RxXferSize = Size;
1258 huart->RxXferCount = Size;
1259
1260 /* Computation of UART mask to apply to RDR register */
1261 UART_MASK_COMPUTATION(huart);
1262 uhMask = huart->Mask;
1263
1264 /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
1265 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1266 {
1267 pdata8bits = NULL;
1268 pdata16bits = (uint16_t *) pData;
1269 }
1270 else
1271 {
1272 pdata8bits = pData;
1273 pdata16bits = NULL;
1274 }
1275
1276 /* as long as data have to be received */
1277 while (huart->RxXferCount > 0U)
1278 {
1279 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
1280 {
1281 huart->RxState = HAL_UART_STATE_READY;
1282
1283 return HAL_TIMEOUT;
1284 }
1285 if (pdata8bits == NULL)
1286 {
1287 *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask);
1288 pdata16bits++;
1289 }
1290 else
1291 {
1292 *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
1293 pdata8bits++;
1294 }
1295 huart->RxXferCount--;
1296 }
1297
1298 /* At end of Rx process, restore huart->RxState to Ready */
1299 huart->RxState = HAL_UART_STATE_READY;
1300
1301 return HAL_OK;
1302 }
1303 else
1304 {
1305 return HAL_BUSY;
1306 }
1307 }
1308
1309 /**
1310 * @brief Send an amount of data in interrupt mode.
1311 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1312 * the sent data is handled as a set of u16. In this case, Size must indicate the number
1313 * of u16 provided through pData.
1314 * @param huart UART handle.
1315 * @param pData Pointer to data buffer (u8 or u16 data elements).
1316 * @param Size Amount of data elements (u8 or u16) to be sent.
1317 * @retval HAL status
1318 */
HAL_UART_Transmit_IT(UART_HandleTypeDef * huart,const uint8_t * pData,uint16_t Size)1319 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
1320 {
1321 /* Check that a Tx process is not already ongoing */
1322 if (huart->gState == HAL_UART_STATE_READY)
1323 {
1324 if ((pData == NULL) || (Size == 0U))
1325 {
1326 return HAL_ERROR;
1327 }
1328
1329 huart->pTxBuffPtr = pData;
1330 huart->TxXferSize = Size;
1331 huart->TxXferCount = Size;
1332 huart->TxISR = NULL;
1333
1334 huart->ErrorCode = HAL_UART_ERROR_NONE;
1335 huart->gState = HAL_UART_STATE_BUSY_TX;
1336
1337 #if defined(USART_CR1_FIFOEN)
1338 /* Configure Tx interrupt processing */
1339 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1340 {
1341 /* Set the Tx ISR function pointer according to the data word length */
1342 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1343 {
1344 huart->TxISR = UART_TxISR_16BIT_FIFOEN;
1345 }
1346 else
1347 {
1348 huart->TxISR = UART_TxISR_8BIT_FIFOEN;
1349 }
1350
1351 /* Enable the TX FIFO threshold interrupt */
1352 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1353 }
1354 else
1355 {
1356 /* Set the Tx ISR function pointer according to the data word length */
1357 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1358 {
1359 huart->TxISR = UART_TxISR_16BIT;
1360 }
1361 else
1362 {
1363 huart->TxISR = UART_TxISR_8BIT;
1364 }
1365
1366 /* Enable the Transmit Data Register Empty interrupt */
1367 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
1368 }
1369 #else
1370 /* Set the Tx ISR function pointer according to the data word length */
1371 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1372 {
1373 huart->TxISR = UART_TxISR_16BIT;
1374 }
1375 else
1376 {
1377 huart->TxISR = UART_TxISR_8BIT;
1378 }
1379
1380 /* Enable the Transmit Data Register Empty interrupt */
1381 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
1382 #endif /* USART_CR1_FIFOEN */
1383
1384 return HAL_OK;
1385 }
1386 else
1387 {
1388 return HAL_BUSY;
1389 }
1390 }
1391
1392 /**
1393 * @brief Receive an amount of data in interrupt mode.
1394 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1395 * the received data is handled as a set of u16. In this case, Size must indicate the number
1396 * of u16 available through pData.
1397 * @param huart UART handle.
1398 * @param pData Pointer to data buffer (u8 or u16 data elements).
1399 * @param Size Amount of data elements (u8 or u16) to be received.
1400 * @retval HAL status
1401 */
HAL_UART_Receive_IT(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size)1402 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1403 {
1404 /* Check that a Rx process is not already ongoing */
1405 if (huart->RxState == HAL_UART_STATE_READY)
1406 {
1407 if ((pData == NULL) || (Size == 0U))
1408 {
1409 return HAL_ERROR;
1410 }
1411
1412 /* Set Reception type to Standard reception */
1413 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1414
1415 if (!(IS_LPUART_INSTANCE(huart->Instance)))
1416 {
1417 /* Check that USART RTOEN bit is set */
1418 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
1419 {
1420 /* Enable the UART Receiver Timeout Interrupt */
1421 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
1422 }
1423 }
1424
1425 return (UART_Start_Receive_IT(huart, pData, Size));
1426 }
1427 else
1428 {
1429 return HAL_BUSY;
1430 }
1431 }
1432
1433 /**
1434 * @brief Send an amount of data in DMA mode.
1435 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1436 * the sent data is handled as a set of u16. In this case, Size must indicate the number
1437 * of u16 provided through pData.
1438 * @param huart UART handle.
1439 * @param pData Pointer to data buffer (u8 or u16 data elements).
1440 * @param Size Amount of data elements (u8 or u16) to be sent.
1441 * @retval HAL status
1442 */
HAL_UART_Transmit_DMA(UART_HandleTypeDef * huart,const uint8_t * pData,uint16_t Size)1443 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
1444 {
1445 /* Check that a Tx process is not already ongoing */
1446 if (huart->gState == HAL_UART_STATE_READY)
1447 {
1448 if ((pData == NULL) || (Size == 0U))
1449 {
1450 return HAL_ERROR;
1451 }
1452
1453 huart->pTxBuffPtr = pData;
1454 huart->TxXferSize = Size;
1455 huart->TxXferCount = Size;
1456
1457 huart->ErrorCode = HAL_UART_ERROR_NONE;
1458 huart->gState = HAL_UART_STATE_BUSY_TX;
1459
1460 if (huart->hdmatx != NULL)
1461 {
1462 /* Set the UART DMA transfer complete callback */
1463 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
1464
1465 /* Set the UART DMA Half transfer complete callback */
1466 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
1467
1468 /* Set the DMA error callback */
1469 huart->hdmatx->XferErrorCallback = UART_DMAError;
1470
1471 /* Set the DMA abort callback */
1472 huart->hdmatx->XferAbortCallback = NULL;
1473
1474 /* Enable the UART transmit DMA channel */
1475 if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK)
1476 {
1477 /* Set error code to DMA */
1478 huart->ErrorCode = HAL_UART_ERROR_DMA;
1479
1480 /* Restore huart->gState to ready */
1481 huart->gState = HAL_UART_STATE_READY;
1482
1483 return HAL_ERROR;
1484 }
1485 }
1486 /* Clear the TC flag in the ICR register */
1487 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
1488
1489 /* Enable the DMA transfer for transmit request by setting the DMAT bit
1490 in the UART CR3 register */
1491 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1492
1493 return HAL_OK;
1494 }
1495 else
1496 {
1497 return HAL_BUSY;
1498 }
1499 }
1500
1501 /**
1502 * @brief Receive an amount of data in DMA mode.
1503 * @note When the UART parity is enabled (PCE = 1), the received data contain
1504 * the parity bit (MSB position).
1505 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1506 * the received data is handled as a set of u16. In this case, Size must indicate the number
1507 * of u16 available through pData.
1508 * @param huart UART handle.
1509 * @param pData Pointer to data buffer (u8 or u16 data elements).
1510 * @param Size Amount of data elements (u8 or u16) to be received.
1511 * @retval HAL status
1512 */
HAL_UART_Receive_DMA(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size)1513 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1514 {
1515 /* Check that a Rx process is not already ongoing */
1516 if (huart->RxState == HAL_UART_STATE_READY)
1517 {
1518 if ((pData == NULL) || (Size == 0U))
1519 {
1520 return HAL_ERROR;
1521 }
1522
1523 /* Set Reception type to Standard reception */
1524 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1525
1526 if (!(IS_LPUART_INSTANCE(huart->Instance)))
1527 {
1528 /* Check that USART RTOEN bit is set */
1529 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
1530 {
1531 /* Enable the UART Receiver Timeout Interrupt */
1532 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
1533 }
1534 }
1535
1536 return (UART_Start_Receive_DMA(huart, pData, Size));
1537 }
1538 else
1539 {
1540 return HAL_BUSY;
1541 }
1542 }
1543
1544 /**
1545 * @brief Pause the DMA Transfer.
1546 * @param huart UART handle.
1547 * @retval HAL status
1548 */
HAL_UART_DMAPause(UART_HandleTypeDef * huart)1549 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
1550 {
1551 const HAL_UART_StateTypeDef gstate = huart->gState;
1552 const HAL_UART_StateTypeDef rxstate = huart->RxState;
1553
1554 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1555 (gstate == HAL_UART_STATE_BUSY_TX))
1556 {
1557 /* Disable the UART DMA Tx request */
1558 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1559 }
1560 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1561 (rxstate == HAL_UART_STATE_BUSY_RX))
1562 {
1563 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
1564 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1565 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1566
1567 /* Disable the UART DMA Rx request */
1568 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1569 }
1570
1571 return HAL_OK;
1572 }
1573
1574 /**
1575 * @brief Resume the DMA Transfer.
1576 * @param huart UART handle.
1577 * @retval HAL status
1578 */
HAL_UART_DMAResume(UART_HandleTypeDef * huart)1579 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
1580 {
1581 if (huart->gState == HAL_UART_STATE_BUSY_TX)
1582 {
1583 /* Enable the UART DMA Tx request */
1584 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1585 }
1586 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
1587 {
1588 /* Clear the Overrun flag before resuming the Rx transfer */
1589 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
1590
1591 /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */
1592 if (huart->Init.Parity != UART_PARITY_NONE)
1593 {
1594 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1595 }
1596 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1597
1598 /* Enable the UART DMA Rx request */
1599 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1600 }
1601
1602 return HAL_OK;
1603 }
1604
1605 /**
1606 * @brief Stop the DMA Transfer.
1607 * @param huart UART handle.
1608 * @retval HAL status
1609 */
HAL_UART_DMAStop(UART_HandleTypeDef * huart)1610 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
1611 {
1612 /* The Lock is not implemented on this API to allow the user application
1613 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() /
1614 HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback:
1615 indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
1616 interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
1617 the stream and the corresponding call back is executed. */
1618
1619 const HAL_UART_StateTypeDef gstate = huart->gState;
1620 const HAL_UART_StateTypeDef rxstate = huart->RxState;
1621
1622 /* Stop UART DMA Tx request if ongoing */
1623 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1624 (gstate == HAL_UART_STATE_BUSY_TX))
1625 {
1626 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1627
1628 /* Abort the UART DMA Tx channel */
1629 if (huart->hdmatx != NULL)
1630 {
1631 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1632 {
1633 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1634 {
1635 /* Set error code to DMA */
1636 huart->ErrorCode = HAL_UART_ERROR_DMA;
1637
1638 return HAL_TIMEOUT;
1639 }
1640 }
1641 }
1642
1643 UART_EndTxTransfer(huart);
1644 }
1645
1646 /* Stop UART DMA Rx request if ongoing */
1647 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1648 (rxstate == HAL_UART_STATE_BUSY_RX))
1649 {
1650 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1651
1652 /* Abort the UART DMA Rx channel */
1653 if (huart->hdmarx != NULL)
1654 {
1655 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1656 {
1657 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1658 {
1659 /* Set error code to DMA */
1660 huart->ErrorCode = HAL_UART_ERROR_DMA;
1661
1662 return HAL_TIMEOUT;
1663 }
1664 }
1665 }
1666
1667 UART_EndRxTransfer(huart);
1668 }
1669
1670 return HAL_OK;
1671 }
1672
1673 /**
1674 * @brief Abort ongoing transfers (blocking mode).
1675 * @param huart UART handle.
1676 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
1677 * This procedure performs following operations :
1678 * - Disable UART Interrupts (Tx and Rx)
1679 * - Disable the DMA transfer in the peripheral register (if enabled)
1680 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1681 * - Set handle State to READY
1682 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1683 * @retval HAL status
1684 */
HAL_UART_Abort(UART_HandleTypeDef * huart)1685 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
1686 {
1687 #if defined(USART_CR1_FIFOEN)
1688 /* Disable TXE, TC, RXNE, PE, RXFT, TXFT and ERR (Frame error, noise error, overrun error) interrupts */
1689 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE |
1690 USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
1691 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE);
1692 #else
1693 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1694 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1695 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1696 #endif /* USART_CR1_FIFOEN */
1697
1698 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
1699 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
1700 {
1701 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1702 }
1703
1704 /* Abort the UART DMA Tx channel if enabled */
1705 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1706 {
1707 /* Disable the UART DMA Tx request if enabled */
1708 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1709
1710 /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
1711 if (huart->hdmatx != NULL)
1712 {
1713 /* Set the UART DMA Abort callback to Null.
1714 No call back execution at end of DMA abort procedure */
1715 huart->hdmatx->XferAbortCallback = NULL;
1716
1717 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1718 {
1719 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1720 {
1721 /* Set error code to DMA */
1722 huart->ErrorCode = HAL_UART_ERROR_DMA;
1723
1724 return HAL_TIMEOUT;
1725 }
1726 }
1727 }
1728 }
1729
1730 /* Abort the UART DMA Rx channel if enabled */
1731 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1732 {
1733 /* Disable the UART DMA Rx request if enabled */
1734 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1735
1736 /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
1737 if (huart->hdmarx != NULL)
1738 {
1739 /* Set the UART DMA Abort callback to Null.
1740 No call back execution at end of DMA abort procedure */
1741 huart->hdmarx->XferAbortCallback = NULL;
1742
1743 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1744 {
1745 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1746 {
1747 /* Set error code to DMA */
1748 huart->ErrorCode = HAL_UART_ERROR_DMA;
1749
1750 return HAL_TIMEOUT;
1751 }
1752 }
1753 }
1754 }
1755
1756 /* Reset Tx and Rx transfer counters */
1757 huart->TxXferCount = 0U;
1758 huart->RxXferCount = 0U;
1759
1760 /* Clear the Error flags in the ICR register */
1761 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1762
1763 #if defined(USART_CR1_FIFOEN)
1764 /* Flush the whole TX FIFO (if needed) */
1765 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1766 {
1767 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1768 }
1769 #endif /* USART_CR1_FIFOEN */
1770
1771 /* Discard the received data */
1772 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1773
1774 /* Restore huart->gState and huart->RxState to Ready */
1775 huart->gState = HAL_UART_STATE_READY;
1776 huart->RxState = HAL_UART_STATE_READY;
1777 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1778
1779 huart->ErrorCode = HAL_UART_ERROR_NONE;
1780
1781 return HAL_OK;
1782 }
1783
1784 /**
1785 * @brief Abort ongoing Transmit transfer (blocking mode).
1786 * @param huart UART handle.
1787 * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
1788 * This procedure performs following operations :
1789 * - Disable UART Interrupts (Tx)
1790 * - Disable the DMA transfer in the peripheral register (if enabled)
1791 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1792 * - Set handle State to READY
1793 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1794 * @retval HAL status
1795 */
HAL_UART_AbortTransmit(UART_HandleTypeDef * huart)1796 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
1797 {
1798 #if defined(USART_CR1_FIFOEN)
1799 /* Disable TCIE, TXEIE and TXFTIE interrupts */
1800 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
1801 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1802 #else
1803 /* Disable TXEIE and TCIE interrupts */
1804 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
1805 #endif /* USART_CR1_FIFOEN */
1806
1807 /* Abort the UART DMA Tx channel if enabled */
1808 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1809 {
1810 /* Disable the UART DMA Tx request if enabled */
1811 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1812
1813 /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
1814 if (huart->hdmatx != NULL)
1815 {
1816 /* Set the UART DMA Abort callback to Null.
1817 No call back execution at end of DMA abort procedure */
1818 huart->hdmatx->XferAbortCallback = NULL;
1819
1820 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1821 {
1822 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1823 {
1824 /* Set error code to DMA */
1825 huart->ErrorCode = HAL_UART_ERROR_DMA;
1826
1827 return HAL_TIMEOUT;
1828 }
1829 }
1830 }
1831 }
1832
1833 /* Reset Tx transfer counter */
1834 huart->TxXferCount = 0U;
1835
1836 #if defined(USART_CR1_FIFOEN)
1837 /* Flush the whole TX FIFO (if needed) */
1838 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1839 {
1840 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1841 }
1842 #endif /* USART_CR1_FIFOEN */
1843
1844 /* Restore huart->gState to Ready */
1845 huart->gState = HAL_UART_STATE_READY;
1846
1847 return HAL_OK;
1848 }
1849
1850 /**
1851 * @brief Abort ongoing Receive transfer (blocking mode).
1852 * @param huart UART handle.
1853 * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
1854 * This procedure performs following operations :
1855 * - Disable UART Interrupts (Rx)
1856 * - Disable the DMA transfer in the peripheral register (if enabled)
1857 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1858 * - Set handle State to READY
1859 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1860 * @retval HAL status
1861 */
HAL_UART_AbortReceive(UART_HandleTypeDef * huart)1862 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
1863 {
1864 #if defined(USART_CR1_FIFOEN)
1865 /* Disable PEIE, EIE, RXNEIE and RXFTIE interrupts */
1866 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
1867 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE);
1868 #else
1869 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1870 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
1871 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1872 #endif /* USART_CR1_FIFOEN */
1873
1874 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
1875 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
1876 {
1877 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1878 }
1879
1880 /* Abort the UART DMA Rx channel if enabled */
1881 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1882 {
1883 /* Disable the UART DMA Rx request if enabled */
1884 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1885
1886 /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
1887 if (huart->hdmarx != NULL)
1888 {
1889 /* Set the UART DMA Abort callback to Null.
1890 No call back execution at end of DMA abort procedure */
1891 huart->hdmarx->XferAbortCallback = NULL;
1892
1893 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1894 {
1895 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1896 {
1897 /* Set error code to DMA */
1898 huart->ErrorCode = HAL_UART_ERROR_DMA;
1899
1900 return HAL_TIMEOUT;
1901 }
1902 }
1903 }
1904 }
1905
1906 /* Reset Rx transfer counter */
1907 huart->RxXferCount = 0U;
1908
1909 /* Clear the Error flags in the ICR register */
1910 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1911
1912 /* Discard the received data */
1913 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1914
1915 /* Restore huart->RxState to Ready */
1916 huart->RxState = HAL_UART_STATE_READY;
1917 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1918
1919 return HAL_OK;
1920 }
1921
1922 /**
1923 * @brief Abort ongoing transfers (Interrupt mode).
1924 * @param huart UART handle.
1925 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
1926 * This procedure performs following operations :
1927 * - Disable UART Interrupts (Tx and Rx)
1928 * - Disable the DMA transfer in the peripheral register (if enabled)
1929 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
1930 * - Set handle State to READY
1931 * - At abort completion, call user abort complete callback
1932 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
1933 * considered as completed only when user abort complete callback is executed (not when exiting function).
1934 * @retval HAL status
1935 */
HAL_UART_Abort_IT(UART_HandleTypeDef * huart)1936 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
1937 {
1938 uint32_t abortcplt = 1U;
1939
1940 /* Disable interrupts */
1941 #if defined(USART_CR1_FIFOEN)
1942 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE |
1943 USART_CR1_TXEIE_TXFNFIE));
1944 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
1945 #else
1946 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1947 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1948 #endif /* USART_CR1_FIFOEN */
1949
1950 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
1951 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
1952 {
1953 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1954 }
1955
1956 /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
1957 before any call to DMA Abort functions */
1958 /* DMA Tx Handle is valid */
1959 if (huart->hdmatx != NULL)
1960 {
1961 /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
1962 Otherwise, set it to NULL */
1963 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1964 {
1965 huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
1966 }
1967 else
1968 {
1969 huart->hdmatx->XferAbortCallback = NULL;
1970 }
1971 }
1972 /* DMA Rx Handle is valid */
1973 if (huart->hdmarx != NULL)
1974 {
1975 /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
1976 Otherwise, set it to NULL */
1977 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1978 {
1979 huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
1980 }
1981 else
1982 {
1983 huart->hdmarx->XferAbortCallback = NULL;
1984 }
1985 }
1986
1987 /* Abort the UART DMA Tx channel if enabled */
1988 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1989 {
1990 /* Disable DMA Tx at UART level */
1991 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1992
1993 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
1994 if (huart->hdmatx != NULL)
1995 {
1996 /* UART Tx DMA Abort callback has already been initialised :
1997 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
1998
1999 /* Abort DMA TX */
2000 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
2001 {
2002 huart->hdmatx->XferAbortCallback = NULL;
2003 }
2004 else
2005 {
2006 abortcplt = 0U;
2007 }
2008 }
2009 }
2010
2011 /* Abort the UART DMA Rx channel if enabled */
2012 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2013 {
2014 /* Disable the UART DMA Rx request if enabled */
2015 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2016
2017 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
2018 if (huart->hdmarx != NULL)
2019 {
2020 /* UART Rx DMA Abort callback has already been initialised :
2021 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2022
2023 /* Abort DMA RX */
2024 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2025 {
2026 huart->hdmarx->XferAbortCallback = NULL;
2027 abortcplt = 1U;
2028 }
2029 else
2030 {
2031 abortcplt = 0U;
2032 }
2033 }
2034 }
2035
2036 /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
2037 if (abortcplt == 1U)
2038 {
2039 /* Reset Tx and Rx transfer counters */
2040 huart->TxXferCount = 0U;
2041 huart->RxXferCount = 0U;
2042
2043 /* Clear ISR function pointers */
2044 huart->RxISR = NULL;
2045 huart->TxISR = NULL;
2046
2047 /* Reset errorCode */
2048 huart->ErrorCode = HAL_UART_ERROR_NONE;
2049
2050 /* Clear the Error flags in the ICR register */
2051 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2052
2053 #if defined(USART_CR1_FIFOEN)
2054 /* Flush the whole TX FIFO (if needed) */
2055 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
2056 {
2057 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
2058 }
2059 #endif /* USART_CR1_FIFOEN */
2060
2061 /* Discard the received data */
2062 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
2063
2064 /* Restore huart->gState and huart->RxState to Ready */
2065 huart->gState = HAL_UART_STATE_READY;
2066 huart->RxState = HAL_UART_STATE_READY;
2067 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2068
2069 /* As no DMA to be aborted, call directly user Abort complete callback */
2070 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2071 /* Call registered Abort complete callback */
2072 huart->AbortCpltCallback(huart);
2073 #else
2074 /* Call legacy weak Abort complete callback */
2075 HAL_UART_AbortCpltCallback(huart);
2076 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2077 }
2078
2079 return HAL_OK;
2080 }
2081
2082 /**
2083 * @brief Abort ongoing Transmit transfer (Interrupt mode).
2084 * @param huart UART handle.
2085 * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
2086 * This procedure performs following operations :
2087 * - Disable UART Interrupts (Tx)
2088 * - Disable the DMA transfer in the peripheral register (if enabled)
2089 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
2090 * - Set handle State to READY
2091 * - At abort completion, call user abort complete callback
2092 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
2093 * considered as completed only when user abort complete callback is executed (not when exiting function).
2094 * @retval HAL status
2095 */
HAL_UART_AbortTransmit_IT(UART_HandleTypeDef * huart)2096 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
2097 {
2098 /* Disable interrupts */
2099 #if defined(USART_CR1_FIFOEN)
2100 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
2101 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
2102 #else
2103 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
2104 #endif /* USART_CR1_FIFOEN */
2105
2106 /* Abort the UART DMA Tx channel if enabled */
2107 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
2108 {
2109 /* Disable the UART DMA Tx request if enabled */
2110 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
2111
2112 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
2113 if (huart->hdmatx != NULL)
2114 {
2115 /* Set the UART DMA Abort callback :
2116 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2117 huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
2118
2119 /* Abort DMA TX */
2120 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
2121 {
2122 /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
2123 huart->hdmatx->XferAbortCallback(huart->hdmatx);
2124 }
2125 }
2126 else
2127 {
2128 /* Reset Tx transfer counter */
2129 huart->TxXferCount = 0U;
2130
2131 /* Clear TxISR function pointers */
2132 huart->TxISR = NULL;
2133
2134 /* Restore huart->gState to Ready */
2135 huart->gState = HAL_UART_STATE_READY;
2136
2137 /* As no DMA to be aborted, call directly user Abort complete callback */
2138 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2139 /* Call registered Abort Transmit Complete Callback */
2140 huart->AbortTransmitCpltCallback(huart);
2141 #else
2142 /* Call legacy weak Abort Transmit Complete Callback */
2143 HAL_UART_AbortTransmitCpltCallback(huart);
2144 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2145 }
2146 }
2147 else
2148 {
2149 /* Reset Tx transfer counter */
2150 huart->TxXferCount = 0U;
2151
2152 /* Clear TxISR function pointers */
2153 huart->TxISR = NULL;
2154
2155 #if defined(USART_CR1_FIFOEN)
2156 /* Flush the whole TX FIFO (if needed) */
2157 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
2158 {
2159 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
2160 }
2161 #endif /* USART_CR1_FIFOEN */
2162
2163 /* Restore huart->gState to Ready */
2164 huart->gState = HAL_UART_STATE_READY;
2165
2166 /* As no DMA to be aborted, call directly user Abort complete callback */
2167 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2168 /* Call registered Abort Transmit Complete Callback */
2169 huart->AbortTransmitCpltCallback(huart);
2170 #else
2171 /* Call legacy weak Abort Transmit Complete Callback */
2172 HAL_UART_AbortTransmitCpltCallback(huart);
2173 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2174 }
2175
2176 return HAL_OK;
2177 }
2178
2179 /**
2180 * @brief Abort ongoing Receive transfer (Interrupt mode).
2181 * @param huart UART handle.
2182 * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
2183 * This procedure performs following operations :
2184 * - Disable UART Interrupts (Rx)
2185 * - Disable the DMA transfer in the peripheral register (if enabled)
2186 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
2187 * - Set handle State to READY
2188 * - At abort completion, call user abort complete callback
2189 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
2190 * considered as completed only when user abort complete callback is executed (not when exiting function).
2191 * @retval HAL status
2192 */
HAL_UART_AbortReceive_IT(UART_HandleTypeDef * huart)2193 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
2194 {
2195 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2196 #if defined(USART_CR1_FIFOEN)
2197 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
2198 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
2199 #else
2200 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
2201 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2202 #endif /* USART_CR1_FIFOEN */
2203
2204 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
2205 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
2206 {
2207 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
2208 }
2209
2210 /* Abort the UART DMA Rx channel if enabled */
2211 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2212 {
2213 /* Disable the UART DMA Rx request if enabled */
2214 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2215
2216 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
2217 if (huart->hdmarx != NULL)
2218 {
2219 /* Set the UART DMA Abort callback :
2220 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2221 huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
2222
2223 /* Abort DMA RX */
2224 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2225 {
2226 /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2227 huart->hdmarx->XferAbortCallback(huart->hdmarx);
2228 }
2229 }
2230 else
2231 {
2232 /* Reset Rx transfer counter */
2233 huart->RxXferCount = 0U;
2234
2235 /* Clear RxISR function pointer */
2236 huart->pRxBuffPtr = NULL;
2237
2238 /* Clear the Error flags in the ICR register */
2239 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2240
2241 /* Discard the received data */
2242 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
2243
2244 /* Restore huart->RxState to Ready */
2245 huart->RxState = HAL_UART_STATE_READY;
2246 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2247
2248 /* As no DMA to be aborted, call directly user Abort complete callback */
2249 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2250 /* Call registered Abort Receive Complete Callback */
2251 huart->AbortReceiveCpltCallback(huart);
2252 #else
2253 /* Call legacy weak Abort Receive Complete Callback */
2254 HAL_UART_AbortReceiveCpltCallback(huart);
2255 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2256 }
2257 }
2258 else
2259 {
2260 /* Reset Rx transfer counter */
2261 huart->RxXferCount = 0U;
2262
2263 /* Clear RxISR function pointer */
2264 huart->pRxBuffPtr = NULL;
2265
2266 /* Clear the Error flags in the ICR register */
2267 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2268
2269 /* Restore huart->RxState to Ready */
2270 huart->RxState = HAL_UART_STATE_READY;
2271 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2272
2273 /* As no DMA to be aborted, call directly user Abort complete callback */
2274 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2275 /* Call registered Abort Receive Complete Callback */
2276 huart->AbortReceiveCpltCallback(huart);
2277 #else
2278 /* Call legacy weak Abort Receive Complete Callback */
2279 HAL_UART_AbortReceiveCpltCallback(huart);
2280 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2281 }
2282
2283 return HAL_OK;
2284 }
2285
2286 /**
2287 * @brief Handle UART interrupt request.
2288 * @param huart UART handle.
2289 * @retval None
2290 */
HAL_UART_IRQHandler(UART_HandleTypeDef * huart)2291 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
2292 {
2293 uint32_t isrflags = READ_REG(huart->Instance->ISR);
2294 uint32_t cr1its = READ_REG(huart->Instance->CR1);
2295 uint32_t cr3its = READ_REG(huart->Instance->CR3);
2296
2297 uint32_t errorflags;
2298 uint32_t errorcode;
2299
2300 /* If no error occurs */
2301 errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
2302 if (errorflags == 0U)
2303 {
2304 /* UART in mode Receiver ---------------------------------------------------*/
2305 #if defined(USART_CR1_FIFOEN)
2306 if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2307 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2308 || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2309 #else
2310 if (((isrflags & USART_ISR_RXNE) != 0U)
2311 && ((cr1its & USART_CR1_RXNEIE) != 0U))
2312 #endif /* USART_CR1_FIFOEN */
2313 {
2314 if (huart->RxISR != NULL)
2315 {
2316 huart->RxISR(huart);
2317 }
2318 return;
2319 }
2320 }
2321
2322 /* If some errors occur */
2323 #if defined(USART_CR1_FIFOEN)
2324 if ((errorflags != 0U)
2325 && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
2326 || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
2327 #else
2328 if ((errorflags != 0U)
2329 && (((cr3its & USART_CR3_EIE) != 0U)
2330 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U)))
2331 #endif /* USART_CR1_FIFOEN */
2332 {
2333 /* UART parity error interrupt occurred -------------------------------------*/
2334 if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
2335 {
2336 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
2337
2338 huart->ErrorCode |= HAL_UART_ERROR_PE;
2339 }
2340
2341 /* UART frame error interrupt occurred --------------------------------------*/
2342 if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2343 {
2344 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
2345
2346 huart->ErrorCode |= HAL_UART_ERROR_FE;
2347 }
2348
2349 /* UART noise error interrupt occurred --------------------------------------*/
2350 if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2351 {
2352 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
2353
2354 huart->ErrorCode |= HAL_UART_ERROR_NE;
2355 }
2356
2357 /* UART Over-Run interrupt occurred -----------------------------------------*/
2358 #if defined(USART_CR1_FIFOEN)
2359 if (((isrflags & USART_ISR_ORE) != 0U)
2360 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
2361 ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
2362 #else
2363 if (((isrflags & USART_ISR_ORE) != 0U)
2364 && (((cr1its & USART_CR1_RXNEIE) != 0U) ||
2365 ((cr3its & USART_CR3_EIE) != 0U)))
2366 #endif /* USART_CR1_FIFOEN */
2367 {
2368 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
2369
2370 huart->ErrorCode |= HAL_UART_ERROR_ORE;
2371 }
2372
2373 /* UART Receiver Timeout interrupt occurred ---------------------------------*/
2374 if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
2375 {
2376 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
2377
2378 huart->ErrorCode |= HAL_UART_ERROR_RTO;
2379 }
2380
2381 /* Call UART Error Call back function if need be ----------------------------*/
2382 if (huart->ErrorCode != HAL_UART_ERROR_NONE)
2383 {
2384 /* UART in mode Receiver --------------------------------------------------*/
2385 #if defined(USART_CR1_FIFOEN)
2386 if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2387 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2388 || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2389 #else
2390 if (((isrflags & USART_ISR_RXNE) != 0U)
2391 && ((cr1its & USART_CR1_RXNEIE) != 0U))
2392 #endif /* USART_CR1_FIFOEN */
2393 {
2394 if (huart->RxISR != NULL)
2395 {
2396 huart->RxISR(huart);
2397 }
2398 }
2399
2400 /* If Error is to be considered as blocking :
2401 - Receiver Timeout error in Reception
2402 - Overrun error in Reception
2403 - any error occurs in DMA mode reception
2404 */
2405 errorcode = huart->ErrorCode;
2406 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
2407 ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
2408 {
2409 /* Blocking error : transfer is aborted
2410 Set the UART state ready to be able to start again the process,
2411 Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
2412 UART_EndRxTransfer(huart);
2413
2414 /* Abort the UART DMA Rx channel if enabled */
2415 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2416 {
2417 /* Disable the UART DMA Rx request if enabled */
2418 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2419
2420 /* Abort the UART DMA Rx channel */
2421 if (huart->hdmarx != NULL)
2422 {
2423 /* Set the UART DMA Abort callback :
2424 will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
2425 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
2426
2427 /* Abort DMA RX */
2428 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2429 {
2430 /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2431 huart->hdmarx->XferAbortCallback(huart->hdmarx);
2432 }
2433 }
2434 else
2435 {
2436 /* Call user error callback */
2437 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2438 /*Call registered error callback*/
2439 huart->ErrorCallback(huart);
2440 #else
2441 /*Call legacy weak error callback*/
2442 HAL_UART_ErrorCallback(huart);
2443 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2444
2445 }
2446 }
2447 else
2448 {
2449 /* Call user error callback */
2450 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2451 /*Call registered error callback*/
2452 huart->ErrorCallback(huart);
2453 #else
2454 /*Call legacy weak error callback*/
2455 HAL_UART_ErrorCallback(huart);
2456 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2457 }
2458 }
2459 else
2460 {
2461 /* Non Blocking error : transfer could go on.
2462 Error is notified to user through user error callback */
2463 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2464 /*Call registered error callback*/
2465 huart->ErrorCallback(huart);
2466 #else
2467 /*Call legacy weak error callback*/
2468 HAL_UART_ErrorCallback(huart);
2469 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2470 huart->ErrorCode = HAL_UART_ERROR_NONE;
2471 }
2472 }
2473 return;
2474
2475 } /* End if some error occurs */
2476
2477 /* Check current reception Mode :
2478 If Reception till IDLE event has been selected : */
2479 if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
2480 && ((isrflags & USART_ISR_IDLE) != 0U)
2481 && ((cr1its & USART_ISR_IDLE) != 0U))
2482 {
2483 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
2484
2485 /* Check if DMA mode is enabled in UART */
2486 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2487 {
2488 /* DMA mode enabled */
2489 /* Check received length : If all expected data are received, do nothing,
2490 (DMA cplt callback will be called).
2491 Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
2492 uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
2493 if ((nb_remaining_rx_data > 0U)
2494 && (nb_remaining_rx_data < huart->RxXferSize))
2495 {
2496 /* Reception is not complete */
2497 huart->RxXferCount = nb_remaining_rx_data;
2498
2499 /* In Normal mode, end DMA xfer and HAL UART Rx process*/
2500 if (HAL_IS_BIT_CLR(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC))
2501 {
2502 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
2503 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
2504 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2505
2506 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
2507 in the UART CR3 register */
2508 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2509
2510 /* At end of Rx process, restore huart->RxState to Ready */
2511 huart->RxState = HAL_UART_STATE_READY;
2512 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2513
2514 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
2515
2516 /* Last bytes received, so no need as the abort is immediate */
2517 (void)HAL_DMA_Abort(huart->hdmarx);
2518 }
2519
2520 /* Initialize type of RxEvent that correspond to RxEvent callback execution;
2521 In this case, Rx Event type is Idle Event */
2522 huart->RxEventType = HAL_UART_RXEVENT_IDLE;
2523
2524 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2525 /*Call registered Rx Event callback*/
2526 huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
2527 #else
2528 /*Call legacy weak Rx Event callback*/
2529 HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
2530 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
2531 }
2532 else
2533 {
2534 /* If DMA is in Circular mode, Idle event is to be reported to user
2535 even if occurring after a Transfer Complete event from DMA */
2536 if (nb_remaining_rx_data == huart->RxXferSize)
2537 {
2538 if (HAL_IS_BIT_SET(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC))
2539 {
2540 /* Initialize type of RxEvent that correspond to RxEvent callback execution;
2541 In this case, Rx Event type is Idle Event */
2542 huart->RxEventType = HAL_UART_RXEVENT_IDLE;
2543
2544 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2545 /*Call registered Rx Event callback*/
2546 huart->RxEventCallback(huart, huart->RxXferSize);
2547 #else
2548 /*Call legacy weak Rx Event callback*/
2549 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
2550 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
2551 }
2552 }
2553 }
2554 return;
2555 }
2556 else
2557 {
2558 /* DMA mode not enabled */
2559 /* Check received length : If all expected data are received, do nothing.
2560 Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
2561 uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
2562 if ((huart->RxXferCount > 0U)
2563 && (nb_rx_data > 0U))
2564 {
2565 #if defined(USART_CR1_FIFOEN)
2566 /* Disable the UART Parity Error Interrupt and RXNE interrupts */
2567 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
2568
2569 /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
2570 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
2571 #else
2572 /* Disable the UART Parity Error Interrupt and RXNE interrupts */
2573 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
2574
2575 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
2576 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2577 #endif /* USART_CR1_FIFOEN */
2578
2579 /* Rx process is completed, restore huart->RxState to Ready */
2580 huart->RxState = HAL_UART_STATE_READY;
2581 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2582
2583 /* Clear RxISR function pointer */
2584 huart->RxISR = NULL;
2585
2586 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
2587
2588 /* Initialize type of RxEvent that correspond to RxEvent callback execution;
2589 In this case, Rx Event type is Idle Event */
2590 huart->RxEventType = HAL_UART_RXEVENT_IDLE;
2591
2592 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2593 /*Call registered Rx complete callback*/
2594 huart->RxEventCallback(huart, nb_rx_data);
2595 #else
2596 /*Call legacy weak Rx Event callback*/
2597 HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
2598 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
2599 }
2600 return;
2601 }
2602 }
2603
2604 /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
2605 if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
2606 {
2607 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
2608
2609 /* UART Rx state is not reset as a reception process might be ongoing.
2610 If UART handle state fields need to be reset to READY, this could be done in Wakeup callback */
2611
2612 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2613 /* Call registered Wakeup Callback */
2614 huart->WakeupCallback(huart);
2615 #else
2616 /* Call legacy weak Wakeup Callback */
2617 HAL_UARTEx_WakeupCallback(huart);
2618 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2619 return;
2620 }
2621
2622 /* UART in mode Transmitter ------------------------------------------------*/
2623 #if defined(USART_CR1_FIFOEN)
2624 if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
2625 && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
2626 || ((cr3its & USART_CR3_TXFTIE) != 0U)))
2627 #else
2628 if (((isrflags & USART_ISR_TXE) != 0U)
2629 && ((cr1its & USART_CR1_TXEIE) != 0U))
2630 #endif /* USART_CR1_FIFOEN */
2631 {
2632 if (huart->TxISR != NULL)
2633 {
2634 huart->TxISR(huart);
2635 }
2636 return;
2637 }
2638
2639 /* UART in mode Transmitter (transmission end) -----------------------------*/
2640 if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
2641 {
2642 UART_EndTransmit_IT(huart);
2643 return;
2644 }
2645
2646 #if defined(USART_CR1_FIFOEN)
2647 /* UART TX Fifo Empty occurred ----------------------------------------------*/
2648 if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
2649 {
2650 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2651 /* Call registered Tx Fifo Empty Callback */
2652 huart->TxFifoEmptyCallback(huart);
2653 #else
2654 /* Call legacy weak Tx Fifo Empty Callback */
2655 HAL_UARTEx_TxFifoEmptyCallback(huart);
2656 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2657 return;
2658 }
2659
2660 /* UART RX Fifo Full occurred ----------------------------------------------*/
2661 if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
2662 {
2663 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2664 /* Call registered Rx Fifo Full Callback */
2665 huart->RxFifoFullCallback(huart);
2666 #else
2667 /* Call legacy weak Rx Fifo Full Callback */
2668 HAL_UARTEx_RxFifoFullCallback(huart);
2669 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2670 return;
2671 }
2672 #endif /* USART_CR1_FIFOEN */
2673 }
2674
2675 /**
2676 * @brief Tx Transfer completed callback.
2677 * @param huart UART handle.
2678 * @retval None
2679 */
HAL_UART_TxCpltCallback(UART_HandleTypeDef * huart)2680 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
2681 {
2682 /* Prevent unused argument(s) compilation warning */
2683 UNUSED(huart);
2684
2685 /* NOTE : This function should not be modified, when the callback is needed,
2686 the HAL_UART_TxCpltCallback can be implemented in the user file.
2687 */
2688 }
2689
2690 /**
2691 * @brief Tx Half Transfer completed callback.
2692 * @param huart UART handle.
2693 * @retval None
2694 */
HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef * huart)2695 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
2696 {
2697 /* Prevent unused argument(s) compilation warning */
2698 UNUSED(huart);
2699
2700 /* NOTE: This function should not be modified, when the callback is needed,
2701 the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
2702 */
2703 }
2704
2705 /**
2706 * @brief Rx Transfer completed callback.
2707 * @param huart UART handle.
2708 * @retval None
2709 */
HAL_UART_RxCpltCallback(UART_HandleTypeDef * huart)2710 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
2711 {
2712 /* Prevent unused argument(s) compilation warning */
2713 UNUSED(huart);
2714
2715 /* NOTE : This function should not be modified, when the callback is needed,
2716 the HAL_UART_RxCpltCallback can be implemented in the user file.
2717 */
2718 }
2719
2720 /**
2721 * @brief Rx Half Transfer completed callback.
2722 * @param huart UART handle.
2723 * @retval None
2724 */
HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef * huart)2725 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
2726 {
2727 /* Prevent unused argument(s) compilation warning */
2728 UNUSED(huart);
2729
2730 /* NOTE: This function should not be modified, when the callback is needed,
2731 the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
2732 */
2733 }
2734
2735 /**
2736 * @brief UART error callback.
2737 * @param huart UART handle.
2738 * @retval None
2739 */
HAL_UART_ErrorCallback(UART_HandleTypeDef * huart)2740 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
2741 {
2742 /* Prevent unused argument(s) compilation warning */
2743 UNUSED(huart);
2744
2745 /* NOTE : This function should not be modified, when the callback is needed,
2746 the HAL_UART_ErrorCallback can be implemented in the user file.
2747 */
2748 }
2749
2750 /**
2751 * @brief UART Abort Complete callback.
2752 * @param huart UART handle.
2753 * @retval None
2754 */
HAL_UART_AbortCpltCallback(UART_HandleTypeDef * huart)2755 __weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
2756 {
2757 /* Prevent unused argument(s) compilation warning */
2758 UNUSED(huart);
2759
2760 /* NOTE : This function should not be modified, when the callback is needed,
2761 the HAL_UART_AbortCpltCallback can be implemented in the user file.
2762 */
2763 }
2764
2765 /**
2766 * @brief UART Abort Complete callback.
2767 * @param huart UART handle.
2768 * @retval None
2769 */
HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef * huart)2770 __weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
2771 {
2772 /* Prevent unused argument(s) compilation warning */
2773 UNUSED(huart);
2774
2775 /* NOTE : This function should not be modified, when the callback is needed,
2776 the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file.
2777 */
2778 }
2779
2780 /**
2781 * @brief UART Abort Receive Complete callback.
2782 * @param huart UART handle.
2783 * @retval None
2784 */
HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef * huart)2785 __weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
2786 {
2787 /* Prevent unused argument(s) compilation warning */
2788 UNUSED(huart);
2789
2790 /* NOTE : This function should not be modified, when the callback is needed,
2791 the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file.
2792 */
2793 }
2794
2795 /**
2796 * @brief Reception Event Callback (Rx event notification called after use of advanced reception service).
2797 * @param huart UART handle
2798 * @param Size Number of data available in application reception buffer (indicates a position in
2799 * reception buffer until which, data are available)
2800 * @retval None
2801 */
HAL_UARTEx_RxEventCallback(UART_HandleTypeDef * huart,uint16_t Size)2802 __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
2803 {
2804 /* Prevent unused argument(s) compilation warning */
2805 UNUSED(huart);
2806 UNUSED(Size);
2807
2808 /* NOTE : This function should not be modified, when the callback is needed,
2809 the HAL_UARTEx_RxEventCallback can be implemented in the user file.
2810 */
2811 }
2812
2813 /**
2814 * @}
2815 */
2816
2817 /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
2818 * @brief UART control functions
2819 *
2820 @verbatim
2821 ===============================================================================
2822 ##### Peripheral Control functions #####
2823 ===============================================================================
2824 [..]
2825 This subsection provides a set of functions allowing to control the UART.
2826 (+) HAL_UART_ReceiverTimeout_Config() API allows to configure the receiver timeout value on the fly
2827 (+) HAL_UART_EnableReceiverTimeout() API enables the receiver timeout feature
2828 (+) HAL_UART_DisableReceiverTimeout() API disables the receiver timeout feature
2829 (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
2830 (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode
2831 (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode
2832 (+) UART_SetConfig() API configures the UART peripheral
2833 (+) UART_AdvFeatureConfig() API optionally configures the UART advanced features
2834 (+) UART_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization
2835 (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter
2836 (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver
2837 (+) HAL_LIN_SendBreak() API transmits the break characters
2838 @endverbatim
2839 * @{
2840 */
2841
2842 /**
2843 * @brief Update on the fly the receiver timeout value in RTOR register.
2844 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2845 * the configuration information for the specified UART module.
2846 * @param TimeoutValue receiver timeout value in number of baud blocks. The timeout
2847 * value must be less or equal to 0x0FFFFFFFF.
2848 * @retval None
2849 */
HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef * huart,uint32_t TimeoutValue)2850 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue)
2851 {
2852 if (!(IS_LPUART_INSTANCE(huart->Instance)))
2853 {
2854 assert_param(IS_UART_RECEIVER_TIMEOUT_VALUE(TimeoutValue));
2855 MODIFY_REG(huart->Instance->RTOR, USART_RTOR_RTO, TimeoutValue);
2856 }
2857 }
2858
2859 /**
2860 * @brief Enable the UART receiver timeout feature.
2861 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2862 * the configuration information for the specified UART module.
2863 * @retval HAL status
2864 */
HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef * huart)2865 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart)
2866 {
2867 if (!(IS_LPUART_INSTANCE(huart->Instance)))
2868 {
2869 if (huart->gState == HAL_UART_STATE_READY)
2870 {
2871 /* Process Locked */
2872 __HAL_LOCK(huart);
2873
2874 huart->gState = HAL_UART_STATE_BUSY;
2875
2876 /* Set the USART RTOEN bit */
2877 SET_BIT(huart->Instance->CR2, USART_CR2_RTOEN);
2878
2879 huart->gState = HAL_UART_STATE_READY;
2880
2881 /* Process Unlocked */
2882 __HAL_UNLOCK(huart);
2883
2884 return HAL_OK;
2885 }
2886 else
2887 {
2888 return HAL_BUSY;
2889 }
2890 }
2891 else
2892 {
2893 return HAL_ERROR;
2894 }
2895 }
2896
2897 /**
2898 * @brief Disable the UART receiver timeout feature.
2899 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2900 * the configuration information for the specified UART module.
2901 * @retval HAL status
2902 */
HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef * huart)2903 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart)
2904 {
2905 if (!(IS_LPUART_INSTANCE(huart->Instance)))
2906 {
2907 if (huart->gState == HAL_UART_STATE_READY)
2908 {
2909 /* Process Locked */
2910 __HAL_LOCK(huart);
2911
2912 huart->gState = HAL_UART_STATE_BUSY;
2913
2914 /* Clear the USART RTOEN bit */
2915 CLEAR_BIT(huart->Instance->CR2, USART_CR2_RTOEN);
2916
2917 huart->gState = HAL_UART_STATE_READY;
2918
2919 /* Process Unlocked */
2920 __HAL_UNLOCK(huart);
2921
2922 return HAL_OK;
2923 }
2924 else
2925 {
2926 return HAL_BUSY;
2927 }
2928 }
2929 else
2930 {
2931 return HAL_ERROR;
2932 }
2933 }
2934
2935 /**
2936 * @brief Enable UART in mute mode (does not mean UART enters mute mode;
2937 * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called).
2938 * @param huart UART handle.
2939 * @retval HAL status
2940 */
HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef * huart)2941 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
2942 {
2943 __HAL_LOCK(huart);
2944
2945 huart->gState = HAL_UART_STATE_BUSY;
2946
2947 /* Enable USART mute mode by setting the MME bit in the CR1 register */
2948 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_MME);
2949
2950 huart->gState = HAL_UART_STATE_READY;
2951
2952 return (UART_CheckIdleState(huart));
2953 }
2954
2955 /**
2956 * @brief Disable UART mute mode (does not mean the UART actually exits mute mode
2957 * as it may not have been in mute mode at this very moment).
2958 * @param huart UART handle.
2959 * @retval HAL status
2960 */
HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef * huart)2961 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
2962 {
2963 __HAL_LOCK(huart);
2964
2965 huart->gState = HAL_UART_STATE_BUSY;
2966
2967 /* Disable USART mute mode by clearing the MME bit in the CR1 register */
2968 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME);
2969
2970 huart->gState = HAL_UART_STATE_READY;
2971
2972 return (UART_CheckIdleState(huart));
2973 }
2974
2975 /**
2976 * @brief Enter UART mute mode (means UART actually enters mute mode).
2977 * @note To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called.
2978 * @param huart UART handle.
2979 * @retval None
2980 */
HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef * huart)2981 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
2982 {
2983 __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
2984 }
2985
2986 /**
2987 * @brief Enable the UART transmitter and disable the UART receiver.
2988 * @param huart UART handle.
2989 * @retval HAL status
2990 */
HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef * huart)2991 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
2992 {
2993 __HAL_LOCK(huart);
2994 huart->gState = HAL_UART_STATE_BUSY;
2995
2996 /* Clear TE and RE bits */
2997 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2998
2999 /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
3000 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TE);
3001
3002 huart->gState = HAL_UART_STATE_READY;
3003
3004 __HAL_UNLOCK(huart);
3005
3006 return HAL_OK;
3007 }
3008
3009 /**
3010 * @brief Enable the UART receiver and disable the UART transmitter.
3011 * @param huart UART handle.
3012 * @retval HAL status.
3013 */
HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef * huart)3014 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
3015 {
3016 __HAL_LOCK(huart);
3017 huart->gState = HAL_UART_STATE_BUSY;
3018
3019 /* Clear TE and RE bits */
3020 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
3021
3022 /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
3023 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RE);
3024
3025 huart->gState = HAL_UART_STATE_READY;
3026
3027 __HAL_UNLOCK(huart);
3028
3029 return HAL_OK;
3030 }
3031
3032
3033 /**
3034 * @brief Transmit break characters.
3035 * @param huart UART handle.
3036 * @retval HAL status
3037 */
HAL_LIN_SendBreak(UART_HandleTypeDef * huart)3038 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
3039 {
3040 /* Check the parameters */
3041 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
3042
3043 __HAL_LOCK(huart);
3044
3045 huart->gState = HAL_UART_STATE_BUSY;
3046
3047 /* Send break characters */
3048 __HAL_UART_SEND_REQ(huart, UART_SENDBREAK_REQUEST);
3049
3050 huart->gState = HAL_UART_STATE_READY;
3051
3052 __HAL_UNLOCK(huart);
3053
3054 return HAL_OK;
3055 }
3056
3057 /**
3058 * @}
3059 */
3060
3061 /** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions
3062 * @brief UART Peripheral State functions
3063 *
3064 @verbatim
3065 ==============================================================================
3066 ##### Peripheral State and Error functions #####
3067 ==============================================================================
3068 [..]
3069 This subsection provides functions allowing to :
3070 (+) Return the UART handle state.
3071 (+) Return the UART handle error code
3072
3073 @endverbatim
3074 * @{
3075 */
3076
3077 /**
3078 * @brief Return the UART handle state.
3079 * @param huart Pointer to a UART_HandleTypeDef structure that contains
3080 * the configuration information for the specified UART.
3081 * @retval HAL state
3082 */
HAL_UART_GetState(const UART_HandleTypeDef * huart)3083 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart)
3084 {
3085 uint32_t temp1;
3086 uint32_t temp2;
3087 temp1 = huart->gState;
3088 temp2 = huart->RxState;
3089
3090 return (HAL_UART_StateTypeDef)(temp1 | temp2);
3091 }
3092
3093 /**
3094 * @brief Return the UART handle error code.
3095 * @param huart Pointer to a UART_HandleTypeDef structure that contains
3096 * the configuration information for the specified UART.
3097 * @retval UART Error Code
3098 */
HAL_UART_GetError(const UART_HandleTypeDef * huart)3099 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart)
3100 {
3101 return huart->ErrorCode;
3102 }
3103 /**
3104 * @}
3105 */
3106
3107 /**
3108 * @}
3109 */
3110
3111 /** @defgroup UART_Private_Functions UART Private Functions
3112 * @{
3113 */
3114
3115 /**
3116 * @brief Initialize the callbacks to their default values.
3117 * @param huart UART handle.
3118 * @retval none
3119 */
3120 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
UART_InitCallbacksToDefault(UART_HandleTypeDef * huart)3121 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart)
3122 {
3123 /* Init the UART Callback settings */
3124 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
3125 huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
3126 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
3127 huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
3128 huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
3129 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
3130 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
3131 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
3132 huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */
3133 #if defined(USART_CR1_FIFOEN)
3134 huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
3135 huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
3136 #endif /* USART_CR1_FIFOEN */
3137 huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak RxEventCallback */
3138
3139 }
3140 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3141
3142 /**
3143 * @brief Configure the UART peripheral.
3144 * @param huart UART handle.
3145 * @retval HAL status
3146 */
UART_SetConfig(UART_HandleTypeDef * huart)3147 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
3148 {
3149 uint32_t tmpreg;
3150 uint16_t brrtemp;
3151 UART_ClockSourceTypeDef clocksource;
3152 uint32_t usartdiv;
3153 HAL_StatusTypeDef ret = HAL_OK;
3154 #if defined(USART_PRESC_PRESCALER)
3155 uint32_t lpuart_ker_ck_pres;
3156 #endif /* USART_PRESC_PRESCALER */
3157 uint32_t pclk;
3158
3159 /* Check the parameters */
3160 assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
3161 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
3162 if (UART_INSTANCE_LOWPOWER(huart))
3163 {
3164 assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits));
3165 }
3166 else
3167 {
3168 assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
3169 assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
3170 }
3171
3172 assert_param(IS_UART_PARITY(huart->Init.Parity));
3173 assert_param(IS_UART_MODE(huart->Init.Mode));
3174 assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
3175 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
3176 #if defined(USART_PRESC_PRESCALER)
3177 assert_param(IS_UART_PRESCALER(huart->Init.ClockPrescaler));
3178 #endif /* USART_PRESC_PRESCALER */
3179
3180 /*-------------------------- USART CR1 Configuration -----------------------*/
3181 /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
3182 * the UART Word Length, Parity, Mode and oversampling:
3183 * set the M bits according to huart->Init.WordLength value
3184 * set PCE and PS bits according to huart->Init.Parity value
3185 * set TE and RE bits according to huart->Init.Mode value
3186 * set OVER8 bit according to huart->Init.OverSampling value */
3187 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
3188 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
3189
3190 /*-------------------------- USART CR2 Configuration -----------------------*/
3191 /* Configure the UART Stop Bits: Set STOP[13:12] bits according
3192 * to huart->Init.StopBits value */
3193 MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
3194
3195 /*-------------------------- USART CR3 Configuration -----------------------*/
3196 /* Configure
3197 * - UART HardWare Flow Control: set CTSE and RTSE bits according
3198 * to huart->Init.HwFlowCtl value
3199 * - one-bit sampling method versus three samples' majority rule according
3200 * to huart->Init.OneBitSampling (not applicable to LPUART) */
3201 tmpreg = (uint32_t)huart->Init.HwFlowCtl;
3202
3203 if (!(UART_INSTANCE_LOWPOWER(huart)))
3204 {
3205 tmpreg |= huart->Init.OneBitSampling;
3206 }
3207 MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
3208
3209 #if defined(USART_PRESC_PRESCALER)
3210 /*-------------------------- USART PRESC Configuration -----------------------*/
3211 /* Configure
3212 * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
3213 MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
3214 #endif /* USART_PRESC_PRESCALER */
3215
3216 /*-------------------------- USART BRR Configuration -----------------------*/
3217 UART_GETCLOCKSOURCE(huart, clocksource);
3218
3219 /* Check LPUART instance */
3220 if (UART_INSTANCE_LOWPOWER(huart))
3221 {
3222 /* Retrieve frequency clock */
3223 switch (clocksource)
3224 {
3225 case UART_CLOCKSOURCE_PCLK1:
3226 pclk = HAL_RCC_GetPCLK1Freq();
3227 break;
3228 case UART_CLOCKSOURCE_HSI:
3229 pclk = (uint32_t) HSI_VALUE;
3230 break;
3231 case UART_CLOCKSOURCE_SYSCLK:
3232 pclk = HAL_RCC_GetSysClockFreq();
3233 break;
3234 case UART_CLOCKSOURCE_LSE:
3235 pclk = (uint32_t) LSE_VALUE;
3236 break;
3237 default:
3238 pclk = 0U;
3239 ret = HAL_ERROR;
3240 break;
3241 }
3242
3243 /* If proper clock source reported */
3244 if (pclk != 0U)
3245 {
3246 #if defined(USART_PRESC_PRESCALER)
3247 /* Compute clock after Prescaler */
3248 lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]);
3249
3250 /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
3251 if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
3252 (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
3253 {
3254 ret = HAL_ERROR;
3255 }
3256 else
3257 {
3258 /* Check computed UsartDiv value is in allocated range
3259 (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */
3260 usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3261 if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
3262 {
3263 huart->Instance->BRR = usartdiv;
3264 }
3265 else
3266 {
3267 ret = HAL_ERROR;
3268 }
3269 } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) ||
3270 (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
3271 #else
3272 /* No Prescaler applicable */
3273 /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
3274 if ((pclk < (3U * huart->Init.BaudRate)) ||
3275 (pclk > (4096U * huart->Init.BaudRate)))
3276 {
3277 ret = HAL_ERROR;
3278 }
3279 else
3280 {
3281 usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate));
3282 if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
3283 {
3284 huart->Instance->BRR = usartdiv;
3285 }
3286 else
3287 {
3288 ret = HAL_ERROR;
3289 }
3290 } /* if ( (pclk < (3 * huart->Init.BaudRate) ) || (pclk > (4096 * huart->Init.BaudRate) )) */
3291 #endif /* USART_PRESC_PRESCALER */
3292 } /* if (pclk != 0) */
3293 }
3294 /* Check UART Over Sampling to set Baud Rate Register */
3295 else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
3296 {
3297 switch (clocksource)
3298 {
3299 case UART_CLOCKSOURCE_PCLK1:
3300 pclk = HAL_RCC_GetPCLK1Freq();
3301 break;
3302 case UART_CLOCKSOURCE_PCLK2:
3303 pclk = HAL_RCC_GetPCLK2Freq();
3304 break;
3305 case UART_CLOCKSOURCE_HSI:
3306 pclk = (uint32_t) HSI_VALUE;
3307 break;
3308 case UART_CLOCKSOURCE_SYSCLK:
3309 pclk = HAL_RCC_GetSysClockFreq();
3310 break;
3311 case UART_CLOCKSOURCE_LSE:
3312 pclk = (uint32_t) LSE_VALUE;
3313 break;
3314 default:
3315 pclk = 0U;
3316 ret = HAL_ERROR;
3317 break;
3318 }
3319
3320 /* USARTDIV must be greater than or equal to 0d16 */
3321 if (pclk != 0U)
3322 {
3323 #if defined(USART_PRESC_PRESCALER)
3324 usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3325 #else
3326 usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
3327 #endif /* USART_PRESC_PRESCALER */
3328 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3329 {
3330 brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
3331 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
3332 huart->Instance->BRR = brrtemp;
3333 }
3334 else
3335 {
3336 ret = HAL_ERROR;
3337 }
3338 }
3339 }
3340 else
3341 {
3342 switch (clocksource)
3343 {
3344 case UART_CLOCKSOURCE_PCLK1:
3345 pclk = HAL_RCC_GetPCLK1Freq();
3346 break;
3347 case UART_CLOCKSOURCE_PCLK2:
3348 pclk = HAL_RCC_GetPCLK2Freq();
3349 break;
3350 case UART_CLOCKSOURCE_HSI:
3351 pclk = (uint32_t) HSI_VALUE;
3352 break;
3353 case UART_CLOCKSOURCE_SYSCLK:
3354 pclk = HAL_RCC_GetSysClockFreq();
3355 break;
3356 case UART_CLOCKSOURCE_LSE:
3357 pclk = (uint32_t) LSE_VALUE;
3358 break;
3359 default:
3360 pclk = 0U;
3361 ret = HAL_ERROR;
3362 break;
3363 }
3364
3365 if (pclk != 0U)
3366 {
3367 /* USARTDIV must be greater than or equal to 0d16 */
3368 #if defined(USART_PRESC_PRESCALER)
3369 usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3370 #else
3371 usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
3372 #endif /* USART_PRESC_PRESCALER */
3373 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3374 {
3375 huart->Instance->BRR = (uint16_t)usartdiv;
3376 }
3377 else
3378 {
3379 ret = HAL_ERROR;
3380 }
3381 }
3382 }
3383
3384 #if defined(USART_CR1_FIFOEN)
3385 /* Initialize the number of data to process during RX/TX ISR execution */
3386 huart->NbTxDataToProcess = 1;
3387 huart->NbRxDataToProcess = 1;
3388 #endif /* USART_CR1_FIFOEN */
3389
3390 /* Clear ISR function pointers */
3391 huart->RxISR = NULL;
3392 huart->TxISR = NULL;
3393
3394 return ret;
3395 }
3396
3397 /**
3398 * @brief Configure the UART peripheral advanced features.
3399 * @param huart UART handle.
3400 * @retval None
3401 */
UART_AdvFeatureConfig(UART_HandleTypeDef * huart)3402 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
3403 {
3404 /* Check whether the set of advanced features to configure is properly set */
3405 assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
3406
3407 /* if required, configure RX/TX pins swap */
3408 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
3409 {
3410 assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
3411 MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
3412 }
3413
3414 /* if required, configure TX pin active level inversion */
3415 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
3416 {
3417 assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
3418 MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
3419 }
3420
3421 /* if required, configure RX pin active level inversion */
3422 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
3423 {
3424 assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
3425 MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
3426 }
3427
3428 /* if required, configure data inversion */
3429 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
3430 {
3431 assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
3432 MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
3433 }
3434
3435 /* if required, configure RX overrun detection disabling */
3436 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
3437 {
3438 assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
3439 MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
3440 }
3441
3442 /* if required, configure DMA disabling on reception error */
3443 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
3444 {
3445 assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
3446 MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
3447 }
3448
3449 /* if required, configure auto Baud rate detection scheme */
3450 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
3451 {
3452 assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
3453 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
3454 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
3455 /* set auto Baudrate detection parameters if detection is enabled */
3456 if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
3457 {
3458 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
3459 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
3460 }
3461 }
3462
3463 /* if required, configure MSB first on communication line */
3464 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
3465 {
3466 assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
3467 MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
3468 }
3469 }
3470
3471 /**
3472 * @brief Check the UART Idle State.
3473 * @param huart UART handle.
3474 * @retval HAL status
3475 */
UART_CheckIdleState(UART_HandleTypeDef * huart)3476 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
3477 {
3478 uint32_t tickstart;
3479
3480 /* Initialize the UART ErrorCode */
3481 huart->ErrorCode = HAL_UART_ERROR_NONE;
3482
3483 /* Init tickstart for timeout management */
3484 tickstart = HAL_GetTick();
3485
3486 /* Check if the Transmitter is enabled */
3487 if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
3488 {
3489 /* Wait until TEACK flag is set */
3490 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3491 {
3492 /* Disable TXE interrupt for the interrupt process */
3493 #if defined(USART_CR1_FIFOEN)
3494 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE));
3495 #else
3496 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE));
3497 #endif /* USART_CR1_FIFOEN */
3498
3499 huart->gState = HAL_UART_STATE_READY;
3500
3501 __HAL_UNLOCK(huart);
3502
3503 /* Timeout occurred */
3504 return HAL_TIMEOUT;
3505 }
3506 }
3507
3508 /* Check if the Receiver is enabled */
3509 if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
3510 {
3511 /* Wait until REACK flag is set */
3512 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3513 {
3514 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error)
3515 interrupts for the interrupt process */
3516 #if defined(USART_CR1_FIFOEN)
3517 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3518 #else
3519 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
3520 #endif /* USART_CR1_FIFOEN */
3521 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3522
3523 huart->RxState = HAL_UART_STATE_READY;
3524
3525 __HAL_UNLOCK(huart);
3526
3527 /* Timeout occurred */
3528 return HAL_TIMEOUT;
3529 }
3530 }
3531
3532 /* Initialize the UART State */
3533 huart->gState = HAL_UART_STATE_READY;
3534 huart->RxState = HAL_UART_STATE_READY;
3535 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3536 huart->RxEventType = HAL_UART_RXEVENT_TC;
3537
3538 __HAL_UNLOCK(huart);
3539
3540 return HAL_OK;
3541 }
3542
3543 /**
3544 * @brief This function handles UART Communication Timeout. It waits
3545 * until a flag is no longer in the specified status.
3546 * @param huart UART handle.
3547 * @param Flag Specifies the UART flag to check
3548 * @param Status The actual Flag status (SET or RESET)
3549 * @param Tickstart Tick start value
3550 * @param Timeout Timeout duration
3551 * @retval HAL status
3552 */
UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef * huart,uint32_t Flag,FlagStatus Status,uint32_t Tickstart,uint32_t Timeout)3553 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
3554 uint32_t Tickstart, uint32_t Timeout)
3555 {
3556 /* Wait until flag is set */
3557 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
3558 {
3559 /* Check for the Timeout */
3560 if (Timeout != HAL_MAX_DELAY)
3561 {
3562 if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
3563 {
3564
3565 return HAL_TIMEOUT;
3566 }
3567
3568 if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
3569 {
3570 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
3571 {
3572 /* Clear Overrun Error flag*/
3573 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
3574
3575 /* Blocking error : transfer is aborted
3576 Set the UART state ready to be able to start again the process,
3577 Disable Rx Interrupts if ongoing */
3578 UART_EndRxTransfer(huart);
3579
3580 huart->ErrorCode = HAL_UART_ERROR_ORE;
3581
3582 /* Process Unlocked */
3583 __HAL_UNLOCK(huart);
3584
3585 return HAL_ERROR;
3586 }
3587 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
3588 {
3589 /* Clear Receiver Timeout flag*/
3590 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
3591
3592 /* Blocking error : transfer is aborted
3593 Set the UART state ready to be able to start again the process,
3594 Disable Rx Interrupts if ongoing */
3595 UART_EndRxTransfer(huart);
3596
3597 huart->ErrorCode = HAL_UART_ERROR_RTO;
3598
3599 /* Process Unlocked */
3600 __HAL_UNLOCK(huart);
3601
3602 return HAL_TIMEOUT;
3603 }
3604 }
3605 }
3606 }
3607 return HAL_OK;
3608 }
3609
3610 /**
3611 * @brief Start Receive operation in interrupt mode.
3612 * @note This function could be called by all HAL UART API providing reception in Interrupt mode.
3613 * @note When calling this function, parameters validity is considered as already checked,
3614 * i.e. Rx State, buffer address, ...
3615 * UART Handle is assumed as Locked.
3616 * @param huart UART handle.
3617 * @param pData Pointer to data buffer (u8 or u16 data elements).
3618 * @param Size Amount of data elements (u8 or u16) to be received.
3619 * @retval HAL status
3620 */
UART_Start_Receive_IT(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size)3621 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
3622 {
3623 huart->pRxBuffPtr = pData;
3624 huart->RxXferSize = Size;
3625 huart->RxXferCount = Size;
3626 huart->RxISR = NULL;
3627
3628 /* Computation of UART mask to apply to RDR register */
3629 UART_MASK_COMPUTATION(huart);
3630
3631 huart->ErrorCode = HAL_UART_ERROR_NONE;
3632 huart->RxState = HAL_UART_STATE_BUSY_RX;
3633
3634 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3635 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
3636
3637 #if defined(USART_CR1_FIFOEN)
3638 /* Configure Rx interrupt processing */
3639 if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
3640 {
3641 /* Set the Rx ISR function pointer according to the data word length */
3642 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
3643 {
3644 huart->RxISR = UART_RxISR_16BIT_FIFOEN;
3645 }
3646 else
3647 {
3648 huart->RxISR = UART_RxISR_8BIT_FIFOEN;
3649 }
3650
3651 /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
3652 if (huart->Init.Parity != UART_PARITY_NONE)
3653 {
3654 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3655 }
3656 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
3657 }
3658 else
3659 {
3660 /* Set the Rx ISR function pointer according to the data word length */
3661 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
3662 {
3663 huart->RxISR = UART_RxISR_16BIT;
3664 }
3665 else
3666 {
3667 huart->RxISR = UART_RxISR_8BIT;
3668 }
3669
3670 /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
3671 if (huart->Init.Parity != UART_PARITY_NONE)
3672 {
3673 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
3674 }
3675 else
3676 {
3677 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
3678 }
3679 }
3680 #else
3681 /* Set the Rx ISR function pointer according to the data word length */
3682 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
3683 {
3684 huart->RxISR = UART_RxISR_16BIT;
3685 }
3686 else
3687 {
3688 huart->RxISR = UART_RxISR_8BIT;
3689 }
3690
3691 /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
3692 if (huart->Init.Parity != UART_PARITY_NONE)
3693 {
3694 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
3695 }
3696 else
3697 {
3698 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE);
3699 }
3700 #endif /* USART_CR1_FIFOEN */
3701 return HAL_OK;
3702 }
3703
3704 /**
3705 * @brief Start Receive operation in DMA mode.
3706 * @note This function could be called by all HAL UART API providing reception in DMA mode.
3707 * @note When calling this function, parameters validity is considered as already checked,
3708 * i.e. Rx State, buffer address, ...
3709 * UART Handle is assumed as Locked.
3710 * @param huart UART handle.
3711 * @param pData Pointer to data buffer (u8 or u16 data elements).
3712 * @param Size Amount of data elements (u8 or u16) to be received.
3713 * @retval HAL status
3714 */
UART_Start_Receive_DMA(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size)3715 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
3716 {
3717 huart->pRxBuffPtr = pData;
3718 huart->RxXferSize = Size;
3719
3720 huart->ErrorCode = HAL_UART_ERROR_NONE;
3721 huart->RxState = HAL_UART_STATE_BUSY_RX;
3722
3723 if (huart->hdmarx != NULL)
3724 {
3725 /* Set the UART DMA transfer complete callback */
3726 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
3727
3728 /* Set the UART DMA Half transfer complete callback */
3729 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
3730
3731 /* Set the DMA error callback */
3732 huart->hdmarx->XferErrorCallback = UART_DMAError;
3733
3734 /* Set the DMA abort callback */
3735 huart->hdmarx->XferAbortCallback = NULL;
3736
3737 /* Enable the DMA channel */
3738 if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK)
3739 {
3740 /* Set error code to DMA */
3741 huart->ErrorCode = HAL_UART_ERROR_DMA;
3742
3743 /* Restore huart->RxState to ready */
3744 huart->RxState = HAL_UART_STATE_READY;
3745
3746 return HAL_ERROR;
3747 }
3748 }
3749
3750 /* Enable the UART Parity Error Interrupt */
3751 if (huart->Init.Parity != UART_PARITY_NONE)
3752 {
3753 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3754 }
3755
3756 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3757 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
3758
3759 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
3760 in the UART CR3 register */
3761 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3762
3763 return HAL_OK;
3764 }
3765
3766
3767 /**
3768 * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
3769 * @param huart UART handle.
3770 * @retval None
3771 */
UART_EndTxTransfer(UART_HandleTypeDef * huart)3772 static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
3773 {
3774 #if defined(USART_CR1_FIFOEN)
3775 /* Disable TXEIE, TCIE, TXFT interrupts */
3776 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
3777 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE));
3778 #else
3779 /* Disable TXEIE and TCIE interrupts */
3780 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
3781 #endif /* USART_CR1_FIFOEN */
3782
3783 /* At end of Tx process, restore huart->gState to Ready */
3784 huart->gState = HAL_UART_STATE_READY;
3785 }
3786
3787
3788 /**
3789 * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
3790 * @param huart UART handle.
3791 * @retval None
3792 */
UART_EndRxTransfer(UART_HandleTypeDef * huart)3793 static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
3794 {
3795 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
3796 #if defined(USART_CR1_FIFOEN)
3797 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3798 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
3799 #else
3800 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
3801 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3802 #endif /* USART_CR1_FIFOEN */
3803
3804 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
3805 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3806 {
3807 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
3808 }
3809
3810 /* At end of Rx process, restore huart->RxState to Ready */
3811 huart->RxState = HAL_UART_STATE_READY;
3812 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3813
3814 /* Reset RxIsr function pointer */
3815 huart->RxISR = NULL;
3816 }
3817
3818
3819 /**
3820 * @brief DMA UART transmit process complete callback.
3821 * @param hdma DMA handle.
3822 * @retval None
3823 */
UART_DMATransmitCplt(DMA_HandleTypeDef * hdma)3824 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
3825 {
3826 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3827
3828 /* DMA Normal mode */
3829 if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
3830 {
3831 huart->TxXferCount = 0U;
3832
3833 /* Disable the DMA transfer for transmit request by resetting the DMAT bit
3834 in the UART CR3 register */
3835 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
3836
3837 /* Enable the UART Transmit Complete Interrupt */
3838 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3839 }
3840 /* DMA Circular mode */
3841 else
3842 {
3843 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3844 /*Call registered Tx complete callback*/
3845 huart->TxCpltCallback(huart);
3846 #else
3847 /*Call legacy weak Tx complete callback*/
3848 HAL_UART_TxCpltCallback(huart);
3849 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3850 }
3851 }
3852
3853 /**
3854 * @brief DMA UART transmit process half complete callback.
3855 * @param hdma DMA handle.
3856 * @retval None
3857 */
UART_DMATxHalfCplt(DMA_HandleTypeDef * hdma)3858 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
3859 {
3860 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3861
3862 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3863 /*Call registered Tx Half complete callback*/
3864 huart->TxHalfCpltCallback(huart);
3865 #else
3866 /*Call legacy weak Tx Half complete callback*/
3867 HAL_UART_TxHalfCpltCallback(huart);
3868 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3869 }
3870
3871 /**
3872 * @brief DMA UART receive process complete callback.
3873 * @param hdma DMA handle.
3874 * @retval None
3875 */
UART_DMAReceiveCplt(DMA_HandleTypeDef * hdma)3876 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
3877 {
3878 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3879
3880 /* DMA Normal mode */
3881 if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
3882 {
3883 huart->RxXferCount = 0U;
3884
3885 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
3886 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3887 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3888
3889 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
3890 in the UART CR3 register */
3891 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3892
3893 /* At end of Rx process, restore huart->RxState to Ready */
3894 huart->RxState = HAL_UART_STATE_READY;
3895
3896 /* If Reception till IDLE event has been selected, Disable IDLE Interrupt */
3897 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3898 {
3899 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
3900 }
3901 }
3902
3903 /* Initialize type of RxEvent that correspond to RxEvent callback execution;
3904 In this case, Rx Event type is Transfer Complete */
3905 huart->RxEventType = HAL_UART_RXEVENT_TC;
3906
3907 /* Check current reception Mode :
3908 If Reception till IDLE event has been selected : use Rx Event callback */
3909 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3910 {
3911 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3912 /*Call registered Rx Event callback*/
3913 huart->RxEventCallback(huart, huart->RxXferSize);
3914 #else
3915 /*Call legacy weak Rx Event callback*/
3916 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
3917 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3918 }
3919 else
3920 {
3921 /* In other cases : use Rx Complete callback */
3922 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3923 /*Call registered Rx complete callback*/
3924 huart->RxCpltCallback(huart);
3925 #else
3926 /*Call legacy weak Rx complete callback*/
3927 HAL_UART_RxCpltCallback(huart);
3928 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3929 }
3930 }
3931
3932 /**
3933 * @brief DMA UART receive process half complete callback.
3934 * @param hdma DMA handle.
3935 * @retval None
3936 */
UART_DMARxHalfCplt(DMA_HandleTypeDef * hdma)3937 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
3938 {
3939 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3940
3941 /* Initialize type of RxEvent that correspond to RxEvent callback execution;
3942 In this case, Rx Event type is Half Transfer */
3943 huart->RxEventType = HAL_UART_RXEVENT_HT;
3944
3945 /* Check current reception Mode :
3946 If Reception till IDLE event has been selected : use Rx Event callback */
3947 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3948 {
3949 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3950 /*Call registered Rx Event callback*/
3951 huart->RxEventCallback(huart, huart->RxXferSize / 2U);
3952 #else
3953 /*Call legacy weak Rx Event callback*/
3954 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U);
3955 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3956 }
3957 else
3958 {
3959 /* In other cases : use Rx Half Complete callback */
3960 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3961 /*Call registered Rx Half complete callback*/
3962 huart->RxHalfCpltCallback(huart);
3963 #else
3964 /*Call legacy weak Rx Half complete callback*/
3965 HAL_UART_RxHalfCpltCallback(huart);
3966 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3967 }
3968 }
3969
3970 /**
3971 * @brief DMA UART communication error callback.
3972 * @param hdma DMA handle.
3973 * @retval None
3974 */
UART_DMAError(DMA_HandleTypeDef * hdma)3975 static void UART_DMAError(DMA_HandleTypeDef *hdma)
3976 {
3977 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3978
3979 const HAL_UART_StateTypeDef gstate = huart->gState;
3980 const HAL_UART_StateTypeDef rxstate = huart->RxState;
3981
3982 /* Stop UART DMA Tx request if ongoing */
3983 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
3984 (gstate == HAL_UART_STATE_BUSY_TX))
3985 {
3986 huart->TxXferCount = 0U;
3987 UART_EndTxTransfer(huart);
3988 }
3989
3990 /* Stop UART DMA Rx request if ongoing */
3991 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
3992 (rxstate == HAL_UART_STATE_BUSY_RX))
3993 {
3994 huart->RxXferCount = 0U;
3995 UART_EndRxTransfer(huart);
3996 }
3997
3998 huart->ErrorCode |= HAL_UART_ERROR_DMA;
3999
4000 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4001 /*Call registered error callback*/
4002 huart->ErrorCallback(huart);
4003 #else
4004 /*Call legacy weak error callback*/
4005 HAL_UART_ErrorCallback(huart);
4006 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4007 }
4008
4009 /**
4010 * @brief DMA UART communication abort callback, when initiated by HAL services on Error
4011 * (To be called at end of DMA Abort procedure following error occurrence).
4012 * @param hdma DMA handle.
4013 * @retval None
4014 */
UART_DMAAbortOnError(DMA_HandleTypeDef * hdma)4015 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
4016 {
4017 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
4018 huart->RxXferCount = 0U;
4019 huart->TxXferCount = 0U;
4020
4021 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4022 /*Call registered error callback*/
4023 huart->ErrorCallback(huart);
4024 #else
4025 /*Call legacy weak error callback*/
4026 HAL_UART_ErrorCallback(huart);
4027 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4028 }
4029
4030 /**
4031 * @brief DMA UART Tx communication abort callback, when initiated by user
4032 * (To be called at end of DMA Tx Abort procedure following user abort request).
4033 * @note When this callback is executed, User Abort complete call back is called only if no
4034 * Abort still ongoing for Rx DMA Handle.
4035 * @param hdma DMA handle.
4036 * @retval None
4037 */
UART_DMATxAbortCallback(DMA_HandleTypeDef * hdma)4038 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
4039 {
4040 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
4041
4042 huart->hdmatx->XferAbortCallback = NULL;
4043
4044 /* Check if an Abort process is still ongoing */
4045 if (huart->hdmarx != NULL)
4046 {
4047 if (huart->hdmarx->XferAbortCallback != NULL)
4048 {
4049 return;
4050 }
4051 }
4052
4053 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
4054 huart->TxXferCount = 0U;
4055 huart->RxXferCount = 0U;
4056
4057 /* Reset errorCode */
4058 huart->ErrorCode = HAL_UART_ERROR_NONE;
4059
4060 /* Clear the Error flags in the ICR register */
4061 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
4062
4063 #if defined(USART_CR1_FIFOEN)
4064 /* Flush the whole TX FIFO (if needed) */
4065 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
4066 {
4067 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
4068 }
4069 #endif /* USART_CR1_FIFOEN */
4070
4071 /* Restore huart->gState and huart->RxState to Ready */
4072 huart->gState = HAL_UART_STATE_READY;
4073 huart->RxState = HAL_UART_STATE_READY;
4074 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4075
4076 /* Call user Abort complete callback */
4077 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4078 /* Call registered Abort complete callback */
4079 huart->AbortCpltCallback(huart);
4080 #else
4081 /* Call legacy weak Abort complete callback */
4082 HAL_UART_AbortCpltCallback(huart);
4083 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4084 }
4085
4086
4087 /**
4088 * @brief DMA UART Rx communication abort callback, when initiated by user
4089 * (To be called at end of DMA Rx Abort procedure following user abort request).
4090 * @note When this callback is executed, User Abort complete call back is called only if no
4091 * Abort still ongoing for Tx DMA Handle.
4092 * @param hdma DMA handle.
4093 * @retval None
4094 */
UART_DMARxAbortCallback(DMA_HandleTypeDef * hdma)4095 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
4096 {
4097 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
4098
4099 huart->hdmarx->XferAbortCallback = NULL;
4100
4101 /* Check if an Abort process is still ongoing */
4102 if (huart->hdmatx != NULL)
4103 {
4104 if (huart->hdmatx->XferAbortCallback != NULL)
4105 {
4106 return;
4107 }
4108 }
4109
4110 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
4111 huart->TxXferCount = 0U;
4112 huart->RxXferCount = 0U;
4113
4114 /* Reset errorCode */
4115 huart->ErrorCode = HAL_UART_ERROR_NONE;
4116
4117 /* Clear the Error flags in the ICR register */
4118 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
4119
4120 /* Discard the received data */
4121 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4122
4123 /* Restore huart->gState and huart->RxState to Ready */
4124 huart->gState = HAL_UART_STATE_READY;
4125 huart->RxState = HAL_UART_STATE_READY;
4126 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4127
4128 /* Call user Abort complete callback */
4129 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4130 /* Call registered Abort complete callback */
4131 huart->AbortCpltCallback(huart);
4132 #else
4133 /* Call legacy weak Abort complete callback */
4134 HAL_UART_AbortCpltCallback(huart);
4135 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4136 }
4137
4138
4139 /**
4140 * @brief DMA UART Tx communication abort callback, when initiated by user by a call to
4141 * HAL_UART_AbortTransmit_IT API (Abort only Tx transfer)
4142 * (This callback is executed at end of DMA Tx Abort procedure following user abort request,
4143 * and leads to user Tx Abort Complete callback execution).
4144 * @param hdma DMA handle.
4145 * @retval None
4146 */
UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef * hdma)4147 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
4148 {
4149 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
4150
4151 huart->TxXferCount = 0U;
4152
4153 #if defined(USART_CR1_FIFOEN)
4154 /* Flush the whole TX FIFO (if needed) */
4155 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
4156 {
4157 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
4158 }
4159 #endif /* USART_CR1_FIFOEN */
4160
4161 /* Restore huart->gState to Ready */
4162 huart->gState = HAL_UART_STATE_READY;
4163
4164 /* Call user Abort complete callback */
4165 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4166 /* Call registered Abort Transmit Complete Callback */
4167 huart->AbortTransmitCpltCallback(huart);
4168 #else
4169 /* Call legacy weak Abort Transmit Complete Callback */
4170 HAL_UART_AbortTransmitCpltCallback(huart);
4171 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4172 }
4173
4174 /**
4175 * @brief DMA UART Rx communication abort callback, when initiated by user by a call to
4176 * HAL_UART_AbortReceive_IT API (Abort only Rx transfer)
4177 * (This callback is executed at end of DMA Rx Abort procedure following user abort request,
4178 * and leads to user Rx Abort Complete callback execution).
4179 * @param hdma DMA handle.
4180 * @retval None
4181 */
UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef * hdma)4182 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
4183 {
4184 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
4185
4186 huart->RxXferCount = 0U;
4187
4188 /* Clear the Error flags in the ICR register */
4189 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
4190
4191 /* Discard the received data */
4192 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4193
4194 /* Restore huart->RxState to Ready */
4195 huart->RxState = HAL_UART_STATE_READY;
4196 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4197
4198 /* Call user Abort complete callback */
4199 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4200 /* Call registered Abort Receive Complete Callback */
4201 huart->AbortReceiveCpltCallback(huart);
4202 #else
4203 /* Call legacy weak Abort Receive Complete Callback */
4204 HAL_UART_AbortReceiveCpltCallback(huart);
4205 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4206 }
4207
4208 /**
4209 * @brief TX interrupt handler for 7 or 8 bits data word length .
4210 * @note Function is called under interruption only, once
4211 * interruptions have been enabled by HAL_UART_Transmit_IT().
4212 * @param huart UART handle.
4213 * @retval None
4214 */
UART_TxISR_8BIT(UART_HandleTypeDef * huart)4215 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
4216 {
4217 /* Check that a Tx process is ongoing */
4218 if (huart->gState == HAL_UART_STATE_BUSY_TX)
4219 {
4220 if (huart->TxXferCount == 0U)
4221 {
4222 /* Disable the UART Transmit Data Register Empty Interrupt */
4223 #if defined(USART_CR1_FIFOEN)
4224 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
4225 #else
4226 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
4227 #endif /* USART_CR1_FIFOEN */
4228
4229 /* Enable the UART Transmit Complete Interrupt */
4230 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4231 }
4232 else
4233 {
4234 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
4235 huart->pTxBuffPtr++;
4236 huart->TxXferCount--;
4237 }
4238 }
4239 }
4240
4241 /**
4242 * @brief TX interrupt handler for 9 bits data word length.
4243 * @note Function is called under interruption only, once
4244 * interruptions have been enabled by HAL_UART_Transmit_IT().
4245 * @param huart UART handle.
4246 * @retval None
4247 */
UART_TxISR_16BIT(UART_HandleTypeDef * huart)4248 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
4249 {
4250 const uint16_t *tmp;
4251
4252 /* Check that a Tx process is ongoing */
4253 if (huart->gState == HAL_UART_STATE_BUSY_TX)
4254 {
4255 if (huart->TxXferCount == 0U)
4256 {
4257 /* Disable the UART Transmit Data Register Empty Interrupt */
4258 #if defined(USART_CR1_FIFOEN)
4259 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
4260 #else
4261 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
4262 #endif /* USART_CR1_FIFOEN */
4263
4264 /* Enable the UART Transmit Complete Interrupt */
4265 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4266 }
4267 else
4268 {
4269 tmp = (const uint16_t *) huart->pTxBuffPtr;
4270 huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
4271 huart->pTxBuffPtr += 2U;
4272 huart->TxXferCount--;
4273 }
4274 }
4275 }
4276
4277 #if defined(USART_CR1_FIFOEN)
4278 /**
4279 * @brief TX interrupt handler for 7 or 8 bits data word length and FIFO mode is enabled.
4280 * @note Function is called under interruption only, once
4281 * interruptions have been enabled by HAL_UART_Transmit_IT().
4282 * @param huart UART handle.
4283 * @retval None
4284 */
UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef * huart)4285 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
4286 {
4287 uint16_t nb_tx_data;
4288
4289 /* Check that a Tx process is ongoing */
4290 if (huart->gState == HAL_UART_STATE_BUSY_TX)
4291 {
4292 for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
4293 {
4294 if (huart->TxXferCount == 0U)
4295 {
4296 /* Disable the TX FIFO threshold interrupt */
4297 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
4298
4299 /* Enable the UART Transmit Complete Interrupt */
4300 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4301
4302 break; /* force exit loop */
4303 }
4304 else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
4305 {
4306 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
4307 huart->pTxBuffPtr++;
4308 huart->TxXferCount--;
4309 }
4310 else
4311 {
4312 /* Nothing to do */
4313 }
4314 }
4315 }
4316 }
4317
4318 /**
4319 * @brief TX interrupt handler for 9 bits data word length and FIFO mode is enabled.
4320 * @note Function is called under interruption only, once
4321 * interruptions have been enabled by HAL_UART_Transmit_IT().
4322 * @param huart UART handle.
4323 * @retval None
4324 */
UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef * huart)4325 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
4326 {
4327 const uint16_t *tmp;
4328 uint16_t nb_tx_data;
4329
4330 /* Check that a Tx process is ongoing */
4331 if (huart->gState == HAL_UART_STATE_BUSY_TX)
4332 {
4333 for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
4334 {
4335 if (huart->TxXferCount == 0U)
4336 {
4337 /* Disable the TX FIFO threshold interrupt */
4338 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
4339
4340 /* Enable the UART Transmit Complete Interrupt */
4341 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4342
4343 break; /* force exit loop */
4344 }
4345 else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
4346 {
4347 tmp = (const uint16_t *) huart->pTxBuffPtr;
4348 huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
4349 huart->pTxBuffPtr += 2U;
4350 huart->TxXferCount--;
4351 }
4352 else
4353 {
4354 /* Nothing to do */
4355 }
4356 }
4357 }
4358 }
4359 #endif /* USART_CR1_FIFOEN */
4360
4361 /**
4362 * @brief Wrap up transmission in non-blocking mode.
4363 * @param huart pointer to a UART_HandleTypeDef structure that contains
4364 * the configuration information for the specified UART module.
4365 * @retval None
4366 */
UART_EndTransmit_IT(UART_HandleTypeDef * huart)4367 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
4368 {
4369 /* Disable the UART Transmit Complete Interrupt */
4370 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4371
4372 /* Tx process is ended, restore huart->gState to Ready */
4373 huart->gState = HAL_UART_STATE_READY;
4374
4375 /* Cleat TxISR function pointer */
4376 huart->TxISR = NULL;
4377
4378 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4379 /*Call registered Tx complete callback*/
4380 huart->TxCpltCallback(huart);
4381 #else
4382 /*Call legacy weak Tx complete callback*/
4383 HAL_UART_TxCpltCallback(huart);
4384 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4385 }
4386
4387 /**
4388 * @brief RX interrupt handler for 7 or 8 bits data word length .
4389 * @param huart UART handle.
4390 * @retval None
4391 */
UART_RxISR_8BIT(UART_HandleTypeDef * huart)4392 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
4393 {
4394 uint16_t uhMask = huart->Mask;
4395 uint16_t uhdata;
4396
4397 /* Check that a Rx process is ongoing */
4398 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4399 {
4400 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4401 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
4402 huart->pRxBuffPtr++;
4403 huart->RxXferCount--;
4404
4405 if (huart->RxXferCount == 0U)
4406 {
4407 /* Disable the UART Parity Error Interrupt and RXNE interrupts */
4408 #if defined(USART_CR1_FIFOEN)
4409 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
4410 #else
4411 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
4412 #endif /* USART_CR1_FIFOEN */
4413
4414 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
4415 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
4416
4417 /* Rx process is completed, restore huart->RxState to Ready */
4418 huart->RxState = HAL_UART_STATE_READY;
4419
4420 /* Clear RxISR function pointer */
4421 huart->RxISR = NULL;
4422
4423 /* Initialize type of RxEvent to Transfer Complete */
4424 huart->RxEventType = HAL_UART_RXEVENT_TC;
4425
4426 if (!(IS_LPUART_INSTANCE(huart->Instance)))
4427 {
4428 /* Check that USART RTOEN bit is set */
4429 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
4430 {
4431 /* Enable the UART Receiver Timeout Interrupt */
4432 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
4433 }
4434 }
4435
4436 /* Check current reception Mode :
4437 If Reception till IDLE event has been selected : */
4438 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4439 {
4440 /* Set reception type to Standard */
4441 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4442
4443 /* Disable IDLE interrupt */
4444 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4445
4446 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
4447 {
4448 /* Clear IDLE Flag */
4449 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
4450 }
4451
4452 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4453 /*Call registered Rx Event callback*/
4454 huart->RxEventCallback(huart, huart->RxXferSize);
4455 #else
4456 /*Call legacy weak Rx Event callback*/
4457 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4458 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
4459 }
4460 else
4461 {
4462 /* Standard reception API called */
4463 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4464 /*Call registered Rx complete callback*/
4465 huart->RxCpltCallback(huart);
4466 #else
4467 /*Call legacy weak Rx complete callback*/
4468 HAL_UART_RxCpltCallback(huart);
4469 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4470 }
4471 }
4472 }
4473 else
4474 {
4475 /* Clear RXNE interrupt flag */
4476 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4477 }
4478 }
4479
4480 /**
4481 * @brief RX interrupt handler for 9 bits data word length .
4482 * @note Function is called under interruption only, once
4483 * interruptions have been enabled by HAL_UART_Receive_IT()
4484 * @param huart UART handle.
4485 * @retval None
4486 */
UART_RxISR_16BIT(UART_HandleTypeDef * huart)4487 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
4488 {
4489 uint16_t *tmp;
4490 uint16_t uhMask = huart->Mask;
4491 uint16_t uhdata;
4492
4493 /* Check that a Rx process is ongoing */
4494 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4495 {
4496 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4497 tmp = (uint16_t *) huart->pRxBuffPtr ;
4498 *tmp = (uint16_t)(uhdata & uhMask);
4499 huart->pRxBuffPtr += 2U;
4500 huart->RxXferCount--;
4501
4502 if (huart->RxXferCount == 0U)
4503 {
4504 /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
4505 #if defined(USART_CR1_FIFOEN)
4506 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
4507 #else
4508 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
4509 #endif /* USART_CR1_FIFOEN */
4510
4511 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
4512 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
4513
4514 /* Rx process is completed, restore huart->RxState to Ready */
4515 huart->RxState = HAL_UART_STATE_READY;
4516
4517 /* Clear RxISR function pointer */
4518 huart->RxISR = NULL;
4519
4520 /* Initialize type of RxEvent to Transfer Complete */
4521 huart->RxEventType = HAL_UART_RXEVENT_TC;
4522
4523 if (!(IS_LPUART_INSTANCE(huart->Instance)))
4524 {
4525 /* Check that USART RTOEN bit is set */
4526 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
4527 {
4528 /* Enable the UART Receiver Timeout Interrupt */
4529 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
4530 }
4531 }
4532
4533 /* Check current reception Mode :
4534 If Reception till IDLE event has been selected : */
4535 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4536 {
4537 /* Set reception type to Standard */
4538 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4539
4540 /* Disable IDLE interrupt */
4541 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4542
4543 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
4544 {
4545 /* Clear IDLE Flag */
4546 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
4547 }
4548
4549 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4550 /*Call registered Rx Event callback*/
4551 huart->RxEventCallback(huart, huart->RxXferSize);
4552 #else
4553 /*Call legacy weak Rx Event callback*/
4554 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4555 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
4556 }
4557 else
4558 {
4559 /* Standard reception API called */
4560 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4561 /*Call registered Rx complete callback*/
4562 huart->RxCpltCallback(huart);
4563 #else
4564 /*Call legacy weak Rx complete callback*/
4565 HAL_UART_RxCpltCallback(huart);
4566 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4567 }
4568 }
4569 }
4570 else
4571 {
4572 /* Clear RXNE interrupt flag */
4573 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4574 }
4575 }
4576
4577 #if defined(USART_CR1_FIFOEN)
4578 /**
4579 * @brief RX interrupt handler for 7 or 8 bits data word length and FIFO mode is enabled.
4580 * @note Function is called under interruption only, once
4581 * interruptions have been enabled by HAL_UART_Receive_IT()
4582 * @param huart UART handle.
4583 * @retval None
4584 */
UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef * huart)4585 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
4586 {
4587 uint16_t uhMask = huart->Mask;
4588 uint16_t uhdata;
4589 uint16_t nb_rx_data;
4590 uint16_t rxdatacount;
4591 uint32_t isrflags = READ_REG(huart->Instance->ISR);
4592 uint32_t cr1its = READ_REG(huart->Instance->CR1);
4593 uint32_t cr3its = READ_REG(huart->Instance->CR3);
4594
4595 /* Check that a Rx process is ongoing */
4596 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4597 {
4598 nb_rx_data = huart->NbRxDataToProcess;
4599 while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
4600 {
4601 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4602 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
4603 huart->pRxBuffPtr++;
4604 huart->RxXferCount--;
4605 isrflags = READ_REG(huart->Instance->ISR);
4606
4607 /* If some non blocking errors occurred */
4608 if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
4609 {
4610 /* UART parity error interrupt occurred -------------------------------------*/
4611 if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
4612 {
4613 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
4614
4615 huart->ErrorCode |= HAL_UART_ERROR_PE;
4616 }
4617
4618 /* UART frame error interrupt occurred --------------------------------------*/
4619 if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4620 {
4621 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
4622
4623 huart->ErrorCode |= HAL_UART_ERROR_FE;
4624 }
4625
4626 /* UART noise error interrupt occurred --------------------------------------*/
4627 if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4628 {
4629 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
4630
4631 huart->ErrorCode |= HAL_UART_ERROR_NE;
4632 }
4633
4634 /* Call UART Error Call back function if need be ----------------------------*/
4635 if (huart->ErrorCode != HAL_UART_ERROR_NONE)
4636 {
4637 /* Non Blocking error : transfer could go on.
4638 Error is notified to user through user error callback */
4639 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4640 /*Call registered error callback*/
4641 huart->ErrorCallback(huart);
4642 #else
4643 /*Call legacy weak error callback*/
4644 HAL_UART_ErrorCallback(huart);
4645 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4646 huart->ErrorCode = HAL_UART_ERROR_NONE;
4647 }
4648 }
4649
4650 if (huart->RxXferCount == 0U)
4651 {
4652 /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
4653 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
4654
4655 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
4656 and RX FIFO Threshold interrupt */
4657 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
4658
4659 /* Rx process is completed, restore huart->RxState to Ready */
4660 huart->RxState = HAL_UART_STATE_READY;
4661
4662 /* Clear RxISR function pointer */
4663 huart->RxISR = NULL;
4664
4665 /* Initialize type of RxEvent to Transfer Complete */
4666 huart->RxEventType = HAL_UART_RXEVENT_TC;
4667
4668 if (!(IS_LPUART_INSTANCE(huart->Instance)))
4669 {
4670 /* Check that USART RTOEN bit is set */
4671 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
4672 {
4673 /* Enable the UART Receiver Timeout Interrupt */
4674 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
4675 }
4676 }
4677
4678 /* Check current reception Mode :
4679 If Reception till IDLE event has been selected : */
4680 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4681 {
4682 /* Set reception type to Standard */
4683 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4684
4685 /* Disable IDLE interrupt */
4686 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4687
4688 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
4689 {
4690 /* Clear IDLE Flag */
4691 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
4692 }
4693
4694 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4695 /*Call registered Rx Event callback*/
4696 huart->RxEventCallback(huart, huart->RxXferSize);
4697 #else
4698 /*Call legacy weak Rx Event callback*/
4699 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4700 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
4701 }
4702 else
4703 {
4704 /* Standard reception API called */
4705 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4706 /*Call registered Rx complete callback*/
4707 huart->RxCpltCallback(huart);
4708 #else
4709 /*Call legacy weak Rx complete callback*/
4710 HAL_UART_RxCpltCallback(huart);
4711 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4712 }
4713 break;
4714 }
4715 }
4716
4717 /* When remaining number of bytes to receive is less than the RX FIFO
4718 threshold, next incoming frames are processed as if FIFO mode was
4719 disabled (i.e. one interrupt per received frame).
4720 */
4721 rxdatacount = huart->RxXferCount;
4722 if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
4723 {
4724 /* Disable the UART RXFT interrupt*/
4725 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
4726
4727 /* Update the RxISR function pointer */
4728 huart->RxISR = UART_RxISR_8BIT;
4729
4730 /* Enable the UART Data Register Not Empty interrupt */
4731 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
4732 }
4733 }
4734 else
4735 {
4736 /* Clear RXNE interrupt flag */
4737 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4738 }
4739 }
4740
4741 /**
4742 * @brief RX interrupt handler for 9 bits data word length and FIFO mode is enabled.
4743 * @note Function is called under interruption only, once
4744 * interruptions have been enabled by HAL_UART_Receive_IT()
4745 * @param huart UART handle.
4746 * @retval None
4747 */
UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef * huart)4748 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
4749 {
4750 uint16_t *tmp;
4751 uint16_t uhMask = huart->Mask;
4752 uint16_t uhdata;
4753 uint16_t nb_rx_data;
4754 uint16_t rxdatacount;
4755 uint32_t isrflags = READ_REG(huart->Instance->ISR);
4756 uint32_t cr1its = READ_REG(huart->Instance->CR1);
4757 uint32_t cr3its = READ_REG(huart->Instance->CR3);
4758
4759 /* Check that a Rx process is ongoing */
4760 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4761 {
4762 nb_rx_data = huart->NbRxDataToProcess;
4763 while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
4764 {
4765 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4766 tmp = (uint16_t *) huart->pRxBuffPtr ;
4767 *tmp = (uint16_t)(uhdata & uhMask);
4768 huart->pRxBuffPtr += 2U;
4769 huart->RxXferCount--;
4770 isrflags = READ_REG(huart->Instance->ISR);
4771
4772 /* If some non blocking errors occurred */
4773 if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
4774 {
4775 /* UART parity error interrupt occurred -------------------------------------*/
4776 if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
4777 {
4778 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
4779
4780 huart->ErrorCode |= HAL_UART_ERROR_PE;
4781 }
4782
4783 /* UART frame error interrupt occurred --------------------------------------*/
4784 if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4785 {
4786 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
4787
4788 huart->ErrorCode |= HAL_UART_ERROR_FE;
4789 }
4790
4791 /* UART noise error interrupt occurred --------------------------------------*/
4792 if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4793 {
4794 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
4795
4796 huart->ErrorCode |= HAL_UART_ERROR_NE;
4797 }
4798
4799 /* Call UART Error Call back function if need be ----------------------------*/
4800 if (huart->ErrorCode != HAL_UART_ERROR_NONE)
4801 {
4802 /* Non Blocking error : transfer could go on.
4803 Error is notified to user through user error callback */
4804 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4805 /*Call registered error callback*/
4806 huart->ErrorCallback(huart);
4807 #else
4808 /*Call legacy weak error callback*/
4809 HAL_UART_ErrorCallback(huart);
4810 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4811 huart->ErrorCode = HAL_UART_ERROR_NONE;
4812 }
4813 }
4814
4815 if (huart->RxXferCount == 0U)
4816 {
4817 /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
4818 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
4819
4820 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
4821 and RX FIFO Threshold interrupt */
4822 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
4823
4824 /* Rx process is completed, restore huart->RxState to Ready */
4825 huart->RxState = HAL_UART_STATE_READY;
4826
4827 /* Clear RxISR function pointer */
4828 huart->RxISR = NULL;
4829
4830 /* Initialize type of RxEvent to Transfer Complete */
4831 huart->RxEventType = HAL_UART_RXEVENT_TC;
4832
4833 if (!(IS_LPUART_INSTANCE(huart->Instance)))
4834 {
4835 /* Check that USART RTOEN bit is set */
4836 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
4837 {
4838 /* Enable the UART Receiver Timeout Interrupt */
4839 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
4840 }
4841 }
4842
4843 /* Check current reception Mode :
4844 If Reception till IDLE event has been selected : */
4845 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4846 {
4847 /* Set reception type to Standard */
4848 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4849
4850 /* Disable IDLE interrupt */
4851 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4852
4853 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
4854 {
4855 /* Clear IDLE Flag */
4856 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
4857 }
4858
4859 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4860 /*Call registered Rx Event callback*/
4861 huart->RxEventCallback(huart, huart->RxXferSize);
4862 #else
4863 /*Call legacy weak Rx Event callback*/
4864 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4865 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
4866 }
4867 else
4868 {
4869 /* Standard reception API called */
4870 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4871 /*Call registered Rx complete callback*/
4872 huart->RxCpltCallback(huart);
4873 #else
4874 /*Call legacy weak Rx complete callback*/
4875 HAL_UART_RxCpltCallback(huart);
4876 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4877 }
4878 break;
4879 }
4880 }
4881
4882 /* When remaining number of bytes to receive is less than the RX FIFO
4883 threshold, next incoming frames are processed as if FIFO mode was
4884 disabled (i.e. one interrupt per received frame).
4885 */
4886 rxdatacount = huart->RxXferCount;
4887 if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
4888 {
4889 /* Disable the UART RXFT interrupt*/
4890 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
4891
4892 /* Update the RxISR function pointer */
4893 huart->RxISR = UART_RxISR_16BIT;
4894
4895 /* Enable the UART Data Register Not Empty interrupt */
4896 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
4897 }
4898 }
4899 else
4900 {
4901 /* Clear RXNE interrupt flag */
4902 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4903 }
4904 }
4905 #endif /* USART_CR1_FIFOEN */
4906
4907 /**
4908 * @}
4909 */
4910
4911 #endif /* HAL_UART_MODULE_ENABLED */
4912 /**
4913 * @}
4914 */
4915
4916 /**
4917 * @}
4918 */
4919
4920
