1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_uart.c
4 * @author MCD Application Team
5 * @brief UART HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 *
12 *
13 ******************************************************************************
14 * @attention
15 *
16 * Copyright (c) 2017 STMicroelectronics.
17 * All rights reserved.
18 *
19 * This software is licensed under terms that can be found in the LICENSE file
20 * in the root directory of this software component.
21 * If no LICENSE file comes with this software, it is provided AS-IS.
22 *
23 ******************************************************************************
24 @verbatim
25 ===============================================================================
26 ##### How to use this driver #####
27 ===============================================================================
28 [..]
29 The UART HAL driver can be used as follows:
30
31 (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart).
32 (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
33 (++) Enable the USARTx interface clock.
34 (++) UART pins configuration:
35 (+++) Enable the clock for the UART GPIOs.
36 (+++) Configure these UART pins as alternate function pull-up.
37 (++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
38 and HAL_UART_Receive_IT() APIs):
39 (+++) Configure the USARTx interrupt priority.
40 (+++) Enable the NVIC USART IRQ handle.
41 (++) UART interrupts handling:
42 -@@- The specific UART interrupts (Transmission complete interrupt,
43 RXNE interrupt, RX/TX FIFOs related interrupts and Error Interrupts)
44 are managed using the macros __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT()
45 inside the transmit and receive processes.
46 (++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
47 and HAL_UART_Receive_DMA() APIs):
48 (+++) Declare a DMA handle structure for the Tx/Rx channel.
49 (+++) Enable the DMAx interface clock.
50 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
51 (+++) Configure the DMA Tx/Rx channel.
52 (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
53 (+++) Configure the priority and enable the NVIC for the transfer complete
54 interrupt on the DMA Tx/Rx channel.
55
56 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Prescaler value , Hardware
57 flow control and Mode (Receiver/Transmitter) in the huart handle Init structure.
58
59 (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...)
60 in the huart handle AdvancedInit structure.
61
62 (#) For the UART asynchronous mode, initialize the UART registers by calling
63 the HAL_UART_Init() API.
64
65 (#) For the UART Half duplex mode, initialize the UART registers by calling
66 the HAL_HalfDuplex_Init() API.
67
68 (#) For the UART LIN (Local Interconnection Network) mode, initialize the UART registers
69 by calling the HAL_LIN_Init() API.
70
71 (#) For the UART Multiprocessor mode, initialize the UART registers
72 by calling the HAL_MultiProcessor_Init() API.
73
74 (#) For the UART RS485 Driver Enabled mode, initialize the UART registers
75 by calling the HAL_RS485Ex_Init() API.
76
77 [..]
78 (@) These API's (HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(), HAL_MultiProcessor_Init(),
79 also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by
80 calling the customized HAL_UART_MspInit() API.
81
82 ##### Callback registration #####
83 ==================================
84
85 [..]
86 The compilation define USE_HAL_UART_REGISTER_CALLBACKS when set to 1
87 allows the user to configure dynamically the driver callbacks.
88
89 [..]
90 Use Function HAL_UART_RegisterCallback() to register a user callback.
91 Function HAL_UART_RegisterCallback() allows to register following callbacks:
92 (+) TxHalfCpltCallback : Tx Half Complete Callback.
93 (+) TxCpltCallback : Tx Complete Callback.
94 (+) RxHalfCpltCallback : Rx Half Complete Callback.
95 (+) RxCpltCallback : Rx Complete Callback.
96 (+) ErrorCallback : Error Callback.
97 (+) AbortCpltCallback : Abort Complete Callback.
98 (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback.
99 (+) AbortReceiveCpltCallback : Abort Receive Complete Callback.
100 (+) WakeupCallback : Wakeup Callback.
101 #if defined(USART_CR1_FIFOEN)
102 (+) RxFifoFullCallback : Rx Fifo Full Callback.
103 (+) TxFifoEmptyCallback : Tx Fifo Empty Callback.
104 #endif
105 (+) MspInitCallback : UART MspInit.
106 (+) MspDeInitCallback : UART MspDeInit.
107 This function takes as parameters the HAL peripheral handle, the Callback ID
108 and a pointer to the user callback function.
109
110 [..]
111 Use function HAL_UART_UnRegisterCallback() to reset a callback to the default
112 weak (surcharged) function.
113 HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
114 and the Callback ID.
115 This function allows to reset following callbacks:
116 (+) TxHalfCpltCallback : Tx Half Complete Callback.
117 (+) TxCpltCallback : Tx Complete Callback.
118 (+) RxHalfCpltCallback : Rx Half Complete Callback.
119 (+) RxCpltCallback : Rx Complete Callback.
120 (+) ErrorCallback : Error Callback.
121 (+) AbortCpltCallback : Abort Complete Callback.
122 (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback.
123 (+) AbortReceiveCpltCallback : Abort Receive Complete Callback.
124 (+) WakeupCallback : Wakeup Callback.
125 #if defined(USART_CR1_FIFOEN)
126 (+) RxFifoFullCallback : Rx Fifo Full Callback.
127 (+) TxFifoEmptyCallback : Tx Fifo Empty Callback.
128 #endif
129 (+) MspInitCallback : UART MspInit.
130 (+) MspDeInitCallback : UART MspDeInit.
131
132 [..]
133 For specific callback RxEventCallback, use dedicated registration/reset functions:
134 respectively HAL_UART_RegisterRxEventCallback() , HAL_UART_UnRegisterRxEventCallback().
135
136 [..]
137 By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET
138 all callbacks are set to the corresponding weak (surcharged) functions:
139 examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback().
140 Exception done for MspInit and MspDeInit functions that are respectively
141 reset to the legacy weak (surcharged) functions in the HAL_UART_Init()
142 and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand).
143 If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit()
144 keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
145
146 [..]
147 Callbacks can be registered/unregistered in HAL_UART_STATE_READY state only.
148 Exception done MspInit/MspDeInit that can be registered/unregistered
149 in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user)
150 MspInit/DeInit callbacks can be used during the Init/DeInit.
151 In that case first register the MspInit/MspDeInit user callbacks
152 using HAL_UART_RegisterCallback() before calling HAL_UART_DeInit()
153 or HAL_UART_Init() function.
154
155 [..]
156 When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or
157 not defined, the callback registration feature is not available
158 and weak (surcharged) callbacks are used.
159
160
161 @endverbatim
162 ******************************************************************************
163 */
164
165 /* Includes ------------------------------------------------------------------*/
166 #include "stm32l4xx_hal.h"
167
168 /** @addtogroup STM32L4xx_HAL_Driver
169 * @{
170 */
171
172 /** @defgroup UART UART
173 * @brief HAL UART module driver
174 * @{
175 */
176
177 #ifdef HAL_UART_MODULE_ENABLED
178
179 /* Private typedef -----------------------------------------------------------*/
180 /* Private define ------------------------------------------------------------*/
181 /** @defgroup UART_Private_Constants UART Private Constants
182 * @{
183 */
184 #if defined(USART_CR1_FIFOEN)
185 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | \
186 USART_CR1_OVER8 | USART_CR1_FIFOEN)) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */
187 #else
188 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | \
189 USART_CR1_OVER8)) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */
190 #endif /* USART_CR1_FIFOEN */
191
192 #if defined(USART_CR1_FIFOEN)
193 #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT | USART_CR3_TXFTCFG | \
194 USART_CR3_RXFTCFG)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */
195 #else
196 #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE |\
197 USART_CR3_ONEBIT)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */
198 #endif /* USART_CR1_FIFOEN */
199
200 #define LPUART_BRR_MIN 0x00000300U /* LPUART BRR minimum authorized value */
201 #define LPUART_BRR_MAX 0x000FFFFFU /* LPUART BRR maximum authorized value */
202
203 #define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */
204 #define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */
205 /**
206 * @}
207 */
208
209 /* Private macros ------------------------------------------------------------*/
210 /* Private function prototypes -----------------------------------------------*/
211 /** @addtogroup UART_Private_Functions
212 * @{
213 */
214 static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
215 static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
216 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
217 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
218 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
219 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
220 static void UART_DMAError(DMA_HandleTypeDef *hdma);
221 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
222 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
223 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
224 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
225 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
226 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart);
227 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart);
228 #if defined(USART_CR1_FIFOEN)
229 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
230 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
231 #endif /* USART_CR1_FIFOEN */
232 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart);
233 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart);
234 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart);
235 #if defined(USART_CR1_FIFOEN)
236 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
237 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
238 #endif /* USART_CR1_FIFOEN */
239 /**
240 * @}
241 */
242
243 /* Private variables ---------------------------------------------------------*/
244 #if defined(USART_PRESC_PRESCALER)
245 /** @addtogroup UART_Private_variables
246 * @{
247 */
248 const uint16_t UARTPrescTable[12] = {1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U, 128U, 256U};
249 /**
250 * @}
251 */
252
253 #endif /* USART_PRESC_PRESCALER */
254 /* Exported Constants --------------------------------------------------------*/
255 /* Exported functions --------------------------------------------------------*/
256
257 /** @defgroup UART_Exported_Functions UART Exported Functions
258 * @{
259 */
260
261 /** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
262 * @brief Initialization and Configuration functions
263 *
264 @verbatim
265 ===============================================================================
266 ##### Initialization and Configuration functions #####
267 ===============================================================================
268 [..]
269 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
270 in asynchronous mode.
271 (+) For the asynchronous mode the parameters below can be configured:
272 (++) Baud Rate
273 (++) Word Length
274 (++) Stop Bit
275 (++) Parity: If the parity is enabled, then the MSB bit of the data written
276 in the data register is transmitted but is changed by the parity bit.
277 (++) Hardware flow control
278 (++) Receiver/transmitter modes
279 (++) Over Sampling Method
280 (++) One-Bit Sampling Method
281 (+) For the asynchronous mode, the following advanced features can be configured as well:
282 (++) TX and/or RX pin level inversion
283 (++) data logical level inversion
284 (++) RX and TX pins swap
285 (++) RX overrun detection disabling
286 (++) DMA disabling on RX error
287 (++) MSB first on communication line
288 (++) auto Baud rate detection
289 [..]
290 The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init()and HAL_MultiProcessor_Init()API
291 follow respectively the UART asynchronous, UART Half duplex, UART LIN mode
292 and UART multiprocessor mode configuration procedures (details for the procedures
293 are available in reference manual).
294
295 @endverbatim
296
297 Depending on the frame length defined by the M1 and M0 bits (7-bit,
298 8-bit or 9-bit), the possible UART formats are listed in the
299 following table.
300
301 Table 1. UART frame format.
302 +-----------------------------------------------------------------------+
303 | M1 bit | M0 bit | PCE bit | UART frame |
304 |---------|---------|-----------|---------------------------------------|
305 | 0 | 0 | 0 | | SB | 8 bit data | STB | |
306 |---------|---------|-----------|---------------------------------------|
307 | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | |
308 |---------|---------|-----------|---------------------------------------|
309 | 0 | 1 | 0 | | SB | 9 bit data | STB | |
310 |---------|---------|-----------|---------------------------------------|
311 | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | |
312 |---------|---------|-----------|---------------------------------------|
313 | 1 | 0 | 0 | | SB | 7 bit data | STB | |
314 |---------|---------|-----------|---------------------------------------|
315 | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | |
316 +-----------------------------------------------------------------------+
317
318 * @{
319 */
320
321 /**
322 * @brief Initialize the UART mode according to the specified
323 * parameters in the UART_InitTypeDef and initialize the associated handle.
324 * @param huart UART handle.
325 * @retval HAL status
326 */
HAL_UART_Init(UART_HandleTypeDef * huart)327 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
328 {
329 /* Check the UART handle allocation */
330 if (huart == NULL)
331 {
332 return HAL_ERROR;
333 }
334
335 if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
336 {
337 /* Check the parameters */
338 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
339 }
340 else
341 {
342 /* Check the parameters */
343 assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
344 }
345
346 if (huart->gState == HAL_UART_STATE_RESET)
347 {
348 /* Allocate lock resource and initialize it */
349 huart->Lock = HAL_UNLOCKED;
350
351 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
352 UART_InitCallbacksToDefault(huart);
353
354 if (huart->MspInitCallback == NULL)
355 {
356 huart->MspInitCallback = HAL_UART_MspInit;
357 }
358
359 /* Init the low level hardware */
360 huart->MspInitCallback(huart);
361 #else
362 /* Init the low level hardware : GPIO, CLOCK */
363 HAL_UART_MspInit(huart);
364 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
365 }
366
367 huart->gState = HAL_UART_STATE_BUSY;
368
369 __HAL_UART_DISABLE(huart);
370
371 /* Set the UART Communication parameters */
372 if (UART_SetConfig(huart) == HAL_ERROR)
373 {
374 return HAL_ERROR;
375 }
376
377 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
378 {
379 UART_AdvFeatureConfig(huart);
380 }
381
382 /* In asynchronous mode, the following bits must be kept cleared:
383 - LINEN and CLKEN bits in the USART_CR2 register,
384 - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
385 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
386 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
387
388 __HAL_UART_ENABLE(huart);
389
390 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
391 return (UART_CheckIdleState(huart));
392 }
393
394 /**
395 * @brief Initialize the half-duplex mode according to the specified
396 * parameters in the UART_InitTypeDef and creates the associated handle.
397 * @param huart UART handle.
398 * @retval HAL status
399 */
HAL_HalfDuplex_Init(UART_HandleTypeDef * huart)400 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
401 {
402 /* Check the UART handle allocation */
403 if (huart == NULL)
404 {
405 return HAL_ERROR;
406 }
407
408 /* Check UART instance */
409 assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
410
411 if (huart->gState == HAL_UART_STATE_RESET)
412 {
413 /* Allocate lock resource and initialize it */
414 huart->Lock = HAL_UNLOCKED;
415
416 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
417 UART_InitCallbacksToDefault(huart);
418
419 if (huart->MspInitCallback == NULL)
420 {
421 huart->MspInitCallback = HAL_UART_MspInit;
422 }
423
424 /* Init the low level hardware */
425 huart->MspInitCallback(huart);
426 #else
427 /* Init the low level hardware : GPIO, CLOCK */
428 HAL_UART_MspInit(huart);
429 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
430 }
431
432 huart->gState = HAL_UART_STATE_BUSY;
433
434 __HAL_UART_DISABLE(huart);
435
436 /* Set the UART Communication parameters */
437 if (UART_SetConfig(huart) == HAL_ERROR)
438 {
439 return HAL_ERROR;
440 }
441
442 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
443 {
444 UART_AdvFeatureConfig(huart);
445 }
446
447 /* In half-duplex mode, the following bits must be kept cleared:
448 - LINEN and CLKEN bits in the USART_CR2 register,
449 - SCEN and IREN bits in the USART_CR3 register.*/
450 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
451 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
452
453 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
454 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
455
456 __HAL_UART_ENABLE(huart);
457
458 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
459 return (UART_CheckIdleState(huart));
460 }
461
462
463 /**
464 * @brief Initialize the LIN mode according to the specified
465 * parameters in the UART_InitTypeDef and creates the associated handle.
466 * @param huart UART handle.
467 * @param BreakDetectLength Specifies the LIN break detection length.
468 * This parameter can be one of the following values:
469 * @arg @ref UART_LINBREAKDETECTLENGTH_10B 10-bit break detection
470 * @arg @ref UART_LINBREAKDETECTLENGTH_11B 11-bit break detection
471 * @retval HAL status
472 */
HAL_LIN_Init(UART_HandleTypeDef * huart,uint32_t BreakDetectLength)473 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
474 {
475 /* Check the UART handle allocation */
476 if (huart == NULL)
477 {
478 return HAL_ERROR;
479 }
480
481 /* Check the LIN UART instance */
482 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
483 /* Check the Break detection length parameter */
484 assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
485
486 /* LIN mode limited to 16-bit oversampling only */
487 if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
488 {
489 return HAL_ERROR;
490 }
491 /* LIN mode limited to 8-bit data length */
492 if (huart->Init.WordLength != UART_WORDLENGTH_8B)
493 {
494 return HAL_ERROR;
495 }
496
497 if (huart->gState == HAL_UART_STATE_RESET)
498 {
499 /* Allocate lock resource and initialize it */
500 huart->Lock = HAL_UNLOCKED;
501
502 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
503 UART_InitCallbacksToDefault(huart);
504
505 if (huart->MspInitCallback == NULL)
506 {
507 huart->MspInitCallback = HAL_UART_MspInit;
508 }
509
510 /* Init the low level hardware */
511 huart->MspInitCallback(huart);
512 #else
513 /* Init the low level hardware : GPIO, CLOCK */
514 HAL_UART_MspInit(huart);
515 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
516 }
517
518 huart->gState = HAL_UART_STATE_BUSY;
519
520 __HAL_UART_DISABLE(huart);
521
522 /* Set the UART Communication parameters */
523 if (UART_SetConfig(huart) == HAL_ERROR)
524 {
525 return HAL_ERROR;
526 }
527
528 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
529 {
530 UART_AdvFeatureConfig(huart);
531 }
532
533 /* In LIN mode, the following bits must be kept cleared:
534 - LINEN and CLKEN bits in the USART_CR2 register,
535 - SCEN and IREN bits in the USART_CR3 register.*/
536 CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
537 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
538
539 /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
540 SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
541
542 /* Set the USART LIN Break detection length. */
543 MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
544
545 __HAL_UART_ENABLE(huart);
546
547 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
548 return (UART_CheckIdleState(huart));
549 }
550
551
552 /**
553 * @brief Initialize the multiprocessor mode according to the specified
554 * parameters in the UART_InitTypeDef and initialize the associated handle.
555 * @param huart UART handle.
556 * @param Address UART node address (4-, 6-, 7- or 8-bit long).
557 * @param WakeUpMethod Specifies the UART wakeup method.
558 * This parameter can be one of the following values:
559 * @arg @ref UART_WAKEUPMETHOD_IDLELINE WakeUp by an idle line detection
560 * @arg @ref UART_WAKEUPMETHOD_ADDRESSMARK WakeUp by an address mark
561 * @note If the user resorts to idle line detection wake up, the Address parameter
562 * is useless and ignored by the initialization function.
563 * @note If the user resorts to address mark wake up, the address length detection
564 * is configured by default to 4 bits only. For the UART to be able to
565 * manage 6-, 7- or 8-bit long addresses detection, the API
566 * HAL_MultiProcessorEx_AddressLength_Set() must be called after
567 * HAL_MultiProcessor_Init().
568 * @retval HAL status
569 */
HAL_MultiProcessor_Init(UART_HandleTypeDef * huart,uint8_t Address,uint32_t WakeUpMethod)570 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
571 {
572 /* Check the UART handle allocation */
573 if (huart == NULL)
574 {
575 return HAL_ERROR;
576 }
577
578 /* Check the wake up method parameter */
579 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
580
581 if (huart->gState == HAL_UART_STATE_RESET)
582 {
583 /* Allocate lock resource and initialize it */
584 huart->Lock = HAL_UNLOCKED;
585
586 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
587 UART_InitCallbacksToDefault(huart);
588
589 if (huart->MspInitCallback == NULL)
590 {
591 huart->MspInitCallback = HAL_UART_MspInit;
592 }
593
594 /* Init the low level hardware */
595 huart->MspInitCallback(huart);
596 #else
597 /* Init the low level hardware : GPIO, CLOCK */
598 HAL_UART_MspInit(huart);
599 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
600 }
601
602 huart->gState = HAL_UART_STATE_BUSY;
603
604 __HAL_UART_DISABLE(huart);
605
606 /* Set the UART Communication parameters */
607 if (UART_SetConfig(huart) == HAL_ERROR)
608 {
609 return HAL_ERROR;
610 }
611
612 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
613 {
614 UART_AdvFeatureConfig(huart);
615 }
616
617 /* In multiprocessor mode, the following bits must be kept cleared:
618 - LINEN and CLKEN bits in the USART_CR2 register,
619 - SCEN, HDSEL and IREN bits in the USART_CR3 register. */
620 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
621 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
622
623 if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
624 {
625 /* If address mark wake up method is chosen, set the USART address node */
626 MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
627 }
628
629 /* Set the wake up method by setting the WAKE bit in the CR1 register */
630 MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
631
632 __HAL_UART_ENABLE(huart);
633
634 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
635 return (UART_CheckIdleState(huart));
636 }
637
638
639 /**
640 * @brief DeInitialize the UART peripheral.
641 * @param huart UART handle.
642 * @retval HAL status
643 */
HAL_UART_DeInit(UART_HandleTypeDef * huart)644 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
645 {
646 /* Check the UART handle allocation */
647 if (huart == NULL)
648 {
649 return HAL_ERROR;
650 }
651
652 /* Check the parameters */
653 assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
654
655 huart->gState = HAL_UART_STATE_BUSY;
656
657 __HAL_UART_DISABLE(huart);
658
659 huart->Instance->CR1 = 0x0U;
660 huart->Instance->CR2 = 0x0U;
661 huart->Instance->CR3 = 0x0U;
662
663 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
664 if (huart->MspDeInitCallback == NULL)
665 {
666 huart->MspDeInitCallback = HAL_UART_MspDeInit;
667 }
668 /* DeInit the low level hardware */
669 huart->MspDeInitCallback(huart);
670 #else
671 /* DeInit the low level hardware */
672 HAL_UART_MspDeInit(huart);
673 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
674
675 huart->ErrorCode = HAL_UART_ERROR_NONE;
676 huart->gState = HAL_UART_STATE_RESET;
677 huart->RxState = HAL_UART_STATE_RESET;
678 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
679
680 __HAL_UNLOCK(huart);
681
682 return HAL_OK;
683 }
684
685 /**
686 * @brief Initialize the UART MSP.
687 * @param huart UART handle.
688 * @retval None
689 */
HAL_UART_MspInit(UART_HandleTypeDef * huart)690 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
691 {
692 /* Prevent unused argument(s) compilation warning */
693 UNUSED(huart);
694
695 /* NOTE : This function should not be modified, when the callback is needed,
696 the HAL_UART_MspInit can be implemented in the user file
697 */
698 }
699
700 /**
701 * @brief DeInitialize the UART MSP.
702 * @param huart UART handle.
703 * @retval None
704 */
HAL_UART_MspDeInit(UART_HandleTypeDef * huart)705 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
706 {
707 /* Prevent unused argument(s) compilation warning */
708 UNUSED(huart);
709
710 /* NOTE : This function should not be modified, when the callback is needed,
711 the HAL_UART_MspDeInit can be implemented in the user file
712 */
713 }
714
715 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
716 /**
717 * @brief Register a User UART Callback
718 * To be used instead of the weak predefined callback
719 * @param huart uart handle
720 * @param CallbackID ID of the callback to be registered
721 * This parameter can be one of the following values:
722 * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID
723 * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID
724 * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID
725 * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID
726 * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID
727 * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID
728 * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID
729 * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID
730 * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID
731 #if defined(USART_CR1_FIFOEN)
732 * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID
733 * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID
734 #endif
735 * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
736 * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
737 * @param pCallback pointer to the Callback function
738 * @retval HAL status
739 */
HAL_UART_RegisterCallback(UART_HandleTypeDef * huart,HAL_UART_CallbackIDTypeDef CallbackID,pUART_CallbackTypeDef pCallback)740 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
741 pUART_CallbackTypeDef pCallback)
742 {
743 HAL_StatusTypeDef status = HAL_OK;
744
745 if (pCallback == NULL)
746 {
747 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
748
749 return HAL_ERROR;
750 }
751
752 __HAL_LOCK(huart);
753
754 if (huart->gState == HAL_UART_STATE_READY)
755 {
756 switch (CallbackID)
757 {
758 case HAL_UART_TX_HALFCOMPLETE_CB_ID :
759 huart->TxHalfCpltCallback = pCallback;
760 break;
761
762 case HAL_UART_TX_COMPLETE_CB_ID :
763 huart->TxCpltCallback = pCallback;
764 break;
765
766 case HAL_UART_RX_HALFCOMPLETE_CB_ID :
767 huart->RxHalfCpltCallback = pCallback;
768 break;
769
770 case HAL_UART_RX_COMPLETE_CB_ID :
771 huart->RxCpltCallback = pCallback;
772 break;
773
774 case HAL_UART_ERROR_CB_ID :
775 huart->ErrorCallback = pCallback;
776 break;
777
778 case HAL_UART_ABORT_COMPLETE_CB_ID :
779 huart->AbortCpltCallback = pCallback;
780 break;
781
782 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
783 huart->AbortTransmitCpltCallback = pCallback;
784 break;
785
786 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
787 huart->AbortReceiveCpltCallback = pCallback;
788 break;
789
790 case HAL_UART_WAKEUP_CB_ID :
791 huart->WakeupCallback = pCallback;
792 break;
793
794 #if defined(USART_CR1_FIFOEN)
795 case HAL_UART_RX_FIFO_FULL_CB_ID :
796 huart->RxFifoFullCallback = pCallback;
797 break;
798
799 case HAL_UART_TX_FIFO_EMPTY_CB_ID :
800 huart->TxFifoEmptyCallback = pCallback;
801 break;
802 #endif /* USART_CR1_FIFOEN */
803
804 case HAL_UART_MSPINIT_CB_ID :
805 huart->MspInitCallback = pCallback;
806 break;
807
808 case HAL_UART_MSPDEINIT_CB_ID :
809 huart->MspDeInitCallback = pCallback;
810 break;
811
812 default :
813 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
814
815 status = HAL_ERROR;
816 break;
817 }
818 }
819 else if (huart->gState == HAL_UART_STATE_RESET)
820 {
821 switch (CallbackID)
822 {
823 case HAL_UART_MSPINIT_CB_ID :
824 huart->MspInitCallback = pCallback;
825 break;
826
827 case HAL_UART_MSPDEINIT_CB_ID :
828 huart->MspDeInitCallback = pCallback;
829 break;
830
831 default :
832 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
833
834 status = HAL_ERROR;
835 break;
836 }
837 }
838 else
839 {
840 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
841
842 status = HAL_ERROR;
843 }
844
845 __HAL_UNLOCK(huart);
846
847 return status;
848 }
849
850 /**
851 * @brief Unregister an UART Callback
852 * UART callaback is redirected to the weak predefined callback
853 * @param huart uart handle
854 * @param CallbackID ID of the callback to be unregistered
855 * This parameter can be one of the following values:
856 * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID
857 * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID
858 * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID
859 * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID
860 * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID
861 * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID
862 * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID
863 * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID
864 * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID
865 #if defined(USART_CR1_FIFOEN)
866 * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID
867 * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID
868 #endif
869 * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
870 * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
871 * @retval HAL status
872 */
HAL_UART_UnRegisterCallback(UART_HandleTypeDef * huart,HAL_UART_CallbackIDTypeDef CallbackID)873 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID)
874 {
875 HAL_StatusTypeDef status = HAL_OK;
876
877 __HAL_LOCK(huart);
878
879 if (HAL_UART_STATE_READY == huart->gState)
880 {
881 switch (CallbackID)
882 {
883 case HAL_UART_TX_HALFCOMPLETE_CB_ID :
884 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
885 break;
886
887 case HAL_UART_TX_COMPLETE_CB_ID :
888 huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
889 break;
890
891 case HAL_UART_RX_HALFCOMPLETE_CB_ID :
892 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
893 break;
894
895 case HAL_UART_RX_COMPLETE_CB_ID :
896 huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
897 break;
898
899 case HAL_UART_ERROR_CB_ID :
900 huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
901 break;
902
903 case HAL_UART_ABORT_COMPLETE_CB_ID :
904 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
905 break;
906
907 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
908 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak
909 AbortTransmitCpltCallback */
910 break;
911
912 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
913 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak
914 AbortReceiveCpltCallback */
915 break;
916
917 case HAL_UART_WAKEUP_CB_ID :
918 huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */
919 break;
920
921 #if defined(USART_CR1_FIFOEN)
922 case HAL_UART_RX_FIFO_FULL_CB_ID :
923 huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
924 break;
925
926 case HAL_UART_TX_FIFO_EMPTY_CB_ID :
927 huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
928 break;
929
930 #endif /* USART_CR1_FIFOEN */
931 case HAL_UART_MSPINIT_CB_ID :
932 huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */
933 break;
934
935 case HAL_UART_MSPDEINIT_CB_ID :
936 huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */
937 break;
938
939 default :
940 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
941
942 status = HAL_ERROR;
943 break;
944 }
945 }
946 else if (HAL_UART_STATE_RESET == huart->gState)
947 {
948 switch (CallbackID)
949 {
950 case HAL_UART_MSPINIT_CB_ID :
951 huart->MspInitCallback = HAL_UART_MspInit;
952 break;
953
954 case HAL_UART_MSPDEINIT_CB_ID :
955 huart->MspDeInitCallback = HAL_UART_MspDeInit;
956 break;
957
958 default :
959 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
960
961 status = HAL_ERROR;
962 break;
963 }
964 }
965 else
966 {
967 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
968
969 status = HAL_ERROR;
970 }
971
972 __HAL_UNLOCK(huart);
973
974 return status;
975 }
976
977 /**
978 * @brief Register a User UART Rx Event Callback
979 * To be used instead of the weak predefined callback
980 * @param huart Uart handle
981 * @param pCallback Pointer to the Rx Event Callback function
982 * @retval HAL status
983 */
HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef * huart,pUART_RxEventCallbackTypeDef pCallback)984 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback)
985 {
986 HAL_StatusTypeDef status = HAL_OK;
987
988 if (pCallback == NULL)
989 {
990 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
991
992 return HAL_ERROR;
993 }
994
995 /* Process locked */
996 __HAL_LOCK(huart);
997
998 if (huart->gState == HAL_UART_STATE_READY)
999 {
1000 huart->RxEventCallback = pCallback;
1001 }
1002 else
1003 {
1004 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
1005
1006 status = HAL_ERROR;
1007 }
1008
1009 /* Release Lock */
1010 __HAL_UNLOCK(huart);
1011
1012 return status;
1013 }
1014
1015 /**
1016 * @brief UnRegister the UART Rx Event Callback
1017 * UART Rx Event Callback is redirected to the weak HAL_UARTEx_RxEventCallback() predefined callback
1018 * @param huart Uart handle
1019 * @retval HAL status
1020 */
HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef * huart)1021 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart)
1022 {
1023 HAL_StatusTypeDef status = HAL_OK;
1024
1025 /* Process locked */
1026 __HAL_LOCK(huart);
1027
1028 if (huart->gState == HAL_UART_STATE_READY)
1029 {
1030 huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */
1031 }
1032 else
1033 {
1034 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
1035
1036 status = HAL_ERROR;
1037 }
1038
1039 /* Release Lock */
1040 __HAL_UNLOCK(huart);
1041 return status;
1042 }
1043
1044 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1045
1046 /**
1047 * @}
1048 */
1049
1050 /** @defgroup UART_Exported_Functions_Group2 IO operation functions
1051 * @brief UART Transmit/Receive functions
1052 *
1053 @verbatim
1054 ===============================================================================
1055 ##### IO operation functions #####
1056 ===============================================================================
1057 This subsection provides a set of functions allowing to manage the UART asynchronous
1058 and Half duplex data transfers.
1059
1060 (#) There are two mode of transfer:
1061 (+) Blocking mode: The communication is performed in polling mode.
1062 The HAL status of all data processing is returned by the same function
1063 after finishing transfer.
1064 (+) Non-Blocking mode: The communication is performed using Interrupts
1065 or DMA, These API's return the HAL status.
1066 The end of the data processing will be indicated through the
1067 dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
1068 using DMA mode.
1069 The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
1070 will be executed respectively at the end of the transmit or Receive process
1071 The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
1072
1073 (#) Blocking mode API's are :
1074 (+) HAL_UART_Transmit()
1075 (+) HAL_UART_Receive()
1076
1077 (#) Non-Blocking mode API's with Interrupt are :
1078 (+) HAL_UART_Transmit_IT()
1079 (+) HAL_UART_Receive_IT()
1080 (+) HAL_UART_IRQHandler()
1081
1082 (#) Non-Blocking mode API's with DMA are :
1083 (+) HAL_UART_Transmit_DMA()
1084 (+) HAL_UART_Receive_DMA()
1085 (+) HAL_UART_DMAPause()
1086 (+) HAL_UART_DMAResume()
1087 (+) HAL_UART_DMAStop()
1088
1089 (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode:
1090 (+) HAL_UART_TxHalfCpltCallback()
1091 (+) HAL_UART_TxCpltCallback()
1092 (+) HAL_UART_RxHalfCpltCallback()
1093 (+) HAL_UART_RxCpltCallback()
1094 (+) HAL_UART_ErrorCallback()
1095
1096 (#) Non-Blocking mode transfers could be aborted using Abort API's :
1097 (+) HAL_UART_Abort()
1098 (+) HAL_UART_AbortTransmit()
1099 (+) HAL_UART_AbortReceive()
1100 (+) HAL_UART_Abort_IT()
1101 (+) HAL_UART_AbortTransmit_IT()
1102 (+) HAL_UART_AbortReceive_IT()
1103
1104 (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
1105 (+) HAL_UART_AbortCpltCallback()
1106 (+) HAL_UART_AbortTransmitCpltCallback()
1107 (+) HAL_UART_AbortReceiveCpltCallback()
1108
1109 (#) A Rx Event Reception Callback (Rx event notification) is available for Non_Blocking modes of enhanced
1110 reception services:
1111 (+) HAL_UARTEx_RxEventCallback()
1112
1113 (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
1114 Errors are handled as follows :
1115 (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is
1116 to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error
1117 in Interrupt mode reception .
1118 Received character is then retrieved and stored in Rx buffer, Error code is set to allow user
1119 to identify error type, and HAL_UART_ErrorCallback() user callback is executed.
1120 Transfer is kept ongoing on UART side.
1121 If user wants to abort it, Abort services should be called by user.
1122 (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
1123 This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
1124 Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback()
1125 user callback is executed.
1126
1127 -@- In the Half duplex communication, it is forbidden to run the transmit
1128 and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
1129
1130 @endverbatim
1131 * @{
1132 */
1133
1134 /**
1135 * @brief Send an amount of data in blocking mode.
1136 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1137 * the sent data is handled as a set of u16. In this case, Size must indicate the number
1138 * of u16 provided through pData.
1139 * @note When FIFO mode is enabled, writing a data in the TDR register adds one
1140 * data to the TXFIFO. Write operations to the TDR register are performed
1141 * when TXFNF flag is set. From hardware perspective, TXFNF flag and
1142 * TXE are mapped on the same bit-field.
1143 * @param huart UART handle.
1144 * @param pData Pointer to data buffer (u8 or u16 data elements).
1145 * @param Size Amount of data elements (u8 or u16) to be sent.
1146 * @param Timeout Timeout duration.
1147 * @retval HAL status
1148 */
HAL_UART_Transmit(UART_HandleTypeDef * huart,const uint8_t * pData,uint16_t Size,uint32_t Timeout)1149 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
1150 {
1151 const uint8_t *pdata8bits;
1152 const uint16_t *pdata16bits;
1153 uint32_t tickstart;
1154
1155 /* Check that a Tx process is not already ongoing */
1156 if (huart->gState == HAL_UART_STATE_READY)
1157 {
1158 if ((pData == NULL) || (Size == 0U))
1159 {
1160 return HAL_ERROR;
1161 }
1162
1163 __HAL_LOCK(huart);
1164
1165 huart->ErrorCode = HAL_UART_ERROR_NONE;
1166 huart->gState = HAL_UART_STATE_BUSY_TX;
1167
1168 /* Init tickstart for timeout management */
1169 tickstart = HAL_GetTick();
1170
1171 huart->TxXferSize = Size;
1172 huart->TxXferCount = Size;
1173
1174 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
1175 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1176 {
1177 pdata8bits = NULL;
1178 pdata16bits = (const uint16_t *) pData;
1179 }
1180 else
1181 {
1182 pdata8bits = pData;
1183 pdata16bits = NULL;
1184 }
1185
1186 __HAL_UNLOCK(huart);
1187
1188 while (huart->TxXferCount > 0U)
1189 {
1190 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
1191 {
1192 return HAL_TIMEOUT;
1193 }
1194 if (pdata8bits == NULL)
1195 {
1196 huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
1197 pdata16bits++;
1198 }
1199 else
1200 {
1201 huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
1202 pdata8bits++;
1203 }
1204 huart->TxXferCount--;
1205 }
1206
1207 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
1208 {
1209 return HAL_TIMEOUT;
1210 }
1211
1212 /* At end of Tx process, restore huart->gState to Ready */
1213 huart->gState = HAL_UART_STATE_READY;
1214
1215 return HAL_OK;
1216 }
1217 else
1218 {
1219 return HAL_BUSY;
1220 }
1221 }
1222
1223 /**
1224 * @brief Receive an amount of data in blocking mode.
1225 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1226 * the received data is handled as a set of u16. In this case, Size must indicate the number
1227 * of u16 available through pData.
1228 * @note When FIFO mode is enabled, the RXFNE flag is set as long as the RXFIFO
1229 * is not empty. Read operations from the RDR register are performed when
1230 * RXFNE flag is set. From hardware perspective, RXFNE flag and
1231 * RXNE are mapped on the same bit-field.
1232 * @param huart UART handle.
1233 * @param pData Pointer to data buffer (u8 or u16 data elements).
1234 * @param Size Amount of data elements (u8 or u16) to be received.
1235 * @param Timeout Timeout duration.
1236 * @retval HAL status
1237 */
HAL_UART_Receive(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size,uint32_t Timeout)1238 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1239 {
1240 uint8_t *pdata8bits;
1241 uint16_t *pdata16bits;
1242 uint16_t uhMask;
1243 uint32_t tickstart;
1244
1245 /* Check that a Rx process is not already ongoing */
1246 if (huart->RxState == HAL_UART_STATE_READY)
1247 {
1248 if ((pData == NULL) || (Size == 0U))
1249 {
1250 return HAL_ERROR;
1251 }
1252
1253 __HAL_LOCK(huart);
1254
1255 huart->ErrorCode = HAL_UART_ERROR_NONE;
1256 huart->RxState = HAL_UART_STATE_BUSY_RX;
1257 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1258
1259 /* Init tickstart for timeout management */
1260 tickstart = HAL_GetTick();
1261
1262 huart->RxXferSize = Size;
1263 huart->RxXferCount = Size;
1264
1265 /* Computation of UART mask to apply to RDR register */
1266 UART_MASK_COMPUTATION(huart);
1267 uhMask = huart->Mask;
1268
1269 /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
1270 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1271 {
1272 pdata8bits = NULL;
1273 pdata16bits = (uint16_t *) pData;
1274 }
1275 else
1276 {
1277 pdata8bits = pData;
1278 pdata16bits = NULL;
1279 }
1280
1281 __HAL_UNLOCK(huart);
1282
1283 /* as long as data have to be received */
1284 while (huart->RxXferCount > 0U)
1285 {
1286 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
1287 {
1288 return HAL_TIMEOUT;
1289 }
1290 if (pdata8bits == NULL)
1291 {
1292 *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask);
1293 pdata16bits++;
1294 }
1295 else
1296 {
1297 *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
1298 pdata8bits++;
1299 }
1300 huart->RxXferCount--;
1301 }
1302
1303 /* At end of Rx process, restore huart->RxState to Ready */
1304 huart->RxState = HAL_UART_STATE_READY;
1305
1306 return HAL_OK;
1307 }
1308 else
1309 {
1310 return HAL_BUSY;
1311 }
1312 }
1313
1314 /**
1315 * @brief Send an amount of data in interrupt mode.
1316 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1317 * the sent data is handled as a set of u16. In this case, Size must indicate the number
1318 * of u16 provided through pData.
1319 * @param huart UART handle.
1320 * @param pData Pointer to data buffer (u8 or u16 data elements).
1321 * @param Size Amount of data elements (u8 or u16) to be sent.
1322 * @retval HAL status
1323 */
HAL_UART_Transmit_IT(UART_HandleTypeDef * huart,const uint8_t * pData,uint16_t Size)1324 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
1325 {
1326 /* Check that a Tx process is not already ongoing */
1327 if (huart->gState == HAL_UART_STATE_READY)
1328 {
1329 if ((pData == NULL) || (Size == 0U))
1330 {
1331 return HAL_ERROR;
1332 }
1333
1334 __HAL_LOCK(huart);
1335
1336 huart->pTxBuffPtr = pData;
1337 huart->TxXferSize = Size;
1338 huart->TxXferCount = Size;
1339 huart->TxISR = NULL;
1340
1341 huart->ErrorCode = HAL_UART_ERROR_NONE;
1342 huart->gState = HAL_UART_STATE_BUSY_TX;
1343
1344 #if defined(USART_CR1_FIFOEN)
1345 /* Configure Tx interrupt processing */
1346 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1347 {
1348 /* Set the Tx ISR function pointer according to the data word length */
1349 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1350 {
1351 huart->TxISR = UART_TxISR_16BIT_FIFOEN;
1352 }
1353 else
1354 {
1355 huart->TxISR = UART_TxISR_8BIT_FIFOEN;
1356 }
1357
1358 __HAL_UNLOCK(huart);
1359
1360 /* Enable the TX FIFO threshold interrupt */
1361 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1362 }
1363 else
1364 {
1365 /* Set the Tx ISR function pointer according to the data word length */
1366 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1367 {
1368 huart->TxISR = UART_TxISR_16BIT;
1369 }
1370 else
1371 {
1372 huart->TxISR = UART_TxISR_8BIT;
1373 }
1374
1375 __HAL_UNLOCK(huart);
1376
1377 /* Enable the Transmit Data Register Empty interrupt */
1378 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
1379 }
1380 #else
1381 /* Set the Tx ISR function pointer according to the data word length */
1382 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1383 {
1384 huart->TxISR = UART_TxISR_16BIT;
1385 }
1386 else
1387 {
1388 huart->TxISR = UART_TxISR_8BIT;
1389 }
1390
1391 __HAL_UNLOCK(huart);
1392
1393 /* Enable the Transmit Data Register Empty interrupt */
1394 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
1395 #endif /* USART_CR1_FIFOEN */
1396
1397 return HAL_OK;
1398 }
1399 else
1400 {
1401 return HAL_BUSY;
1402 }
1403 }
1404
1405 /**
1406 * @brief Receive an amount of data in interrupt mode.
1407 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1408 * the received data is handled as a set of u16. In this case, Size must indicate the number
1409 * of u16 available through pData.
1410 * @param huart UART handle.
1411 * @param pData Pointer to data buffer (u8 or u16 data elements).
1412 * @param Size Amount of data elements (u8 or u16) to be received.
1413 * @retval HAL status
1414 */
HAL_UART_Receive_IT(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size)1415 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1416 {
1417 /* Check that a Rx process is not already ongoing */
1418 if (huart->RxState == HAL_UART_STATE_READY)
1419 {
1420 if ((pData == NULL) || (Size == 0U))
1421 {
1422 return HAL_ERROR;
1423 }
1424
1425 __HAL_LOCK(huart);
1426
1427 /* Set Reception type to Standard reception */
1428 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1429
1430 if (!(IS_LPUART_INSTANCE(huart->Instance)))
1431 {
1432 /* Check that USART RTOEN bit is set */
1433 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
1434 {
1435 /* Enable the UART Receiver Timeout Interrupt */
1436 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
1437 }
1438 }
1439
1440 return (UART_Start_Receive_IT(huart, pData, Size));
1441 }
1442 else
1443 {
1444 return HAL_BUSY;
1445 }
1446 }
1447
1448 /**
1449 * @brief Send an amount of data in DMA mode.
1450 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1451 * the sent data is handled as a set of u16. In this case, Size must indicate the number
1452 * of u16 provided through pData.
1453 * @param huart UART handle.
1454 * @param pData Pointer to data buffer (u8 or u16 data elements).
1455 * @param Size Amount of data elements (u8 or u16) to be sent.
1456 * @retval HAL status
1457 */
HAL_UART_Transmit_DMA(UART_HandleTypeDef * huart,const uint8_t * pData,uint16_t Size)1458 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
1459 {
1460 /* Check that a Tx process is not already ongoing */
1461 if (huart->gState == HAL_UART_STATE_READY)
1462 {
1463 if ((pData == NULL) || (Size == 0U))
1464 {
1465 return HAL_ERROR;
1466 }
1467
1468 __HAL_LOCK(huart);
1469
1470 huart->pTxBuffPtr = pData;
1471 huart->TxXferSize = Size;
1472 huart->TxXferCount = Size;
1473
1474 huart->ErrorCode = HAL_UART_ERROR_NONE;
1475 huart->gState = HAL_UART_STATE_BUSY_TX;
1476
1477 if (huart->hdmatx != NULL)
1478 {
1479 /* Set the UART DMA transfer complete callback */
1480 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
1481
1482 /* Set the UART DMA Half transfer complete callback */
1483 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
1484
1485 /* Set the DMA error callback */
1486 huart->hdmatx->XferErrorCallback = UART_DMAError;
1487
1488 /* Set the DMA abort callback */
1489 huart->hdmatx->XferAbortCallback = NULL;
1490
1491 /* Enable the UART transmit DMA channel */
1492 if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK)
1493 {
1494 /* Set error code to DMA */
1495 huart->ErrorCode = HAL_UART_ERROR_DMA;
1496
1497 __HAL_UNLOCK(huart);
1498
1499 /* Restore huart->gState to ready */
1500 huart->gState = HAL_UART_STATE_READY;
1501
1502 return HAL_ERROR;
1503 }
1504 }
1505 /* Clear the TC flag in the ICR register */
1506 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
1507
1508 __HAL_UNLOCK(huart);
1509
1510 /* Enable the DMA transfer for transmit request by setting the DMAT bit
1511 in the UART CR3 register */
1512 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1513
1514 return HAL_OK;
1515 }
1516 else
1517 {
1518 return HAL_BUSY;
1519 }
1520 }
1521
1522 /**
1523 * @brief Receive an amount of data in DMA mode.
1524 * @note When the UART parity is enabled (PCE = 1), the received data contain
1525 * the parity bit (MSB position).
1526 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1527 * the received data is handled as a set of u16. In this case, Size must indicate the number
1528 * of u16 available through pData.
1529 * @param huart UART handle.
1530 * @param pData Pointer to data buffer (u8 or u16 data elements).
1531 * @param Size Amount of data elements (u8 or u16) to be received.
1532 * @retval HAL status
1533 */
HAL_UART_Receive_DMA(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size)1534 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1535 {
1536 /* Check that a Rx process is not already ongoing */
1537 if (huart->RxState == HAL_UART_STATE_READY)
1538 {
1539 if ((pData == NULL) || (Size == 0U))
1540 {
1541 return HAL_ERROR;
1542 }
1543
1544 __HAL_LOCK(huart);
1545
1546 /* Set Reception type to Standard reception */
1547 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1548
1549 if (!(IS_LPUART_INSTANCE(huart->Instance)))
1550 {
1551 /* Check that USART RTOEN bit is set */
1552 if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
1553 {
1554 /* Enable the UART Receiver Timeout Interrupt */
1555 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
1556 }
1557 }
1558
1559 return (UART_Start_Receive_DMA(huart, pData, Size));
1560 }
1561 else
1562 {
1563 return HAL_BUSY;
1564 }
1565 }
1566
1567 /**
1568 * @brief Pause the DMA Transfer.
1569 * @param huart UART handle.
1570 * @retval HAL status
1571 */
HAL_UART_DMAPause(UART_HandleTypeDef * huart)1572 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
1573 {
1574 const HAL_UART_StateTypeDef gstate = huart->gState;
1575 const HAL_UART_StateTypeDef rxstate = huart->RxState;
1576
1577 __HAL_LOCK(huart);
1578
1579 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1580 (gstate == HAL_UART_STATE_BUSY_TX))
1581 {
1582 /* Disable the UART DMA Tx request */
1583 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1584 }
1585 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1586 (rxstate == HAL_UART_STATE_BUSY_RX))
1587 {
1588 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
1589 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1590 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1591
1592 /* Disable the UART DMA Rx request */
1593 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1594 }
1595
1596 __HAL_UNLOCK(huart);
1597
1598 return HAL_OK;
1599 }
1600
1601 /**
1602 * @brief Resume the DMA Transfer.
1603 * @param huart UART handle.
1604 * @retval HAL status
1605 */
HAL_UART_DMAResume(UART_HandleTypeDef * huart)1606 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
1607 {
1608 __HAL_LOCK(huart);
1609
1610 if (huart->gState == HAL_UART_STATE_BUSY_TX)
1611 {
1612 /* Enable the UART DMA Tx request */
1613 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1614 }
1615 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
1616 {
1617 /* Clear the Overrun flag before resuming the Rx transfer */
1618 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
1619
1620 /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */
1621 if (huart->Init.Parity != UART_PARITY_NONE)
1622 {
1623 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1624 }
1625 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1626
1627 /* Enable the UART DMA Rx request */
1628 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1629 }
1630
1631 __HAL_UNLOCK(huart);
1632
1633 return HAL_OK;
1634 }
1635
1636 /**
1637 * @brief Stop the DMA Transfer.
1638 * @param huart UART handle.
1639 * @retval HAL status
1640 */
HAL_UART_DMAStop(UART_HandleTypeDef * huart)1641 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
1642 {
1643 /* The Lock is not implemented on this API to allow the user application
1644 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() /
1645 HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback:
1646 indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
1647 interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
1648 the stream and the corresponding call back is executed. */
1649
1650 const HAL_UART_StateTypeDef gstate = huart->gState;
1651 const HAL_UART_StateTypeDef rxstate = huart->RxState;
1652
1653 /* Stop UART DMA Tx request if ongoing */
1654 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1655 (gstate == HAL_UART_STATE_BUSY_TX))
1656 {
1657 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1658
1659 /* Abort the UART DMA Tx channel */
1660 if (huart->hdmatx != NULL)
1661 {
1662 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1663 {
1664 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1665 {
1666 /* Set error code to DMA */
1667 huart->ErrorCode = HAL_UART_ERROR_DMA;
1668
1669 return HAL_TIMEOUT;
1670 }
1671 }
1672 }
1673
1674 UART_EndTxTransfer(huart);
1675 }
1676
1677 /* Stop UART DMA Rx request if ongoing */
1678 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1679 (rxstate == HAL_UART_STATE_BUSY_RX))
1680 {
1681 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1682
1683 /* Abort the UART DMA Rx channel */
1684 if (huart->hdmarx != NULL)
1685 {
1686 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1687 {
1688 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1689 {
1690 /* Set error code to DMA */
1691 huart->ErrorCode = HAL_UART_ERROR_DMA;
1692
1693 return HAL_TIMEOUT;
1694 }
1695 }
1696 }
1697
1698 UART_EndRxTransfer(huart);
1699 }
1700
1701 return HAL_OK;
1702 }
1703
1704 /**
1705 * @brief Abort ongoing transfers (blocking mode).
1706 * @param huart UART handle.
1707 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
1708 * This procedure performs following operations :
1709 * - Disable UART Interrupts (Tx and Rx)
1710 * - Disable the DMA transfer in the peripheral register (if enabled)
1711 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1712 * - Set handle State to READY
1713 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1714 * @retval HAL status
1715 */
HAL_UART_Abort(UART_HandleTypeDef * huart)1716 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
1717 {
1718 #if defined(USART_CR1_FIFOEN)
1719 /* Disable TXE, TC, RXNE, PE, RXFT, TXFT and ERR (Frame error, noise error, overrun error) interrupts */
1720 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE |
1721 USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
1722 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE);
1723 #else
1724 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1725 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1726 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1727 #endif /* USART_CR1_FIFOEN */
1728
1729 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
1730 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
1731 {
1732 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1733 }
1734
1735 /* Abort the UART DMA Tx channel if enabled */
1736 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1737 {
1738 /* Disable the UART DMA Tx request if enabled */
1739 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1740
1741 /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
1742 if (huart->hdmatx != NULL)
1743 {
1744 /* Set the UART DMA Abort callback to Null.
1745 No call back execution at end of DMA abort procedure */
1746 huart->hdmatx->XferAbortCallback = NULL;
1747
1748 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1749 {
1750 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1751 {
1752 /* Set error code to DMA */
1753 huart->ErrorCode = HAL_UART_ERROR_DMA;
1754
1755 return HAL_TIMEOUT;
1756 }
1757 }
1758 }
1759 }
1760
1761 /* Abort the UART DMA Rx channel if enabled */
1762 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1763 {
1764 /* Disable the UART DMA Rx request if enabled */
1765 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1766
1767 /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
1768 if (huart->hdmarx != NULL)
1769 {
1770 /* Set the UART DMA Abort callback to Null.
1771 No call back execution at end of DMA abort procedure */
1772 huart->hdmarx->XferAbortCallback = NULL;
1773
1774 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1775 {
1776 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1777 {
1778 /* Set error code to DMA */
1779 huart->ErrorCode = HAL_UART_ERROR_DMA;
1780
1781 return HAL_TIMEOUT;
1782 }
1783 }
1784 }
1785 }
1786
1787 /* Reset Tx and Rx transfer counters */
1788 huart->TxXferCount = 0U;
1789 huart->RxXferCount = 0U;
1790
1791 /* Clear the Error flags in the ICR register */
1792 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1793
1794 #if defined(USART_CR1_FIFOEN)
1795 /* Flush the whole TX FIFO (if needed) */
1796 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1797 {
1798 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1799 }
1800 #endif /* USART_CR1_FIFOEN */
1801
1802 /* Discard the received data */
1803 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1804
1805 /* Restore huart->gState and huart->RxState to Ready */
1806 huart->gState = HAL_UART_STATE_READY;
1807 huart->RxState = HAL_UART_STATE_READY;
1808 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1809
1810 huart->ErrorCode = HAL_UART_ERROR_NONE;
1811
1812 return HAL_OK;
1813 }
1814
1815 /**
1816 * @brief Abort ongoing Transmit transfer (blocking mode).
1817 * @param huart UART handle.
1818 * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
1819 * This procedure performs following operations :
1820 * - Disable UART Interrupts (Tx)
1821 * - Disable the DMA transfer in the peripheral register (if enabled)
1822 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1823 * - Set handle State to READY
1824 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1825 * @retval HAL status
1826 */
HAL_UART_AbortTransmit(UART_HandleTypeDef * huart)1827 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
1828 {
1829 #if defined(USART_CR1_FIFOEN)
1830 /* Disable TCIE, TXEIE and TXFTIE interrupts */
1831 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
1832 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1833 #else
1834 /* Disable TXEIE and TCIE interrupts */
1835 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
1836 #endif /* USART_CR1_FIFOEN */
1837
1838 /* Abort the UART DMA Tx channel if enabled */
1839 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1840 {
1841 /* Disable the UART DMA Tx request if enabled */
1842 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1843
1844 /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
1845 if (huart->hdmatx != NULL)
1846 {
1847 /* Set the UART DMA Abort callback to Null.
1848 No call back execution at end of DMA abort procedure */
1849 huart->hdmatx->XferAbortCallback = NULL;
1850
1851 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1852 {
1853 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1854 {
1855 /* Set error code to DMA */
1856 huart->ErrorCode = HAL_UART_ERROR_DMA;
1857
1858 return HAL_TIMEOUT;
1859 }
1860 }
1861 }
1862 }
1863
1864 /* Reset Tx transfer counter */
1865 huart->TxXferCount = 0U;
1866
1867 #if defined(USART_CR1_FIFOEN)
1868 /* Flush the whole TX FIFO (if needed) */
1869 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1870 {
1871 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1872 }
1873 #endif /* USART_CR1_FIFOEN */
1874
1875 /* Restore huart->gState to Ready */
1876 huart->gState = HAL_UART_STATE_READY;
1877
1878 return HAL_OK;
1879 }
1880
1881 /**
1882 * @brief Abort ongoing Receive transfer (blocking mode).
1883 * @param huart UART handle.
1884 * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
1885 * This procedure performs following operations :
1886 * - Disable UART Interrupts (Rx)
1887 * - Disable the DMA transfer in the peripheral register (if enabled)
1888 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1889 * - Set handle State to READY
1890 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1891 * @retval HAL status
1892 */
HAL_UART_AbortReceive(UART_HandleTypeDef * huart)1893 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
1894 {
1895 #if defined(USART_CR1_FIFOEN)
1896 /* Disable PEIE, EIE, RXNEIE and RXFTIE interrupts */
1897 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
1898 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE);
1899 #else
1900 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1901 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
1902 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1903 #endif /* USART_CR1_FIFOEN */
1904
1905 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
1906 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
1907 {
1908 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1909 }
1910
1911 /* Abort the UART DMA Rx channel if enabled */
1912 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1913 {
1914 /* Disable the UART DMA Rx request if enabled */
1915 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1916
1917 /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
1918 if (huart->hdmarx != NULL)
1919 {
1920 /* Set the UART DMA Abort callback to Null.
1921 No call back execution at end of DMA abort procedure */
1922 huart->hdmarx->XferAbortCallback = NULL;
1923
1924 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1925 {
1926 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1927 {
1928 /* Set error code to DMA */
1929 huart->ErrorCode = HAL_UART_ERROR_DMA;
1930
1931 return HAL_TIMEOUT;
1932 }
1933 }
1934 }
1935 }
1936
1937 /* Reset Rx transfer counter */
1938 huart->RxXferCount = 0U;
1939
1940 /* Clear the Error flags in the ICR register */
1941 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1942
1943 /* Discard the received data */
1944 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1945
1946 /* Restore huart->RxState to Ready */
1947 huart->RxState = HAL_UART_STATE_READY;
1948 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
1949
1950 return HAL_OK;
1951 }
1952
1953 /**
1954 * @brief Abort ongoing transfers (Interrupt mode).
1955 * @param huart UART handle.
1956 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
1957 * This procedure performs following operations :
1958 * - Disable UART Interrupts (Tx and Rx)
1959 * - Disable the DMA transfer in the peripheral register (if enabled)
1960 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
1961 * - Set handle State to READY
1962 * - At abort completion, call user abort complete callback
1963 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
1964 * considered as completed only when user abort complete callback is executed (not when exiting function).
1965 * @retval HAL status
1966 */
HAL_UART_Abort_IT(UART_HandleTypeDef * huart)1967 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
1968 {
1969 uint32_t abortcplt = 1U;
1970
1971 /* Disable interrupts */
1972 #if defined(USART_CR1_FIFOEN)
1973 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE |
1974 USART_CR1_TXEIE_TXFNFIE));
1975 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
1976 #else
1977 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1978 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1979 #endif /* USART_CR1_FIFOEN */
1980
1981 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
1982 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
1983 {
1984 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
1985 }
1986
1987 /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
1988 before any call to DMA Abort functions */
1989 /* DMA Tx Handle is valid */
1990 if (huart->hdmatx != NULL)
1991 {
1992 /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
1993 Otherwise, set it to NULL */
1994 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1995 {
1996 huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
1997 }
1998 else
1999 {
2000 huart->hdmatx->XferAbortCallback = NULL;
2001 }
2002 }
2003 /* DMA Rx Handle is valid */
2004 if (huart->hdmarx != NULL)
2005 {
2006 /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
2007 Otherwise, set it to NULL */
2008 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2009 {
2010 huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
2011 }
2012 else
2013 {
2014 huart->hdmarx->XferAbortCallback = NULL;
2015 }
2016 }
2017
2018 /* Abort the UART DMA Tx channel if enabled */
2019 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
2020 {
2021 /* Disable DMA Tx at UART level */
2022 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
2023
2024 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
2025 if (huart->hdmatx != NULL)
2026 {
2027 /* UART Tx DMA Abort callback has already been initialised :
2028 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2029
2030 /* Abort DMA TX */
2031 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
2032 {
2033 huart->hdmatx->XferAbortCallback = NULL;
2034 }
2035 else
2036 {
2037 abortcplt = 0U;
2038 }
2039 }
2040 }
2041
2042 /* Abort the UART DMA Rx channel if enabled */
2043 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2044 {
2045 /* Disable the UART DMA Rx request if enabled */
2046 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2047
2048 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
2049 if (huart->hdmarx != NULL)
2050 {
2051 /* UART Rx DMA Abort callback has already been initialised :
2052 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2053
2054 /* Abort DMA RX */
2055 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2056 {
2057 huart->hdmarx->XferAbortCallback = NULL;
2058 abortcplt = 1U;
2059 }
2060 else
2061 {
2062 abortcplt = 0U;
2063 }
2064 }
2065 }
2066
2067 /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
2068 if (abortcplt == 1U)
2069 {
2070 /* Reset Tx and Rx transfer counters */
2071 huart->TxXferCount = 0U;
2072 huart->RxXferCount = 0U;
2073
2074 /* Clear ISR function pointers */
2075 huart->RxISR = NULL;
2076 huart->TxISR = NULL;
2077
2078 /* Reset errorCode */
2079 huart->ErrorCode = HAL_UART_ERROR_NONE;
2080
2081 /* Clear the Error flags in the ICR register */
2082 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2083
2084 #if defined(USART_CR1_FIFOEN)
2085 /* Flush the whole TX FIFO (if needed) */
2086 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
2087 {
2088 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
2089 }
2090 #endif /* USART_CR1_FIFOEN */
2091
2092 /* Discard the received data */
2093 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
2094
2095 /* Restore huart->gState and huart->RxState to Ready */
2096 huart->gState = HAL_UART_STATE_READY;
2097 huart->RxState = HAL_UART_STATE_READY;
2098 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2099
2100 /* As no DMA to be aborted, call directly user Abort complete callback */
2101 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2102 /* Call registered Abort complete callback */
2103 huart->AbortCpltCallback(huart);
2104 #else
2105 /* Call legacy weak Abort complete callback */
2106 HAL_UART_AbortCpltCallback(huart);
2107 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2108 }
2109
2110 return HAL_OK;
2111 }
2112
2113 /**
2114 * @brief Abort ongoing Transmit transfer (Interrupt mode).
2115 * @param huart UART handle.
2116 * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
2117 * This procedure performs following operations :
2118 * - Disable UART Interrupts (Tx)
2119 * - Disable the DMA transfer in the peripheral register (if enabled)
2120 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
2121 * - Set handle State to READY
2122 * - At abort completion, call user abort complete callback
2123 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
2124 * considered as completed only when user abort complete callback is executed (not when exiting function).
2125 * @retval HAL status
2126 */
HAL_UART_AbortTransmit_IT(UART_HandleTypeDef * huart)2127 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
2128 {
2129 /* Disable interrupts */
2130 #if defined(USART_CR1_FIFOEN)
2131 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
2132 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
2133 #else
2134 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
2135 #endif /* USART_CR1_FIFOEN */
2136
2137 /* Abort the UART DMA Tx channel if enabled */
2138 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
2139 {
2140 /* Disable the UART DMA Tx request if enabled */
2141 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
2142
2143 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
2144 if (huart->hdmatx != NULL)
2145 {
2146 /* Set the UART DMA Abort callback :
2147 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2148 huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
2149
2150 /* Abort DMA TX */
2151 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
2152 {
2153 /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
2154 huart->hdmatx->XferAbortCallback(huart->hdmatx);
2155 }
2156 }
2157 else
2158 {
2159 /* Reset Tx transfer counter */
2160 huart->TxXferCount = 0U;
2161
2162 /* Clear TxISR function pointers */
2163 huart->TxISR = NULL;
2164
2165 /* Restore huart->gState to Ready */
2166 huart->gState = HAL_UART_STATE_READY;
2167
2168 /* As no DMA to be aborted, call directly user Abort complete callback */
2169 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2170 /* Call registered Abort Transmit Complete Callback */
2171 huart->AbortTransmitCpltCallback(huart);
2172 #else
2173 /* Call legacy weak Abort Transmit Complete Callback */
2174 HAL_UART_AbortTransmitCpltCallback(huart);
2175 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2176 }
2177 }
2178 else
2179 {
2180 /* Reset Tx transfer counter */
2181 huart->TxXferCount = 0U;
2182
2183 /* Clear TxISR function pointers */
2184 huart->TxISR = NULL;
2185
2186 #if defined(USART_CR1_FIFOEN)
2187 /* Flush the whole TX FIFO (if needed) */
2188 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
2189 {
2190 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
2191 }
2192 #endif /* USART_CR1_FIFOEN */
2193
2194 /* Restore huart->gState to Ready */
2195 huart->gState = HAL_UART_STATE_READY;
2196
2197 /* As no DMA to be aborted, call directly user Abort complete callback */
2198 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2199 /* Call registered Abort Transmit Complete Callback */
2200 huart->AbortTransmitCpltCallback(huart);
2201 #else
2202 /* Call legacy weak Abort Transmit Complete Callback */
2203 HAL_UART_AbortTransmitCpltCallback(huart);
2204 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2205 }
2206
2207 return HAL_OK;
2208 }
2209
2210 /**
2211 * @brief Abort ongoing Receive transfer (Interrupt mode).
2212 * @param huart UART handle.
2213 * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
2214 * This procedure performs following operations :
2215 * - Disable UART Interrupts (Rx)
2216 * - Disable the DMA transfer in the peripheral register (if enabled)
2217 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
2218 * - Set handle State to READY
2219 * - At abort completion, call user abort complete callback
2220 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
2221 * considered as completed only when user abort complete callback is executed (not when exiting function).
2222 * @retval HAL status
2223 */
HAL_UART_AbortReceive_IT(UART_HandleTypeDef * huart)2224 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
2225 {
2226 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2227 #if defined(USART_CR1_FIFOEN)
2228 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
2229 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
2230 #else
2231 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
2232 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2233 #endif /* USART_CR1_FIFOEN */
2234
2235 /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
2236 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
2237 {
2238 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
2239 }
2240
2241 /* Abort the UART DMA Rx channel if enabled */
2242 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2243 {
2244 /* Disable the UART DMA Rx request if enabled */
2245 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2246
2247 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
2248 if (huart->hdmarx != NULL)
2249 {
2250 /* Set the UART DMA Abort callback :
2251 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2252 huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
2253
2254 /* Abort DMA RX */
2255 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2256 {
2257 /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2258 huart->hdmarx->XferAbortCallback(huart->hdmarx);
2259 }
2260 }
2261 else
2262 {
2263 /* Reset Rx transfer counter */
2264 huart->RxXferCount = 0U;
2265
2266 /* Clear RxISR function pointer */
2267 huart->pRxBuffPtr = NULL;
2268
2269 /* Clear the Error flags in the ICR register */
2270 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2271
2272 /* Discard the received data */
2273 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
2274
2275 /* Restore huart->RxState to Ready */
2276 huart->RxState = HAL_UART_STATE_READY;
2277 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2278
2279 /* As no DMA to be aborted, call directly user Abort complete callback */
2280 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2281 /* Call registered Abort Receive Complete Callback */
2282 huart->AbortReceiveCpltCallback(huart);
2283 #else
2284 /* Call legacy weak Abort Receive Complete Callback */
2285 HAL_UART_AbortReceiveCpltCallback(huart);
2286 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2287 }
2288 }
2289 else
2290 {
2291 /* Reset Rx transfer counter */
2292 huart->RxXferCount = 0U;
2293
2294 /* Clear RxISR function pointer */
2295 huart->pRxBuffPtr = NULL;
2296
2297 /* Clear the Error flags in the ICR register */
2298 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2299
2300 /* Restore huart->RxState to Ready */
2301 huart->RxState = HAL_UART_STATE_READY;
2302 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2303
2304 /* As no DMA to be aborted, call directly user Abort complete callback */
2305 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2306 /* Call registered Abort Receive Complete Callback */
2307 huart->AbortReceiveCpltCallback(huart);
2308 #else
2309 /* Call legacy weak Abort Receive Complete Callback */
2310 HAL_UART_AbortReceiveCpltCallback(huart);
2311 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2312 }
2313
2314 return HAL_OK;
2315 }
2316
2317 /**
2318 * @brief Handle UART interrupt request.
2319 * @param huart UART handle.
2320 * @retval None
2321 */
HAL_UART_IRQHandler(UART_HandleTypeDef * huart)2322 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
2323 {
2324 uint32_t isrflags = READ_REG(huart->Instance->ISR);
2325 uint32_t cr1its = READ_REG(huart->Instance->CR1);
2326 uint32_t cr3its = READ_REG(huart->Instance->CR3);
2327
2328 uint32_t errorflags;
2329 uint32_t errorcode;
2330
2331 /* If no error occurs */
2332 errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
2333 if (errorflags == 0U)
2334 {
2335 /* UART in mode Receiver ---------------------------------------------------*/
2336 #if defined(USART_CR1_FIFOEN)
2337 if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2338 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2339 || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2340 #else
2341 if (((isrflags & USART_ISR_RXNE) != 0U)
2342 && ((cr1its & USART_CR1_RXNEIE) != 0U))
2343 #endif /* USART_CR1_FIFOEN */
2344 {
2345 if (huart->RxISR != NULL)
2346 {
2347 huart->RxISR(huart);
2348 }
2349 return;
2350 }
2351 }
2352
2353 /* If some errors occur */
2354 #if defined(USART_CR1_FIFOEN)
2355 if ((errorflags != 0U)
2356 && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
2357 || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
2358 #else
2359 if ((errorflags != 0U)
2360 && (((cr3its & USART_CR3_EIE) != 0U)
2361 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U)))
2362 #endif /* USART_CR1_FIFOEN */
2363 {
2364 /* UART parity error interrupt occurred -------------------------------------*/
2365 if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
2366 {
2367 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
2368
2369 huart->ErrorCode |= HAL_UART_ERROR_PE;
2370 }
2371
2372 /* UART frame error interrupt occurred --------------------------------------*/
2373 if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2374 {
2375 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
2376
2377 huart->ErrorCode |= HAL_UART_ERROR_FE;
2378 }
2379
2380 /* UART noise error interrupt occurred --------------------------------------*/
2381 if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2382 {
2383 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
2384
2385 huart->ErrorCode |= HAL_UART_ERROR_NE;
2386 }
2387
2388 /* UART Over-Run interrupt occurred -----------------------------------------*/
2389 #if defined(USART_CR1_FIFOEN)
2390 if (((isrflags & USART_ISR_ORE) != 0U)
2391 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
2392 ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
2393 #else
2394 if (((isrflags & USART_ISR_ORE) != 0U)
2395 && (((cr1its & USART_CR1_RXNEIE) != 0U) ||
2396 ((cr3its & USART_CR3_EIE) != 0U)))
2397 #endif /* USART_CR1_FIFOEN */
2398 {
2399 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
2400
2401 huart->ErrorCode |= HAL_UART_ERROR_ORE;
2402 }
2403
2404 /* UART Receiver Timeout interrupt occurred ---------------------------------*/
2405 if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
2406 {
2407 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
2408
2409 huart->ErrorCode |= HAL_UART_ERROR_RTO;
2410 }
2411
2412 /* Call UART Error Call back function if need be ----------------------------*/
2413 if (huart->ErrorCode != HAL_UART_ERROR_NONE)
2414 {
2415 /* UART in mode Receiver --------------------------------------------------*/
2416 #if defined(USART_CR1_FIFOEN)
2417 if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2418 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2419 || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2420 #else
2421 if (((isrflags & USART_ISR_RXNE) != 0U)
2422 && ((cr1its & USART_CR1_RXNEIE) != 0U))
2423 #endif /* USART_CR1_FIFOEN */
2424 {
2425 if (huart->RxISR != NULL)
2426 {
2427 huart->RxISR(huart);
2428 }
2429 }
2430
2431 /* If Error is to be considered as blocking :
2432 - Receiver Timeout error in Reception
2433 - Overrun error in Reception
2434 - any error occurs in DMA mode reception
2435 */
2436 errorcode = huart->ErrorCode;
2437 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
2438 ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
2439 {
2440 /* Blocking error : transfer is aborted
2441 Set the UART state ready to be able to start again the process,
2442 Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
2443 UART_EndRxTransfer(huart);
2444
2445 /* Abort the UART DMA Rx channel if enabled */
2446 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2447 {
2448 /* Disable the UART DMA Rx request if enabled */
2449 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2450
2451 /* Abort the UART DMA Rx channel */
2452 if (huart->hdmarx != NULL)
2453 {
2454 /* Set the UART DMA Abort callback :
2455 will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
2456 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
2457
2458 /* Abort DMA RX */
2459 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2460 {
2461 /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2462 huart->hdmarx->XferAbortCallback(huart->hdmarx);
2463 }
2464 }
2465 else
2466 {
2467 /* Call user error callback */
2468 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2469 /*Call registered error callback*/
2470 huart->ErrorCallback(huart);
2471 #else
2472 /*Call legacy weak error callback*/
2473 HAL_UART_ErrorCallback(huart);
2474 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2475
2476 }
2477 }
2478 else
2479 {
2480 /* Call user error callback */
2481 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2482 /*Call registered error callback*/
2483 huart->ErrorCallback(huart);
2484 #else
2485 /*Call legacy weak error callback*/
2486 HAL_UART_ErrorCallback(huart);
2487 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2488 }
2489 }
2490 else
2491 {
2492 /* Non Blocking error : transfer could go on.
2493 Error is notified to user through user error callback */
2494 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2495 /*Call registered error callback*/
2496 huart->ErrorCallback(huart);
2497 #else
2498 /*Call legacy weak error callback*/
2499 HAL_UART_ErrorCallback(huart);
2500 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2501 huart->ErrorCode = HAL_UART_ERROR_NONE;
2502 }
2503 }
2504 return;
2505
2506 } /* End if some error occurs */
2507
2508 /* Check current reception Mode :
2509 If Reception till IDLE event has been selected : */
2510 if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
2511 && ((isrflags & USART_ISR_IDLE) != 0U)
2512 && ((cr1its & USART_ISR_IDLE) != 0U))
2513 {
2514 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
2515
2516 /* Check if DMA mode is enabled in UART */
2517 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2518 {
2519 /* DMA mode enabled */
2520 /* Check received length : If all expected data are received, do nothing,
2521 (DMA cplt callback will be called).
2522 Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
2523 uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
2524 if ((nb_remaining_rx_data > 0U)
2525 && (nb_remaining_rx_data < huart->RxXferSize))
2526 {
2527 /* Reception is not complete */
2528 huart->RxXferCount = nb_remaining_rx_data;
2529
2530 /* In Normal mode, end DMA xfer and HAL UART Rx process*/
2531 if (HAL_IS_BIT_CLR(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC))
2532 {
2533 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
2534 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
2535 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2536
2537 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
2538 in the UART CR3 register */
2539 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2540
2541 /* At end of Rx process, restore huart->RxState to Ready */
2542 huart->RxState = HAL_UART_STATE_READY;
2543 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2544
2545 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
2546
2547 /* Last bytes received, so no need as the abort is immediate */
2548 (void)HAL_DMA_Abort(huart->hdmarx);
2549 }
2550 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2551 /*Call registered Rx Event callback*/
2552 huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
2553 #else
2554 /*Call legacy weak Rx Event callback*/
2555 HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
2556 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
2557 }
2558 return;
2559 }
2560 else
2561 {
2562 /* DMA mode not enabled */
2563 /* Check received length : If all expected data are received, do nothing.
2564 Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
2565 uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
2566 if ((huart->RxXferCount > 0U)
2567 && (nb_rx_data > 0U))
2568 {
2569 #if defined(USART_CR1_FIFOEN)
2570 /* Disable the UART Parity Error Interrupt and RXNE interrupts */
2571 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
2572
2573 /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
2574 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
2575 #else
2576 /* Disable the UART Parity Error Interrupt and RXNE interrupts */
2577 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
2578
2579 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
2580 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2581 #endif /* USART_CR1_FIFOEN */
2582
2583 /* Rx process is completed, restore huart->RxState to Ready */
2584 huart->RxState = HAL_UART_STATE_READY;
2585 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2586
2587 /* Clear RxISR function pointer */
2588 huart->RxISR = NULL;
2589
2590 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
2591 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2592 /*Call registered Rx complete callback*/
2593 huart->RxEventCallback(huart, nb_rx_data);
2594 #else
2595 /*Call legacy weak Rx Event callback*/
2596 HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
2597 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
2598 }
2599 return;
2600 }
2601 }
2602
2603 /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
2604 if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
2605 {
2606 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
2607
2608 /* UART Rx state is not reset as a reception process might be ongoing.
2609 If UART handle state fields need to be reset to READY, this could be done in Wakeup callback */
2610
2611 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2612 /* Call registered Wakeup Callback */
2613 huart->WakeupCallback(huart);
2614 #else
2615 /* Call legacy weak Wakeup Callback */
2616 HAL_UARTEx_WakeupCallback(huart);
2617 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2618 return;
2619 }
2620
2621 /* UART in mode Transmitter ------------------------------------------------*/
2622 #if defined(USART_CR1_FIFOEN)
2623 if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
2624 && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
2625 || ((cr3its & USART_CR3_TXFTIE) != 0U)))
2626 #else
2627 if (((isrflags & USART_ISR_TXE) != 0U)
2628 && ((cr1its & USART_CR1_TXEIE) != 0U))
2629 #endif /* USART_CR1_FIFOEN */
2630 {
2631 if (huart->TxISR != NULL)
2632 {
2633 huart->TxISR(huart);
2634 }
2635 return;
2636 }
2637
2638 /* UART in mode Transmitter (transmission end) -----------------------------*/
2639 if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
2640 {
2641 UART_EndTransmit_IT(huart);
2642 return;
2643 }
2644
2645 #if defined(USART_CR1_FIFOEN)
2646 /* UART TX Fifo Empty occurred ----------------------------------------------*/
2647 if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
2648 {
2649 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2650 /* Call registered Tx Fifo Empty Callback */
2651 huart->TxFifoEmptyCallback(huart);
2652 #else
2653 /* Call legacy weak Tx Fifo Empty Callback */
2654 HAL_UARTEx_TxFifoEmptyCallback(huart);
2655 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2656 return;
2657 }
2658
2659 /* UART RX Fifo Full occurred ----------------------------------------------*/
2660 if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
2661 {
2662 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2663 /* Call registered Rx Fifo Full Callback */
2664 huart->RxFifoFullCallback(huart);
2665 #else
2666 /* Call legacy weak Rx Fifo Full Callback */
2667 HAL_UARTEx_RxFifoFullCallback(huart);
2668 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2669 return;
2670 }
2671 #endif /* USART_CR1_FIFOEN */
2672 }
2673
2674 /**
2675 * @brief Tx Transfer completed callback.
2676 * @param huart UART handle.
2677 * @retval None
2678 */
HAL_UART_TxCpltCallback(UART_HandleTypeDef * huart)2679 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
2680 {
2681 /* Prevent unused argument(s) compilation warning */
2682 UNUSED(huart);
2683
2684 /* NOTE : This function should not be modified, when the callback is needed,
2685 the HAL_UART_TxCpltCallback can be implemented in the user file.
2686 */
2687 }
2688
2689 /**
2690 * @brief Tx Half Transfer completed callback.
2691 * @param huart UART handle.
2692 * @retval None
2693 */
HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef * huart)2694 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
2695 {
2696 /* Prevent unused argument(s) compilation warning */
2697 UNUSED(huart);
2698
2699 /* NOTE: This function should not be modified, when the callback is needed,
2700 the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
2701 */
2702 }
2703
2704 /**
2705 * @brief Rx Transfer completed callback.
2706 * @param huart UART handle.
2707 * @retval None
2708 */
HAL_UART_RxCpltCallback(UART_HandleTypeDef * huart)2709 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
2710 {
2711 /* Prevent unused argument(s) compilation warning */
2712 UNUSED(huart);
2713
2714 /* NOTE : This function should not be modified, when the callback is needed,
2715 the HAL_UART_RxCpltCallback can be implemented in the user file.
2716 */
2717 }
2718
2719 /**
2720 * @brief Rx Half Transfer completed callback.
2721 * @param huart UART handle.
2722 * @retval None
2723 */
HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef * huart)2724 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
2725 {
2726 /* Prevent unused argument(s) compilation warning */
2727 UNUSED(huart);
2728
2729 /* NOTE: This function should not be modified, when the callback is needed,
2730 the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
2731 */
2732 }
2733
2734 /**
2735 * @brief UART error callback.
2736 * @param huart UART handle.
2737 * @retval None
2738 */
HAL_UART_ErrorCallback(UART_HandleTypeDef * huart)2739 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
2740 {
2741 /* Prevent unused argument(s) compilation warning */
2742 UNUSED(huart);
2743
2744 /* NOTE : This function should not be modified, when the callback is needed,
2745 the HAL_UART_ErrorCallback can be implemented in the user file.
2746 */
2747 }
2748
2749 /**
2750 * @brief UART Abort Complete callback.
2751 * @param huart UART handle.
2752 * @retval None
2753 */
HAL_UART_AbortCpltCallback(UART_HandleTypeDef * huart)2754 __weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
2755 {
2756 /* Prevent unused argument(s) compilation warning */
2757 UNUSED(huart);
2758
2759 /* NOTE : This function should not be modified, when the callback is needed,
2760 the HAL_UART_AbortCpltCallback can be implemented in the user file.
2761 */
2762 }
2763
2764 /**
2765 * @brief UART Abort Complete callback.
2766 * @param huart UART handle.
2767 * @retval None
2768 */
HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef * huart)2769 __weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
2770 {
2771 /* Prevent unused argument(s) compilation warning */
2772 UNUSED(huart);
2773
2774 /* NOTE : This function should not be modified, when the callback is needed,
2775 the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file.
2776 */
2777 }
2778
2779 /**
2780 * @brief UART Abort Receive Complete callback.
2781 * @param huart UART handle.
2782 * @retval None
2783 */
HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef * huart)2784 __weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
2785 {
2786 /* Prevent unused argument(s) compilation warning */
2787 UNUSED(huart);
2788
2789 /* NOTE : This function should not be modified, when the callback is needed,
2790 the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file.
2791 */
2792 }
2793
2794 /**
2795 * @brief Reception Event Callback (Rx event notification called after use of advanced reception service).
2796 * @param huart UART handle
2797 * @param Size Number of data available in application reception buffer (indicates a position in
2798 * reception buffer until which, data are available)
2799 * @retval None
2800 */
HAL_UARTEx_RxEventCallback(UART_HandleTypeDef * huart,uint16_t Size)2801 __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
2802 {
2803 /* Prevent unused argument(s) compilation warning */
2804 UNUSED(huart);
2805 UNUSED(Size);
2806
2807 /* NOTE : This function should not be modified, when the callback is needed,
2808 the HAL_UARTEx_RxEventCallback can be implemented in the user file.
2809 */
2810 }
2811
2812 /**
2813 * @}
2814 */
2815
2816 /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
2817 * @brief UART control functions
2818 *
2819 @verbatim
2820 ===============================================================================
2821 ##### Peripheral Control functions #####
2822 ===============================================================================
2823 [..]
2824 This subsection provides a set of functions allowing to control the UART.
2825 (+) HAL_UART_ReceiverTimeout_Config() API allows to configure the receiver timeout value on the fly
2826 (+) HAL_UART_EnableReceiverTimeout() API enables the receiver timeout feature
2827 (+) HAL_UART_DisableReceiverTimeout() API disables the receiver timeout feature
2828 (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
2829 (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode
2830 (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode
2831 (+) UART_SetConfig() API configures the UART peripheral
2832 (+) UART_AdvFeatureConfig() API optionally configures the UART advanced features
2833 (+) UART_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization
2834 (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter
2835 (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver
2836 (+) HAL_LIN_SendBreak() API transmits the break characters
2837 @endverbatim
2838 * @{
2839 */
2840
2841 /**
2842 * @brief Update on the fly the receiver timeout value in RTOR register.
2843 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2844 * the configuration information for the specified UART module.
2845 * @param TimeoutValue receiver timeout value in number of baud blocks. The timeout
2846 * value must be less or equal to 0x0FFFFFFFF.
2847 * @retval None
2848 */
HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef * huart,uint32_t TimeoutValue)2849 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue)
2850 {
2851 if (!(IS_LPUART_INSTANCE(huart->Instance)))
2852 {
2853 assert_param(IS_UART_RECEIVER_TIMEOUT_VALUE(TimeoutValue));
2854 MODIFY_REG(huart->Instance->RTOR, USART_RTOR_RTO, TimeoutValue);
2855 }
2856 }
2857
2858 /**
2859 * @brief Enable the UART receiver timeout feature.
2860 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2861 * the configuration information for the specified UART module.
2862 * @retval HAL status
2863 */
HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef * huart)2864 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart)
2865 {
2866 if (!(IS_LPUART_INSTANCE(huart->Instance)))
2867 {
2868 if (huart->gState == HAL_UART_STATE_READY)
2869 {
2870 /* Process Locked */
2871 __HAL_LOCK(huart);
2872
2873 huart->gState = HAL_UART_STATE_BUSY;
2874
2875 /* Set the USART RTOEN bit */
2876 SET_BIT(huart->Instance->CR2, USART_CR2_RTOEN);
2877
2878 huart->gState = HAL_UART_STATE_READY;
2879
2880 /* Process Unlocked */
2881 __HAL_UNLOCK(huart);
2882
2883 return HAL_OK;
2884 }
2885 else
2886 {
2887 return HAL_BUSY;
2888 }
2889 }
2890 else
2891 {
2892 return HAL_ERROR;
2893 }
2894 }
2895
2896 /**
2897 * @brief Disable the UART receiver timeout feature.
2898 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2899 * the configuration information for the specified UART module.
2900 * @retval HAL status
2901 */
HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef * huart)2902 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart)
2903 {
2904 if (!(IS_LPUART_INSTANCE(huart->Instance)))
2905 {
2906 if (huart->gState == HAL_UART_STATE_READY)
2907 {
2908 /* Process Locked */
2909 __HAL_LOCK(huart);
2910
2911 huart->gState = HAL_UART_STATE_BUSY;
2912
2913 /* Clear the USART RTOEN bit */
2914 CLEAR_BIT(huart->Instance->CR2, USART_CR2_RTOEN);
2915
2916 huart->gState = HAL_UART_STATE_READY;
2917
2918 /* Process Unlocked */
2919 __HAL_UNLOCK(huart);
2920
2921 return HAL_OK;
2922 }
2923 else
2924 {
2925 return HAL_BUSY;
2926 }
2927 }
2928 else
2929 {
2930 return HAL_ERROR;
2931 }
2932 }
2933
2934 /**
2935 * @brief Enable UART in mute mode (does not mean UART enters mute mode;
2936 * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called).
2937 * @param huart UART handle.
2938 * @retval HAL status
2939 */
HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef * huart)2940 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
2941 {
2942 __HAL_LOCK(huart);
2943
2944 huart->gState = HAL_UART_STATE_BUSY;
2945
2946 /* Enable USART mute mode by setting the MME bit in the CR1 register */
2947 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_MME);
2948
2949 huart->gState = HAL_UART_STATE_READY;
2950
2951 return (UART_CheckIdleState(huart));
2952 }
2953
2954 /**
2955 * @brief Disable UART mute mode (does not mean the UART actually exits mute mode
2956 * as it may not have been in mute mode at this very moment).
2957 * @param huart UART handle.
2958 * @retval HAL status
2959 */
HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef * huart)2960 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
2961 {
2962 __HAL_LOCK(huart);
2963
2964 huart->gState = HAL_UART_STATE_BUSY;
2965
2966 /* Disable USART mute mode by clearing the MME bit in the CR1 register */
2967 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME);
2968
2969 huart->gState = HAL_UART_STATE_READY;
2970
2971 return (UART_CheckIdleState(huart));
2972 }
2973
2974 /**
2975 * @brief Enter UART mute mode (means UART actually enters mute mode).
2976 * @note To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called.
2977 * @param huart UART handle.
2978 * @retval None
2979 */
HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef * huart)2980 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
2981 {
2982 __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
2983 }
2984
2985 /**
2986 * @brief Enable the UART transmitter and disable the UART receiver.
2987 * @param huart UART handle.
2988 * @retval HAL status
2989 */
HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef * huart)2990 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
2991 {
2992 __HAL_LOCK(huart);
2993 huart->gState = HAL_UART_STATE_BUSY;
2994
2995 /* Clear TE and RE bits */
2996 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2997
2998 /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
2999 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TE);
3000
3001 huart->gState = HAL_UART_STATE_READY;
3002
3003 __HAL_UNLOCK(huart);
3004
3005 return HAL_OK;
3006 }
3007
3008 /**
3009 * @brief Enable the UART receiver and disable the UART transmitter.
3010 * @param huart UART handle.
3011 * @retval HAL status.
3012 */
HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef * huart)3013 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
3014 {
3015 __HAL_LOCK(huart);
3016 huart->gState = HAL_UART_STATE_BUSY;
3017
3018 /* Clear TE and RE bits */
3019 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
3020
3021 /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
3022 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RE);
3023
3024 huart->gState = HAL_UART_STATE_READY;
3025
3026 __HAL_UNLOCK(huart);
3027
3028 return HAL_OK;
3029 }
3030
3031
3032 /**
3033 * @brief Transmit break characters.
3034 * @param huart UART handle.
3035 * @retval HAL status
3036 */
HAL_LIN_SendBreak(UART_HandleTypeDef * huart)3037 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
3038 {
3039 /* Check the parameters */
3040 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
3041
3042 __HAL_LOCK(huart);
3043
3044 huart->gState = HAL_UART_STATE_BUSY;
3045
3046 /* Send break characters */
3047 __HAL_UART_SEND_REQ(huart, UART_SENDBREAK_REQUEST);
3048
3049 huart->gState = HAL_UART_STATE_READY;
3050
3051 __HAL_UNLOCK(huart);
3052
3053 return HAL_OK;
3054 }
3055
3056 /**
3057 * @}
3058 */
3059
3060 /** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions
3061 * @brief UART Peripheral State functions
3062 *
3063 @verbatim
3064 ==============================================================================
3065 ##### Peripheral State and Error functions #####
3066 ==============================================================================
3067 [..]
3068 This subsection provides functions allowing to :
3069 (+) Return the UART handle state.
3070 (+) Return the UART handle error code
3071
3072 @endverbatim
3073 * @{
3074 */
3075
3076 /**
3077 * @brief Return the UART handle state.
3078 * @param huart Pointer to a UART_HandleTypeDef structure that contains
3079 * the configuration information for the specified UART.
3080 * @retval HAL state
3081 */
HAL_UART_GetState(const UART_HandleTypeDef * huart)3082 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart)
3083 {
3084 uint32_t temp1;
3085 uint32_t temp2;
3086 temp1 = huart->gState;
3087 temp2 = huart->RxState;
3088
3089 return (HAL_UART_StateTypeDef)(temp1 | temp2);
3090 }
3091
3092 /**
3093 * @brief Return the UART handle error code.
3094 * @param huart Pointer to a UART_HandleTypeDef structure that contains
3095 * the configuration information for the specified UART.
3096 * @retval UART Error Code
3097 */
HAL_UART_GetError(const UART_HandleTypeDef * huart)3098 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart)
3099 {
3100 return huart->ErrorCode;
3101 }
3102 /**
3103 * @}
3104 */
3105
3106 /**
3107 * @}
3108 */
3109
3110 /** @defgroup UART_Private_Functions UART Private Functions
3111 * @{
3112 */
3113
3114 /**
3115 * @brief Initialize the callbacks to their default values.
3116 * @param huart UART handle.
3117 * @retval none
3118 */
3119 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
UART_InitCallbacksToDefault(UART_HandleTypeDef * huart)3120 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart)
3121 {
3122 /* Init the UART Callback settings */
3123 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
3124 huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
3125 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
3126 huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
3127 huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
3128 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
3129 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
3130 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
3131 huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */
3132 #if defined(USART_CR1_FIFOEN)
3133 huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
3134 huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
3135 #endif /* USART_CR1_FIFOEN */
3136 huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak RxEventCallback */
3137
3138 }
3139 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3140
3141 /**
3142 * @brief Configure the UART peripheral.
3143 * @param huart UART handle.
3144 * @retval HAL status
3145 */
UART_SetConfig(UART_HandleTypeDef * huart)3146 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
3147 {
3148 uint32_t tmpreg;
3149 uint16_t brrtemp;
3150 UART_ClockSourceTypeDef clocksource;
3151 uint32_t usartdiv;
3152 HAL_StatusTypeDef ret = HAL_OK;
3153 #if defined(USART_PRESC_PRESCALER)
3154 uint32_t lpuart_ker_ck_pres;
3155 #endif /* USART_PRESC_PRESCALER */
3156 uint32_t pclk;
3157
3158 /* Check the parameters */
3159 assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
3160 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
3161 if (UART_INSTANCE_LOWPOWER(huart))
3162 {
3163 assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits));
3164 }
3165 else
3166 {
3167 assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
3168 assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
3169 }
3170
3171 assert_param(IS_UART_PARITY(huart->Init.Parity));
3172 assert_param(IS_UART_MODE(huart->Init.Mode));
3173 assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
3174 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
3175 #if defined(USART_PRESC_PRESCALER)
3176 assert_param(IS_UART_PRESCALER(huart->Init.ClockPrescaler));
3177 #endif /* USART_PRESC_PRESCALER */
3178
3179 /*-------------------------- USART CR1 Configuration -----------------------*/
3180 /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
3181 * the UART Word Length, Parity, Mode and oversampling:
3182 * set the M bits according to huart->Init.WordLength value
3183 * set PCE and PS bits according to huart->Init.Parity value
3184 * set TE and RE bits according to huart->Init.Mode value
3185 * set OVER8 bit according to huart->Init.OverSampling value */
3186 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
3187 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
3188
3189 /*-------------------------- USART CR2 Configuration -----------------------*/
3190 /* Configure the UART Stop Bits: Set STOP[13:12] bits according
3191 * to huart->Init.StopBits value */
3192 MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
3193
3194 /*-------------------------- USART CR3 Configuration -----------------------*/
3195 /* Configure
3196 * - UART HardWare Flow Control: set CTSE and RTSE bits according
3197 * to huart->Init.HwFlowCtl value
3198 * - one-bit sampling method versus three samples' majority rule according
3199 * to huart->Init.OneBitSampling (not applicable to LPUART) */
3200 tmpreg = (uint32_t)huart->Init.HwFlowCtl;
3201
3202 if (!(UART_INSTANCE_LOWPOWER(huart)))
3203 {
3204 tmpreg |= huart->Init.OneBitSampling;
3205 }
3206 MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
3207
3208 #if defined(USART_PRESC_PRESCALER)
3209 /*-------------------------- USART PRESC Configuration -----------------------*/
3210 /* Configure
3211 * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
3212 MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
3213 #endif /* USART_PRESC_PRESCALER */
3214
3215 /*-------------------------- USART BRR Configuration -----------------------*/
3216 UART_GETCLOCKSOURCE(huart, clocksource);
3217
3218 /* Check LPUART instance */
3219 if (UART_INSTANCE_LOWPOWER(huart))
3220 {
3221 /* Retrieve frequency clock */
3222 switch (clocksource)
3223 {
3224 case UART_CLOCKSOURCE_PCLK1:
3225 pclk = HAL_RCC_GetPCLK1Freq();
3226 break;
3227 case UART_CLOCKSOURCE_HSI:
3228 pclk = (uint32_t) HSI_VALUE;
3229 break;
3230 case UART_CLOCKSOURCE_SYSCLK:
3231 pclk = HAL_RCC_GetSysClockFreq();
3232 break;
3233 case UART_CLOCKSOURCE_LSE:
3234 pclk = (uint32_t) LSE_VALUE;
3235 break;
3236 default:
3237 pclk = 0U;
3238 ret = HAL_ERROR;
3239 break;
3240 }
3241
3242 /* If proper clock source reported */
3243 if (pclk != 0U)
3244 {
3245 #if defined(USART_PRESC_PRESCALER)
3246 /* Compute clock after Prescaler */
3247 lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]);
3248
3249 /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
3250 if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
3251 (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
3252 {
3253 ret = HAL_ERROR;
3254 }
3255 else
3256 {
3257 /* Check computed UsartDiv value is in allocated range
3258 (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */
3259 usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3260 if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
3261 {
3262 huart->Instance->BRR = usartdiv;
3263 }
3264 else
3265 {
3266 ret = HAL_ERROR;
3267 }
3268 } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) ||
3269 (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
3270 #else
3271 /* No Prescaler applicable */
3272 /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
3273 if ((pclk < (3U * huart->Init.BaudRate)) ||
3274 (pclk > (4096U * huart->Init.BaudRate)))
3275 {
3276 ret = HAL_ERROR;
3277 }
3278 else
3279 {
3280 usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate));
3281 if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
3282 {
3283 huart->Instance->BRR = usartdiv;
3284 }
3285 else
3286 {
3287 ret = HAL_ERROR;
3288 }
3289 } /* if ( (pclk < (3 * huart->Init.BaudRate) ) || (pclk > (4096 * huart->Init.BaudRate) )) */
3290 #endif /* USART_PRESC_PRESCALER */
3291 } /* if (pclk != 0) */
3292 }
3293 /* Check UART Over Sampling to set Baud Rate Register */
3294 else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
3295 {
3296 switch (clocksource)
3297 {
3298 case UART_CLOCKSOURCE_PCLK1:
3299 pclk = HAL_RCC_GetPCLK1Freq();
3300 break;
3301 case UART_CLOCKSOURCE_PCLK2:
3302 pclk = HAL_RCC_GetPCLK2Freq();
3303 break;
3304 case UART_CLOCKSOURCE_HSI:
3305 pclk = (uint32_t) HSI_VALUE;
3306 break;
3307 case UART_CLOCKSOURCE_SYSCLK:
3308 pclk = HAL_RCC_GetSysClockFreq();
3309 break;
3310 case UART_CLOCKSOURCE_LSE:
3311 pclk = (uint32_t) LSE_VALUE;
3312 break;
3313 default:
3314 pclk = 0U;
3315 ret = HAL_ERROR;
3316 break;
3317 }
3318
3319 /* USARTDIV must be greater than or equal to 0d16 */
3320 if (pclk != 0U)
3321 {
3322 #if defined(USART_PRESC_PRESCALER)
3323 usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3324 #else
3325 usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
3326 #endif /* USART_PRESC_PRESCALER */
3327 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3328 {
3329 brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
3330 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
3331 huart->Instance->BRR = brrtemp;
3332 }
3333 else
3334 {
3335 ret = HAL_ERROR;
3336 }
3337 }
3338 }
3339 else
3340 {
3341 switch (clocksource)
3342 {
3343 case UART_CLOCKSOURCE_PCLK1:
3344 pclk = HAL_RCC_GetPCLK1Freq();
3345 break;
3346 case UART_CLOCKSOURCE_PCLK2:
3347 pclk = HAL_RCC_GetPCLK2Freq();
3348 break;
3349 case UART_CLOCKSOURCE_HSI:
3350 pclk = (uint32_t) HSI_VALUE;
3351 break;
3352 case UART_CLOCKSOURCE_SYSCLK:
3353 pclk = HAL_RCC_GetSysClockFreq();
3354 break;
3355 case UART_CLOCKSOURCE_LSE:
3356 pclk = (uint32_t) LSE_VALUE;
3357 break;
3358 default:
3359 pclk = 0U;
3360 ret = HAL_ERROR;
3361 break;
3362 }
3363
3364 if (pclk != 0U)
3365 {
3366 /* USARTDIV must be greater than or equal to 0d16 */
3367 #if defined(USART_PRESC_PRESCALER)
3368 usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3369 #else
3370 usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
3371 #endif /* USART_PRESC_PRESCALER */
3372 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3373 {
3374 huart->Instance->BRR = (uint16_t)usartdiv;
3375 }
3376 else
3377 {
3378 ret = HAL_ERROR;
3379 }
3380 }
3381 }
3382
3383 #if defined(USART_CR1_FIFOEN)
3384 /* Initialize the number of data to process during RX/TX ISR execution */
3385 huart->NbTxDataToProcess = 1;
3386 huart->NbRxDataToProcess = 1;
3387 #endif /* USART_CR1_FIFOEN */
3388
3389 /* Clear ISR function pointers */
3390 huart->RxISR = NULL;
3391 huart->TxISR = NULL;
3392
3393 return ret;
3394 }
3395
3396 /**
3397 * @brief Configure the UART peripheral advanced features.
3398 * @param huart UART handle.
3399 * @retval None
3400 */
UART_AdvFeatureConfig(UART_HandleTypeDef * huart)3401 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
3402 {
3403 /* Check whether the set of advanced features to configure is properly set */
3404 assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
3405
3406 /* if required, configure TX pin active level inversion */
3407 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
3408 {
3409 assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
3410 MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
3411 }
3412
3413 /* if required, configure RX pin active level inversion */
3414 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
3415 {
3416 assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
3417 MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
3418 }
3419
3420 /* if required, configure data inversion */
3421 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
3422 {
3423 assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
3424 MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
3425 }
3426
3427 /* if required, configure RX/TX pins swap */
3428 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
3429 {
3430 assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
3431 MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
3432 }
3433
3434 /* if required, configure RX overrun detection disabling */
3435 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
3436 {
3437 assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
3438 MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
3439 }
3440
3441 /* if required, configure DMA disabling on reception error */
3442 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
3443 {
3444 assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
3445 MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
3446 }
3447
3448 /* if required, configure auto Baud rate detection scheme */
3449 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
3450 {
3451 assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
3452 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
3453 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
3454 /* set auto Baudrate detection parameters if detection is enabled */
3455 if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
3456 {
3457 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
3458 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
3459 }
3460 }
3461
3462 /* if required, configure MSB first on communication line */
3463 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
3464 {
3465 assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
3466 MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
3467 }
3468 }
3469
3470 /**
3471 * @brief Check the UART Idle State.
3472 * @param huart UART handle.
3473 * @retval HAL status
3474 */
UART_CheckIdleState(UART_HandleTypeDef * huart)3475 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
3476 {
3477 uint32_t tickstart;
3478
3479 /* Initialize the UART ErrorCode */
3480 huart->ErrorCode = HAL_UART_ERROR_NONE;
3481
3482 /* Init tickstart for timeout management */
3483 tickstart = HAL_GetTick();
3484
3485 /* Check if the Transmitter is enabled */
3486 if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
3487 {
3488 /* Wait until TEACK flag is set */
3489 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3490 {
3491 /* Timeout occurred */
3492 return HAL_TIMEOUT;
3493 }
3494 }
3495
3496 /* Check if the Receiver is enabled */
3497 if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
3498 {
3499 /* Wait until REACK flag is set */
3500 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3501 {
3502 /* Timeout occurred */
3503 return HAL_TIMEOUT;
3504 }
3505 }
3506
3507 /* Initialize the UART State */
3508 huart->gState = HAL_UART_STATE_READY;
3509 huart->RxState = HAL_UART_STATE_READY;
3510 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3511
3512 __HAL_UNLOCK(huart);
3513
3514 return HAL_OK;
3515 }
3516
3517 /**
3518 * @brief This function handles UART Communication Timeout. It waits
3519 * until a flag is no longer in the specified status.
3520 * @param huart UART handle.
3521 * @param Flag Specifies the UART flag to check
3522 * @param Status The actual Flag status (SET or RESET)
3523 * @param Tickstart Tick start value
3524 * @param Timeout Timeout duration
3525 * @retval HAL status
3526 */
UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef * huart,uint32_t Flag,FlagStatus Status,uint32_t Tickstart,uint32_t Timeout)3527 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
3528 uint32_t Tickstart, uint32_t Timeout)
3529 {
3530 /* Wait until flag is set */
3531 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
3532 {
3533 /* Check for the Timeout */
3534 if (Timeout != HAL_MAX_DELAY)
3535 {
3536 if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
3537 {
3538 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
3539 interrupts for the interrupt process */
3540 #if defined(USART_CR1_FIFOEN)
3541 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE |
3542 USART_CR1_TXEIE_TXFNFIE));
3543 #else
3544 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
3545 #endif /* USART_CR1_FIFOEN */
3546 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3547
3548 huart->gState = HAL_UART_STATE_READY;
3549 huart->RxState = HAL_UART_STATE_READY;
3550
3551 __HAL_UNLOCK(huart);
3552
3553 return HAL_TIMEOUT;
3554 }
3555
3556 if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
3557 {
3558 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
3559 {
3560 /* Clear Receiver Timeout flag*/
3561 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
3562
3563 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
3564 interrupts for the interrupt process */
3565 #if defined(USART_CR1_FIFOEN)
3566 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE |
3567 USART_CR1_TXEIE_TXFNFIE));
3568 #else
3569 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
3570 #endif /* USART_CR1_FIFOEN */
3571 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3572
3573 huart->gState = HAL_UART_STATE_READY;
3574 huart->RxState = HAL_UART_STATE_READY;
3575 huart->ErrorCode = HAL_UART_ERROR_RTO;
3576
3577 /* Process Unlocked */
3578 __HAL_UNLOCK(huart);
3579
3580 return HAL_TIMEOUT;
3581 }
3582 }
3583 }
3584 }
3585 return HAL_OK;
3586 }
3587
3588 /**
3589 * @brief Start Receive operation in interrupt mode.
3590 * @note This function could be called by all HAL UART API providing reception in Interrupt mode.
3591 * @note When calling this function, parameters validity is considered as already checked,
3592 * i.e. Rx State, buffer address, ...
3593 * UART Handle is assumed as Locked.
3594 * @param huart UART handle.
3595 * @param pData Pointer to data buffer (u8 or u16 data elements).
3596 * @param Size Amount of data elements (u8 or u16) to be received.
3597 * @retval HAL status
3598 */
UART_Start_Receive_IT(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size)3599 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
3600 {
3601 huart->pRxBuffPtr = pData;
3602 huart->RxXferSize = Size;
3603 huart->RxXferCount = Size;
3604 huart->RxISR = NULL;
3605
3606 /* Computation of UART mask to apply to RDR register */
3607 UART_MASK_COMPUTATION(huart);
3608
3609 huart->ErrorCode = HAL_UART_ERROR_NONE;
3610 huart->RxState = HAL_UART_STATE_BUSY_RX;
3611
3612 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3613 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
3614
3615 #if defined(USART_CR1_FIFOEN)
3616 /* Configure Rx interrupt processing */
3617 if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
3618 {
3619 /* Set the Rx ISR function pointer according to the data word length */
3620 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
3621 {
3622 huart->RxISR = UART_RxISR_16BIT_FIFOEN;
3623 }
3624 else
3625 {
3626 huart->RxISR = UART_RxISR_8BIT_FIFOEN;
3627 }
3628
3629 __HAL_UNLOCK(huart);
3630
3631 /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
3632 if (huart->Init.Parity != UART_PARITY_NONE)
3633 {
3634 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3635 }
3636 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
3637 }
3638 else
3639 {
3640 /* Set the Rx ISR function pointer according to the data word length */
3641 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
3642 {
3643 huart->RxISR = UART_RxISR_16BIT;
3644 }
3645 else
3646 {
3647 huart->RxISR = UART_RxISR_8BIT;
3648 }
3649
3650 __HAL_UNLOCK(huart);
3651
3652 /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
3653 if (huart->Init.Parity != UART_PARITY_NONE)
3654 {
3655 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
3656 }
3657 else
3658 {
3659 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
3660 }
3661 }
3662 #else
3663 /* Set the Rx ISR function pointer according to the data word length */
3664 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
3665 {
3666 huart->RxISR = UART_RxISR_16BIT;
3667 }
3668 else
3669 {
3670 huart->RxISR = UART_RxISR_8BIT;
3671 }
3672
3673 __HAL_UNLOCK(huart);
3674
3675 /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
3676 if (huart->Init.Parity != UART_PARITY_NONE)
3677 {
3678 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
3679 }
3680 else
3681 {
3682 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE);
3683 }
3684 #endif /* USART_CR1_FIFOEN */
3685 return HAL_OK;
3686 }
3687
3688 /**
3689 * @brief Start Receive operation in DMA mode.
3690 * @note This function could be called by all HAL UART API providing reception in DMA mode.
3691 * @note When calling this function, parameters validity is considered as already checked,
3692 * i.e. Rx State, buffer address, ...
3693 * UART Handle is assumed as Locked.
3694 * @param huart UART handle.
3695 * @param pData Pointer to data buffer (u8 or u16 data elements).
3696 * @param Size Amount of data elements (u8 or u16) to be received.
3697 * @retval HAL status
3698 */
UART_Start_Receive_DMA(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size)3699 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
3700 {
3701 huart->pRxBuffPtr = pData;
3702 huart->RxXferSize = Size;
3703
3704 huart->ErrorCode = HAL_UART_ERROR_NONE;
3705 huart->RxState = HAL_UART_STATE_BUSY_RX;
3706
3707 if (huart->hdmarx != NULL)
3708 {
3709 /* Set the UART DMA transfer complete callback */
3710 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
3711
3712 /* Set the UART DMA Half transfer complete callback */
3713 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
3714
3715 /* Set the DMA error callback */
3716 huart->hdmarx->XferErrorCallback = UART_DMAError;
3717
3718 /* Set the DMA abort callback */
3719 huart->hdmarx->XferAbortCallback = NULL;
3720
3721 /* Enable the DMA channel */
3722 if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK)
3723 {
3724 /* Set error code to DMA */
3725 huart->ErrorCode = HAL_UART_ERROR_DMA;
3726
3727 __HAL_UNLOCK(huart);
3728
3729 /* Restore huart->RxState to ready */
3730 huart->RxState = HAL_UART_STATE_READY;
3731
3732 return HAL_ERROR;
3733 }
3734 }
3735 __HAL_UNLOCK(huart);
3736
3737 /* Enable the UART Parity Error Interrupt */
3738 if (huart->Init.Parity != UART_PARITY_NONE)
3739 {
3740 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3741 }
3742
3743 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
3744 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
3745
3746 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
3747 in the UART CR3 register */
3748 ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3749
3750 return HAL_OK;
3751 }
3752
3753
3754 /**
3755 * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
3756 * @param huart UART handle.
3757 * @retval None
3758 */
UART_EndTxTransfer(UART_HandleTypeDef * huart)3759 static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
3760 {
3761 #if defined(USART_CR1_FIFOEN)
3762 /* Disable TXEIE, TCIE, TXFT interrupts */
3763 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
3764 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE));
3765 #else
3766 /* Disable TXEIE and TCIE interrupts */
3767 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
3768 #endif /* USART_CR1_FIFOEN */
3769
3770 /* At end of Tx process, restore huart->gState to Ready */
3771 huart->gState = HAL_UART_STATE_READY;
3772 }
3773
3774
3775 /**
3776 * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
3777 * @param huart UART handle.
3778 * @retval None
3779 */
UART_EndRxTransfer(UART_HandleTypeDef * huart)3780 static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
3781 {
3782 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
3783 #if defined(USART_CR1_FIFOEN)
3784 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3785 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
3786 #else
3787 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
3788 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3789 #endif /* USART_CR1_FIFOEN */
3790
3791 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
3792 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3793 {
3794 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
3795 }
3796
3797 /* At end of Rx process, restore huart->RxState to Ready */
3798 huart->RxState = HAL_UART_STATE_READY;
3799 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
3800
3801 /* Reset RxIsr function pointer */
3802 huart->RxISR = NULL;
3803 }
3804
3805
3806 /**
3807 * @brief DMA UART transmit process complete callback.
3808 * @param hdma DMA handle.
3809 * @retval None
3810 */
UART_DMATransmitCplt(DMA_HandleTypeDef * hdma)3811 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
3812 {
3813 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3814
3815 /* DMA Normal mode */
3816 if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
3817 {
3818 huart->TxXferCount = 0U;
3819
3820 /* Disable the DMA transfer for transmit request by resetting the DMAT bit
3821 in the UART CR3 register */
3822 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
3823
3824 /* Enable the UART Transmit Complete Interrupt */
3825 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3826 }
3827 /* DMA Circular mode */
3828 else
3829 {
3830 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3831 /*Call registered Tx complete callback*/
3832 huart->TxCpltCallback(huart);
3833 #else
3834 /*Call legacy weak Tx complete callback*/
3835 HAL_UART_TxCpltCallback(huart);
3836 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3837 }
3838 }
3839
3840 /**
3841 * @brief DMA UART transmit process half complete callback.
3842 * @param hdma DMA handle.
3843 * @retval None
3844 */
UART_DMATxHalfCplt(DMA_HandleTypeDef * hdma)3845 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
3846 {
3847 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3848
3849 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3850 /*Call registered Tx Half complete callback*/
3851 huart->TxHalfCpltCallback(huart);
3852 #else
3853 /*Call legacy weak Tx Half complete callback*/
3854 HAL_UART_TxHalfCpltCallback(huart);
3855 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3856 }
3857
3858 /**
3859 * @brief DMA UART receive process complete callback.
3860 * @param hdma DMA handle.
3861 * @retval None
3862 */
UART_DMAReceiveCplt(DMA_HandleTypeDef * hdma)3863 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
3864 {
3865 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3866
3867 /* DMA Normal mode */
3868 if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
3869 {
3870 huart->RxXferCount = 0U;
3871
3872 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
3873 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3874 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3875
3876 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
3877 in the UART CR3 register */
3878 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3879
3880 /* At end of Rx process, restore huart->RxState to Ready */
3881 huart->RxState = HAL_UART_STATE_READY;
3882
3883 /* If Reception till IDLE event has been selected, Disable IDLE Interrupt */
3884 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3885 {
3886 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
3887 }
3888 }
3889
3890 /* Check current reception Mode :
3891 If Reception till IDLE event has been selected : use Rx Event callback */
3892 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3893 {
3894 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3895 /*Call registered Rx Event callback*/
3896 huart->RxEventCallback(huart, huart->RxXferSize);
3897 #else
3898 /*Call legacy weak Rx Event callback*/
3899 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
3900 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3901 }
3902 else
3903 {
3904 /* In other cases : use Rx Complete callback */
3905 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3906 /*Call registered Rx complete callback*/
3907 huart->RxCpltCallback(huart);
3908 #else
3909 /*Call legacy weak Rx complete callback*/
3910 HAL_UART_RxCpltCallback(huart);
3911 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3912 }
3913 }
3914
3915 /**
3916 * @brief DMA UART receive process half complete callback.
3917 * @param hdma DMA handle.
3918 * @retval None
3919 */
UART_DMARxHalfCplt(DMA_HandleTypeDef * hdma)3920 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
3921 {
3922 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3923
3924 /* Check current reception Mode :
3925 If Reception till IDLE event has been selected : use Rx Event callback */
3926 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
3927 {
3928 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3929 /*Call registered Rx Event callback*/
3930 huart->RxEventCallback(huart, huart->RxXferSize / 2U);
3931 #else
3932 /*Call legacy weak Rx Event callback*/
3933 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U);
3934 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3935 }
3936 else
3937 {
3938 /* In other cases : use Rx Half Complete callback */
3939 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3940 /*Call registered Rx Half complete callback*/
3941 huart->RxHalfCpltCallback(huart);
3942 #else
3943 /*Call legacy weak Rx Half complete callback*/
3944 HAL_UART_RxHalfCpltCallback(huart);
3945 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3946 }
3947 }
3948
3949 /**
3950 * @brief DMA UART communication error callback.
3951 * @param hdma DMA handle.
3952 * @retval None
3953 */
UART_DMAError(DMA_HandleTypeDef * hdma)3954 static void UART_DMAError(DMA_HandleTypeDef *hdma)
3955 {
3956 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3957
3958 const HAL_UART_StateTypeDef gstate = huart->gState;
3959 const HAL_UART_StateTypeDef rxstate = huart->RxState;
3960
3961 /* Stop UART DMA Tx request if ongoing */
3962 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
3963 (gstate == HAL_UART_STATE_BUSY_TX))
3964 {
3965 huart->TxXferCount = 0U;
3966 UART_EndTxTransfer(huart);
3967 }
3968
3969 /* Stop UART DMA Rx request if ongoing */
3970 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
3971 (rxstate == HAL_UART_STATE_BUSY_RX))
3972 {
3973 huart->RxXferCount = 0U;
3974 UART_EndRxTransfer(huart);
3975 }
3976
3977 huart->ErrorCode |= HAL_UART_ERROR_DMA;
3978
3979 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3980 /*Call registered error callback*/
3981 huart->ErrorCallback(huart);
3982 #else
3983 /*Call legacy weak error callback*/
3984 HAL_UART_ErrorCallback(huart);
3985 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3986 }
3987
3988 /**
3989 * @brief DMA UART communication abort callback, when initiated by HAL services on Error
3990 * (To be called at end of DMA Abort procedure following error occurrence).
3991 * @param hdma DMA handle.
3992 * @retval None
3993 */
UART_DMAAbortOnError(DMA_HandleTypeDef * hdma)3994 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
3995 {
3996 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3997 huart->RxXferCount = 0U;
3998 huart->TxXferCount = 0U;
3999
4000 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4001 /*Call registered error callback*/
4002 huart->ErrorCallback(huart);
4003 #else
4004 /*Call legacy weak error callback*/
4005 HAL_UART_ErrorCallback(huart);
4006 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4007 }
4008
4009 /**
4010 * @brief DMA UART Tx communication abort callback, when initiated by user
4011 * (To be called at end of DMA Tx Abort procedure following user abort request).
4012 * @note When this callback is executed, User Abort complete call back is called only if no
4013 * Abort still ongoing for Rx DMA Handle.
4014 * @param hdma DMA handle.
4015 * @retval None
4016 */
UART_DMATxAbortCallback(DMA_HandleTypeDef * hdma)4017 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
4018 {
4019 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
4020
4021 huart->hdmatx->XferAbortCallback = NULL;
4022
4023 /* Check if an Abort process is still ongoing */
4024 if (huart->hdmarx != NULL)
4025 {
4026 if (huart->hdmarx->XferAbortCallback != NULL)
4027 {
4028 return;
4029 }
4030 }
4031
4032 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
4033 huart->TxXferCount = 0U;
4034 huart->RxXferCount = 0U;
4035
4036 /* Reset errorCode */
4037 huart->ErrorCode = HAL_UART_ERROR_NONE;
4038
4039 /* Clear the Error flags in the ICR register */
4040 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
4041
4042 #if defined(USART_CR1_FIFOEN)
4043 /* Flush the whole TX FIFO (if needed) */
4044 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
4045 {
4046 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
4047 }
4048 #endif /* USART_CR1_FIFOEN */
4049
4050 /* Restore huart->gState and huart->RxState to Ready */
4051 huart->gState = HAL_UART_STATE_READY;
4052 huart->RxState = HAL_UART_STATE_READY;
4053 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4054
4055 /* Call user Abort complete callback */
4056 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4057 /* Call registered Abort complete callback */
4058 huart->AbortCpltCallback(huart);
4059 #else
4060 /* Call legacy weak Abort complete callback */
4061 HAL_UART_AbortCpltCallback(huart);
4062 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4063 }
4064
4065
4066 /**
4067 * @brief DMA UART Rx communication abort callback, when initiated by user
4068 * (To be called at end of DMA Rx Abort procedure following user abort request).
4069 * @note When this callback is executed, User Abort complete call back is called only if no
4070 * Abort still ongoing for Tx DMA Handle.
4071 * @param hdma DMA handle.
4072 * @retval None
4073 */
UART_DMARxAbortCallback(DMA_HandleTypeDef * hdma)4074 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
4075 {
4076 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
4077
4078 huart->hdmarx->XferAbortCallback = NULL;
4079
4080 /* Check if an Abort process is still ongoing */
4081 if (huart->hdmatx != NULL)
4082 {
4083 if (huart->hdmatx->XferAbortCallback != NULL)
4084 {
4085 return;
4086 }
4087 }
4088
4089 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
4090 huart->TxXferCount = 0U;
4091 huart->RxXferCount = 0U;
4092
4093 /* Reset errorCode */
4094 huart->ErrorCode = HAL_UART_ERROR_NONE;
4095
4096 /* Clear the Error flags in the ICR register */
4097 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
4098
4099 /* Discard the received data */
4100 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4101
4102 /* Restore huart->gState and huart->RxState to Ready */
4103 huart->gState = HAL_UART_STATE_READY;
4104 huart->RxState = HAL_UART_STATE_READY;
4105 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4106
4107 /* Call user Abort complete callback */
4108 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4109 /* Call registered Abort complete callback */
4110 huart->AbortCpltCallback(huart);
4111 #else
4112 /* Call legacy weak Abort complete callback */
4113 HAL_UART_AbortCpltCallback(huart);
4114 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4115 }
4116
4117
4118 /**
4119 * @brief DMA UART Tx communication abort callback, when initiated by user by a call to
4120 * HAL_UART_AbortTransmit_IT API (Abort only Tx transfer)
4121 * (This callback is executed at end of DMA Tx Abort procedure following user abort request,
4122 * and leads to user Tx Abort Complete callback execution).
4123 * @param hdma DMA handle.
4124 * @retval None
4125 */
UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef * hdma)4126 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
4127 {
4128 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
4129
4130 huart->TxXferCount = 0U;
4131
4132 #if defined(USART_CR1_FIFOEN)
4133 /* Flush the whole TX FIFO (if needed) */
4134 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
4135 {
4136 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
4137 }
4138 #endif /* USART_CR1_FIFOEN */
4139
4140 /* Restore huart->gState to Ready */
4141 huart->gState = HAL_UART_STATE_READY;
4142
4143 /* Call user Abort complete callback */
4144 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4145 /* Call registered Abort Transmit Complete Callback */
4146 huart->AbortTransmitCpltCallback(huart);
4147 #else
4148 /* Call legacy weak Abort Transmit Complete Callback */
4149 HAL_UART_AbortTransmitCpltCallback(huart);
4150 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4151 }
4152
4153 /**
4154 * @brief DMA UART Rx communication abort callback, when initiated by user by a call to
4155 * HAL_UART_AbortReceive_IT API (Abort only Rx transfer)
4156 * (This callback is executed at end of DMA Rx Abort procedure following user abort request,
4157 * and leads to user Rx Abort Complete callback execution).
4158 * @param hdma DMA handle.
4159 * @retval None
4160 */
UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef * hdma)4161 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
4162 {
4163 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
4164
4165 huart->RxXferCount = 0U;
4166
4167 /* Clear the Error flags in the ICR register */
4168 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
4169
4170 /* Discard the received data */
4171 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4172
4173 /* Restore huart->RxState to Ready */
4174 huart->RxState = HAL_UART_STATE_READY;
4175 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4176
4177 /* Call user Abort complete callback */
4178 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4179 /* Call registered Abort Receive Complete Callback */
4180 huart->AbortReceiveCpltCallback(huart);
4181 #else
4182 /* Call legacy weak Abort Receive Complete Callback */
4183 HAL_UART_AbortReceiveCpltCallback(huart);
4184 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4185 }
4186
4187 /**
4188 * @brief TX interrupt handler for 7 or 8 bits data word length .
4189 * @note Function is called under interruption only, once
4190 * interruptions have been enabled by HAL_UART_Transmit_IT().
4191 * @param huart UART handle.
4192 * @retval None
4193 */
UART_TxISR_8BIT(UART_HandleTypeDef * huart)4194 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
4195 {
4196 /* Check that a Tx process is ongoing */
4197 if (huart->gState == HAL_UART_STATE_BUSY_TX)
4198 {
4199 if (huart->TxXferCount == 0U)
4200 {
4201 /* Disable the UART Transmit Data Register Empty Interrupt */
4202 #if defined(USART_CR1_FIFOEN)
4203 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
4204 #else
4205 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
4206 #endif /* USART_CR1_FIFOEN */
4207
4208 /* Enable the UART Transmit Complete Interrupt */
4209 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4210 }
4211 else
4212 {
4213 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
4214 huart->pTxBuffPtr++;
4215 huart->TxXferCount--;
4216 }
4217 }
4218 }
4219
4220 /**
4221 * @brief TX interrupt handler for 9 bits data word length.
4222 * @note Function is called under interruption only, once
4223 * interruptions have been enabled by HAL_UART_Transmit_IT().
4224 * @param huart UART handle.
4225 * @retval None
4226 */
UART_TxISR_16BIT(UART_HandleTypeDef * huart)4227 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
4228 {
4229 const uint16_t *tmp;
4230
4231 /* Check that a Tx process is ongoing */
4232 if (huart->gState == HAL_UART_STATE_BUSY_TX)
4233 {
4234 if (huart->TxXferCount == 0U)
4235 {
4236 /* Disable the UART Transmit Data Register Empty Interrupt */
4237 #if defined(USART_CR1_FIFOEN)
4238 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
4239 #else
4240 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
4241 #endif /* USART_CR1_FIFOEN */
4242
4243 /* Enable the UART Transmit Complete Interrupt */
4244 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4245 }
4246 else
4247 {
4248 tmp = (const uint16_t *) huart->pTxBuffPtr;
4249 huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
4250 huart->pTxBuffPtr += 2U;
4251 huart->TxXferCount--;
4252 }
4253 }
4254 }
4255
4256 #if defined(USART_CR1_FIFOEN)
4257 /**
4258 * @brief TX interrupt handler for 7 or 8 bits data word length and FIFO mode is enabled.
4259 * @note Function is called under interruption only, once
4260 * interruptions have been enabled by HAL_UART_Transmit_IT().
4261 * @param huart UART handle.
4262 * @retval None
4263 */
UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef * huart)4264 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
4265 {
4266 uint16_t nb_tx_data;
4267
4268 /* Check that a Tx process is ongoing */
4269 if (huart->gState == HAL_UART_STATE_BUSY_TX)
4270 {
4271 for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
4272 {
4273 if (huart->TxXferCount == 0U)
4274 {
4275 /* Disable the TX FIFO threshold interrupt */
4276 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
4277
4278 /* Enable the UART Transmit Complete Interrupt */
4279 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4280
4281 break; /* force exit loop */
4282 }
4283 else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
4284 {
4285 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
4286 huart->pTxBuffPtr++;
4287 huart->TxXferCount--;
4288 }
4289 else
4290 {
4291 /* Nothing to do */
4292 }
4293 }
4294 }
4295 }
4296
4297 /**
4298 * @brief TX interrupt handler for 9 bits data word length and FIFO mode is enabled.
4299 * @note Function is called under interruption only, once
4300 * interruptions have been enabled by HAL_UART_Transmit_IT().
4301 * @param huart UART handle.
4302 * @retval None
4303 */
UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef * huart)4304 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
4305 {
4306 const uint16_t *tmp;
4307 uint16_t nb_tx_data;
4308
4309 /* Check that a Tx process is ongoing */
4310 if (huart->gState == HAL_UART_STATE_BUSY_TX)
4311 {
4312 for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
4313 {
4314 if (huart->TxXferCount == 0U)
4315 {
4316 /* Disable the TX FIFO threshold interrupt */
4317 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
4318
4319 /* Enable the UART Transmit Complete Interrupt */
4320 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4321
4322 break; /* force exit loop */
4323 }
4324 else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
4325 {
4326 tmp = (const uint16_t *) huart->pTxBuffPtr;
4327 huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
4328 huart->pTxBuffPtr += 2U;
4329 huart->TxXferCount--;
4330 }
4331 else
4332 {
4333 /* Nothing to do */
4334 }
4335 }
4336 }
4337 }
4338 #endif /* USART_CR1_FIFOEN */
4339
4340 /**
4341 * @brief Wrap up transmission in non-blocking mode.
4342 * @param huart pointer to a UART_HandleTypeDef structure that contains
4343 * the configuration information for the specified UART module.
4344 * @retval None
4345 */
UART_EndTransmit_IT(UART_HandleTypeDef * huart)4346 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
4347 {
4348 /* Disable the UART Transmit Complete Interrupt */
4349 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4350
4351 /* Tx process is ended, restore huart->gState to Ready */
4352 huart->gState = HAL_UART_STATE_READY;
4353
4354 /* Cleat TxISR function pointer */
4355 huart->TxISR = NULL;
4356
4357 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4358 /*Call registered Tx complete callback*/
4359 huart->TxCpltCallback(huart);
4360 #else
4361 /*Call legacy weak Tx complete callback*/
4362 HAL_UART_TxCpltCallback(huart);
4363 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4364 }
4365
4366 /**
4367 * @brief RX interrupt handler for 7 or 8 bits data word length .
4368 * @param huart UART handle.
4369 * @retval None
4370 */
UART_RxISR_8BIT(UART_HandleTypeDef * huart)4371 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
4372 {
4373 uint16_t uhMask = huart->Mask;
4374 uint16_t uhdata;
4375
4376 /* Check that a Rx process is ongoing */
4377 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4378 {
4379 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4380 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
4381 huart->pRxBuffPtr++;
4382 huart->RxXferCount--;
4383
4384 if (huart->RxXferCount == 0U)
4385 {
4386 /* Disable the UART Parity Error Interrupt and RXNE interrupts */
4387 #if defined(USART_CR1_FIFOEN)
4388 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
4389 #else
4390 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
4391 #endif /* USART_CR1_FIFOEN */
4392
4393 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
4394 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
4395
4396 /* Rx process is completed, restore huart->RxState to Ready */
4397 huart->RxState = HAL_UART_STATE_READY;
4398
4399 /* Clear RxISR function pointer */
4400 huart->RxISR = NULL;
4401
4402 /* Check current reception Mode :
4403 If Reception till IDLE event has been selected : */
4404 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4405 {
4406 /* Set reception type to Standard */
4407 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4408
4409 /* Disable IDLE interrupt */
4410 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4411
4412 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
4413 {
4414 /* Clear IDLE Flag */
4415 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
4416 }
4417 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4418 /*Call registered Rx Event callback*/
4419 huart->RxEventCallback(huart, huart->RxXferSize);
4420 #else
4421 /*Call legacy weak Rx Event callback*/
4422 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4423 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
4424 }
4425 else
4426 {
4427 /* Standard reception API called */
4428 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4429 /*Call registered Rx complete callback*/
4430 huart->RxCpltCallback(huart);
4431 #else
4432 /*Call legacy weak Rx complete callback*/
4433 HAL_UART_RxCpltCallback(huart);
4434 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4435 }
4436 }
4437 }
4438 else
4439 {
4440 /* Clear RXNE interrupt flag */
4441 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4442 }
4443 }
4444
4445 /**
4446 * @brief RX interrupt handler for 9 bits data word length .
4447 * @note Function is called under interruption only, once
4448 * interruptions have been enabled by HAL_UART_Receive_IT()
4449 * @param huart UART handle.
4450 * @retval None
4451 */
UART_RxISR_16BIT(UART_HandleTypeDef * huart)4452 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
4453 {
4454 uint16_t *tmp;
4455 uint16_t uhMask = huart->Mask;
4456 uint16_t uhdata;
4457
4458 /* Check that a Rx process is ongoing */
4459 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4460 {
4461 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4462 tmp = (uint16_t *) huart->pRxBuffPtr ;
4463 *tmp = (uint16_t)(uhdata & uhMask);
4464 huart->pRxBuffPtr += 2U;
4465 huart->RxXferCount--;
4466
4467 if (huart->RxXferCount == 0U)
4468 {
4469 /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
4470 #if defined(USART_CR1_FIFOEN)
4471 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
4472 #else
4473 ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
4474 #endif /* USART_CR1_FIFOEN */
4475
4476 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
4477 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
4478
4479 /* Rx process is completed, restore huart->RxState to Ready */
4480 huart->RxState = HAL_UART_STATE_READY;
4481
4482 /* Clear RxISR function pointer */
4483 huart->RxISR = NULL;
4484
4485 /* Check current reception Mode :
4486 If Reception till IDLE event has been selected : */
4487 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4488 {
4489 /* Set reception type to Standard */
4490 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4491
4492 /* Disable IDLE interrupt */
4493 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4494
4495 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
4496 {
4497 /* Clear IDLE Flag */
4498 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
4499 }
4500 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4501 /*Call registered Rx Event callback*/
4502 huart->RxEventCallback(huart, huart->RxXferSize);
4503 #else
4504 /*Call legacy weak Rx Event callback*/
4505 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4506 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
4507 }
4508 else
4509 {
4510 /* Standard reception API called */
4511 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4512 /*Call registered Rx complete callback*/
4513 huart->RxCpltCallback(huart);
4514 #else
4515 /*Call legacy weak Rx complete callback*/
4516 HAL_UART_RxCpltCallback(huart);
4517 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4518 }
4519 }
4520 }
4521 else
4522 {
4523 /* Clear RXNE interrupt flag */
4524 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4525 }
4526 }
4527
4528 #if defined(USART_CR1_FIFOEN)
4529 /**
4530 * @brief RX interrupt handler for 7 or 8 bits data word length and FIFO mode is enabled.
4531 * @note Function is called under interruption only, once
4532 * interruptions have been enabled by HAL_UART_Receive_IT()
4533 * @param huart UART handle.
4534 * @retval None
4535 */
UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef * huart)4536 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
4537 {
4538 uint16_t uhMask = huart->Mask;
4539 uint16_t uhdata;
4540 uint16_t nb_rx_data;
4541 uint16_t rxdatacount;
4542 uint32_t isrflags = READ_REG(huart->Instance->ISR);
4543 uint32_t cr1its = READ_REG(huart->Instance->CR1);
4544 uint32_t cr3its = READ_REG(huart->Instance->CR3);
4545
4546 /* Check that a Rx process is ongoing */
4547 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4548 {
4549 nb_rx_data = huart->NbRxDataToProcess;
4550 while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
4551 {
4552 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4553 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
4554 huart->pRxBuffPtr++;
4555 huart->RxXferCount--;
4556 isrflags = READ_REG(huart->Instance->ISR);
4557
4558 /* If some non blocking errors occurred */
4559 if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
4560 {
4561 /* UART parity error interrupt occurred -------------------------------------*/
4562 if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
4563 {
4564 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
4565
4566 huart->ErrorCode |= HAL_UART_ERROR_PE;
4567 }
4568
4569 /* UART frame error interrupt occurred --------------------------------------*/
4570 if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4571 {
4572 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
4573
4574 huart->ErrorCode |= HAL_UART_ERROR_FE;
4575 }
4576
4577 /* UART noise error interrupt occurred --------------------------------------*/
4578 if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4579 {
4580 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
4581
4582 huart->ErrorCode |= HAL_UART_ERROR_NE;
4583 }
4584
4585 /* Call UART Error Call back function if need be ----------------------------*/
4586 if (huart->ErrorCode != HAL_UART_ERROR_NONE)
4587 {
4588 /* Non Blocking error : transfer could go on.
4589 Error is notified to user through user error callback */
4590 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4591 /*Call registered error callback*/
4592 huart->ErrorCallback(huart);
4593 #else
4594 /*Call legacy weak error callback*/
4595 HAL_UART_ErrorCallback(huart);
4596 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4597 huart->ErrorCode = HAL_UART_ERROR_NONE;
4598 }
4599 }
4600
4601 if (huart->RxXferCount == 0U)
4602 {
4603 /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
4604 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
4605
4606 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
4607 and RX FIFO Threshold interrupt */
4608 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
4609
4610 /* Rx process is completed, restore huart->RxState to Ready */
4611 huart->RxState = HAL_UART_STATE_READY;
4612
4613 /* Clear RxISR function pointer */
4614 huart->RxISR = NULL;
4615
4616 /* Check current reception Mode :
4617 If Reception till IDLE event has been selected : */
4618 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4619 {
4620 /* Set reception type to Standard */
4621 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4622
4623 /* Disable IDLE interrupt */
4624 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4625
4626 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
4627 {
4628 /* Clear IDLE Flag */
4629 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
4630 }
4631 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4632 /*Call registered Rx Event callback*/
4633 huart->RxEventCallback(huart, huart->RxXferSize);
4634 #else
4635 /*Call legacy weak Rx Event callback*/
4636 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4637 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
4638 }
4639 else
4640 {
4641 /* Standard reception API called */
4642 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4643 /*Call registered Rx complete callback*/
4644 huart->RxCpltCallback(huart);
4645 #else
4646 /*Call legacy weak Rx complete callback*/
4647 HAL_UART_RxCpltCallback(huart);
4648 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4649 }
4650 }
4651 }
4652
4653 /* When remaining number of bytes to receive is less than the RX FIFO
4654 threshold, next incoming frames are processed as if FIFO mode was
4655 disabled (i.e. one interrupt per received frame).
4656 */
4657 rxdatacount = huart->RxXferCount;
4658 if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
4659 {
4660 /* Disable the UART RXFT interrupt*/
4661 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
4662
4663 /* Update the RxISR function pointer */
4664 huart->RxISR = UART_RxISR_8BIT;
4665
4666 /* Enable the UART Data Register Not Empty interrupt */
4667 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
4668 }
4669 }
4670 else
4671 {
4672 /* Clear RXNE interrupt flag */
4673 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4674 }
4675 }
4676
4677 /**
4678 * @brief RX interrupt handler for 9 bits data word length and FIFO mode is enabled.
4679 * @note Function is called under interruption only, once
4680 * interruptions have been enabled by HAL_UART_Receive_IT()
4681 * @param huart UART handle.
4682 * @retval None
4683 */
UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef * huart)4684 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
4685 {
4686 uint16_t *tmp;
4687 uint16_t uhMask = huart->Mask;
4688 uint16_t uhdata;
4689 uint16_t nb_rx_data;
4690 uint16_t rxdatacount;
4691 uint32_t isrflags = READ_REG(huart->Instance->ISR);
4692 uint32_t cr1its = READ_REG(huart->Instance->CR1);
4693 uint32_t cr3its = READ_REG(huart->Instance->CR3);
4694
4695 /* Check that a Rx process is ongoing */
4696 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4697 {
4698 nb_rx_data = huart->NbRxDataToProcess;
4699 while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
4700 {
4701 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4702 tmp = (uint16_t *) huart->pRxBuffPtr ;
4703 *tmp = (uint16_t)(uhdata & uhMask);
4704 huart->pRxBuffPtr += 2U;
4705 huart->RxXferCount--;
4706 isrflags = READ_REG(huart->Instance->ISR);
4707
4708 /* If some non blocking errors occurred */
4709 if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
4710 {
4711 /* UART parity error interrupt occurred -------------------------------------*/
4712 if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
4713 {
4714 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
4715
4716 huart->ErrorCode |= HAL_UART_ERROR_PE;
4717 }
4718
4719 /* UART frame error interrupt occurred --------------------------------------*/
4720 if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4721 {
4722 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
4723
4724 huart->ErrorCode |= HAL_UART_ERROR_FE;
4725 }
4726
4727 /* UART noise error interrupt occurred --------------------------------------*/
4728 if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
4729 {
4730 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
4731
4732 huart->ErrorCode |= HAL_UART_ERROR_NE;
4733 }
4734
4735 /* Call UART Error Call back function if need be ----------------------------*/
4736 if (huart->ErrorCode != HAL_UART_ERROR_NONE)
4737 {
4738 /* Non Blocking error : transfer could go on.
4739 Error is notified to user through user error callback */
4740 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4741 /*Call registered error callback*/
4742 huart->ErrorCallback(huart);
4743 #else
4744 /*Call legacy weak error callback*/
4745 HAL_UART_ErrorCallback(huart);
4746 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4747 huart->ErrorCode = HAL_UART_ERROR_NONE;
4748 }
4749 }
4750
4751 if (huart->RxXferCount == 0U)
4752 {
4753 /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
4754 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
4755
4756 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
4757 and RX FIFO Threshold interrupt */
4758 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
4759
4760 /* Rx process is completed, restore huart->RxState to Ready */
4761 huart->RxState = HAL_UART_STATE_READY;
4762
4763 /* Clear RxISR function pointer */
4764 huart->RxISR = NULL;
4765
4766 /* Check current reception Mode :
4767 If Reception till IDLE event has been selected : */
4768 if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
4769 {
4770 /* Set reception type to Standard */
4771 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4772
4773 /* Disable IDLE interrupt */
4774 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
4775
4776 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
4777 {
4778 /* Clear IDLE Flag */
4779 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
4780 }
4781 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4782 /*Call registered Rx Event callback*/
4783 huart->RxEventCallback(huart, huart->RxXferSize);
4784 #else
4785 /*Call legacy weak Rx Event callback*/
4786 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
4787 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
4788 }
4789 else
4790 {
4791 /* Standard reception API called */
4792 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4793 /*Call registered Rx complete callback*/
4794 huart->RxCpltCallback(huart);
4795 #else
4796 /*Call legacy weak Rx complete callback*/
4797 HAL_UART_RxCpltCallback(huart);
4798 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4799 }
4800 }
4801 }
4802
4803 /* When remaining number of bytes to receive is less than the RX FIFO
4804 threshold, next incoming frames are processed as if FIFO mode was
4805 disabled (i.e. one interrupt per received frame).
4806 */
4807 rxdatacount = huart->RxXferCount;
4808 if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
4809 {
4810 /* Disable the UART RXFT interrupt*/
4811 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
4812
4813 /* Update the RxISR function pointer */
4814 huart->RxISR = UART_RxISR_16BIT;
4815
4816 /* Enable the UART Data Register Not Empty interrupt */
4817 ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
4818 }
4819 }
4820 else
4821 {
4822 /* Clear RXNE interrupt flag */
4823 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4824 }
4825 }
4826 #endif /* USART_CR1_FIFOEN */
4827
4828 /**
4829 * @}
4830 */
4831
4832 #endif /* HAL_UART_MODULE_ENABLED */
4833 /**
4834 * @}
4835 */
4836
4837 /**
4838 * @}
4839 */
4840
4841
