1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2017 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### How to use this driver #####
28 ==============================================================================
29 [..]
30 The LPTIM HAL driver can be used as follows:
31
32 (#)Initialize the LPTIM low level resources by implementing the
33 HAL_LPTIM_MspInit():
34 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
35 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
36 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
37 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
38 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
39
40 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
41 configures mainly:
42 (++) The instance: LPTIM1 or LPTIM2.
43 (++) Clock: the counter clock.
44 (+++) Source : it can be either the ULPTIM input (IN1) or one of
45 the internal clock; (APB, LSE, LSI or MSI).
46 (+++) Prescaler: select the clock divider.
47 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
48 as counter clock source.
49 (+++) Polarity: polarity of the active edge for the counter unit
50 if the ULPTIM input is selected.
51 (+++) SampleTime: clock sampling time to configure the clock glitch
52 filter.
53 (++) Trigger: How the counter start.
54 (+++) Source: trigger can be software or one of the hardware triggers.
55 (+++) ActiveEdge : only for hardware trigger.
56 (+++) SampleTime : trigger sampling time to configure the trigger
57 glitch filter.
58 (++) OutputPolarity : 2 opposite polarities are possible.
59 (++) UpdateMode: specifies whether the update of the autoreload and
60 the compare values is done immediately or after the end of current
61 period.
62 (++) Input1Source: Source selected for input1 (GPIO or comparator output).
63 (++) Input2Source: Source selected for input2 (GPIO or comparator output).
64 Input2 is used only for encoder feature so is used only for LPTIM1 instance.
65
66 (#)Six modes are available:
67
68 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
69 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
70 mode.
71
72 (++) One Pulse Mode: To generate pulse with specified width in response
73 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
74 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
75
76 (++) Set once Mode: In this mode, the output changes the level (from
77 low level to high level if the output polarity is configured high, else
78 the opposite) when a compare match occurs. To start this mode, call
79 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
80 interruption mode.
81
82 (++) Encoder Mode: To use the encoder interface call
83 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
84 interruption mode. Only available for LPTIM1 instance.
85
86 (++) Time out Mode: an active edge on one selected trigger input rests
87 the counter. The first trigger event will start the timer, any
88 successive trigger event will reset the counter and the timer will
89 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
90 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
91
92 (++) Counter Mode: counter can be used to count external events on
93 the LPTIM Input1 or it can be used to count internal clock cycles.
94 To start this mode, call HAL_LPTIM_Counter_Start() or
95 HAL_LPTIM_Counter_Start_IT() for interruption mode.
96
97
98 (#) User can stop any process by calling the corresponding API:
99 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
100 already started in interruption mode.
101
102 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
103
104 *** Callback registration ***
105 =============================================
106 [..]
107 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
108 allows the user to configure dynamically the driver callbacks.
109 [..]
110 Use Function HAL_LPTIM_RegisterCallback() to register a callback.
111 HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
112 the Callback ID and a pointer to the user callback function.
113 [..]
114 Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the
115 default weak function.
116 HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
117 and the Callback ID.
118 [..]
119 These functions allow to register/unregister following callbacks:
120
121 (+) MspInitCallback : LPTIM Base Msp Init Callback.
122 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
123 (+) CompareMatchCallback : Compare match Callback.
124 (+) AutoReloadMatchCallback : Auto-reload match Callback.
125 (+) TriggerCallback : External trigger event detection Callback.
126 (+) CompareWriteCallback : Compare register write complete Callback.
127 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
128 (+) DirectionUpCallback : Up-counting direction change Callback.
129 (+) DirectionDownCallback : Down-counting direction change Callback.
130
131 [..]
132 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
133 all interrupt callbacks are set to the corresponding weak functions:
134 examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback().
135
136 [..]
137 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
138 functionalities in the Init/DeInit only when these callbacks are null
139 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
140 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
141
142 [..]
143 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
144 Exception done MspInit/MspDeInit that can be registered/unregistered
145 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
146 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
147 In that case first register the MspInit/MspDeInit user callbacks
148 using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
149
150 [..]
151 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
152 not defined, the callback registration feature is not available and all callbacks
153 are set to the corresponding weak functions.
154
155 @endverbatim
156 ******************************************************************************
157 */
158
159 /* Includes ------------------------------------------------------------------*/
160 #include "stm32l4xx_hal.h"
161
162 /** @addtogroup STM32L4xx_HAL_Driver
163 * @{
164 */
165
166 /** @defgroup LPTIM LPTIM
167 * @brief LPTIM HAL module driver.
168 * @{
169 */
170
171 #ifdef HAL_LPTIM_MODULE_ENABLED
172
173 #if defined (LPTIM1) || defined (LPTIM2)
174
175 /* Private typedef -----------------------------------------------------------*/
176 /* Private define ------------------------------------------------------------*/
177 /** @addtogroup LPTIM_Private_Constants
178 * @{
179 */
180 #define TIMEOUT 1000UL /* Timeout is 1s */
181 /**
182 * @}
183 */
184
185 /* Private macro -------------------------------------------------------------*/
186 /** @addtogroup LPTIM_Private_Macros
187 * @{
188 */
189 #if defined(LPTIM2)
190 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(__INSTANCE__) \
191 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT() : __HAL_LPTIM_LPTIM2_EXTI_ENABLE_IT())
192
193 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(__INSTANCE__) \
194 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT() : __HAL_LPTIM_LPTIM2_EXTI_DISABLE_IT())
195 #else
196 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(__INSTANCE__) __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT()
197
198 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(__INSTANCE__) __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT()
199 #endif /* LPTIM2 */
200 /**
201 * @}
202 */
203
204 /* Private variables ---------------------------------------------------------*/
205 /* Private function prototypes -----------------------------------------------*/
206 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
207 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
208 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
209 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
210
211 /* Exported functions --------------------------------------------------------*/
212
213 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
214 * @{
215 */
216
217 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
218 * @brief Initialization and Configuration functions.
219 *
220 @verbatim
221 ==============================================================================
222 ##### Initialization and de-initialization functions #####
223 ==============================================================================
224 [..] This section provides functions allowing to:
225 (+) Initialize the LPTIM according to the specified parameters in the
226 LPTIM_InitTypeDef and initialize the associated handle.
227 (+) DeInitialize the LPTIM peripheral.
228 (+) Initialize the LPTIM MSP.
229 (+) DeInitialize the LPTIM MSP.
230
231 @endverbatim
232 * @{
233 */
234
235 /**
236 * @brief Initialize the LPTIM according to the specified parameters in the
237 * LPTIM_InitTypeDef and initialize the associated handle.
238 * @param hlptim LPTIM handle
239 * @retval HAL status
240 */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)241 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
242 {
243 uint32_t tmpcfgr;
244
245 /* Check the LPTIM handle allocation */
246 if (hlptim == NULL)
247 {
248 return HAL_ERROR;
249 }
250
251 /* Check the parameters */
252 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
253
254 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
255 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
256 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
257 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
258 {
259 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
260 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
261 }
262 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
263 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
264 {
265 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
266 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
267 }
268 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
269 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
270 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
271 #if defined(LPTIM_RCR_REP)
272 assert_param(IS_LPTIM_REPETITION(hlptim->Init.RepetitionCounter));
273 #endif
274
275 if (hlptim->State == HAL_LPTIM_STATE_RESET)
276 {
277 /* Allocate lock resource and initialize it */
278 hlptim->Lock = HAL_UNLOCKED;
279
280 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
281 /* Reset interrupt callbacks to legacy weak callbacks */
282 LPTIM_ResetCallback(hlptim);
283
284 if (hlptim->MspInitCallback == NULL)
285 {
286 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
287 }
288
289 /* Init the low level hardware : GPIO, CLOCK, NVIC */
290 hlptim->MspInitCallback(hlptim);
291 #else
292 /* Init the low level hardware : GPIO, CLOCK, NVIC */
293 HAL_LPTIM_MspInit(hlptim);
294 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
295 }
296
297 /* Change the LPTIM state */
298 hlptim->State = HAL_LPTIM_STATE_BUSY;
299 #if defined(LPTIM_RCR_REP)
300
301 /* Enable the Peripheral */
302 __HAL_LPTIM_ENABLE(hlptim);
303
304 /* Clear flag */
305 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
306
307 /* Set the repetition counter */
308 __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
309
310 /* Wait for the completion of the write operation to the LPTIM_RCR register */
311 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_REPOK) == HAL_TIMEOUT)
312 {
313 return HAL_TIMEOUT;
314 }
315
316 /* Disable the Peripheral */
317 __HAL_LPTIM_DISABLE(hlptim);
318
319 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
320 {
321 return HAL_TIMEOUT;
322 }
323
324 #endif
325
326 /* Get the LPTIMx CFGR value */
327 tmpcfgr = hlptim->Instance->CFGR;
328
329 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
330 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
331 {
332 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
333 }
334 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
335 {
336 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
337 }
338
339 /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
340 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
341 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
342
343 /* Set initialization parameters */
344 tmpcfgr |= (hlptim->Init.Clock.Source |
345 hlptim->Init.Clock.Prescaler |
346 hlptim->Init.OutputPolarity |
347 hlptim->Init.UpdateMode |
348 hlptim->Init.CounterSource);
349
350 /* Glitch filters for internal triggers and external inputs are configured
351 * only if an internal clock source is provided to the LPTIM
352 */
353 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
354 {
355 tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
356 hlptim->Init.UltraLowPowerClock.SampleTime);
357 }
358
359 /* Configure LPTIM external clock polarity and digital filter */
360 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
361 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
362 {
363 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
364 hlptim->Init.UltraLowPowerClock.SampleTime);
365 }
366
367 /* Configure LPTIM external trigger */
368 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
369 {
370 /* Enable External trigger and set the trigger source */
371 tmpcfgr |= (hlptim->Init.Trigger.Source |
372 hlptim->Init.Trigger.ActiveEdge |
373 hlptim->Init.Trigger.SampleTime);
374 }
375
376 /* Write to LPTIMx CFGR */
377 hlptim->Instance->CFGR = tmpcfgr;
378
379 /* Configure LPTIM input sources */
380 if (hlptim->Instance == LPTIM1)
381 {
382 /* Check LPTIM Input1 and Input2 sources */
383 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
384 assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
385
386 /* Configure LPTIM Input1 and Input2 sources */
387 hlptim->Instance->OR = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
388 }
389 else
390 {
391 /* Check LPTIM2 Input1 source */
392 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
393
394 /* Configure LPTIM2 Input1 source */
395 hlptim->Instance->OR = hlptim->Init.Input1Source;
396 }
397
398 /* Change the LPTIM state */
399 hlptim->State = HAL_LPTIM_STATE_READY;
400
401 /* Return function status */
402 return HAL_OK;
403 }
404
405 /**
406 * @brief DeInitialize the LPTIM peripheral.
407 * @param hlptim LPTIM handle
408 * @retval HAL status
409 */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)410 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
411 {
412 /* Check the LPTIM handle allocation */
413 if (hlptim == NULL)
414 {
415 return HAL_ERROR;
416 }
417
418 /* Change the LPTIM state */
419 hlptim->State = HAL_LPTIM_STATE_BUSY;
420
421 /* Disable the LPTIM Peripheral Clock */
422 __HAL_LPTIM_DISABLE(hlptim);
423
424 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
425 {
426 return HAL_TIMEOUT;
427 }
428
429 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
430 if (hlptim->MspDeInitCallback == NULL)
431 {
432 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
433 }
434
435 /* DeInit the low level hardware: CLOCK, NVIC.*/
436 hlptim->MspDeInitCallback(hlptim);
437 #else
438 /* DeInit the low level hardware: CLOCK, NVIC.*/
439 HAL_LPTIM_MspDeInit(hlptim);
440 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
441
442 /* Change the LPTIM state */
443 hlptim->State = HAL_LPTIM_STATE_RESET;
444
445 /* Release Lock */
446 __HAL_UNLOCK(hlptim);
447
448 /* Return function status */
449 return HAL_OK;
450 }
451
452 /**
453 * @brief Initialize the LPTIM MSP.
454 * @param hlptim LPTIM handle
455 * @retval None
456 */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)457 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
458 {
459 /* Prevent unused argument(s) compilation warning */
460 UNUSED(hlptim);
461
462 /* NOTE : This function should not be modified, when the callback is needed,
463 the HAL_LPTIM_MspInit could be implemented in the user file
464 */
465 }
466
467 /**
468 * @brief DeInitialize LPTIM MSP.
469 * @param hlptim LPTIM handle
470 * @retval None
471 */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)472 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
473 {
474 /* Prevent unused argument(s) compilation warning */
475 UNUSED(hlptim);
476
477 /* NOTE : This function should not be modified, when the callback is needed,
478 the HAL_LPTIM_MspDeInit could be implemented in the user file
479 */
480 }
481
482 /**
483 * @}
484 */
485
486 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
487 * @brief Start-Stop operation functions.
488 *
489 @verbatim
490 ==============================================================================
491 ##### LPTIM Start Stop operation functions #####
492 ==============================================================================
493 [..] This section provides functions allowing to:
494 (+) Start the PWM mode.
495 (+) Stop the PWM mode.
496 (+) Start the One pulse mode.
497 (+) Stop the One pulse mode.
498 (+) Start the Set once mode.
499 (+) Stop the Set once mode.
500 (+) Start the Encoder mode.
501 (+) Stop the Encoder mode.
502 (+) Start the Timeout mode.
503 (+) Stop the Timeout mode.
504 (+) Start the Counter mode.
505 (+) Stop the Counter mode.
506
507
508 @endverbatim
509 * @{
510 */
511
512 /**
513 * @brief Start the LPTIM PWM generation.
514 * @param hlptim LPTIM handle
515 * @param Period Specifies the Autoreload value.
516 * This parameter must be a value between 0x0001 and 0xFFFF.
517 * @param Pulse Specifies the compare value.
518 * This parameter must be a value between 0x0000 and 0xFFFF.
519 * @retval HAL status
520 */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)521 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
522 {
523 /* Check the parameters */
524 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
525 assert_param(IS_LPTIM_PERIOD(Period));
526 assert_param(IS_LPTIM_PULSE(Pulse));
527
528 /* Set the LPTIM state */
529 hlptim->State = HAL_LPTIM_STATE_BUSY;
530
531 /* Reset WAVE bit to set PWM mode */
532 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
533
534 /* Enable the Peripheral */
535 __HAL_LPTIM_ENABLE(hlptim);
536
537 /* Clear flag */
538 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
539
540 /* Load the period value in the autoreload register */
541 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
542
543 /* Wait for the completion of the write operation to the LPTIM_ARR register */
544 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
545 {
546 return HAL_TIMEOUT;
547 }
548
549 /* Clear flag */
550 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
551
552 /* Load the pulse value in the compare register */
553 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
554
555 /* Wait for the completion of the write operation to the LPTIM_CMP register */
556 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
557 {
558 return HAL_TIMEOUT;
559 }
560
561 /* Start timer in continuous mode */
562 __HAL_LPTIM_START_CONTINUOUS(hlptim);
563
564 /* Change the LPTIM state */
565 hlptim->State = HAL_LPTIM_STATE_READY;
566
567 /* Return function status */
568 return HAL_OK;
569 }
570
571 /**
572 * @brief Stop the LPTIM PWM generation.
573 * @param hlptim LPTIM handle
574 * @retval HAL status
575 */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)576 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
577 {
578 /* Check the parameters */
579 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
580
581 /* Change the LPTIM state */
582 hlptim->State = HAL_LPTIM_STATE_BUSY;
583
584 /* Disable the Peripheral */
585 __HAL_LPTIM_DISABLE(hlptim);
586
587 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
588 {
589 return HAL_TIMEOUT;
590 }
591
592 /* Change the LPTIM state */
593 hlptim->State = HAL_LPTIM_STATE_READY;
594
595 /* Return function status */
596 return HAL_OK;
597 }
598
599 /**
600 * @brief Start the LPTIM PWM generation in interrupt mode.
601 * @param hlptim LPTIM handle
602 * @param Period Specifies the Autoreload value.
603 * This parameter must be a value between 0x0001 and 0xFFFF
604 * @param Pulse Specifies the compare value.
605 * This parameter must be a value between 0x0000 and 0xFFFF
606 * @retval HAL status
607 */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)608 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
609 {
610 /* Check the parameters */
611 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
612 assert_param(IS_LPTIM_PERIOD(Period));
613 assert_param(IS_LPTIM_PULSE(Pulse));
614
615 /* Set the LPTIM state */
616 hlptim->State = HAL_LPTIM_STATE_BUSY;
617
618 /* Reset WAVE bit to set PWM mode */
619 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
620
621 /* Enable the Peripheral */
622 __HAL_LPTIM_ENABLE(hlptim);
623
624 /* Clear flag */
625 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
626
627 /* Load the period value in the autoreload register */
628 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
629
630 /* Wait for the completion of the write operation to the LPTIM_ARR register */
631 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
632 {
633 return HAL_TIMEOUT;
634 }
635
636 /* Clear flag */
637 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
638
639 /* Load the pulse value in the compare register */
640 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
641
642 /* Wait for the completion of the write operation to the LPTIM_CMP register */
643 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
644 {
645 return HAL_TIMEOUT;
646 }
647
648 /* Disable the Peripheral */
649 __HAL_LPTIM_DISABLE(hlptim);
650
651 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
652 {
653 return HAL_TIMEOUT;
654 }
655
656 /* Enable Autoreload write complete interrupt */
657 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
658
659 /* Enable Compare write complete interrupt */
660 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
661
662 /* Enable Autoreload match interrupt */
663 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
664
665 /* Enable Compare match interrupt */
666 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
667
668 /* If external trigger source is used, then enable external trigger interrupt */
669 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
670 {
671 /* Enable external trigger interrupt */
672 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
673 }
674 #if defined(LPTIM_RCR_REP)
675
676 /* Enable Rep Update Ok interrupt */
677 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
678
679 /* Enable Update Event interrupt */
680 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
681 #endif
682
683 /* Enable the Peripheral */
684 __HAL_LPTIM_ENABLE(hlptim);
685
686 /* Start timer in continuous mode */
687 __HAL_LPTIM_START_CONTINUOUS(hlptim);
688
689 /* Change the LPTIM state */
690 hlptim->State = HAL_LPTIM_STATE_READY;
691
692 /* Return function status */
693 return HAL_OK;
694 }
695
696 /**
697 * @brief Stop the LPTIM PWM generation in interrupt mode.
698 * @param hlptim LPTIM handle
699 * @retval HAL status
700 */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)701 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
702 {
703 /* Check the parameters */
704 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
705
706 /* Change the LPTIM state */
707 hlptim->State = HAL_LPTIM_STATE_BUSY;
708
709 /* Disable the Peripheral */
710 __HAL_LPTIM_DISABLE(hlptim);
711
712 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
713 {
714 return HAL_TIMEOUT;
715 }
716
717 /* Disable Autoreload write complete interrupt */
718 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
719
720 /* Disable Compare write complete interrupt */
721 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
722
723 /* Disable Autoreload match interrupt */
724 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
725
726 /* Disable Compare match interrupt */
727 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
728
729 /* If external trigger source is used, then disable external trigger interrupt */
730 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
731 {
732 /* Disable external trigger interrupt */
733 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
734 }
735 #if defined(LPTIM_RCR_REP)
736
737 /* Enable Rep Update Ok interrupt */
738 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
739
740 /* Enable Update Event interrupt */
741 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
742 #endif
743
744 /* Change the LPTIM state */
745 hlptim->State = HAL_LPTIM_STATE_READY;
746
747 /* Return function status */
748 return HAL_OK;
749 }
750
751 /**
752 * @brief Start the LPTIM One pulse generation.
753 * @param hlptim LPTIM handle
754 * @param Period Specifies the Autoreload value.
755 * This parameter must be a value between 0x0001 and 0xFFFF.
756 * @param Pulse Specifies the compare value.
757 * This parameter must be a value between 0x0000 and 0xFFFF.
758 * @retval HAL status
759 */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)760 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
761 {
762 /* Check the parameters */
763 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
764 assert_param(IS_LPTIM_PERIOD(Period));
765 assert_param(IS_LPTIM_PULSE(Pulse));
766
767 /* Set the LPTIM state */
768 hlptim->State = HAL_LPTIM_STATE_BUSY;
769
770 /* Reset WAVE bit to set one pulse mode */
771 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
772
773 /* Enable the Peripheral */
774 __HAL_LPTIM_ENABLE(hlptim);
775
776 /* Clear flag */
777 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
778
779 /* Load the period value in the autoreload register */
780 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
781
782 /* Wait for the completion of the write operation to the LPTIM_ARR register */
783 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
784 {
785 return HAL_TIMEOUT;
786 }
787
788 /* Clear flag */
789 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
790
791 /* Load the pulse value in the compare register */
792 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
793
794 /* Wait for the completion of the write operation to the LPTIM_CMP register */
795 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
796 {
797 return HAL_TIMEOUT;
798 }
799
800 /* Start timer in single (one shot) mode */
801 __HAL_LPTIM_START_SINGLE(hlptim);
802
803 /* Change the LPTIM state */
804 hlptim->State = HAL_LPTIM_STATE_READY;
805
806 /* Return function status */
807 return HAL_OK;
808 }
809
810 /**
811 * @brief Stop the LPTIM One pulse generation.
812 * @param hlptim LPTIM handle
813 * @retval HAL status
814 */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)815 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
816 {
817 /* Check the parameters */
818 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
819
820 /* Set the LPTIM state */
821 hlptim->State = HAL_LPTIM_STATE_BUSY;
822
823 /* Disable the Peripheral */
824 __HAL_LPTIM_DISABLE(hlptim);
825
826 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
827 {
828 return HAL_TIMEOUT;
829 }
830
831 /* Change the LPTIM state */
832 hlptim->State = HAL_LPTIM_STATE_READY;
833
834 /* Return function status */
835 return HAL_OK;
836 }
837
838 /**
839 * @brief Start the LPTIM One pulse generation in interrupt mode.
840 * @param hlptim LPTIM handle
841 * @param Period Specifies the Autoreload value.
842 * This parameter must be a value between 0x0001 and 0xFFFF.
843 * @param Pulse Specifies the compare value.
844 * This parameter must be a value between 0x0000 and 0xFFFF.
845 * @retval HAL status
846 */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)847 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
848 {
849 /* Check the parameters */
850 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
851 assert_param(IS_LPTIM_PERIOD(Period));
852 assert_param(IS_LPTIM_PULSE(Pulse));
853
854 /* Set the LPTIM state */
855 hlptim->State = HAL_LPTIM_STATE_BUSY;
856
857 /* Reset WAVE bit to set one pulse mode */
858 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
859
860 /* Enable the Peripheral */
861 __HAL_LPTIM_ENABLE(hlptim);
862
863 /* Clear flag */
864 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
865
866 /* Load the period value in the autoreload register */
867 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
868
869 /* Wait for the completion of the write operation to the LPTIM_ARR register */
870 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
871 {
872 return HAL_TIMEOUT;
873 }
874
875 /* Clear flag */
876 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
877
878 /* Load the pulse value in the compare register */
879 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
880
881 /* Wait for the completion of the write operation to the LPTIM_CMP register */
882 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
883 {
884 return HAL_TIMEOUT;
885 }
886
887 /* Disable the Peripheral */
888 __HAL_LPTIM_DISABLE(hlptim);
889
890 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
891 {
892 return HAL_TIMEOUT;
893 }
894
895 /* Enable Autoreload write complete interrupt */
896 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
897
898 /* Enable Compare write complete interrupt */
899 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
900
901 /* Enable Autoreload match interrupt */
902 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
903
904 /* Enable Compare match interrupt */
905 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
906
907 /* If external trigger source is used, then enable external trigger interrupt */
908 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
909 {
910 /* Enable external trigger interrupt */
911 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
912 }
913 #if defined(LPTIM_RCR_REP)
914
915 /* Enable Rep Update Ok interrupt */
916 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
917
918 /* Enable Update Event interrupt */
919 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
920 #endif
921
922 /* Enable the Peripheral */
923 __HAL_LPTIM_ENABLE(hlptim);
924
925 /* Start timer in single (one shot) mode */
926 __HAL_LPTIM_START_SINGLE(hlptim);
927
928 /* Change the LPTIM state */
929 hlptim->State = HAL_LPTIM_STATE_READY;
930
931 /* Return function status */
932 return HAL_OK;
933 }
934
935 /**
936 * @brief Stop the LPTIM One pulse generation in interrupt mode.
937 * @param hlptim LPTIM handle
938 * @retval HAL status
939 */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)940 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
941 {
942 /* Check the parameters */
943 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
944
945 /* Set the LPTIM state */
946 hlptim->State = HAL_LPTIM_STATE_BUSY;
947
948
949 /* Disable the Peripheral */
950 __HAL_LPTIM_DISABLE(hlptim);
951
952 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
953 {
954 return HAL_TIMEOUT;
955 }
956
957 /* Disable Autoreload write complete interrupt */
958 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
959
960 /* Disable Compare write complete interrupt */
961 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
962
963 /* Disable Autoreload match interrupt */
964 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
965
966 /* Disable Compare match interrupt */
967 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
968
969 /* If external trigger source is used, then disable external trigger interrupt */
970 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
971 {
972 /* Disable external trigger interrupt */
973 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
974 }
975 #if defined(LPTIM_RCR_REP)
976
977 /* Enable Rep Update Ok interrupt */
978 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
979
980 /* Enable Update Event interrupt */
981 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
982 #endif
983
984 /* Change the LPTIM state */
985 hlptim->State = HAL_LPTIM_STATE_READY;
986
987 /* Return function status */
988 return HAL_OK;
989 }
990
991 /**
992 * @brief Start the LPTIM in Set once mode.
993 * @param hlptim LPTIM handle
994 * @param Period Specifies the Autoreload value.
995 * This parameter must be a value between 0x0001 and 0xFFFF.
996 * @param Pulse Specifies the compare value.
997 * This parameter must be a value between 0x0000 and 0xFFFF.
998 * @retval HAL status
999 */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)1000 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1001 {
1002 /* Check the parameters */
1003 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1004 assert_param(IS_LPTIM_PERIOD(Period));
1005 assert_param(IS_LPTIM_PULSE(Pulse));
1006
1007 /* Set the LPTIM state */
1008 hlptim->State = HAL_LPTIM_STATE_BUSY;
1009
1010 /* Set WAVE bit to enable the set once mode */
1011 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1012
1013 /* Enable the Peripheral */
1014 __HAL_LPTIM_ENABLE(hlptim);
1015
1016 /* Clear flag */
1017 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1018
1019 /* Load the period value in the autoreload register */
1020 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1021
1022 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1023 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1024 {
1025 return HAL_TIMEOUT;
1026 }
1027
1028 /* Clear flag */
1029 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1030
1031 /* Load the pulse value in the compare register */
1032 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1033
1034 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1035 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1036 {
1037 return HAL_TIMEOUT;
1038 }
1039
1040 /* Start timer in single (one shot) mode */
1041 __HAL_LPTIM_START_SINGLE(hlptim);
1042
1043 /* Change the LPTIM state */
1044 hlptim->State = HAL_LPTIM_STATE_READY;
1045
1046 /* Return function status */
1047 return HAL_OK;
1048 }
1049
1050 /**
1051 * @brief Stop the LPTIM Set once mode.
1052 * @param hlptim LPTIM handle
1053 * @retval HAL status
1054 */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)1055 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
1056 {
1057 /* Check the parameters */
1058 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1059
1060 /* Set the LPTIM state */
1061 hlptim->State = HAL_LPTIM_STATE_BUSY;
1062
1063 /* Disable the Peripheral */
1064 __HAL_LPTIM_DISABLE(hlptim);
1065
1066 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1067 {
1068 return HAL_TIMEOUT;
1069 }
1070
1071 /* Change the LPTIM state */
1072 hlptim->State = HAL_LPTIM_STATE_READY;
1073
1074 /* Return function status */
1075 return HAL_OK;
1076 }
1077
1078 /**
1079 * @brief Start the LPTIM Set once mode in interrupt mode.
1080 * @param hlptim LPTIM handle
1081 * @param Period Specifies the Autoreload value.
1082 * This parameter must be a value between 0x0000 and 0xFFFF.
1083 * @param Pulse Specifies the compare value.
1084 * This parameter must be a value between 0x0000 and 0xFFFF.
1085 * @retval HAL status
1086 */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)1087 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1088 {
1089 /* Check the parameters */
1090 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1091 assert_param(IS_LPTIM_PERIOD(Period));
1092 assert_param(IS_LPTIM_PULSE(Pulse));
1093
1094 /* Set the LPTIM state */
1095 hlptim->State = HAL_LPTIM_STATE_BUSY;
1096
1097 /* Set WAVE bit to enable the set once mode */
1098 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1099
1100 /* Enable the Peripheral */
1101 __HAL_LPTIM_ENABLE(hlptim);
1102
1103 /* Clear flag */
1104 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1105
1106 /* Load the period value in the autoreload register */
1107 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1108
1109 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1110 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1111 {
1112 return HAL_TIMEOUT;
1113 }
1114
1115 /* Clear flag */
1116 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1117
1118 /* Load the pulse value in the compare register */
1119 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1120
1121 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1122 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1123 {
1124 return HAL_TIMEOUT;
1125 }
1126
1127 /* Disable the Peripheral */
1128 __HAL_LPTIM_DISABLE(hlptim);
1129
1130 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1131 {
1132 return HAL_TIMEOUT;
1133 }
1134
1135 /* Enable Autoreload write complete interrupt */
1136 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1137
1138 /* Enable Compare write complete interrupt */
1139 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1140
1141 /* Enable Autoreload match interrupt */
1142 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1143
1144 /* Enable Compare match interrupt */
1145 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1146
1147 /* If external trigger source is used, then enable external trigger interrupt */
1148 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1149 {
1150 /* Enable external trigger interrupt */
1151 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1152 }
1153
1154 /* Enable the Peripheral */
1155 __HAL_LPTIM_ENABLE(hlptim);
1156
1157 /* Start timer in single (one shot) mode */
1158 __HAL_LPTIM_START_SINGLE(hlptim);
1159
1160 /* Change the LPTIM state */
1161 hlptim->State = HAL_LPTIM_STATE_READY;
1162
1163 /* Return function status */
1164 return HAL_OK;
1165 }
1166
1167 /**
1168 * @brief Stop the LPTIM Set once mode in interrupt mode.
1169 * @param hlptim LPTIM handle
1170 * @retval HAL status
1171 */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1172 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1173 {
1174 /* Check the parameters */
1175 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1176
1177 /* Set the LPTIM state */
1178 hlptim->State = HAL_LPTIM_STATE_BUSY;
1179
1180 /* Disable the Peripheral */
1181 __HAL_LPTIM_DISABLE(hlptim);
1182
1183 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1184 {
1185 return HAL_TIMEOUT;
1186 }
1187
1188 /* Disable Autoreload write complete interrupt */
1189 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1190
1191 /* Disable Compare write complete interrupt */
1192 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1193
1194 /* Disable Autoreload match interrupt */
1195 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1196
1197 /* Disable Compare match interrupt */
1198 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1199
1200 /* If external trigger source is used, then disable external trigger interrupt */
1201 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1202 {
1203 /* Disable external trigger interrupt */
1204 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1205 }
1206
1207 /* Change the LPTIM state */
1208 hlptim->State = HAL_LPTIM_STATE_READY;
1209
1210 /* Return function status */
1211 return HAL_OK;
1212 }
1213
1214 /**
1215 * @brief Start the Encoder interface.
1216 * @param hlptim LPTIM handle
1217 * @param Period Specifies the Autoreload value.
1218 * This parameter must be a value between 0x0001 and 0xFFFF.
1219 * @retval HAL status
1220 */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1221 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1222 {
1223 uint32_t tmpcfgr;
1224
1225 /* Check the parameters */
1226 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1227 assert_param(IS_LPTIM_PERIOD(Period));
1228 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1229 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1230 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1231
1232 /* Set the LPTIM state */
1233 hlptim->State = HAL_LPTIM_STATE_BUSY;
1234
1235 /* Get the LPTIMx CFGR value */
1236 tmpcfgr = hlptim->Instance->CFGR;
1237
1238 /* Clear CKPOL bits */
1239 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1240
1241 /* Set Input polarity */
1242 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1243
1244 /* Write to LPTIMx CFGR */
1245 hlptim->Instance->CFGR = tmpcfgr;
1246
1247 /* Set ENC bit to enable the encoder interface */
1248 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1249
1250 /* Enable the Peripheral */
1251 __HAL_LPTIM_ENABLE(hlptim);
1252
1253 /* Clear flag */
1254 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1255
1256 /* Load the period value in the autoreload register */
1257 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1258
1259 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1260 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1261 {
1262 return HAL_TIMEOUT;
1263 }
1264
1265 /* Start timer in continuous mode */
1266 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1267
1268 /* Change the LPTIM state */
1269 hlptim->State = HAL_LPTIM_STATE_READY;
1270
1271 /* Return function status */
1272 return HAL_OK;
1273 }
1274
1275 /**
1276 * @brief Stop the Encoder interface.
1277 * @param hlptim LPTIM handle
1278 * @retval HAL status
1279 */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1280 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1281 {
1282 /* Check the parameters */
1283 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1284
1285 /* Set the LPTIM state */
1286 hlptim->State = HAL_LPTIM_STATE_BUSY;
1287
1288 /* Disable the Peripheral */
1289 __HAL_LPTIM_DISABLE(hlptim);
1290
1291 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1292 {
1293 return HAL_TIMEOUT;
1294 }
1295
1296 /* Reset ENC bit to disable the encoder interface */
1297 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1298
1299 /* Change the LPTIM state */
1300 hlptim->State = HAL_LPTIM_STATE_READY;
1301
1302 /* Return function status */
1303 return HAL_OK;
1304 }
1305
1306 /**
1307 * @brief Start the Encoder interface in interrupt mode.
1308 * @param hlptim LPTIM handle
1309 * @param Period Specifies the Autoreload value.
1310 * This parameter must be a value between 0x0000 and 0xFFFF.
1311 * @retval HAL status
1312 */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1313 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1314 {
1315 uint32_t tmpcfgr;
1316
1317 /* Check the parameters */
1318 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1319 assert_param(IS_LPTIM_PERIOD(Period));
1320 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1321 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1322 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1323
1324 /* Set the LPTIM state */
1325 hlptim->State = HAL_LPTIM_STATE_BUSY;
1326
1327 /* Configure edge sensitivity for encoder mode */
1328 /* Get the LPTIMx CFGR value */
1329 tmpcfgr = hlptim->Instance->CFGR;
1330
1331 /* Clear CKPOL bits */
1332 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1333
1334 /* Set Input polarity */
1335 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1336
1337 /* Write to LPTIMx CFGR */
1338 hlptim->Instance->CFGR = tmpcfgr;
1339
1340 /* Set ENC bit to enable the encoder interface */
1341 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1342
1343 /* Enable the Peripheral */
1344 __HAL_LPTIM_ENABLE(hlptim);
1345
1346 /* Clear flag */
1347 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1348
1349 /* Load the period value in the autoreload register */
1350 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1351
1352 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1353 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1354 {
1355 return HAL_TIMEOUT;
1356 }
1357
1358 /* Disable the Peripheral */
1359 __HAL_LPTIM_DISABLE(hlptim);
1360
1361 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1362 {
1363 return HAL_TIMEOUT;
1364 }
1365
1366 /* Enable "switch to down direction" interrupt */
1367 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1368
1369 /* Enable "switch to up direction" interrupt */
1370 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1371
1372 /* Enable the Peripheral */
1373 __HAL_LPTIM_ENABLE(hlptim);
1374
1375 /* Start timer in continuous mode */
1376 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1377
1378 /* Change the LPTIM state */
1379 hlptim->State = HAL_LPTIM_STATE_READY;
1380
1381 /* Return function status */
1382 return HAL_OK;
1383 }
1384
1385 /**
1386 * @brief Stop the Encoder interface in interrupt mode.
1387 * @param hlptim LPTIM handle
1388 * @retval HAL status
1389 */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1390 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1391 {
1392 /* Check the parameters */
1393 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1394
1395 /* Set the LPTIM state */
1396 hlptim->State = HAL_LPTIM_STATE_BUSY;
1397
1398 /* Disable the Peripheral */
1399 __HAL_LPTIM_DISABLE(hlptim);
1400
1401 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1402 {
1403 return HAL_TIMEOUT;
1404 }
1405
1406 /* Reset ENC bit to disable the encoder interface */
1407 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1408
1409 /* Disable "switch to down direction" interrupt */
1410 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1411
1412 /* Disable "switch to up direction" interrupt */
1413 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1414
1415 /* Change the LPTIM state */
1416 hlptim->State = HAL_LPTIM_STATE_READY;
1417
1418 /* Return function status */
1419 return HAL_OK;
1420 }
1421
1422 /**
1423 * @brief Start the Timeout function.
1424 * @note The first trigger event will start the timer, any successive
1425 * trigger event will reset the counter and the timer restarts.
1426 * @param hlptim LPTIM handle
1427 * @param Period Specifies the Autoreload value.
1428 * This parameter must be a value between 0x0001 and 0xFFFF.
1429 * @param Timeout Specifies the TimeOut value to reset the counter.
1430 * This parameter must be a value between 0x0000 and 0xFFFF.
1431 * @retval HAL status
1432 */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1433 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1434 {
1435 /* Check the parameters */
1436 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1437 assert_param(IS_LPTIM_PERIOD(Period));
1438 assert_param(IS_LPTIM_PULSE(Timeout));
1439
1440 /* Set the LPTIM state */
1441 hlptim->State = HAL_LPTIM_STATE_BUSY;
1442
1443 /* Set TIMOUT bit to enable the timeout function */
1444 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1445
1446 /* Enable the Peripheral */
1447 __HAL_LPTIM_ENABLE(hlptim);
1448
1449 /* Clear flag */
1450 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1451
1452 /* Load the period value in the autoreload register */
1453 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1454
1455 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1456 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1457 {
1458 return HAL_TIMEOUT;
1459 }
1460
1461 /* Clear flag */
1462 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1463
1464 /* Load the Timeout value in the compare register */
1465 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1466
1467 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1468 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1469 {
1470 return HAL_TIMEOUT;
1471 }
1472
1473 /* Start timer in continuous mode */
1474 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1475
1476 /* Change the LPTIM state */
1477 hlptim->State = HAL_LPTIM_STATE_READY;
1478
1479 /* Return function status */
1480 return HAL_OK;
1481 }
1482
1483 /**
1484 * @brief Stop the Timeout function.
1485 * @param hlptim LPTIM handle
1486 * @retval HAL status
1487 */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1488 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1489 {
1490 /* Check the parameters */
1491 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1492
1493 /* Set the LPTIM state */
1494 hlptim->State = HAL_LPTIM_STATE_BUSY;
1495
1496 /* Disable the Peripheral */
1497 __HAL_LPTIM_DISABLE(hlptim);
1498
1499 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1500 {
1501 return HAL_TIMEOUT;
1502 }
1503
1504 /* Reset TIMOUT bit to enable the timeout function */
1505 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1506
1507 /* Change the LPTIM state */
1508 hlptim->State = HAL_LPTIM_STATE_READY;
1509
1510 /* Return function status */
1511 return HAL_OK;
1512 }
1513
1514 /**
1515 * @brief Start the Timeout function in interrupt mode.
1516 * @note The first trigger event will start the timer, any successive
1517 * trigger event will reset the counter and the timer restarts.
1518 * @param hlptim LPTIM handle
1519 * @param Period Specifies the Autoreload value.
1520 * This parameter must be a value between 0x0001 and 0xFFFF.
1521 * @param Timeout Specifies the TimeOut value to reset the counter.
1522 * This parameter must be a value between 0x0000 and 0xFFFF.
1523 * @retval HAL status
1524 */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1525 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1526 {
1527 /* Check the parameters */
1528 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1529 assert_param(IS_LPTIM_PERIOD(Period));
1530 assert_param(IS_LPTIM_PULSE(Timeout));
1531
1532 /* Set the LPTIM state */
1533 hlptim->State = HAL_LPTIM_STATE_BUSY;
1534
1535 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1536 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1537
1538 /* Set TIMOUT bit to enable the timeout function */
1539 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1540
1541 /* Enable the Peripheral */
1542 __HAL_LPTIM_ENABLE(hlptim);
1543
1544 /* Clear flag */
1545 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1546
1547 /* Load the period value in the autoreload register */
1548 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1549
1550 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1551 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1552 {
1553 return HAL_TIMEOUT;
1554 }
1555
1556 /* Clear flag */
1557 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1558
1559 /* Load the Timeout value in the compare register */
1560 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1561
1562 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1563 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1564 {
1565 return HAL_TIMEOUT;
1566 }
1567
1568 /* Disable the Peripheral */
1569 __HAL_LPTIM_DISABLE(hlptim);
1570
1571 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1572 {
1573 return HAL_TIMEOUT;
1574 }
1575
1576 /* Enable Compare match interrupt */
1577 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1578
1579 /* Enable the Peripheral */
1580 __HAL_LPTIM_ENABLE(hlptim);
1581
1582 /* Start timer in continuous mode */
1583 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1584
1585 /* Change the LPTIM state */
1586 hlptim->State = HAL_LPTIM_STATE_READY;
1587
1588 /* Return function status */
1589 return HAL_OK;
1590 }
1591
1592 /**
1593 * @brief Stop the Timeout function in interrupt mode.
1594 * @param hlptim LPTIM handle
1595 * @retval HAL status
1596 */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1597 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1598 {
1599 /* Check the parameters */
1600 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1601
1602
1603 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1604 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1605
1606 /* Set the LPTIM state */
1607 hlptim->State = HAL_LPTIM_STATE_BUSY;
1608
1609 /* Disable the Peripheral */
1610 __HAL_LPTIM_DISABLE(hlptim);
1611
1612 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1613 {
1614 return HAL_TIMEOUT;
1615 }
1616
1617 /* Reset TIMOUT bit to enable the timeout function */
1618 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1619
1620 /* Disable Compare match interrupt */
1621 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1622
1623 /* Change the LPTIM state */
1624 hlptim->State = HAL_LPTIM_STATE_READY;
1625
1626 /* Return function status */
1627 return HAL_OK;
1628 }
1629
1630 /**
1631 * @brief Start the Counter mode.
1632 * @param hlptim LPTIM handle
1633 * @param Period Specifies the Autoreload value.
1634 * This parameter must be a value between 0x0001 and 0xFFFF.
1635 * @retval HAL status
1636 */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1637 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1638 {
1639 /* Check the parameters */
1640 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1641 assert_param(IS_LPTIM_PERIOD(Period));
1642
1643 /* Set the LPTIM state */
1644 hlptim->State = HAL_LPTIM_STATE_BUSY;
1645
1646 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1647 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1648 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1649 {
1650 /* Check if clock is prescaled */
1651 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1652 /* Set clock prescaler to 0 */
1653 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1654 }
1655
1656 /* Enable the Peripheral */
1657 __HAL_LPTIM_ENABLE(hlptim);
1658
1659 /* Clear flag */
1660 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1661
1662 /* Load the period value in the autoreload register */
1663 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1664
1665 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1666 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1667 {
1668 return HAL_TIMEOUT;
1669 }
1670
1671 /* Start timer in continuous mode */
1672 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1673
1674 /* Change the LPTIM state */
1675 hlptim->State = HAL_LPTIM_STATE_READY;
1676
1677 /* Return function status */
1678 return HAL_OK;
1679 }
1680
1681 /**
1682 * @brief Stop the Counter mode.
1683 * @param hlptim LPTIM handle
1684 * @retval HAL status
1685 */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1686 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1687 {
1688 /* Check the parameters */
1689 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1690
1691 /* Set the LPTIM state */
1692 hlptim->State = HAL_LPTIM_STATE_BUSY;
1693
1694 /* Disable the Peripheral */
1695 __HAL_LPTIM_DISABLE(hlptim);
1696
1697 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1698 {
1699 return HAL_TIMEOUT;
1700 }
1701
1702 /* Change the LPTIM state */
1703 hlptim->State = HAL_LPTIM_STATE_READY;
1704
1705 /* Return function status */
1706 return HAL_OK;
1707 }
1708
1709 /**
1710 * @brief Start the Counter mode in interrupt mode.
1711 * @param hlptim LPTIM handle
1712 * @param Period Specifies the Autoreload value.
1713 * This parameter must be a value between 0x0001 and 0xFFFF.
1714 * @retval HAL status
1715 */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1716 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1717 {
1718 /* Check the parameters */
1719 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1720 assert_param(IS_LPTIM_PERIOD(Period));
1721
1722 /* Set the LPTIM state */
1723 hlptim->State = HAL_LPTIM_STATE_BUSY;
1724
1725 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1726 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1727
1728 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1729 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1730 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1731 {
1732 /* Check if clock is prescaled */
1733 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1734 /* Set clock prescaler to 0 */
1735 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1736 }
1737
1738 /* Enable the Peripheral */
1739 __HAL_LPTIM_ENABLE(hlptim);
1740
1741 /* Clear flag */
1742 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1743
1744 /* Load the period value in the autoreload register */
1745 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1746
1747 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1748 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1749 {
1750 return HAL_TIMEOUT;
1751 }
1752
1753 /* Disable the Peripheral */
1754 __HAL_LPTIM_DISABLE(hlptim);
1755
1756 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1757 {
1758 return HAL_TIMEOUT;
1759 }
1760
1761 /* Enable Autoreload write complete interrupt */
1762 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1763
1764 /* Enable Autoreload match interrupt */
1765 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1766
1767 #if defined(LPTIM_RCR_REP)
1768 /* Enable Rep Update Ok interrupt */
1769 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
1770
1771 /* Enable Update Event interrupt */
1772 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
1773
1774 #endif
1775 /* Enable the Peripheral */
1776 __HAL_LPTIM_ENABLE(hlptim);
1777
1778 /* Start timer in continuous mode */
1779 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1780
1781 /* Change the LPTIM state */
1782 hlptim->State = HAL_LPTIM_STATE_READY;
1783
1784 /* Return function status */
1785 return HAL_OK;
1786 }
1787
1788 /**
1789 * @brief Stop the Counter mode in interrupt mode.
1790 * @param hlptim LPTIM handle
1791 * @retval HAL status
1792 */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1793 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1794 {
1795 /* Check the parameters */
1796 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1797
1798
1799 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1800 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1801
1802 /* Set the LPTIM state */
1803 hlptim->State = HAL_LPTIM_STATE_BUSY;
1804
1805 /* Disable the Peripheral */
1806 __HAL_LPTIM_DISABLE(hlptim);
1807
1808 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1809 {
1810 return HAL_TIMEOUT;
1811 }
1812
1813 /* Disable Autoreload write complete interrupt */
1814 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1815
1816 /* Disable Autoreload match interrupt */
1817 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1818 #if defined(LPTIM_RCR_REP)
1819
1820 /* Disable Rep Update Ok interrupt */
1821 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
1822
1823 /* Disable Update Event interrupt */
1824 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
1825 #endif
1826 /* Change the LPTIM state */
1827 hlptim->State = HAL_LPTIM_STATE_READY;
1828
1829 /* Return function status */
1830 return HAL_OK;
1831 }
1832
1833 /**
1834 * @}
1835 */
1836
1837 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1838 * @brief Read operation functions.
1839 *
1840 @verbatim
1841 ==============================================================================
1842 ##### LPTIM Read operation functions #####
1843 ==============================================================================
1844 [..] This section provides LPTIM Reading functions.
1845 (+) Read the counter value.
1846 (+) Read the period (Auto-reload) value.
1847 (+) Read the pulse (Compare)value.
1848 @endverbatim
1849 * @{
1850 */
1851
1852 /**
1853 * @brief Return the current counter value.
1854 * @param hlptim LPTIM handle
1855 * @retval Counter value.
1856 */
HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef * hlptim)1857 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim)
1858 {
1859 /* Check the parameters */
1860 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1861
1862 return (hlptim->Instance->CNT);
1863 }
1864
1865 /**
1866 * @brief Return the current Autoreload (Period) value.
1867 * @param hlptim LPTIM handle
1868 * @retval Autoreload value.
1869 */
HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef * hlptim)1870 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim)
1871 {
1872 /* Check the parameters */
1873 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1874
1875 return (hlptim->Instance->ARR);
1876 }
1877
1878 /**
1879 * @brief Return the current Compare (Pulse) value.
1880 * @param hlptim LPTIM handle
1881 * @retval Compare value.
1882 */
HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef * hlptim)1883 uint32_t HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef *hlptim)
1884 {
1885 /* Check the parameters */
1886 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1887
1888 return (hlptim->Instance->CMP);
1889 }
1890
1891 /**
1892 * @}
1893 */
1894
1895 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1896 * @brief LPTIM IRQ handler.
1897 *
1898 @verbatim
1899 ==============================================================================
1900 ##### LPTIM IRQ handler and callbacks #####
1901 ==============================================================================
1902 [..] This section provides LPTIM IRQ handler and callback functions called within
1903 the IRQ handler:
1904 (+) LPTIM interrupt request handler
1905 (+) Compare match Callback
1906 (+) Auto-reload match Callback
1907 (+) External trigger event detection Callback
1908 (+) Compare register write complete Callback
1909 (+) Auto-reload register write complete Callback
1910 (+) Up-counting direction change Callback
1911 (+) Down-counting direction change Callback
1912
1913 @endverbatim
1914 * @{
1915 */
1916
1917 /**
1918 * @brief Handle LPTIM interrupt request.
1919 * @param hlptim LPTIM handle
1920 * @retval None
1921 */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1922 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1923 {
1924 /* Compare match interrupt */
1925 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1926 {
1927 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1928 {
1929 /* Clear Compare match flag */
1930 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1931
1932 /* Compare match Callback */
1933 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1934 hlptim->CompareMatchCallback(hlptim);
1935 #else
1936 HAL_LPTIM_CompareMatchCallback(hlptim);
1937 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1938 }
1939 }
1940
1941 /* Autoreload match interrupt */
1942 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1943 {
1944 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1945 {
1946 /* Clear Autoreload match flag */
1947 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1948
1949 /* Autoreload match Callback */
1950 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1951 hlptim->AutoReloadMatchCallback(hlptim);
1952 #else
1953 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1954 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1955 }
1956 }
1957
1958 /* Trigger detected interrupt */
1959 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1960 {
1961 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1962 {
1963 /* Clear Trigger detected flag */
1964 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1965
1966 /* Trigger detected callback */
1967 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1968 hlptim->TriggerCallback(hlptim);
1969 #else
1970 HAL_LPTIM_TriggerCallback(hlptim);
1971 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1972 }
1973 }
1974
1975 /* Compare write interrupt */
1976 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1977 {
1978 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1979 {
1980 /* Clear Compare write flag */
1981 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1982
1983 /* Compare write Callback */
1984 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1985 hlptim->CompareWriteCallback(hlptim);
1986 #else
1987 HAL_LPTIM_CompareWriteCallback(hlptim);
1988 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1989 }
1990 }
1991
1992 /* Autoreload write interrupt */
1993 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1994 {
1995 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1996 {
1997 /* Clear Autoreload write flag */
1998 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1999
2000 /* Autoreload write Callback */
2001 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2002 hlptim->AutoReloadWriteCallback(hlptim);
2003 #else
2004 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
2005 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2006 }
2007 }
2008
2009 /* Direction counter changed from Down to Up interrupt */
2010 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
2011 {
2012 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
2013 {
2014 /* Clear Direction counter changed from Down to Up flag */
2015 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
2016
2017 /* Direction counter changed from Down to Up Callback */
2018 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2019 hlptim->DirectionUpCallback(hlptim);
2020 #else
2021 HAL_LPTIM_DirectionUpCallback(hlptim);
2022 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2023 }
2024 }
2025
2026 /* Direction counter changed from Up to Down interrupt */
2027 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
2028 {
2029 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
2030 {
2031 /* Clear Direction counter changed from Up to Down flag */
2032 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
2033
2034 /* Direction counter changed from Up to Down Callback */
2035 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2036 hlptim->DirectionDownCallback(hlptim);
2037 #else
2038 HAL_LPTIM_DirectionDownCallback(hlptim);
2039 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2040 }
2041 }
2042 #if defined(LPTIM_RCR_REP)
2043
2044 /* Repetition counter underflowed (or contains zero) and the LPTIM counter
2045 overflowed */
2046 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UPDATE) != RESET)
2047 {
2048 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UPDATE) != RESET)
2049 {
2050 /* Clear update event flag */
2051 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UPDATE);
2052
2053 /* Update event Callback */
2054 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2055 hlptim->UpdateEventCallback(hlptim);
2056 #else
2057 HAL_LPTIM_UpdateEventCallback(hlptim);
2058 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2059 }
2060 }
2061
2062 /* Successful APB bus write to repetition counter register */
2063 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_REPOK) != RESET)
2064 {
2065 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_REPOK) != RESET)
2066 {
2067 /* Clear successful APB bus write to repetition counter flag */
2068 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
2069
2070 /* Successful APB bus write to repetition counter Callback */
2071 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2072 hlptim->RepCounterWriteCallback(hlptim);
2073 #else
2074 HAL_LPTIM_RepCounterWriteCallback(hlptim);
2075 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2076 }
2077 }
2078 #endif
2079 }
2080
2081 /**
2082 * @brief Compare match callback in non-blocking mode.
2083 * @param hlptim LPTIM handle
2084 * @retval None
2085 */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)2086 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
2087 {
2088 /* Prevent unused argument(s) compilation warning */
2089 UNUSED(hlptim);
2090
2091 /* NOTE : This function should not be modified, when the callback is needed,
2092 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
2093 */
2094 }
2095
2096 /**
2097 * @brief Autoreload match callback in non-blocking mode.
2098 * @param hlptim LPTIM handle
2099 * @retval None
2100 */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)2101 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
2102 {
2103 /* Prevent unused argument(s) compilation warning */
2104 UNUSED(hlptim);
2105
2106 /* NOTE : This function should not be modified, when the callback is needed,
2107 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
2108 */
2109 }
2110
2111 /**
2112 * @brief Trigger detected callback in non-blocking mode.
2113 * @param hlptim LPTIM handle
2114 * @retval None
2115 */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)2116 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
2117 {
2118 /* Prevent unused argument(s) compilation warning */
2119 UNUSED(hlptim);
2120
2121 /* NOTE : This function should not be modified, when the callback is needed,
2122 the HAL_LPTIM_TriggerCallback could be implemented in the user file
2123 */
2124 }
2125
2126 /**
2127 * @brief Compare write callback in non-blocking mode.
2128 * @param hlptim LPTIM handle
2129 * @retval None
2130 */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)2131 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
2132 {
2133 /* Prevent unused argument(s) compilation warning */
2134 UNUSED(hlptim);
2135
2136 /* NOTE : This function should not be modified, when the callback is needed,
2137 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
2138 */
2139 }
2140
2141 /**
2142 * @brief Autoreload write callback in non-blocking mode.
2143 * @param hlptim LPTIM handle
2144 * @retval None
2145 */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)2146 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2147 {
2148 /* Prevent unused argument(s) compilation warning */
2149 UNUSED(hlptim);
2150
2151 /* NOTE : This function should not be modified, when the callback is needed,
2152 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2153 */
2154 }
2155
2156 /**
2157 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2158 * @param hlptim LPTIM handle
2159 * @retval None
2160 */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2161 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2162 {
2163 /* Prevent unused argument(s) compilation warning */
2164 UNUSED(hlptim);
2165
2166 /* NOTE : This function should not be modified, when the callback is needed,
2167 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2168 */
2169 }
2170
2171 /**
2172 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2173 * @param hlptim LPTIM handle
2174 * @retval None
2175 */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2176 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2177 {
2178 /* Prevent unused argument(s) compilation warning */
2179 UNUSED(hlptim);
2180
2181 /* NOTE : This function should not be modified, when the callback is needed,
2182 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2183 */
2184 }
2185 #if defined(LPTIM_RCR_REP)
2186
2187 /**
2188 * @brief Repetition counter underflowed (or contains zero) and LPTIM counter overflowed callback in non-blocking mode.
2189 * @param hlptim LPTIM handle
2190 * @retval None
2191 */
HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef * hlptim)2192 __weak void HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef *hlptim)
2193 {
2194 /* Prevent unused argument(s) compilation warning */
2195 UNUSED(hlptim);
2196
2197 /* NOTE : This function should not be modified, when the callback is needed,
2198 the HAL_LPTIM_UpdateEventCallback could be implemented in the user file
2199 */
2200 }
2201
2202 /**
2203 * @brief Successful APB bus write to repetition counter register callback in non-blocking mode.
2204 * @param hlptim LPTIM handle
2205 * @retval None
2206 */
HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef * hlptim)2207 __weak void HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef *hlptim)
2208 {
2209 /* Prevent unused argument(s) compilation warning */
2210 UNUSED(hlptim);
2211
2212 /* NOTE : This function should not be modified, when the callback is needed,
2213 the HAL_LPTIM_RepCounterWriteCallback could be implemented in the user file
2214 */
2215 }
2216 #endif
2217
2218 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2219 /**
2220 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2221 * @param hlptim LPTIM handle
2222 * @param CallbackID ID of the callback to be registered
2223 * This parameter can be one of the following values:
2224 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2225 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2226 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2227 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2228 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2229 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2230 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2231 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2232 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2233 * @arg @ref HAL_LPTIM_UPDATE_EVENT_CB_ID Update event detection Callback ID (when available)
2234 * @arg @ref HAL_LPTIM_REP_COUNTER_WRITE_CB_ID Repetition counter register write complete Callback ID (when available)
2235 * @param pCallback pointer to the callback function
2236 * @retval status
2237 */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2238 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2239 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2240 pLPTIM_CallbackTypeDef pCallback)
2241 {
2242 HAL_StatusTypeDef status = HAL_OK;
2243
2244 if (pCallback == NULL)
2245 {
2246 return HAL_ERROR;
2247 }
2248
2249 /* Process locked */
2250 __HAL_LOCK(hlptim);
2251
2252 if (hlptim->State == HAL_LPTIM_STATE_READY)
2253 {
2254 switch (CallbackID)
2255 {
2256 case HAL_LPTIM_MSPINIT_CB_ID :
2257 hlptim->MspInitCallback = pCallback;
2258 break;
2259
2260 case HAL_LPTIM_MSPDEINIT_CB_ID :
2261 hlptim->MspDeInitCallback = pCallback;
2262 break;
2263
2264 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2265 hlptim->CompareMatchCallback = pCallback;
2266 break;
2267
2268 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2269 hlptim->AutoReloadMatchCallback = pCallback;
2270 break;
2271
2272 case HAL_LPTIM_TRIGGER_CB_ID :
2273 hlptim->TriggerCallback = pCallback;
2274 break;
2275
2276 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2277 hlptim->CompareWriteCallback = pCallback;
2278 break;
2279
2280 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2281 hlptim->AutoReloadWriteCallback = pCallback;
2282 break;
2283
2284 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2285 hlptim->DirectionUpCallback = pCallback;
2286 break;
2287
2288 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2289 hlptim->DirectionDownCallback = pCallback;
2290 break;
2291 #if defined(LPTIM_RCR_REP)
2292
2293 case HAL_LPTIM_UPDATE_EVENT_CB_ID :
2294 hlptim->UpdateEventCallback = pCallback;
2295 break;
2296
2297 case HAL_LPTIM_REP_COUNTER_WRITE_CB_ID :
2298 hlptim->RepCounterWriteCallback = pCallback;
2299 break;
2300 #endif
2301
2302 default :
2303 /* Return error status */
2304 status = HAL_ERROR;
2305 break;
2306 }
2307 }
2308 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2309 {
2310 switch (CallbackID)
2311 {
2312 case HAL_LPTIM_MSPINIT_CB_ID :
2313 hlptim->MspInitCallback = pCallback;
2314 break;
2315
2316 case HAL_LPTIM_MSPDEINIT_CB_ID :
2317 hlptim->MspDeInitCallback = pCallback;
2318 break;
2319
2320 default :
2321 /* Return error status */
2322 status = HAL_ERROR;
2323 break;
2324 }
2325 }
2326 else
2327 {
2328 /* Return error status */
2329 status = HAL_ERROR;
2330 }
2331
2332 /* Release Lock */
2333 __HAL_UNLOCK(hlptim);
2334
2335 return status;
2336 }
2337
2338 /**
2339 * @brief Unregister a LPTIM callback
2340 * LLPTIM callback is redirected to the weak predefined callback
2341 * @param hlptim LPTIM handle
2342 * @param CallbackID ID of the callback to be unregistered
2343 * This parameter can be one of the following values:
2344 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2345 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2346 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2347 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2348 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2349 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2350 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2351 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2352 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2353 * @arg @ref HAL_LPTIM_UPDATE_EVENT_CB_ID Update event detection Callback ID (when available)
2354 * @arg @ref HAL_LPTIM_REP_COUNTER_WRITE_CB_ID Repetition counter register write complete Callback ID (when available)
2355 * @retval status
2356 */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2357 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2358 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2359 {
2360 HAL_StatusTypeDef status = HAL_OK;
2361
2362 /* Process locked */
2363 __HAL_LOCK(hlptim);
2364
2365 if (hlptim->State == HAL_LPTIM_STATE_READY)
2366 {
2367 switch (CallbackID)
2368 {
2369 case HAL_LPTIM_MSPINIT_CB_ID :
2370 /* Legacy weak MspInit Callback */
2371 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2372 break;
2373
2374 case HAL_LPTIM_MSPDEINIT_CB_ID :
2375 /* Legacy weak Msp DeInit Callback */
2376 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2377 break;
2378
2379 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2380 /* Legacy weak Compare match Callback */
2381 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2382 break;
2383
2384 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2385 /* Legacy weak Auto-reload match Callback */
2386 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2387 break;
2388
2389 case HAL_LPTIM_TRIGGER_CB_ID :
2390 /* Legacy weak External trigger event detection Callback */
2391 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2392 break;
2393
2394 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2395 /* Legacy weak Compare register write complete Callback */
2396 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2397 break;
2398
2399 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2400 /* Legacy weak Auto-reload register write complete Callback */
2401 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2402 break;
2403
2404 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2405 /* Legacy weak Up-counting direction change Callback */
2406 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2407 break;
2408
2409 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2410 /* Legacy weak Down-counting direction change Callback */
2411 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2412 break;
2413 #if defined(LPTIM_RCR_REP)
2414
2415 case HAL_LPTIM_UPDATE_EVENT_CB_ID :
2416 /* Legacy weak Update event detection Callback */
2417 hlptim->UpdateEventCallback = HAL_LPTIM_UpdateEventCallback;
2418 break;
2419
2420 case HAL_LPTIM_REP_COUNTER_WRITE_CB_ID :
2421 /* Legacy weak Repetition counter register write complete Callback */
2422 hlptim->RepCounterWriteCallback = HAL_LPTIM_RepCounterWriteCallback;
2423 break;
2424 #endif
2425
2426 default :
2427 /* Return error status */
2428 status = HAL_ERROR;
2429 break;
2430 }
2431 }
2432 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2433 {
2434 switch (CallbackID)
2435 {
2436 case HAL_LPTIM_MSPINIT_CB_ID :
2437 /* Legacy weak MspInit Callback */
2438 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2439 break;
2440
2441 case HAL_LPTIM_MSPDEINIT_CB_ID :
2442 /* Legacy weak Msp DeInit Callback */
2443 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2444 break;
2445
2446 default :
2447 /* Return error status */
2448 status = HAL_ERROR;
2449 break;
2450 }
2451 }
2452 else
2453 {
2454 /* Return error status */
2455 status = HAL_ERROR;
2456 }
2457
2458 /* Release Lock */
2459 __HAL_UNLOCK(hlptim);
2460
2461 return status;
2462 }
2463 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2464
2465 /**
2466 * @}
2467 */
2468
2469 /** @defgroup LPTIM_Group5 Peripheral State functions
2470 * @brief Peripheral State functions.
2471 *
2472 @verbatim
2473 ==============================================================================
2474 ##### Peripheral State functions #####
2475 ==============================================================================
2476 [..]
2477 This subsection permits to get in run-time the status of the peripheral.
2478
2479 @endverbatim
2480 * @{
2481 */
2482
2483 /**
2484 * @brief Return the LPTIM handle state.
2485 * @param hlptim LPTIM handle
2486 * @retval HAL state
2487 */
HAL_LPTIM_GetState(LPTIM_HandleTypeDef * hlptim)2488 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2489 {
2490 /* Return LPTIM handle state */
2491 return hlptim->State;
2492 }
2493
2494 /**
2495 * @}
2496 */
2497
2498
2499 /**
2500 * @}
2501 */
2502
2503 /* Private functions ---------------------------------------------------------*/
2504
2505 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2506 * @{
2507 */
2508 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2509 /**
2510 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2511 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2512 * the configuration information for LPTIM module.
2513 * @retval None
2514 */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2515 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2516 {
2517 /* Reset the LPTIM callback to the legacy weak callbacks */
2518 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2519 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2520 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2521 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2522 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2523 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2524 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2525 #if defined(LPTIM_RCR_REP)
2526 lptim->UpdateEventCallback = HAL_LPTIM_UpdateEventCallback;
2527 lptim->RepCounterWriteCallback = HAL_LPTIM_RepCounterWriteCallback;
2528 #endif
2529 }
2530 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2531
2532 /**
2533 * @brief LPTimer Wait for flag set
2534 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2535 * the configuration information for LPTIM module.
2536 * @param flag The lptim flag
2537 * @retval HAL status
2538 */
LPTIM_WaitForFlag(LPTIM_HandleTypeDef * hlptim,uint32_t flag)2539 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2540 {
2541 HAL_StatusTypeDef result = HAL_OK;
2542 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2543 do
2544 {
2545 count--;
2546 if (count == 0UL)
2547 {
2548 result = HAL_TIMEOUT;
2549 }
2550 } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2551
2552 return result;
2553 }
2554
2555 /**
2556 * @brief Disable LPTIM HW instance.
2557 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2558 * the configuration information for LPTIM module.
2559 * @note The following sequence is required to solve LPTIM disable HW limitation.
2560 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2561 * stuck in LPTIM interrupt when entering Stop mode" section.
2562 * @retval None
2563 */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2564 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2565 {
2566 uint32_t tmpclksource = 0;
2567 uint32_t tmpIER;
2568 uint32_t tmpCFGR;
2569 uint32_t tmpCMP;
2570 uint32_t tmpARR;
2571 uint32_t primask_bit;
2572 uint32_t tmpOR;
2573 #if defined(LPTIM_RCR_REP)
2574 uint32_t tmpRCR;
2575 #endif
2576
2577 /* Enter critical section */
2578 primask_bit = __get_PRIMASK();
2579 __set_PRIMASK(1) ;
2580
2581 /*********** Save LPTIM Config ***********/
2582 /* Save LPTIM source clock */
2583 switch ((uint32_t)hlptim->Instance)
2584 {
2585 case LPTIM1_BASE:
2586 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2587 break;
2588 #if defined(LPTIM2)
2589 case LPTIM2_BASE:
2590 tmpclksource = __HAL_RCC_GET_LPTIM2_SOURCE();
2591 break;
2592 #endif /* LPTIM2 */
2593 default:
2594 break;
2595 }
2596
2597 /* Save LPTIM configuration registers */
2598 tmpIER = hlptim->Instance->IER;
2599 tmpCFGR = hlptim->Instance->CFGR;
2600 tmpCMP = hlptim->Instance->CMP;
2601 tmpARR = hlptim->Instance->ARR;
2602 tmpOR = hlptim->Instance->OR;
2603 #if defined(LPTIM_RCR_REP)
2604 tmpRCR = hlptim->Instance->RCR;
2605 #endif
2606
2607 /*********** Reset LPTIM ***********/
2608 switch ((uint32_t)hlptim->Instance)
2609 {
2610 case LPTIM1_BASE:
2611 __HAL_RCC_LPTIM1_FORCE_RESET();
2612 __HAL_RCC_LPTIM1_RELEASE_RESET();
2613 break;
2614 #if defined(LPTIM2)
2615 case LPTIM2_BASE:
2616 __HAL_RCC_LPTIM2_FORCE_RESET();
2617 __HAL_RCC_LPTIM2_RELEASE_RESET();
2618 break;
2619 #endif /* LPTIM2 */
2620 default:
2621 break;
2622 }
2623
2624 /*********** Restore LPTIM Config ***********/
2625 #if defined(LPTIM_RCR_REP)
2626 if ((tmpCMP != 0UL) || (tmpARR != 0UL) || (tmpRCR != 0UL))
2627 #else
2628 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2629 #endif
2630 {
2631 /* Force LPTIM source kernel clock from APB */
2632 switch ((uint32_t)hlptim->Instance)
2633 {
2634 case LPTIM1_BASE:
2635 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2636 break;
2637 #if defined(LPTIM2)
2638 case LPTIM2_BASE:
2639 __HAL_RCC_LPTIM2_CONFIG(RCC_LPTIM2CLKSOURCE_PCLK1);
2640 break;
2641 #endif /* LPTIM2 */
2642 default:
2643 break;
2644 }
2645
2646 if (tmpCMP != 0UL)
2647 {
2648 /* Restore CMP register (LPTIM should be enabled first) */
2649 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2650 hlptim->Instance->CMP = tmpCMP;
2651
2652 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2653 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2654 {
2655 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2656 }
2657 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2658 }
2659
2660 if (tmpARR != 0UL)
2661 {
2662 /* Restore ARR register (LPTIM should be enabled first) */
2663 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2664 hlptim->Instance->ARR = tmpARR;
2665
2666 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2667 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2668 {
2669 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2670 }
2671
2672 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2673 }
2674 #if defined(LPTIM_RCR_REP)
2675
2676 if (tmpRCR != 0UL)
2677 {
2678 /* Restore RCR register (LPTIM should be enabled first) */
2679 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2680 hlptim->Instance->RCR = tmpRCR;
2681
2682 /* Wait for the completion of the write operation to the LPTIM_RCR register */
2683 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_REPOK) == HAL_TIMEOUT)
2684 {
2685 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2686 }
2687 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
2688 }
2689 #endif
2690
2691 /* Restore LPTIM source kernel clock */
2692 switch ((uint32_t)hlptim->Instance)
2693 {
2694 case LPTIM1_BASE:
2695 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2696 break;
2697 #if defined(LPTIM2)
2698 case LPTIM2_BASE:
2699 __HAL_RCC_LPTIM2_CONFIG(tmpclksource);
2700 break;
2701 #endif /* LPTIM2 */
2702 default:
2703 break;
2704 }
2705 }
2706
2707 /* Restore configuration registers (LPTIM should be disabled first) */
2708 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2709 hlptim->Instance->IER = tmpIER;
2710 hlptim->Instance->CFGR = tmpCFGR;
2711 hlptim->Instance->OR = tmpOR;
2712
2713 /* Exit critical section: restore previous priority mask */
2714 __set_PRIMASK(primask_bit);
2715 }
2716 /**
2717 * @}
2718 */
2719 #endif /* LPTIM1 || LPTIM2 */
2720
2721 #endif /* HAL_LPTIM_MODULE_ENABLED */
2722 /**
2723 * @}
2724 */
2725
2726 /**
2727 * @}
2728 */
2729
