1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_dac.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
8 * + Initialization and de-initialization functions
9 * + Peripheral Control functions
10 * + Peripheral State and Errors functions
11 *
12 *
13 ******************************************************************************
14 * @attention
15 *
16 * Copyright (c) 2017 STMicroelectronics.
17 * All rights reserved.
18 *
19 * This software is licensed under terms that can be found in the LICENSE file
20 * in the root directory of this software component.
21 * If no LICENSE file comes with this software, it is provided AS-IS.
22 *
23 ******************************************************************************
24 @verbatim
25 ==============================================================================
26 ##### DAC Peripheral features #####
27 ==============================================================================
28 [..]
29 *** DAC Channels ***
30 ====================
31 [..]
32 STM32L4 devices integrate one or two 12-bit Digital Analog Converters
33 (i.e. one or 2 channel(s))
34 1 channel : STM32L451xx STM32L452xx STM32L462xx
35 2 channels: STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx
36 STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx
37 STM32L4P5xx STM32L4Q5xx
38 STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx
39
40 When 2 channels are available, the 2 converters (i.e. channel1 & channel2)
41 can be used independently or simultaneously (dual mode):
42 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
43 peripherals.
44 (#) Whenever present, DAC channel2 with DAC_OUT2 (PA5) as output
45 or connected to on-chip peripherals.
46
47 *** DAC Triggers ***
48 ====================
49 [..]
50 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
51 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
52 [..]
53 Digital to Analog conversion can be triggered by:
54 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
55 The used pin (GPIOx_PIN_9) must be configured in input mode.
56
57 (#) Timers TRGO: TIM2, TIM3, TIM4, TIM5, TIM6 and TIM7
58 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...)
59
60 (#) Software using DAC_TRIGGER_SOFTWARE
61
62 *** DAC Buffer mode feature ***
63 ===============================
64 [..]
65 Each DAC channel integrates an output buffer that can be used to
66 reduce the output impedance, and to drive external loads directly
67 without having to add an external operational amplifier.
68 To enable, the output buffer use
69 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
70 [..]
71 (@) Refer to the device datasheet for more details about output
72 impedance value with and without output buffer.
73
74 *** DAC connect feature ***
75 ===============================
76 [..]
77 Each DAC channel can be connected internally.
78 To connect, use
79 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE;
80
81 *** GPIO configurations guidelines ***
82 =====================
83 [..]
84 When a DAC channel is used (ex channel1 on PA4) and the other is not
85 (ex channel2 on PA5 is configured in Analog and disabled).
86 Channel1 may disturb channel2 as coupling effect.
87 Note that there is no coupling on channel2 as soon as channel2 is turned on.
88 Coupling on adjacent channel could be avoided as follows:
89 when unused PA5 is configured as INPUT PULL-UP or DOWN.
90 PA5 is configured in ANALOG just before it is turned on.
91
92 *** DAC Sample and Hold feature ***
93 ========================
94 [..]
95 For each converter, 2 modes are supported: normal mode and
96 "sample and hold" mode (i.e. low power mode).
97 In the sample and hold mode, the DAC core converts data, then holds the
98 converted voltage on a capacitor. When not converting, the DAC cores and
99 buffer are completely turned off between samples and the DAC output is
100 tri-stated, therefore reducing the overall power consumption. A new
101 stabilization period is needed before each new conversion.
102
103 The sample and hold allow setting internal or external voltage @
104 low power consumption cost (output value can be at any given rate either
105 by CPU or DMA).
106
107 The Sample and hold block and registers uses either LSI & run in
108 several power modes: run mode, sleep mode, low power run, low power sleep
109 mode & stop1 mode.
110
111 Low power stop1 mode allows only static conversion.
112
113 To enable Sample and Hold mode
114 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
115 RCC_LSI_ON parameters.
116
117 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
118 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
119 DAC_HoldTime & DAC_RefreshTime;
120
121 *** DAC calibration feature ***
122 ===================================
123 [..]
124 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
125 (++) Calibration aims at correcting some offset of output buffer.
126 (++) The DAC uses either factory calibration settings OR user defined
127 calibration (trimming) settings (i.e. trimming mode).
128 (++) The user defined settings can be figured out using self calibration
129 handled by HAL_DACEx_SelfCalibrate.
130 (++) HAL_DACEx_SelfCalibrate:
131 (+++) Runs automatically the calibration.
132 (+++) Enables the user trimming mode
133 (+++) Updates a structure with trimming values with fresh calibration
134 results.
135 The user may store the calibration results for larger
136 (ex monitoring the trimming as a function of temperature
137 for instance)
138
139 *** DAC wave generation feature ***
140 ===================================
141 [..]
142 Both DAC channels can be used to generate
143 (#) Noise wave
144 (#) Triangle wave
145
146 *** DAC data format ***
147 =======================
148 [..]
149 The DAC data format can be:
150 (#) 8-bit right alignment using DAC_ALIGN_8B_R
151 (#) 12-bit left alignment using DAC_ALIGN_12B_L
152 (#) 12-bit right alignment using DAC_ALIGN_12B_R
153
154 *** DAC data value to voltage correspondence ***
155 ================================================
156 [..]
157 The analog output voltage on each DAC channel pin is determined
158 by the following equation:
159 [..]
160 DAC_OUTx = VREF+ * DOR / 4095
161 (+) with DOR is the Data Output Register
162 [..]
163 VEF+ is the input voltage reference (refer to the device datasheet)
164 [..]
165 e.g. To set DAC_OUT1 to 0.7V, use
166 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
167
168 *** DMA requests ***
169 =====================
170 [..]
171 A DMA1 request can be generated when an external trigger (but not a software trigger)
172 occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA().
173 DMA requests are mapped as following:
174 (#) When DMAMUX is NOT present:
175 DMA1 requests are mapped as following:
176 (+) DAC channel1 mapped on DMA1 request 6 / channel3
177 (+) DAC channel2 mapped on DMA1 request 5 / channel4
178 DMA2 requests are mapped as following:
179 (+) DAC channel1 mapped on DMA2 request 3 / channel4
180 (+) DAC channel2 mapped on DMA2 request 3 / channel5
181 (#) When DMAMUX is present:
182 (+) DAC channel1 mapped on DMA1/DMA2 request 6 (can be any DMA channel)
183 (+) DAC channel2 mapped on DMA1/DMA2 request 7 (can be any DMA channel)
184
185 *** High frequency interface mode ***
186 =====================================
187 [..]
188 The high frequency interface informs DAC instance about the bus frequency in use.
189 It is mandatory information for DAC (as internal timing of DAC is bus frequency dependent)
190 provided thanks to parameter DAC_HighFrequency handled in HAL_DAC_ConfigChannel () function.
191 Use of DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC value of DAC_HighFrequency is recommended
192 function figured out the correct setting.
193 The high frequency mode is same for all converters of a same DAC instance. Either same
194 parameter DAC_HighFrequency is used for all DAC converters or again self
195 DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC detection parameter.
196
197 [..]
198 (@) For Dual mode and specific signal (Triangle and noise) generation please
199 refer to Extended Features Driver description
200
201 ##### How to use this driver #####
202 ==============================================================================
203 [..]
204 (+) DAC APB clock must be enabled to get write access to DAC
205 registers using HAL_DAC_Init()
206 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
207 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
208 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
209
210 *** Calibration mode IO operation ***
211 ======================================
212 [..]
213 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
214 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
215 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
216
217 *** Polling mode IO operation ***
218 =================================
219 [..]
220 (+) Start the DAC peripheral using HAL_DAC_Start()
221 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
222 (+) Stop the DAC peripheral using HAL_DAC_Stop()
223
224 *** DMA mode IO operation ***
225 ==============================
226 [..]
227 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
228 of data to be transferred at each end of conversion
229 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue().
230 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
231 function is executed and user can add his own code by customization of function pointer
232 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
233 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
234 function is executed and user can add his own code by customization of function pointer
235 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
236 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
237 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
238 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
239 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
240 function is executed and user can add his own code by customization of function pointer
241 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
242 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
243 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
244
245 *** Callback registration ***
246 =============================================
247 [..]
248 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
249 allows the user to configure dynamically the driver callbacks.
250
251 Use Functions HAL_DAC_RegisterCallback() to register a user callback,
252 it allows to register following callbacks:
253 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
254 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
255 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
256 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
257 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
258 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
259 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
260 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
261 (+) MspInitCallback : DAC MspInit.
262 (+) MspDeInitCallback : DAC MspdeInit.
263 This function takes as parameters the HAL peripheral handle, the Callback ID
264 and a pointer to the user callback function.
265
266 Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default
267 weak (overridden) function. It allows to reset following callbacks:
268 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
269 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
270 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
271 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
272 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
273 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
274 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
275 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
276 (+) MspInitCallback : DAC MspInit.
277 (+) MspDeInitCallback : DAC MspdeInit.
278 (+) All Callbacks
279 This function) takes as parameters the HAL peripheral handle and the Callback ID.
280
281 By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
282 all callbacks are reset to the corresponding legacy weak (overridden) functions.
283 Exception done for MspInit and MspDeInit callbacks that are respectively
284 reset to the legacy weak (overridden) functions in the HAL_DAC_Init
285 and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
286 If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit
287 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
288
289 Callbacks can be registered/unregistered in READY state only.
290 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
291 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
292 during the Init/DeInit.
293 In that case first register the MspInit/MspDeInit user callbacks
294 using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit
295 or HAL_DAC_Init function.
296
297 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
298 not defined, the callback registering feature is not available
299 and weak (overridden) callbacks are used.
300
301 *** DAC HAL driver macros list ***
302 =============================================
303 [..]
304 Below the list of most used macros in DAC HAL driver.
305
306 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
307 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
308 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
309 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
310
311 [..]
312 (@) You can refer to the DAC HAL driver header file for more useful macros
313
314 @endverbatim
315 ******************************************************************************
316 */
317
318 /* Includes ------------------------------------------------------------------*/
319 #include "stm32l4xx_hal.h"
320
321 /** @addtogroup STM32L4xx_HAL_Driver
322 * @{
323 */
324
325 #ifdef HAL_DAC_MODULE_ENABLED
326 #if defined(DAC1)
327
328 /** @defgroup DAC DAC
329 * @brief DAC driver modules
330 * @{
331 */
332
333 /* Private typedef -----------------------------------------------------------*/
334 /* Private define ------------------------------------------------------------*/
335 /* Private constants ---------------------------------------------------------*/
336 /** @addtogroup DAC_Private_Constants DAC Private Constants
337 * @{
338 */
339 #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */
340 #define HFSEL_ENABLE_THRESHOLD_80MHZ 80000000U /* 80 MHz */
341
342 /**
343 * @}
344 */
345
346 /* Private macro -------------------------------------------------------------*/
347 /* Private variables ---------------------------------------------------------*/
348 /* Private function prototypes -----------------------------------------------*/
349 /* Exported functions -------------------------------------------------------*/
350
351 /** @defgroup DAC_Exported_Functions DAC Exported Functions
352 * @{
353 */
354
355 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
356 * @brief Initialization and Configuration functions
357 *
358 @verbatim
359 ==============================================================================
360 ##### Initialization and de-initialization functions #####
361 ==============================================================================
362 [..] This section provides functions allowing to:
363 (+) Initialize and configure the DAC.
364 (+) De-initialize the DAC.
365
366 @endverbatim
367 * @{
368 */
369
370 /**
371 * @brief Initialize the DAC peripheral according to the specified parameters
372 * in the DAC_InitStruct and initialize the associated handle.
373 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
374 * the configuration information for the specified DAC.
375 * @retval HAL status
376 */
HAL_DAC_Init(DAC_HandleTypeDef * hdac)377 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
378 {
379 /* Check DAC handle */
380 if (hdac == NULL)
381 {
382 return HAL_ERROR;
383 }
384 /* Check the parameters */
385 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
386
387 if (hdac->State == HAL_DAC_STATE_RESET)
388 {
389 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
390 /* Init the DAC Callback settings */
391 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
392 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
393 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
394 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
395
396 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
397 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \
398 defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
399 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
400 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
401 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
402 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
403 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
404 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
405 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
406 /* STM32L4P5xx STM32L4Q5xx */
407 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
408
409 if (hdac->MspInitCallback == NULL)
410 {
411 hdac->MspInitCallback = HAL_DAC_MspInit;
412 }
413 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
414
415 /* Allocate lock resource and initialize it */
416 hdac->Lock = HAL_UNLOCKED;
417
418 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
419 /* Init the low level hardware */
420 hdac->MspInitCallback(hdac);
421 #else
422 /* Init the low level hardware */
423 HAL_DAC_MspInit(hdac);
424 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
425 }
426
427 /* Initialize the DAC state*/
428 hdac->State = HAL_DAC_STATE_BUSY;
429
430 /* Set DAC error code to none */
431 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
432
433 /* Initialize the DAC state*/
434 hdac->State = HAL_DAC_STATE_READY;
435
436 /* Return function status */
437 return HAL_OK;
438 }
439
440 /**
441 * @brief Deinitialize the DAC peripheral registers to their default reset values.
442 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
443 * the configuration information for the specified DAC.
444 * @retval HAL status
445 */
HAL_DAC_DeInit(DAC_HandleTypeDef * hdac)446 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
447 {
448 /* Check DAC handle */
449 if (hdac == NULL)
450 {
451 return HAL_ERROR;
452 }
453
454 /* Check the parameters */
455 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
456
457 /* Change DAC state */
458 hdac->State = HAL_DAC_STATE_BUSY;
459
460 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
461 if (hdac->MspDeInitCallback == NULL)
462 {
463 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
464 }
465 /* DeInit the low level hardware */
466 hdac->MspDeInitCallback(hdac);
467 #else
468 /* DeInit the low level hardware */
469 HAL_DAC_MspDeInit(hdac);
470 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
471
472 /* Set DAC error code to none */
473 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
474
475 /* Change DAC state */
476 hdac->State = HAL_DAC_STATE_RESET;
477
478 /* Release Lock */
479 __HAL_UNLOCK(hdac);
480
481 /* Return function status */
482 return HAL_OK;
483 }
484
485 /**
486 * @brief Initialize the DAC MSP.
487 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
488 * the configuration information for the specified DAC.
489 * @retval None
490 */
HAL_DAC_MspInit(DAC_HandleTypeDef * hdac)491 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
492 {
493 /* Prevent unused argument(s) compilation warning */
494 UNUSED(hdac);
495
496 /* NOTE : This function should not be modified, when the callback is needed,
497 the HAL_DAC_MspInit could be implemented in the user file
498 */
499 }
500
501 /**
502 * @brief DeInitialize the DAC MSP.
503 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
504 * the configuration information for the specified DAC.
505 * @retval None
506 */
HAL_DAC_MspDeInit(DAC_HandleTypeDef * hdac)507 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
508 {
509 /* Prevent unused argument(s) compilation warning */
510 UNUSED(hdac);
511
512 /* NOTE : This function should not be modified, when the callback is needed,
513 the HAL_DAC_MspDeInit could be implemented in the user file
514 */
515 }
516
517 /**
518 * @}
519 */
520
521 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
522 * @brief IO operation functions
523 *
524 @verbatim
525 ==============================================================================
526 ##### IO operation functions #####
527 ==============================================================================
528 [..] This section provides functions allowing to:
529 (+) Start conversion.
530 (+) Stop conversion.
531 (+) Start conversion and enable DMA transfer.
532 (+) Stop conversion and disable DMA transfer.
533 (+) Get result of conversion.
534
535 @endverbatim
536 * @{
537 */
538
539 /**
540 * @brief Enables DAC and starts conversion of channel.
541 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
542 * the configuration information for the specified DAC.
543 * @param Channel The selected DAC channel.
544 * This parameter can be one of the following values:
545 * @arg DAC_CHANNEL_1: DAC Channel1 selected
546 * @arg DAC_CHANNEL_2: DAC Channel2 selected (when supported)
547 * @retval HAL status
548 */
HAL_DAC_Start(DAC_HandleTypeDef * hdac,uint32_t Channel)549 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
550 {
551 /* Check the parameters */
552 assert_param(IS_DAC_CHANNEL(Channel));
553
554 /* Process locked */
555 __HAL_LOCK(hdac);
556
557 /* Change DAC state */
558 hdac->State = HAL_DAC_STATE_BUSY;
559
560 /* Enable the Peripheral */
561 __HAL_DAC_ENABLE(hdac, Channel);
562
563 #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
564 if (Channel == DAC_CHANNEL_1)
565 {
566 /* Check if software trigger enabled */
567 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
568 {
569 /* Enable the selected DAC software conversion */
570 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
571 }
572 }
573 else
574 {
575 /* Check if software trigger enabled */
576 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL)))
577 {
578 /* Enable the selected DAC software conversion*/
579 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
580 }
581 }
582
583 #endif /* STM32L4P5xx STM32L4Q5xx STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
584
585 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
586 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx)
587 if(Channel == DAC_CHANNEL_1)
588 {
589 /* Check if software trigger enabled */
590 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_CR_TEN1)
591 {
592 /* Enable the selected DAC software conversion */
593 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
594 }
595 }
596 else
597 {
598 /* Check if software trigger enabled */
599 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == DAC_CR_TEN2)
600 {
601 /* Enable the selected DAC software conversion*/
602 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
603 }
604 }
605 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
606 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
607
608
609 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
610 /* Check if software trigger enabled */
611 if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
612 {
613 /* Enable the selected DAC software conversion */
614 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
615 }
616 #endif /* STM32L451xx STM32L452xx STM32L462xx */
617 /* Change DAC state */
618 hdac->State = HAL_DAC_STATE_READY;
619
620 /* Process unlocked */
621 __HAL_UNLOCK(hdac);
622
623 /* Return function status */
624 return HAL_OK;
625 }
626
627 /**
628 * @brief Disables DAC and stop conversion of channel.
629 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
630 * the configuration information for the specified DAC.
631 * @param Channel The selected DAC channel.
632 * This parameter can be one of the following values:
633 * @arg DAC_CHANNEL_1: DAC Channel1 selected
634 * @arg DAC_CHANNEL_2: DAC Channel2 selected
635 * @retval HAL status
636 */
HAL_DAC_Stop(DAC_HandleTypeDef * hdac,uint32_t Channel)637 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
638 {
639 /* Check the parameters */
640 assert_param(IS_DAC_CHANNEL(Channel));
641
642 /* Disable the Peripheral */
643 __HAL_DAC_DISABLE(hdac, Channel);
644
645 /* Change DAC state */
646 hdac->State = HAL_DAC_STATE_READY;
647
648 /* Return function status */
649 return HAL_OK;
650 }
651
652 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
653 /**
654 * @brief Enables DAC and starts conversion of channel.
655 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
656 * the configuration information for the specified DAC.
657 * @param Channel The selected DAC channel.
658 * This parameter can be one of the following values:
659 * @arg DAC_CHANNEL_1: DAC Channel1 selected
660 * @param pData The destination peripheral Buffer address.
661 * @param Length The length of data to be transferred from memory to DAC peripheral
662 * @param Alignment Specifies the data alignment for DAC channel.
663 * This parameter can be one of the following values:
664 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
665 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
666 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
667 * @retval HAL status
668 */
HAL_DAC_Start_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t * pData,uint32_t Length,uint32_t Alignment)669 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
670 uint32_t Alignment)
671 {
672 HAL_StatusTypeDef status;
673 uint32_t tmpreg = 0U;
674
675 /* Check the parameters */
676 assert_param(IS_DAC_CHANNEL(Channel));
677 assert_param(IS_DAC_ALIGN(Alignment));
678
679 /* Process locked */
680 __HAL_LOCK(hdac);
681
682 /* Change DAC state */
683 hdac->State = HAL_DAC_STATE_BUSY;
684
685 /* Set the DMA transfer complete callback for channel1 */
686 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
687
688 /* Set the DMA half transfer complete callback for channel1 */
689 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
690
691 /* Set the DMA error callback for channel1 */
692 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
693
694 /* Enable the selected DAC channel1 DMA request */
695 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
696
697 /* Case of use of channel 1 */
698 switch (Alignment)
699 {
700 case DAC_ALIGN_12B_R:
701 /* Get DHR12R1 address */
702 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
703 break;
704 case DAC_ALIGN_12B_L:
705 /* Get DHR12L1 address */
706 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
707 break;
708 case DAC_ALIGN_8B_R:
709 /* Get DHR8R1 address */
710 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
711 break;
712 default:
713 break;
714 }
715
716 /* Enable the DMA channel */
717 /* Enable the DAC DMA underrun interrupt */
718 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
719
720 /* Enable the DMA channel */
721 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
722
723 /* Process Unlocked */
724 __HAL_UNLOCK(hdac);
725
726 if (status == HAL_OK)
727 {
728 /* Enable the Peripheral */
729 __HAL_DAC_ENABLE(hdac, Channel);
730 }
731 else
732 {
733 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
734 }
735
736 /* Return function status */
737 return status;
738 }
739 #endif /* STM32L451xx STM32L452xx STM32L462xx */
740
741 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
742 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \
743 defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
744 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
745
746 /**
747 * @brief Enables DAC and starts conversion of channel.
748 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
749 * the configuration information for the specified DAC.
750 * @param Channel The selected DAC channel.
751 * This parameter can be one of the following values:
752 * @arg DAC_CHANNEL_1: DAC Channel1 selected
753 * @arg DAC_CHANNEL_2: DAC Channel2 selected
754 * @param pData The destination peripheral Buffer address.
755 * @param Length The length of data to be transferred from memory to DAC peripheral
756 * @param Alignment Specifies the data alignment for DAC channel.
757 * This parameter can be one of the following values:
758 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
759 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
760 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
761 * @retval HAL status
762 */
HAL_DAC_Start_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t * pData,uint32_t Length,uint32_t Alignment)763 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
764 uint32_t Alignment)
765 {
766 HAL_StatusTypeDef status;
767 uint32_t tmpreg = 0U;
768
769 /* Check the parameters */
770 assert_param(IS_DAC_CHANNEL(Channel));
771 assert_param(IS_DAC_ALIGN(Alignment));
772
773 /* Process locked */
774 __HAL_LOCK(hdac);
775
776 /* Change DAC state */
777 hdac->State = HAL_DAC_STATE_BUSY;
778
779 if (Channel == DAC_CHANNEL_1)
780 {
781 /* Set the DMA transfer complete callback for channel1 */
782 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
783
784 /* Set the DMA half transfer complete callback for channel1 */
785 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
786
787 /* Set the DMA error callback for channel1 */
788 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
789
790 /* Enable the selected DAC channel1 DMA request */
791 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
792
793 /* Case of use of channel 1 */
794 switch (Alignment)
795 {
796 case DAC_ALIGN_12B_R:
797 /* Get DHR12R1 address */
798 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
799 break;
800 case DAC_ALIGN_12B_L:
801 /* Get DHR12L1 address */
802 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
803 break;
804 case DAC_ALIGN_8B_R:
805 /* Get DHR8R1 address */
806 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
807 break;
808 default:
809 break;
810 }
811 }
812 else
813 {
814 /* Set the DMA transfer complete callback for channel2 */
815 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
816
817 /* Set the DMA half transfer complete callback for channel2 */
818 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
819
820 /* Set the DMA error callback for channel2 */
821 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
822
823 /* Enable the selected DAC channel2 DMA request */
824 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
825
826 /* Case of use of channel 2 */
827 switch (Alignment)
828 {
829 case DAC_ALIGN_12B_R:
830 /* Get DHR12R2 address */
831 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
832 break;
833 case DAC_ALIGN_12B_L:
834 /* Get DHR12L2 address */
835 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
836 break;
837 case DAC_ALIGN_8B_R:
838 /* Get DHR8R2 address */
839 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
840 break;
841 default:
842 break;
843 }
844 }
845
846 /* Enable the DMA channel */
847 if (Channel == DAC_CHANNEL_1)
848 {
849 /* Enable the DAC DMA underrun interrupt */
850 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
851
852 /* Enable the DMA channel */
853 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
854 }
855 else
856 {
857 /* Enable the DAC DMA underrun interrupt */
858 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
859
860 /* Enable the DMA channel */
861 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
862 }
863
864 /* Process Unlocked */
865 __HAL_UNLOCK(hdac);
866
867 if (status == HAL_OK)
868 {
869 /* Enable the Peripheral */
870 __HAL_DAC_ENABLE(hdac, Channel);
871 }
872 else
873 {
874 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
875 }
876
877 /* Return function status */
878 return status;
879 }
880 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
881 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
882 /* STM32L4P5xx STM32L4Q5xx */
883 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
884
885 /**
886 * @brief Disables DAC and stop conversion of channel.
887 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
888 * the configuration information for the specified DAC.
889 * @param Channel The selected DAC channel.
890 * This parameter can be one of the following values:
891 * @arg DAC_CHANNEL_1: DAC Channel1 selected
892 * @arg DAC_CHANNEL_2: DAC Channel2 selected
893 * @retval HAL status
894 */
HAL_DAC_Stop_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel)895 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
896 {
897 /* Check the parameters */
898 assert_param(IS_DAC_CHANNEL(Channel));
899
900 /* Disable the selected DAC channel DMA request */
901 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL));
902
903 /* Disable the Peripheral */
904 __HAL_DAC_DISABLE(hdac, Channel);
905
906 /* Disable the DMA channel */
907 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
908 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \
909 defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
910 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
911 /* Channel1 is used */
912 if (Channel == DAC_CHANNEL_1)
913 {
914 /* Disable the DMA channel */
915 (void)HAL_DMA_Abort(hdac->DMA_Handle1);
916
917 /* Disable the DAC DMA underrun interrupt */
918 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
919 }
920 else /* Channel2 is used for */
921 {
922 /* Disable the DMA channel */
923 (void)HAL_DMA_Abort(hdac->DMA_Handle2);
924
925 /* Disable the DAC DMA underrun interrupt */
926 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
927 }
928 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
929 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
930 /* STM32L4P5xx STM32L4Q5xx */
931 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
932
933 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
934 /* Disable the DMA channel */
935 (void)HAL_DMA_Abort(hdac->DMA_Handle1);
936
937 /* Disable the DAC DMA underrun interrupt */
938 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
939 #endif /* STM32L451xx STM32L452xx STM32L462xx */
940
941 /* Return function status */
942 return HAL_OK;
943 }
944
945 /* DAC channel 2 is available on top of DAC channel 1 in */
946 /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
947 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
948
949 /**
950 * @brief Handles DAC interrupt request
951 * This function uses the interruption of DMA
952 * underrun.
953 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
954 * the configuration information for the specified DAC.
955 * @retval None
956 */
HAL_DAC_IRQHandler(DAC_HandleTypeDef * hdac)957 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
958 {
959 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
960 {
961 /* Check underrun flag of DAC channel 1 */
962 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
963 {
964 /* Change DAC state to error state */
965 hdac->State = HAL_DAC_STATE_ERROR;
966
967 /* Set DAC error code to chanel1 DMA underrun error */
968 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
969
970 /* Clear the underrun flag */
971 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
972
973 /* Disable the selected DAC channel1 DMA request */
974 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
975
976 /* Error callback */
977 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
978 hdac->DMAUnderrunCallbackCh1(hdac);
979 #else
980 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
981 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
982 }
983 }
984 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
985 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \
986 defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
987 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
988 if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
989 {
990 /* Check underrun flag of DAC channel 2 */
991 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
992 {
993 /* Change DAC state to error state */
994 hdac->State = HAL_DAC_STATE_ERROR;
995
996 /* Set DAC error code to channel2 DMA underrun error */
997 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
998
999 /* Clear the underrun flag */
1000 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
1001
1002 /* Disable the selected DAC channel2 DMA request */
1003 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
1004
1005 /* Error callback */
1006 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1007 hdac->DMAUnderrunCallbackCh2(hdac);
1008 #else
1009 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
1010 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1011 }
1012 }
1013 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
1014 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
1015 /* STM32L4P5xx STM32L4Q5xx */
1016 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
1017 }
1018
1019 /**
1020 * @brief Set the specified data holding register value for DAC channel.
1021 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1022 * the configuration information for the specified DAC.
1023 * @param Channel The selected DAC channel.
1024 * This parameter can be one of the following values:
1025 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1026 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1027 * @param Alignment Specifies the data alignment.
1028 * This parameter can be one of the following values:
1029 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
1030 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
1031 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
1032 * @param Data Data to be loaded in the selected data holding register.
1033 * @retval HAL status
1034 */
HAL_DAC_SetValue(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Alignment,uint32_t Data)1035 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
1036 {
1037 __IO uint32_t tmp = 0;
1038
1039 /* Check the parameters */
1040 assert_param(IS_DAC_CHANNEL(Channel));
1041 assert_param(IS_DAC_ALIGN(Alignment));
1042 assert_param(IS_DAC_DATA(Data));
1043
1044 tmp = (uint32_t)hdac->Instance;
1045 if (Channel == DAC_CHANNEL_1)
1046 {
1047 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
1048 }
1049 else
1050 {
1051 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
1052 }
1053
1054 /* Set the DAC channel selected data holding register */
1055 *(__IO uint32_t *) tmp = Data;
1056
1057 /* Return function status */
1058 return HAL_OK;
1059 }
1060
1061 /**
1062 * @brief Conversion complete callback in non-blocking mode for Channel1
1063 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1064 * the configuration information for the specified DAC.
1065 * @retval None
1066 */
HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef * hdac)1067 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
1068 {
1069 /* Prevent unused argument(s) compilation warning */
1070 UNUSED(hdac);
1071
1072 /* NOTE : This function should not be modified, when the callback is needed,
1073 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
1074 */
1075 }
1076
1077 /**
1078 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
1079 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1080 * the configuration information for the specified DAC.
1081 * @retval None
1082 */
HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef * hdac)1083 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
1084 {
1085 /* Prevent unused argument(s) compilation warning */
1086 UNUSED(hdac);
1087
1088 /* NOTE : This function should not be modified, when the callback is needed,
1089 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
1090 */
1091 }
1092
1093 /**
1094 * @brief Error DAC callback for Channel1.
1095 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1096 * the configuration information for the specified DAC.
1097 * @retval None
1098 */
HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef * hdac)1099 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
1100 {
1101 /* Prevent unused argument(s) compilation warning */
1102 UNUSED(hdac);
1103
1104 /* NOTE : This function should not be modified, when the callback is needed,
1105 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
1106 */
1107 }
1108
1109 /**
1110 * @brief DMA underrun DAC callback for channel1.
1111 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1112 * the configuration information for the specified DAC.
1113 * @retval None
1114 */
HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef * hdac)1115 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
1116 {
1117 /* Prevent unused argument(s) compilation warning */
1118 UNUSED(hdac);
1119
1120 /* NOTE : This function should not be modified, when the callback is needed,
1121 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
1122 */
1123 }
1124
1125 /**
1126 * @}
1127 */
1128
1129 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
1130 * @brief Peripheral Control functions
1131 *
1132 @verbatim
1133 ==============================================================================
1134 ##### Peripheral Control functions #####
1135 ==============================================================================
1136 [..] This section provides functions allowing to:
1137 (+) Configure channels.
1138 (+) Set the specified data holding register value for DAC channel.
1139
1140 @endverbatim
1141 * @{
1142 */
1143
1144 /**
1145 * @brief Returns the last data output value of the selected DAC channel.
1146 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1147 * the configuration information for the specified DAC.
1148 * @param Channel The selected DAC channel.
1149 * This parameter can be one of the following values:
1150 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1151 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1152 * @retval The selected DAC channel data output value.
1153 */
HAL_DAC_GetValue(DAC_HandleTypeDef * hdac,uint32_t Channel)1154 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel)
1155 {
1156 /* Check the parameters */
1157 assert_param(IS_DAC_CHANNEL(Channel));
1158
1159 /* Returns the DAC channel data output register value */
1160 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
1161 /* Prevent unused argument(s) compilation warning if no assert_param check */
1162 UNUSED(Channel);
1163
1164 return hdac->Instance->DOR1;
1165 #endif /* STM32L451xx STM32L452xx STM32L462xx */
1166
1167 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
1168 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \
1169 defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
1170 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
1171 if(Channel == DAC_CHANNEL_1)
1172 {
1173 return hdac->Instance->DOR1;
1174 }
1175 else
1176 {
1177 return hdac->Instance->DOR2;
1178 }
1179 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
1180 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
1181 /* STM32L4P5xx STM32L4Q5xx */
1182 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
1183 }
1184
1185 /**
1186 * @brief Configures the selected DAC channel.
1187 * @note By calling this function, the high frequency interface mode (HFSEL bits)
1188 * will be set. This parameter scope is the DAC instance. As the function
1189 * is called for each channel, the @ref DAC_HighFrequency of @arg sConfig
1190 * must be the same at each call.
1191 * (or DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC self detect).
1192 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1193 * the configuration information for the specified DAC.
1194 * @param sConfig DAC configuration structure.
1195 * @param Channel The selected DAC channel.
1196 * This parameter can be one of the following values:
1197 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1198 * @arg DAC_CHANNEL_2: DAC Channel2 selected (Whenever present)
1199 * @retval HAL status
1200 */
HAL_DAC_ConfigChannel(DAC_HandleTypeDef * hdac,DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)1201 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
1202 {
1203 uint32_t tmpreg1;
1204 uint32_t tmpreg2;
1205 uint32_t tickstart = 0U;
1206 #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
1207 uint32_t hclkfreq;
1208 #endif /* STM32L4P5xx STM32L4Q5xx STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
1209
1210 /* Check the DAC parameters */
1211 #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
1212 assert_param(IS_DAC_HIGH_FREQUENCY_MODE(sConfig->DAC_HighFrequency));
1213 #endif /* STM32L4P5xx STM32L4Q5xx STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
1214 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
1215 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
1216 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
1217 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
1218 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
1219 {
1220 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
1221 }
1222 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
1223 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
1224 {
1225 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
1226 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
1227 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
1228 }
1229 assert_param(IS_DAC_CHANNEL(Channel));
1230
1231 /* Process locked */
1232 __HAL_LOCK(hdac);
1233
1234 /* Change DAC state */
1235 hdac->State = HAL_DAC_STATE_BUSY;
1236
1237 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
1238 /* Sample on old configuration */
1239 {
1240 /* Get timeout */
1241 tickstart = HAL_GetTick();
1242
1243 if (Channel == DAC_CHANNEL_1)
1244 {
1245
1246 /* SHSR1 can be written when BWST1 is cleared */
1247 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1248 {
1249 /* Check for the Timeout */
1250 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1251 {
1252 /* New check to avoid false timeout detection in case of preemption */
1253 if(((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1254 {
1255 /* Update error code */
1256 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1257
1258 /* Change the DMA state */
1259 hdac->State = HAL_DAC_STATE_TIMEOUT;
1260
1261 return HAL_TIMEOUT;
1262 }
1263 }
1264 }
1265 HAL_Delay(1);
1266 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1267 }
1268 #if !defined (STM32L451xx) & !defined (STM32L452xx) & !defined (STM32L462xx)
1269 else /* Channel 2 */
1270 {
1271 /* SHSR2 can be written when BWST2 is cleared */
1272
1273 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1274 {
1275 /* Check for the Timeout */
1276 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1277 {
1278 /* New check to avoid false timeout detection in case of preemption */
1279 if(((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1280 {
1281 /* Update error code */
1282 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1283
1284 /* Change the DMA state */
1285 hdac->State = HAL_DAC_STATE_TIMEOUT;
1286
1287 return HAL_TIMEOUT;
1288 }
1289 }
1290 }
1291 HAL_Delay(1U);
1292 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1293 }
1294 #endif /* STM32L451xx STM32L452xx STM32L462xx */
1295
1296 /* HoldTime */
1297 MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL), (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
1298 /* RefreshTime */
1299 MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL), (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
1300 }
1301
1302 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
1303 /* USER TRIMMING */
1304 {
1305 /* Get the DAC CCR value */
1306 tmpreg1 = hdac->Instance->CCR;
1307 /* Clear trimming value */
1308 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
1309 /* Configure for the selected trimming offset */
1310 tmpreg2 = sConfig->DAC_TrimmingValue;
1311 /* Calculate CCR register value depending on DAC_Channel */
1312 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1313 /* Write to DAC CCR */
1314 hdac->Instance->CCR = tmpreg1;
1315 }
1316 /* else factory trimming is used (factory setting are available at reset)*/
1317 /* SW Nothing has nothing to do */
1318
1319 /* Get the DAC MCR value */
1320 tmpreg1 = hdac->Instance->MCR;
1321 /* Clear DAC_MCR_MODEx bits */
1322 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
1323 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
1324 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral);
1325 /* Calculate MCR register value depending on DAC_Channel */
1326 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1327 /* Write to DAC MCR */
1328 hdac->Instance->MCR = tmpreg1;
1329
1330 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
1331 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
1332
1333 /* Get the DAC CR value */
1334 tmpreg1 = hdac->Instance->CR;
1335 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
1336 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
1337 /* Configure for the selected DAC channel: trigger */
1338 /* Set TSELx and TENx bits according to DAC_Trigger value */
1339 tmpreg2 = sConfig->DAC_Trigger;
1340 /* Calculate CR register value depending on DAC_Channel */
1341 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1342 #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
1343 if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ == sConfig->DAC_HighFrequency)
1344 {
1345 tmpreg1 |= DAC_CR_HFSEL;
1346 }
1347 else
1348 {
1349 if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE == sConfig->DAC_HighFrequency)
1350 {
1351 tmpreg1 &= ~(DAC_CR_HFSEL);
1352 }
1353 else /* Automatic selection */
1354 {
1355 hclkfreq = HAL_RCC_GetHCLKFreq();
1356 if (hclkfreq > HFSEL_ENABLE_THRESHOLD_80MHZ)
1357 {
1358 /* High frequency enable when HCLK frequency higher than 80 */
1359 tmpreg1 |= DAC_CR_HFSEL;
1360 }
1361 else
1362 {
1363 /* High frequency disable when HCLK frequency higher than 80 */
1364 tmpreg1 &= ~(DAC_CR_HFSEL);
1365 }
1366 }
1367 }
1368
1369 #endif /* STM32L4P5xx STM32L4Q5xx STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
1370
1371 /* Write to DAC CR */
1372 hdac->Instance->CR = tmpreg1;
1373 /* Disable wave generation */
1374 hdac->Instance->CR &= ~(DAC_CR_WAVE1 << (Channel & 0x10UL));
1375
1376 /* Change DAC state */
1377 hdac->State = HAL_DAC_STATE_READY;
1378
1379 /* Process unlocked */
1380 __HAL_UNLOCK(hdac);
1381
1382 /* Return function status */
1383 return HAL_OK;
1384 }
1385
1386 /**
1387 * @}
1388 */
1389
1390 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
1391 * @brief Peripheral State and Errors functions
1392 *
1393 @verbatim
1394 ==============================================================================
1395 ##### Peripheral State and Errors functions #####
1396 ==============================================================================
1397 [..]
1398 This subsection provides functions allowing to
1399 (+) Check the DAC state.
1400 (+) Check the DAC Errors.
1401
1402 @endverbatim
1403 * @{
1404 */
1405
1406 /**
1407 * @brief return the DAC handle state
1408 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1409 * the configuration information for the specified DAC.
1410 * @retval HAL state
1411 */
HAL_DAC_GetState(DAC_HandleTypeDef * hdac)1412 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac)
1413 {
1414 /* Return DAC handle state */
1415 return hdac->State;
1416 }
1417
1418
1419 /**
1420 * @brief Return the DAC error code
1421 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1422 * the configuration information for the specified DAC.
1423 * @retval DAC Error Code
1424 */
HAL_DAC_GetError(DAC_HandleTypeDef * hdac)1425 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
1426 {
1427 return hdac->ErrorCode;
1428 }
1429
1430 /**
1431 * @}
1432 */
1433
1434 /**
1435 * @}
1436 */
1437
1438 /** @addtogroup DAC_Exported_Functions
1439 * @{
1440 */
1441
1442 /** @addtogroup DAC_Exported_Functions_Group1
1443 * @{
1444 */
1445 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1446 /**
1447 * @brief Register a User DAC Callback
1448 * To be used instead of the weak (overridden) predefined callback
1449 * @param hdac DAC handle
1450 * @param CallbackID ID of the callback to be registered
1451 * This parameter can be one of the following values:
1452 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID
1453 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID
1454 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1455 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1456 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1457 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1458 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1459 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1460 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1461 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1462 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1463 *
1464 * @param pCallback pointer to the Callback function
1465 * @retval status
1466 */
HAL_DAC_RegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID,pDAC_CallbackTypeDef pCallback)1467 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
1468 pDAC_CallbackTypeDef pCallback)
1469 {
1470 HAL_StatusTypeDef status = HAL_OK;
1471
1472 if (pCallback == NULL)
1473 {
1474 /* Update the error code */
1475 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1476 return HAL_ERROR;
1477 }
1478
1479 /* Process locked */
1480 __HAL_LOCK(hdac);
1481
1482 if (hdac->State == HAL_DAC_STATE_READY)
1483 {
1484 switch (CallbackID)
1485 {
1486 case HAL_DAC_CH1_COMPLETE_CB_ID :
1487 hdac->ConvCpltCallbackCh1 = pCallback;
1488 break;
1489 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1490 hdac->ConvHalfCpltCallbackCh1 = pCallback;
1491 break;
1492 case HAL_DAC_CH1_ERROR_ID :
1493 hdac->ErrorCallbackCh1 = pCallback;
1494 break;
1495 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1496 hdac->DMAUnderrunCallbackCh1 = pCallback;
1497 break;
1498 case HAL_DAC_CH2_COMPLETE_CB_ID :
1499 hdac->ConvCpltCallbackCh2 = pCallback;
1500 break;
1501 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1502 hdac->ConvHalfCpltCallbackCh2 = pCallback;
1503 break;
1504 case HAL_DAC_CH2_ERROR_ID :
1505 hdac->ErrorCallbackCh2 = pCallback;
1506 break;
1507 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1508 hdac->DMAUnderrunCallbackCh2 = pCallback;
1509 break;
1510 case HAL_DAC_MSPINIT_CB_ID :
1511 hdac->MspInitCallback = pCallback;
1512 break;
1513 case HAL_DAC_MSPDEINIT_CB_ID :
1514 hdac->MspDeInitCallback = pCallback;
1515 break;
1516 default :
1517 /* Update the error code */
1518 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1519 /* update return status */
1520 status = HAL_ERROR;
1521 break;
1522 }
1523 }
1524 else if (hdac->State == HAL_DAC_STATE_RESET)
1525 {
1526 switch (CallbackID)
1527 {
1528 case HAL_DAC_MSPINIT_CB_ID :
1529 hdac->MspInitCallback = pCallback;
1530 break;
1531 case HAL_DAC_MSPDEINIT_CB_ID :
1532 hdac->MspDeInitCallback = pCallback;
1533 break;
1534 default :
1535 /* Update the error code */
1536 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1537 /* update return status */
1538 status = HAL_ERROR;
1539 break;
1540 }
1541 }
1542 else
1543 {
1544 /* Update the error code */
1545 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1546 /* update return status */
1547 status = HAL_ERROR;
1548 }
1549
1550 /* Release Lock */
1551 __HAL_UNLOCK(hdac);
1552 return status;
1553 }
1554
1555 /**
1556 * @brief Unregister a User DAC Callback
1557 * DAC Callback is redirected to the weak (overridden) predefined callback
1558 * @param hdac DAC handle
1559 * @param CallbackID ID of the callback to be unregistered
1560 * This parameter can be one of the following values:
1561 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID
1562 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1563 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1564 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1565 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1566 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1567 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1568 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1569 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1570 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1571 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks
1572 * @retval status
1573 */
HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID)1574 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID)
1575 {
1576 HAL_StatusTypeDef status = HAL_OK;
1577
1578 /* Process locked */
1579 __HAL_LOCK(hdac);
1580
1581 if (hdac->State == HAL_DAC_STATE_READY)
1582 {
1583 switch (CallbackID)
1584 {
1585 case HAL_DAC_CH1_COMPLETE_CB_ID :
1586 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1587 break;
1588 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1589 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1590 break;
1591 case HAL_DAC_CH1_ERROR_ID :
1592 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1593 break;
1594 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1595 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1596 break;
1597 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
1598 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \
1599 defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
1600 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
1601 case HAL_DAC_CH2_COMPLETE_CB_ID :
1602 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1603 break;
1604 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1605 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1606 break;
1607 case HAL_DAC_CH2_ERROR_ID :
1608 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1609 break;
1610 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1611 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1612 break;
1613 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
1614 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
1615 /* STM32L4P5xx STM32L4Q5xx */
1616 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
1617 case HAL_DAC_MSPINIT_CB_ID :
1618 hdac->MspInitCallback = HAL_DAC_MspInit;
1619 break;
1620 case HAL_DAC_MSPDEINIT_CB_ID :
1621 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1622 break;
1623 case HAL_DAC_ALL_CB_ID :
1624 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1625 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1626 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1627 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1628 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
1629 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \
1630 defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
1631 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
1632 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1633 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1634 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1635 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1636 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
1637 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
1638 /* STM32L4P5xx STM32L4Q5xx */
1639 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
1640 hdac->MspInitCallback = HAL_DAC_MspInit;
1641 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1642 break;
1643 default :
1644 /* Update the error code */
1645 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1646 /* update return status */
1647 status = HAL_ERROR;
1648 break;
1649 }
1650 }
1651 else if (hdac->State == HAL_DAC_STATE_RESET)
1652 {
1653 switch (CallbackID)
1654 {
1655 case HAL_DAC_MSPINIT_CB_ID :
1656 hdac->MspInitCallback = HAL_DAC_MspInit;
1657 break;
1658 case HAL_DAC_MSPDEINIT_CB_ID :
1659 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1660 break;
1661 default :
1662 /* Update the error code */
1663 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1664 /* update return status */
1665 status = HAL_ERROR;
1666 break;
1667 }
1668 }
1669 else
1670 {
1671 /* Update the error code */
1672 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1673 /* update return status */
1674 status = HAL_ERROR;
1675 }
1676
1677 /* Release Lock */
1678 __HAL_UNLOCK(hdac);
1679 return status;
1680 }
1681 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1682
1683 /**
1684 * @}
1685 */
1686
1687 /**
1688 * @}
1689 */
1690
1691 /** @addtogroup DAC_Private_Functions
1692 * @{
1693 */
1694
1695 /**
1696 * @brief DMA conversion complete callback.
1697 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1698 * the configuration information for the specified DMA module.
1699 * @retval None
1700 */
DAC_DMAConvCpltCh1(DMA_HandleTypeDef * hdma)1701 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
1702 {
1703 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1704
1705 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1706 hdac->ConvCpltCallbackCh1(hdac);
1707 #else
1708 HAL_DAC_ConvCpltCallbackCh1(hdac);
1709 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1710
1711 hdac->State = HAL_DAC_STATE_READY;
1712 }
1713
1714 /**
1715 * @brief DMA half transfer complete callback.
1716 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1717 * the configuration information for the specified DMA module.
1718 * @retval None
1719 */
DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef * hdma)1720 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1721 {
1722 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1723 /* Conversion complete callback */
1724 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1725 hdac->ConvHalfCpltCallbackCh1(hdac);
1726 #else
1727 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1728 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1729 }
1730
1731 /**
1732 * @brief DMA error callback
1733 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1734 * the configuration information for the specified DMA module.
1735 * @retval None
1736 */
DAC_DMAErrorCh1(DMA_HandleTypeDef * hdma)1737 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1738 {
1739 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1740
1741 /* Set DAC error code to DMA error */
1742 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1743
1744 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1745 hdac->ErrorCallbackCh1(hdac);
1746 #else
1747 HAL_DAC_ErrorCallbackCh1(hdac);
1748 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1749
1750 hdac->State = HAL_DAC_STATE_READY;
1751 }
1752
1753 /**
1754 * @}
1755 */
1756
1757 /**
1758 * @}
1759 */
1760
1761 #endif /* DAC1 */
1762
1763 #endif /* HAL_DAC_MODULE_ENABLED */
1764
1765 /**
1766 * @}
1767 */
1768
1769
