1 /**
2 ******************************************************************************
3 * @file stm32l1xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 #if defined(USE_FULL_LL_DRIVER)
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32l1xx_ll_usart.h"
23 #include "stm32l1xx_ll_rcc.h"
24 #include "stm32l1xx_ll_bus.h"
25 #ifdef USE_FULL_ASSERT
26 #include "stm32_assert.h"
27 #else
28 #define assert_param(expr) ((void)0U)
29 #endif
30
31 /** @addtogroup STM32L1xx_LL_Driver
32 * @{
33 */
34
35 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
36
37 /** @addtogroup USART_LL
38 * @{
39 */
40
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /** @addtogroup USART_LL_Private_Constants
45 * @{
46 */
47
48 /**
49 * @}
50 */
51
52
53 /* Private macros ------------------------------------------------------------*/
54 /** @addtogroup USART_LL_Private_Macros
55 * @{
56 */
57
58 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
59 * divided by the smallest oversampling used on the USART (i.e. 8) */
60 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 4000000U)
61
62 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
63 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
64
65 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
66 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
67 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
68 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
69
70 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
71 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
72 || ((__VALUE__) == LL_USART_PARITY_ODD))
73
74 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
75 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
76
77 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
78 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
79
80 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
81 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
82
83 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
84 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
85
86 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
87 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
88
89 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
90 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
91
92 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
93 || ((__VALUE__) == LL_USART_STOPBITS_1) \
94 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
95 || ((__VALUE__) == LL_USART_STOPBITS_2))
96
97 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
98 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
99 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
100 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
101
102 /**
103 * @}
104 */
105
106 /* Private function prototypes -----------------------------------------------*/
107
108 /* Exported functions --------------------------------------------------------*/
109 /** @addtogroup USART_LL_Exported_Functions
110 * @{
111 */
112
113 /** @addtogroup USART_LL_EF_Init
114 * @{
115 */
116
117 /**
118 * @brief De-initialize USART registers (Registers restored to their default values).
119 * @param USARTx USART Instance
120 * @retval An ErrorStatus enumeration value:
121 * - SUCCESS: USART registers are de-initialized
122 * - ERROR: USART registers are not de-initialized
123 */
LL_USART_DeInit(const USART_TypeDef * USARTx)124 ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
125 {
126 ErrorStatus status = SUCCESS;
127
128 /* Check the parameters */
129 assert_param(IS_UART_INSTANCE(USARTx));
130
131 if (USARTx == USART1)
132 {
133 /* Force reset of USART clock */
134 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
135
136 /* Release reset of USART clock */
137 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
138 }
139 else if (USARTx == USART2)
140 {
141 /* Force reset of USART clock */
142 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
143
144 /* Release reset of USART clock */
145 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
146 }
147 else if (USARTx == USART3)
148 {
149 /* Force reset of USART clock */
150 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
151
152 /* Release reset of USART clock */
153 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
154 }
155 #if defined(UART4)
156 else if (USARTx == UART4)
157 {
158 /* Force reset of UART clock */
159 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
160
161 /* Release reset of UART clock */
162 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
163 }
164 #endif /* UART4 */
165 #if defined(UART5)
166 else if (USARTx == UART5)
167 {
168 /* Force reset of UART clock */
169 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
170
171 /* Release reset of UART clock */
172 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
173 }
174 #endif /* UART5 */
175 else
176 {
177 status = ERROR;
178 }
179
180 return (status);
181 }
182
183 /**
184 * @brief Initialize USART registers according to the specified
185 * parameters in USART_InitStruct.
186 * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
187 * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
188 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
189 * @param USARTx USART Instance
190 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
191 * that contains the configuration information for the specified USART peripheral.
192 * @retval An ErrorStatus enumeration value:
193 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
194 * - ERROR: Problem occurred during USART Registers initialization
195 */
LL_USART_Init(USART_TypeDef * USARTx,const LL_USART_InitTypeDef * USART_InitStruct)196 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
197 {
198 ErrorStatus status = ERROR;
199 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
200 LL_RCC_ClocksTypeDef rcc_clocks;
201
202 /* Check the parameters */
203 assert_param(IS_UART_INSTANCE(USARTx));
204 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
205 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
206 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
207 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
208 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
209 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
210 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
211
212 /* USART needs to be in disabled state, in order to be able to configure some bits in
213 CRx registers */
214 if (LL_USART_IsEnabled(USARTx) == 0U)
215 {
216 /*---------------------------- USART CR1 Configuration -----------------------
217 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
218 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
219 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
220 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
221 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
222 */
223 MODIFY_REG(USARTx->CR1,
224 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
225 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
226 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
227 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
228
229 /*---------------------------- USART CR2 Configuration -----------------------
230 * Configure USARTx CR2 (Stop bits) with parameters:
231 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
232 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
233 */
234 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
235
236 /*---------------------------- USART CR3 Configuration -----------------------
237 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
238 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
239 */
240 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
241
242 /*---------------------------- USART BRR Configuration -----------------------
243 * Retrieve Clock frequency used for USART Peripheral
244 */
245 LL_RCC_GetSystemClocksFreq(&rcc_clocks);
246 if (USARTx == USART1)
247 {
248 periphclk = rcc_clocks.PCLK2_Frequency;
249 }
250 else if (USARTx == USART2)
251 {
252 periphclk = rcc_clocks.PCLK1_Frequency;
253 }
254 else if (USARTx == USART3)
255 {
256 periphclk = rcc_clocks.PCLK1_Frequency;
257 }
258 #if defined(UART4)
259 else if (USARTx == UART4)
260 {
261 periphclk = rcc_clocks.PCLK1_Frequency;
262 }
263 #endif /* UART4 */
264 #if defined(UART5)
265 else if (USARTx == UART5)
266 {
267 periphclk = rcc_clocks.PCLK1_Frequency;
268 }
269 #endif /* UART5 */
270 else
271 {
272 /* Nothing to do, as error code is already assigned to ERROR value */
273 }
274
275 /* Configure the USART Baud Rate :
276 - valid baud rate value (different from 0) is required
277 - Peripheral clock as returned by RCC service, should be valid (different from 0).
278 */
279 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
280 && (USART_InitStruct->BaudRate != 0U))
281 {
282 status = SUCCESS;
283 LL_USART_SetBaudRate(USARTx,
284 periphclk,
285 USART_InitStruct->OverSampling,
286 USART_InitStruct->BaudRate);
287
288 /* Check BRR is greater than or equal to 16d */
289 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
290 }
291 }
292 /* Endif (=> USART not in Disabled state => return ERROR) */
293
294 return (status);
295 }
296
297 /**
298 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
299 * @param USART_InitStruct Pointer to a @ref LL_USART_InitTypeDef structure
300 * whose fields will be set to default values.
301 * @retval None
302 */
303
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)304 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
305 {
306 /* Set USART_InitStruct fields to default values */
307 USART_InitStruct->BaudRate = 9600U;
308 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
309 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
310 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
311 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
312 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
313 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
314 }
315
316 /**
317 * @brief Initialize USART Clock related settings according to the
318 * specified parameters in the USART_ClockInitStruct.
319 * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
320 * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
321 * @param USARTx USART Instance
322 * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure
323 * that contains the Clock configuration information for the specified USART peripheral.
324 * @retval An ErrorStatus enumeration value:
325 * - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
326 * - ERROR: Problem occurred during USART Registers initialization
327 */
LL_USART_ClockInit(USART_TypeDef * USARTx,const LL_USART_ClockInitTypeDef * USART_ClockInitStruct)328 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
329 {
330 ErrorStatus status = SUCCESS;
331
332 /* Check USART Instance and Clock signal output parameters */
333 assert_param(IS_UART_INSTANCE(USARTx));
334 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
335
336 /* USART needs to be in disabled state, in order to be able to configure some bits in
337 CRx registers */
338 if (LL_USART_IsEnabled(USARTx) == 0U)
339 {
340 /*---------------------------- USART CR2 Configuration -----------------------*/
341 /* If Clock signal has to be output */
342 if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
343 {
344 /* Deactivate Clock signal delivery :
345 * - Disable Clock Output: USART_CR2_CLKEN cleared
346 */
347 LL_USART_DisableSCLKOutput(USARTx);
348 }
349 else
350 {
351 /* Ensure USART instance is USART capable */
352 assert_param(IS_USART_INSTANCE(USARTx));
353
354 /* Check clock related parameters */
355 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
356 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
357 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
358
359 /*---------------------------- USART CR2 Configuration -----------------------
360 * Configure USARTx CR2 (Clock signal related bits) with parameters:
361 * - Enable Clock Output: USART_CR2_CLKEN set
362 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
363 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
364 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
365 */
366 MODIFY_REG(USARTx->CR2,
367 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
368 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
369 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
370 }
371 }
372 /* Else (USART not in Disabled state => return ERROR */
373 else
374 {
375 status = ERROR;
376 }
377
378 return (status);
379 }
380
381 /**
382 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
383 * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure
384 * whose fields will be set to default values.
385 * @retval None
386 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)387 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
388 {
389 /* Set LL_USART_ClockInitStruct fields with default values */
390 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
391 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
392 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
393 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
394 }
395
396 /**
397 * @}
398 */
399
400 /**
401 * @}
402 */
403
404 /**
405 * @}
406 */
407
408 #endif /* USART1 || USART2|| USART3 || UART4 || UART5 */
409
410 /**
411 * @}
412 */
413
414 #endif /* USE_FULL_LL_DRIVER */
415
416
417
