1 /**
2 ******************************************************************************
3 * @file stm32l0xx_hal_adc.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Analog to Digital Convertor (ADC)
7 * peripheral:
8 * + Peripheral Control functions
9 * + Peripheral State functions
10 * Other functions (extended functions) are available in file
11 * "stm32l0xx_hal_adc_ex.c".
12 *
13 ******************************************************************************
14 * @attention
15 *
16 * Copyright (c) 2016 STMicroelectronics.
17 * All rights reserved.
18 *
19 * This software is licensed under terms that can be found in the LICENSE file
20 * in the root directory of this software component.
21 * If no LICENSE file comes with this software, it is provided AS-IS.
22 *
23 ******************************************************************************
24 @verbatim
25 ==============================================================================
26 ##### ADC peripheral features #####
27 ==============================================================================
28 [..]
29 (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution.
30
31 (+) Interrupt generation at the end of regular conversion and in case of
32 analog watchdog or overrun events.
33
34 (+) Single and continuous conversion modes.
35
36 (+) Scan mode for conversion of several channels sequentially.
37
38 (+) Data alignment with in-built data coherency.
39
40 (+) Programmable sampling time (common for all channels)
41
42 (+) External trigger (timer or EXTI) with configurable polarity
43
44 (+) DMA request generation for transfer of conversions data of regular group.
45
46 (+) ADC calibration
47
48 (+) ADC conversion of regular group.
49
50 (+) ADC supply requirements: 1.62 V to 3.6 V.
51
52 (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to
53 Vdda or to an external voltage reference).
54
55
56 ##### How to use this driver #####
57 ==============================================================================
58 [..]
59
60 *** Configuration of top level parameters related to ADC ***
61 ============================================================
62 [..]
63
64 (#) Enable the ADC interface
65 (++) As prerequisite, ADC clock must be configured at RCC top level.
66 Caution: On STM32L0, ADC clock frequency max is 16MHz (refer
67 to device datasheet).
68 Therefore, ADC clock prescaler must be configured in
69 function of ADC clock source frequency to remain below
70 this maximum frequency.
71
72 (++) Two clock settings are mandatory:
73 (+++) ADC clock (core clock, also possibly conversion clock).
74
75 (+++) ADC clock (conversions clock).
76 Two possible clock sources: synchronous clock derived from APB clock
77 or asynchronous clock derived from ADC dedicated HSI RC oscillator
78 16MHz.
79 If asynchronous clock is selected, parameter "HSIState" must be set either:
80 - to "...HSIState = RCC_HSI_ON" to maintain the HSI16 oscillator
81 always enabled: can be used to supply the main system clock.
82
83 (+++) Example:
84 Into HAL_ADC_MspInit() (recommended code location) or with
85 other device clock parameters configuration:
86 (+++) __HAL_RCC_ADC1_CLK_ENABLE(); (mandatory)
87
88 HSI enable (optional: if asynchronous clock selected)
89 (+++) RCC_OscInitTypeDef RCC_OscInitStructure;
90 (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
91 (+++) RCC_OscInitStructure.HSI16CalibrationValue = RCC_HSICALIBRATION_DEFAULT;
92 (+++) RCC_OscInitStructure.HSIState = RCC_HSI_ON;
93 (+++) RCC_OscInitStructure.PLL... (optional if used for system clock)
94 (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
95
96 (++) ADC clock source and clock prescaler are configured at ADC level with
97 parameter "ClockPrescaler" using function HAL_ADC_Init().
98
99 (#) ADC pins configuration
100 (++) Enable the clock for the ADC GPIOs
101 using macro __HAL_RCC_GPIOx_CLK_ENABLE()
102 (++) Configure these ADC pins in analog mode
103 using function HAL_GPIO_Init()
104
105 (#) Optionally, in case of usage of ADC with interruptions:
106 (++) Configure the NVIC for ADC
107 using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
108 (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
109 into the function of corresponding ADC interruption vector
110 ADCx_IRQHandler().
111
112 (#) Optionally, in case of usage of DMA:
113 (++) Configure the DMA (DMA channel, mode normal or circular, ...)
114 using function HAL_DMA_Init().
115 (++) Configure the NVIC for DMA
116 using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
117 (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
118 into the function of corresponding DMA interruption vector
119 DMAx_Channelx_IRQHandler().
120
121 *** Configuration of ADC, group regular, channels parameters ***
122 ================================================================
123 [..]
124
125 (#) Configure the ADC parameters (resolution, data alignment, ...)
126 and regular group parameters (conversion trigger, sequencer, ...)
127 using function HAL_ADC_Init().
128
129 (#) Configure the channels for regular group parameters (channel number,
130 channel rank into sequencer, ..., into regular group)
131 using function HAL_ADC_ConfigChannel().
132
133 (#) Optionally, configure the analog watchdog parameters (channels
134 monitored, thresholds, ...)
135 using function HAL_ADC_AnalogWDGConfig().
136
137
138 (#) When device is in mode low-power (low-power run, low-power sleep or stop mode),
139 function "HAL_ADCEx_EnableVREFINT()" must be called before function HAL_ADC_Init().
140 In case of internal temperature sensor to be measured:
141 function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly
142
143 *** Execution of ADC conversions ***
144 ====================================
145 [..]
146
147 (#) Optionally, perform an automatic ADC calibration to improve the
148 conversion accuracy
149 using function HAL_ADCEx_Calibration_Start().
150
151 (#) ADC driver can be used among three modes: polling, interruption,
152 transfer by DMA.
153
154 (++) ADC conversion by polling:
155 (+++) Activate the ADC peripheral and start conversions
156 using function HAL_ADC_Start()
157 (+++) Wait for ADC conversion completion
158 using function HAL_ADC_PollForConversion()
159 (+++) Retrieve conversion results
160 using function HAL_ADC_GetValue()
161 (+++) Stop conversion and disable the ADC peripheral
162 using function HAL_ADC_Stop()
163
164 (++) ADC conversion by interruption:
165 (+++) Activate the ADC peripheral and start conversions
166 using function HAL_ADC_Start_IT()
167 (+++) Wait for ADC conversion completion by call of function
168 HAL_ADC_ConvCpltCallback()
169 (this function must be implemented in user program)
170 (+++) Retrieve conversion results
171 using function HAL_ADC_GetValue()
172 (+++) Stop conversion and disable the ADC peripheral
173 using function HAL_ADC_Stop_IT()
174
175 (++) ADC conversion with transfer by DMA:
176 (+++) Activate the ADC peripheral and start conversions
177 using function HAL_ADC_Start_DMA()
178 (+++) Wait for ADC conversion completion by call of function
179 HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
180 (these functions must be implemented in user program)
181 (+++) Conversion results are automatically transferred by DMA into
182 destination variable address.
183 (+++) Stop conversion and disable the ADC peripheral
184 using function HAL_ADC_Stop_DMA()
185
186 [..]
187
188 (@) Callback functions must be implemented in user program:
189 (+@) HAL_ADC_ErrorCallback()
190 (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)
191 (+@) HAL_ADC_ConvCpltCallback()
192 (+@) HAL_ADC_ConvHalfCpltCallback
193
194 *** Deinitialization of ADC ***
195 ============================================================
196 [..]
197
198 (#) Disable the ADC interface
199 (++) ADC clock can be hard reset and disabled at RCC top level.
200 (++) Hard reset of ADC peripherals
201 using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
202 (++) ADC clock disable
203 using the equivalent macro/functions as configuration step.
204 (+++) Example:
205 Into HAL_ADC_MspDeInit() (recommended code location) or with
206 other device clock parameters configuration:
207 (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
208 (+++) RCC_OscInitStructure.HSIState = RCC_HSI_OFF; (if not used for system clock)
209 (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
210
211 (#) ADC pins configuration
212 (++) Disable the clock for the ADC GPIOs
213 using macro __HAL_RCC_GPIOx_CLK_DISABLE()
214
215 (#) Optionally, in case of usage of ADC with interruptions:
216 (++) Disable the NVIC for ADC
217 using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
218
219 (#) Optionally, in case of usage of DMA:
220 (++) Deinitialize the DMA
221 using function HAL_DMA_Init().
222 (++) Disable the NVIC for DMA
223 using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
224
225 [..]
226
227 *** Callback registration ***
228 =============================================
229 [..]
230
231 The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
232 allows the user to configure dynamically the driver callbacks.
233 Use Functions HAL_ADC_RegisterCallback()
234 to register an interrupt callback.
235 [..]
236
237 Function HAL_ADC_RegisterCallback() allows to register following callbacks:
238 (+) ConvCpltCallback : ADC conversion complete callback
239 (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
240 (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
241 (+) ErrorCallback : ADC error callback
242 (+) MspInitCallback : ADC Msp Init callback
243 (+) MspDeInitCallback : ADC Msp DeInit callback
244 This function takes as parameters the HAL peripheral handle, the Callback ID
245 and a pointer to the user callback function.
246 [..]
247
248 Use function HAL_ADC_UnRegisterCallback to reset a callback to the default
249 weak function.
250 [..]
251
252 HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
253 and the Callback ID.
254 This function allows to reset following callbacks:
255 (+) ConvCpltCallback : ADC conversion complete callback
256 (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
257 (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
258 (+) ErrorCallback : ADC error callback
259 (+) MspInitCallback : ADC Msp Init callback
260 (+) MspDeInitCallback : ADC Msp DeInit callback
261 [..]
262
263 By default, after the HAL_ADC_Init() and when the state is HAL_ADC_STATE_RESET
264 all callbacks are set to the corresponding weak functions:
265 examples HAL_ADC_ConvCpltCallback(), HAL_ADC_ErrorCallback().
266 Exception done for MspInit and MspDeInit functions that are
267 reset to the legacy weak functions in the HAL_ADC_Init()/ HAL_ADC_DeInit() only when
268 these callbacks are null (not registered beforehand).
269 [..]
270
271 If MspInit or MspDeInit are not null, the HAL_ADC_Init()/ HAL_ADC_DeInit()
272 keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
273 [..]
274
275 Callbacks can be registered/unregistered in HAL_ADC_STATE_READY state only.
276 Exception done MspInit/MspDeInit functions that can be registered/unregistered
277 in HAL_ADC_STATE_READY or HAL_ADC_STATE_RESET state,
278 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
279 [..]
280
281 Then, the user first registers the MspInit/MspDeInit user callbacks
282 using HAL_ADC_RegisterCallback() before calling HAL_ADC_DeInit()
283 or HAL_ADC_Init() function.
284 [..]
285
286 When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
287 not defined, the callback registration feature is not available and all callbacks
288 are set to the corresponding weak functions.
289
290 @endverbatim
291 ******************************************************************************
292 */
293
294 /* Includes ------------------------------------------------------------------*/
295 #include "stm32l0xx_hal.h"
296
297 /** @addtogroup STM32L0xx_HAL_Driver
298 * @{
299 */
300
301 /** @defgroup ADC ADC
302 * @brief ADC HAL module driver
303 * @{
304 */
305
306 #ifdef HAL_ADC_MODULE_ENABLED
307
308 /* Private typedef -----------------------------------------------------------*/
309 /* Private define ------------------------------------------------------------*/
310
311 /** @defgroup ADC_Private_Constants ADC Private Constants
312 * @{
313 */
314
315 /* Delay for ADC stabilization time. */
316 /* Maximum delay is 1us (refer to device datasheet, parameter tSTART). */
317 /* Unit: us */
318 #define ADC_STAB_DELAY_US (1U)
319
320 /* Delay for temperature sensor stabilization time. */
321 /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
322 /* Unit: us */
323 #define ADC_TEMPSENSOR_DELAY_US (10U)
324 /**
325 * @}
326 */
327
328 /* Private macro -------------------------------------------------------------*/
329 /* Private variables ---------------------------------------------------------*/
330 /* Private function prototypes -----------------------------------------------*/
331 /** @defgroup ADC_Private_Functions ADC Private Functions
332 * @{
333 */
334 static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef *hadc);
335 static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef *hadc);
336 static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef *hadc);
337 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
338 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
339 static void ADC_DMAError(DMA_HandleTypeDef *hdma);
340 static void ADC_DelayMicroSecond(uint32_t microSecond);
341 /**
342 * @}
343 */
344
345 /* Exported functions ---------------------------------------------------------*/
346
347 /** @defgroup ADC_Exported_Functions ADC Exported Functions
348 * @{
349 */
350
351 /** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions
352 * @brief ADC Initialization and Configuration functions
353 *
354 @verbatim
355 ===============================================================================
356 ##### Initialization and de-initialization functions #####
357 ===============================================================================
358 [..] This section provides functions allowing to:
359 (+) Initialize and configure the ADC.
360 (+) De-initialize the ADC.
361 @endverbatim
362 * @{
363 */
364
365 /**
366 * @brief Initialize the ADC peripheral and regular group according to
367 * parameters specified in structure "ADC_InitTypeDef".
368 * @note As prerequisite, ADC clock must be configured at RCC top level
369 * depending on possible clock sources: APB clock of HSI clock.
370 * See commented example code below that can be copied and uncommented
371 * into HAL_ADC_MspInit().
372 * @note Possibility to update parameters on the fly:
373 * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
374 * coming from ADC state reset. Following calls to this function can
375 * be used to reconfigure some parameters of ADC_InitTypeDef
376 * structure on the fly, without modifying MSP configuration. If ADC
377 * MSP has to be modified again, HAL_ADC_DeInit() must be called
378 * before HAL_ADC_Init().
379 * The setting of these parameters is conditioned to ADC state.
380 * For parameters constraints, see comments of structure
381 * "ADC_InitTypeDef".
382 * @note This function configures the ADC within 2 scopes: scope of entire
383 * ADC and scope of regular group. For parameters details, see comments
384 * of structure "ADC_InitTypeDef".
385 * @note When device is in mode low-power (low-power run, low-power sleep or stop mode),
386 * function "HAL_ADCEx_EnableVREFINT()" must be called before function HAL_ADC_Init()
387 * (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first).
388 * In case of internal temperature sensor to be measured:
389 * function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly.
390 * @param hadc ADC handle
391 * @retval HAL status
392 */
HAL_ADC_Init(ADC_HandleTypeDef * hadc)393 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef *hadc)
394 {
395
396 /* Check ADC handle */
397 if (hadc == NULL)
398 {
399 return HAL_ERROR;
400 }
401
402 /* Check the parameters */
403 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
404 assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
405 assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
406 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
407 assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
408 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
409 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
410 assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
411 assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
412 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
413 assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
414 assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
415 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
416 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerFrequencyMode));
417 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff));
418 assert_param(IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTime));
419 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.OversamplingMode));
420
421 /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
422 /* at RCC top level depending on both possible clock sources: */
423 /* APB clock or HSI clock. */
424 /* Refer to header of this file for more details on clock enabling procedure*/
425
426 /* Actions performed only if ADC is coming from state reset: */
427 /* - Initialization of ADC MSP */
428 /* - ADC voltage regulator enable */
429 if (hadc->State == HAL_ADC_STATE_RESET)
430 {
431 /* Initialize ADC error code */
432 ADC_CLEAR_ERRORCODE(hadc);
433
434 /* Allocate lock resource and initialize it */
435 hadc->Lock = HAL_UNLOCKED;
436
437 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
438 /* Init the ADC Callback settings */
439 hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak callback */
440 hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak callback */
441 hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak callback */
442 hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak callback */
443
444 if (hadc->MspInitCallback == NULL)
445 {
446 hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
447 }
448
449 /* Init the low level hardware */
450 hadc->MspInitCallback(hadc);
451 #else
452 /* Init the low level hardware */
453 HAL_ADC_MspInit(hadc);
454 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
455 }
456
457 /* Configuration of ADC parameters if previous preliminary actions are */
458 /* correctly completed. */
459 /* and if there is no conversion on going on regular group (ADC can be */
460 /* enabled anyway, in case of call of this function to update a parameter */
461 /* on the fly). */
462 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) ||
463 (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET))
464 {
465 /* Update ADC state machine to error */
466 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
467
468 /* Process unlocked */
469 __HAL_UNLOCK(hadc);
470 return HAL_ERROR;
471 }
472
473 /* Set ADC state */
474 ADC_STATE_CLR_SET(hadc->State,
475 HAL_ADC_STATE_REG_BUSY,
476 HAL_ADC_STATE_BUSY_INTERNAL);
477
478 /* Parameters update conditioned to ADC state: */
479 /* Parameters that can be updated only when ADC is disabled: */
480 /* - ADC clock mode */
481 /* - ADC clock prescaler */
482 /* - ADC Resolution */
483 if (ADC_IS_ENABLE(hadc) == RESET)
484 {
485 /* Some parameters of this register are not reset, since they are set */
486 /* by other functions and must be kept in case of usage of this */
487 /* function on the fly (update of a parameter of ADC_InitTypeDef */
488 /* without needing to reconfigure all other ADC groups/channels */
489 /* parameters): */
490 /* - internal measurement paths: Vbat, temperature sensor, Vref */
491 /* (set into HAL_ADC_ConfigChannel() ) */
492
493 /* Configuration of ADC clock: clock source PCLK or asynchronous with
494 selectable prescaler */
495 __HAL_ADC_CLOCK_PRESCALER(hadc);
496
497 /* Configuration of ADC: */
498 /* - Resolution */
499 hadc->Instance->CFGR1 &= ~(ADC_CFGR1_RES);
500 hadc->Instance->CFGR1 |= hadc->Init.Resolution;
501 }
502
503 /* Set the Low Frequency mode */
504 ADC->CCR &= (uint32_t)~ADC_CCR_LFMEN;
505 ADC->CCR |= __HAL_ADC_CCR_LOWFREQUENCY(hadc->Init.LowPowerFrequencyMode);
506
507 /* Enable voltage regulator (if disabled at this step) */
508 if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN))
509 {
510 /* Set ADVREGEN bit */
511 hadc->Instance->CR |= ADC_CR_ADVREGEN;
512 }
513
514 /* Configuration of ADC: */
515 /* - Resolution */
516 /* - Data alignment */
517 /* - Scan direction */
518 /* - External trigger to start conversion */
519 /* - External trigger polarity */
520 /* - Continuous conversion mode */
521 /* - DMA continuous request */
522 /* - Overrun */
523 /* - AutoDelay feature */
524 /* - Discontinuous mode */
525 hadc->Instance->CFGR1 &= ~(ADC_CFGR1_ALIGN |
526 ADC_CFGR1_SCANDIR |
527 ADC_CFGR1_EXTSEL |
528 ADC_CFGR1_EXTEN |
529 ADC_CFGR1_CONT |
530 ADC_CFGR1_DMACFG |
531 ADC_CFGR1_OVRMOD |
532 ADC_CFGR1_AUTDLY |
533 ADC_CFGR1_AUTOFF |
534 ADC_CFGR1_DISCEN);
535
536 hadc->Instance->CFGR1 |= (hadc->Init.DataAlign |
537 ADC_SCANDIR(hadc->Init.ScanConvMode) |
538 ADC_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
539 ADC_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) |
540 hadc->Init.Overrun |
541 __HAL_ADC_CFGR1_AutoDelay(hadc->Init.LowPowerAutoWait) |
542 __HAL_ADC_CFGR1_AUTOFF(hadc->Init.LowPowerAutoPowerOff));
543
544 /* Enable external trigger if trigger selection is different of software */
545 /* start. */
546 /* Note: This configuration keeps the hardware feature of parameter */
547 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
548 /* software start. */
549 if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
550 {
551 hadc->Instance->CFGR1 |= hadc->Init.ExternalTrigConv |
552 hadc->Init.ExternalTrigConvEdge;
553 }
554
555 /* Enable discontinuous mode only if continuous mode is disabled */
556 if (hadc->Init.DiscontinuousConvMode == ENABLE)
557 {
558 if (hadc->Init.ContinuousConvMode == DISABLE)
559 {
560 /* Enable the selected ADC group regular discontinuous mode */
561 hadc->Instance->CFGR1 |= (ADC_CFGR1_DISCEN);
562 }
563 else
564 {
565 /* ADC regular group discontinuous was intended to be enabled, */
566 /* but ADC regular group modes continuous and sequencer discontinuous */
567 /* cannot be enabled simultaneously. */
568
569 /* Update ADC state machine to error */
570 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
571
572 /* Set ADC error code to ADC peripheral internal error */
573 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
574 }
575 }
576
577 if (hadc->Init.OversamplingMode == ENABLE)
578 {
579 assert_param(IS_ADC_OVERSAMPLING_RATIO(hadc->Init.Oversample.Ratio));
580 assert_param(IS_ADC_RIGHT_BIT_SHIFT(hadc->Init.Oversample.RightBitShift));
581 assert_param(IS_ADC_TRIGGERED_OVERSAMPLING_MODE(hadc->Init.Oversample.TriggeredMode));
582
583 /* Configuration of Oversampler: */
584 /* - Oversampling Ratio */
585 /* - Right bit shift */
586 /* - Triggered mode */
587
588 hadc->Instance->CFGR2 &= ~(ADC_CFGR2_OVSR |
589 ADC_CFGR2_OVSS |
590 ADC_CFGR2_TOVS);
591
592 hadc->Instance->CFGR2 |= (hadc->Init.Oversample.Ratio |
593 hadc->Init.Oversample.RightBitShift |
594 hadc->Init.Oversample.TriggeredMode);
595
596 /* Enable OverSampling mode */
597 hadc->Instance->CFGR2 |= ADC_CFGR2_OVSE;
598 }
599 else
600 {
601 if (HAL_IS_BIT_SET(hadc->Instance->CFGR2, ADC_CFGR2_OVSE))
602 {
603 /* Disable OverSampling mode if needed */
604 hadc->Instance->CFGR2 &= ~ADC_CFGR2_OVSE;
605 }
606 }
607
608 /* Clear the old sampling time */
609 hadc->Instance->SMPR &= (uint32_t)(~ADC_SMPR_SMPR);
610
611 /* Set the new sample time */
612 hadc->Instance->SMPR |= hadc->Init.SamplingTime;
613
614 /* Clear ADC error code */
615 ADC_CLEAR_ERRORCODE(hadc);
616
617 /* Set the ADC state */
618 ADC_STATE_CLR_SET(hadc->State,
619 HAL_ADC_STATE_BUSY_INTERNAL,
620 HAL_ADC_STATE_READY);
621
622
623 /* Return function status */
624 return HAL_OK;
625 }
626
627 /**
628 * @brief Deinitialize the ADC peripheral registers to their default reset
629 * values, with deinitialization of the ADC MSP.
630 * @note For devices with several ADCs: reset of ADC common registers is done
631 * only if all ADCs sharing the same common group are disabled.
632 * If this is not the case, reset of these common parameters reset is
633 * bypassed without error reporting: it can be the intended behavior in
634 * case of reset of a single ADC while the other ADCs sharing the same
635 * common group is still running.
636 * @param hadc ADC handle
637 * @retval HAL status
638 */
HAL_ADC_DeInit(ADC_HandleTypeDef * hadc)639 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc)
640 {
641 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
642
643 /* Check ADC handle */
644 if (hadc == NULL)
645 {
646 return HAL_ERROR;
647 }
648
649 /* Check the parameters */
650 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
651
652 /* Set ADC state */
653 SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
654
655 /* Stop potential conversion on going, on regular group */
656 tmp_hal_status = ADC_ConversionStop(hadc);
657
658 /* Disable ADC peripheral if conversions are effectively stopped */
659 if (tmp_hal_status == HAL_OK)
660 {
661 /* Disable the ADC peripheral */
662 tmp_hal_status = ADC_Disable(hadc);
663
664 /* Check if ADC is effectively disabled */
665 if (tmp_hal_status != HAL_ERROR)
666 {
667 /* Change ADC state */
668 hadc->State = HAL_ADC_STATE_READY;
669 }
670 }
671
672
673 /* Configuration of ADC parameters if previous preliminary actions are */
674 /* correctly completed. */
675 if (tmp_hal_status != HAL_ERROR)
676 {
677
678 /* ========== Reset ADC registers ========== */
679 /* Reset register IER */
680 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR | ADC_IT_EOCAL | ADC_IT_EOS | \
681 ADC_IT_EOC | ADC_IT_RDY | ADC_IT_EOSMP));
682
683
684 /* Reset register ISR */
685 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_EOCAL | ADC_FLAG_OVR | ADC_FLAG_EOS | \
686 ADC_FLAG_EOC | ADC_FLAG_EOSMP | ADC_FLAG_RDY));
687
688
689 /* Reset register CR */
690 /* Disable voltage regulator */
691 /* Note: Regulator disable useful for power saving */
692 /* Reset ADVREGEN bit */
693 hadc->Instance->CR &= ~ADC_CR_ADVREGEN;
694
695 /* Bits ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode "read-set": no direct reset applicable */
696 /* No action */
697
698 /* Reset register CFGR1 */
699 hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | \
700 ADC_CFGR1_DISCEN | ADC_CFGR1_AUTOFF | ADC_CFGR1_AUTDLY | \
701 ADC_CFGR1_CONT | ADC_CFGR1_OVRMOD | ADC_CFGR1_EXTEN | \
702 ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | \
703 ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN);
704
705 /* Reset register CFGR2 */
706 hadc->Instance->CFGR2 &= ~(ADC_CFGR2_TOVS | ADC_CFGR2_OVSS | ADC_CFGR2_OVSR | \
707 ADC_CFGR2_OVSE | ADC_CFGR2_CKMODE);
708
709
710 /* Reset register SMPR */
711 hadc->Instance->SMPR &= ~(ADC_SMPR_SMPR);
712
713 /* Reset register TR */
714 hadc->Instance->TR &= ~(ADC_TR_LT | ADC_TR_HT);
715
716 /* Reset register CALFACT */
717 hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT);
718
719
720
721
722
723 /* Reset register DR */
724 /* bits in access mode read only, no direct reset applicable*/
725
726 /* Reset register CALFACT */
727 hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT);
728
729 /* ========== Hard reset ADC peripheral ========== */
730 /* Performs a global reset of the entire ADC peripheral: ADC state is */
731 /* forced to a similar state after device power-on. */
732 /* If needed, copy-paste and uncomment the following reset code into */
733 /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */
734 /* */
735 /* __HAL_RCC_ADC1_FORCE_RESET() */
736 /* __HAL_RCC_ADC1_RELEASE_RESET() */
737
738 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
739 if (hadc->MspDeInitCallback == NULL)
740 {
741 hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
742 }
743
744 /* DeInit the low level hardware */
745 hadc->MspDeInitCallback(hadc);
746 #else
747 /* DeInit the low level hardware */
748 HAL_ADC_MspDeInit(hadc);
749 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
750
751 /* Set ADC error code to none */
752 ADC_CLEAR_ERRORCODE(hadc);
753
754 /* Set ADC state */
755 hadc->State = HAL_ADC_STATE_RESET;
756 }
757
758 /* Process unlocked */
759 __HAL_UNLOCK(hadc);
760
761 /* Return function status */
762 return tmp_hal_status;
763 }
764
765 /**
766 * @brief Initialize the ADC MSP.
767 * @param hadc ADC handle
768 * @retval None
769 */
HAL_ADC_MspInit(ADC_HandleTypeDef * hadc)770 __weak void HAL_ADC_MspInit(ADC_HandleTypeDef *hadc)
771 {
772 /* Prevent unused argument(s) compilation warning */
773 UNUSED(hadc);
774
775 /* NOTE : This function should not be modified. When the callback is needed,
776 function HAL_ADC_MspInit must be implemented in the user file.
777 */
778 }
779
780 /**
781 * @brief DeInitialize the ADC MSP.
782 * @param hadc ADC handle
783 * @retval None
784 */
HAL_ADC_MspDeInit(ADC_HandleTypeDef * hadc)785 __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef *hadc)
786 {
787 /* Prevent unused argument(s) compilation warning */
788 UNUSED(hadc);
789
790 /* NOTE : This function should not be modified. When the callback is needed,
791 function HAL_ADC_MspDeInit must be implemented in the user file.
792 */
793 }
794
795 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
796 /**
797 * @brief Register a User ADC Callback
798 * To be used instead of the weak predefined callback
799 * @param hadc Pointer to a ADC_HandleTypeDef structure that contains
800 * the configuration information for the specified ADC.
801 * @param CallbackID ID of the callback to be registered
802 * This parameter can be one of the following values:
803 * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
804 * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
805 * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID
806 * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
807 * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complete callback ID
808 * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
809 * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
810 * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
811 * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
812 * @param pCallback pointer to the Callback function
813 * @retval HAL status
814 */
HAL_ADC_RegisterCallback(ADC_HandleTypeDef * hadc,HAL_ADC_CallbackIDTypeDef CallbackID,pADC_CallbackTypeDef pCallback)815 HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback)
816 {
817 HAL_StatusTypeDef status = HAL_OK;
818
819 if (pCallback == NULL)
820 {
821 /* Update the error code */
822 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
823
824 return HAL_ERROR;
825 }
826
827 if ((hadc->State & HAL_ADC_STATE_READY) != 0)
828 {
829 switch (CallbackID)
830 {
831 case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
832 hadc->ConvCpltCallback = pCallback;
833 break;
834
835 case HAL_ADC_CONVERSION_HALF_CB_ID :
836 hadc->ConvHalfCpltCallback = pCallback;
837 break;
838
839 case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
840 hadc->LevelOutOfWindowCallback = pCallback;
841 break;
842
843 case HAL_ADC_ERROR_CB_ID :
844 hadc->ErrorCallback = pCallback;
845 break;
846
847 case HAL_ADC_MSPINIT_CB_ID :
848 hadc->MspInitCallback = pCallback;
849 break;
850
851 case HAL_ADC_MSPDEINIT_CB_ID :
852 hadc->MspDeInitCallback = pCallback;
853 break;
854
855 default :
856 /* Update the error code */
857 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
858
859 /* Return error status */
860 status = HAL_ERROR;
861 break;
862 }
863 }
864 else if (HAL_ADC_STATE_RESET == hadc->State)
865 {
866 switch (CallbackID)
867 {
868 case HAL_ADC_MSPINIT_CB_ID :
869 hadc->MspInitCallback = pCallback;
870 break;
871
872 case HAL_ADC_MSPDEINIT_CB_ID :
873 hadc->MspDeInitCallback = pCallback;
874 break;
875
876 default :
877 /* Update the error code */
878 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
879
880 /* Return error status */
881 status = HAL_ERROR;
882 break;
883 }
884 }
885 else
886 {
887 /* Update the error code */
888 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
889
890 /* Return error status */
891 status = HAL_ERROR;
892 }
893
894 return status;
895 }
896
897 /**
898 * @brief Unregister a ADC Callback
899 * ADC callback is redirected to the weak predefined callback
900 * @param hadc Pointer to a ADC_HandleTypeDef structure that contains
901 * the configuration information for the specified ADC.
902 * @param CallbackID ID of the callback to be unregistered
903 * This parameter can be one of the following values:
904 * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
905 * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
906 * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID
907 * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
908 * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complete callback ID
909 * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
910 * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
911 * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
912 * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
913 * @retval HAL status
914 */
HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef * hadc,HAL_ADC_CallbackIDTypeDef CallbackID)915 HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID)
916 {
917 HAL_StatusTypeDef status = HAL_OK;
918
919 if ((hadc->State & HAL_ADC_STATE_READY) != 0)
920 {
921 switch (CallbackID)
922 {
923 case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
924 hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback;
925 break;
926
927 case HAL_ADC_CONVERSION_HALF_CB_ID :
928 hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback;
929 break;
930
931 case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
932 hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback;
933 break;
934
935 case HAL_ADC_ERROR_CB_ID :
936 hadc->ErrorCallback = HAL_ADC_ErrorCallback;
937 break;
938
939 case HAL_ADC_MSPINIT_CB_ID :
940 hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
941 break;
942
943 case HAL_ADC_MSPDEINIT_CB_ID :
944 hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
945 break;
946
947 default :
948 /* Update the error code */
949 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
950
951 /* Return error status */
952 status = HAL_ERROR;
953 break;
954 }
955 }
956 else if (HAL_ADC_STATE_RESET == hadc->State)
957 {
958 switch (CallbackID)
959 {
960 case HAL_ADC_MSPINIT_CB_ID :
961 hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
962 break;
963
964 case HAL_ADC_MSPDEINIT_CB_ID :
965 hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
966 break;
967
968 default :
969 /* Update the error code */
970 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
971
972 /* Return error status */
973 status = HAL_ERROR;
974 break;
975 }
976 }
977 else
978 {
979 /* Update the error code */
980 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
981
982 /* Return error status */
983 status = HAL_ERROR;
984 }
985
986 return status;
987 }
988
989 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
990
991 /**
992 * @}
993 */
994
995 /** @defgroup ADC_Exported_Functions_Group2 ADC Input and Output operation functions
996 * @brief ADC IO operation functions
997 *
998 @verbatim
999 ===============================================================================
1000 ##### IO operation functions #####
1001 ===============================================================================
1002 [..] This section provides functions allowing to:
1003 (+) Start conversion of regular group.
1004 (+) Stop conversion of regular group.
1005 (+) Poll for conversion complete on regular group.
1006 (+) Poll for conversion event.
1007 (+) Get result of regular channel conversion.
1008 (+) Start conversion of regular group and enable interruptions.
1009 (+) Stop conversion of regular group and disable interruptions.
1010 (+) Handle ADC interrupt request
1011 (+) Start conversion of regular group and enable DMA transfer.
1012 (+) Stop conversion of regular group and disable ADC DMA transfer.
1013 @endverbatim
1014 * @{
1015 */
1016
1017 /**
1018 * @brief Enable ADC, start conversion of regular group.
1019 * @note Interruptions enabled in this function: None.
1020 * @param hadc ADC handle
1021 * @retval HAL status
1022 */
HAL_ADC_Start(ADC_HandleTypeDef * hadc)1023 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef *hadc)
1024 {
1025 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1026
1027 /* Check the parameters */
1028 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1029
1030 /* Perform ADC enable and conversion start if no conversion is on going */
1031 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1032 {
1033 /* Process locked */
1034 __HAL_LOCK(hadc);
1035
1036 /* Enable the ADC peripheral */
1037 /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
1038 /* performed automatically by hardware. */
1039 if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
1040 {
1041 tmp_hal_status = ADC_Enable(hadc);
1042 }
1043
1044 /* Start conversion if ADC is effectively enabled */
1045 if (tmp_hal_status == HAL_OK)
1046 {
1047 /* Set ADC state */
1048 /* - Clear state bitfield related to regular group conversion results */
1049 /* - Set state bitfield related to regular operation */
1050 ADC_STATE_CLR_SET(hadc->State,
1051 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
1052 HAL_ADC_STATE_REG_BUSY);
1053
1054 /* Reset ADC all error code fields */
1055 ADC_CLEAR_ERRORCODE(hadc);
1056
1057 /* Process unlocked */
1058 /* Unlock before starting ADC conversions: in case of potential */
1059 /* interruption, to let the process to ADC IRQ Handler. */
1060 __HAL_UNLOCK(hadc);
1061
1062 /* Clear regular group conversion flag and overrun flag */
1063 /* (To ensure of no unknown state from potential previous ADC */
1064 /* operations) */
1065 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
1066
1067 /* Enable conversion of regular group. */
1068 /* If software start has been selected, conversion starts immediately. */
1069 /* If external trigger has been selected, conversion will start at next */
1070 /* trigger event. */
1071 hadc->Instance->CR |= ADC_CR_ADSTART;
1072 }
1073 }
1074 else
1075 {
1076 tmp_hal_status = HAL_BUSY;
1077 }
1078
1079 /* Return function status */
1080 return tmp_hal_status;
1081 }
1082
1083 /**
1084 * @brief Stop ADC conversion of regular group (and injected channels in
1085 * case of auto_injection mode), disable ADC peripheral.
1086 * @param hadc ADC handle
1087 * @retval HAL status.
1088 */
HAL_ADC_Stop(ADC_HandleTypeDef * hadc)1089 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef *hadc)
1090 {
1091 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1092
1093 /* Check the parameters */
1094 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1095
1096 /* Process locked */
1097 __HAL_LOCK(hadc);
1098
1099 /* 1. Stop potential conversion on going, on ADC group regular */
1100 tmp_hal_status = ADC_ConversionStop(hadc);
1101
1102 /* Disable ADC peripheral if conversions are effectively stopped */
1103 if (tmp_hal_status == HAL_OK)
1104 {
1105 /* 2. Disable the ADC peripheral */
1106 tmp_hal_status = ADC_Disable(hadc);
1107
1108 /* Check if ADC is effectively disabled */
1109 if (tmp_hal_status == HAL_OK)
1110 {
1111 /* Set ADC state */
1112 ADC_STATE_CLR_SET(hadc->State,
1113 HAL_ADC_STATE_REG_BUSY,
1114 HAL_ADC_STATE_READY);
1115 }
1116 }
1117
1118 /* Process unlocked */
1119 __HAL_UNLOCK(hadc);
1120
1121 /* Return function status */
1122 return tmp_hal_status;
1123 }
1124
1125 /**
1126 * @brief Wait for regular group conversion to be completed.
1127 * @note ADC conversion flags EOS (end of sequence) and EOC (end of
1128 * conversion) are cleared by this function, with an exception:
1129 * if low power feature "LowPowerAutoWait" is enabled, flags are
1130 * not cleared to not interfere with this feature until data register
1131 * is read using function HAL_ADC_GetValue().
1132 * @note This function cannot be used in a particular setup: ADC configured
1133 * in DMA mode and polling for end of each conversion (ADC init
1134 * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
1135 * In this case, DMA resets the flag EOC and polling cannot be
1136 * performed on each conversion. Nevertheless, polling can still
1137 * be performed on the complete sequence (ADC init
1138 * parameter "EOCSelection" set to ADC_EOC_SEQ_CONV).
1139 * @param hadc ADC handle
1140 * @param Timeout Timeout value in millisecond.
1141 * @retval HAL status
1142 */
HAL_ADC_PollForConversion(ADC_HandleTypeDef * hadc,uint32_t Timeout)1143 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout)
1144 {
1145 uint32_t tickstart = 0;
1146 uint32_t tmp_Flag_EOC = 0x00;
1147
1148 /* Check the parameters */
1149 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1150
1151 /* If end of conversion selected to end of sequence conversions */
1152 if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
1153 {
1154 tmp_Flag_EOC = ADC_FLAG_EOS;
1155 }
1156 /* If end of conversion selected to end of unitary conversion */
1157 else /* ADC_EOC_SINGLE_CONV */
1158 {
1159 /* Verification that ADC configuration is compliant with polling for */
1160 /* each conversion: */
1161 /* Particular case is ADC configured in DMA mode and ADC sequencer with */
1162 /* several ranks and polling for end of each conversion. */
1163 /* For code simplicity sake, this particular case is generalized to */
1164 /* ADC configured in DMA mode and and polling for end of each conversion. */
1165 if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN))
1166 {
1167 /* Update ADC state machine to error */
1168 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1169
1170 /* Process unlocked */
1171 __HAL_UNLOCK(hadc);
1172
1173 return HAL_ERROR;
1174 }
1175 else
1176 {
1177 tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS);
1178 }
1179 }
1180
1181 /* Get tick count */
1182 tickstart = HAL_GetTick();
1183
1184 /* Wait until End of unitary conversion or sequence conversions flag is raised */
1185 while (HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
1186 {
1187 /* Check if timeout is disabled (set to infinite wait) */
1188 if (Timeout != HAL_MAX_DELAY)
1189 {
1190 if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
1191 {
1192 /* New check to avoid false timeout detection in case of preemption */
1193 if (HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
1194 {
1195 /* Update ADC state machine to timeout */
1196 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1197
1198 /* Process unlocked */
1199 __HAL_UNLOCK(hadc);
1200
1201 return HAL_TIMEOUT;
1202 }
1203 }
1204 }
1205 }
1206
1207 /* Update ADC state machine */
1208 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
1209
1210 /* Determine whether any further conversion upcoming on group regular */
1211 /* by external trigger, continuous mode or scan sequence on going. */
1212 if (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
1213 (hadc->Init.ContinuousConvMode == DISABLE))
1214 {
1215 /* If End of Sequence is reached, disable interrupts */
1216 if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS))
1217 {
1218 /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
1219 /* ADSTART==0 (no conversion on going) */
1220 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1221 {
1222 /* Disable ADC end of single conversion interrupt on group regular */
1223 /* Note: Overrun interrupt was enabled with EOC interrupt in */
1224 /* HAL_Start_IT(), but is not disabled here because can be used */
1225 /* by overrun IRQ process below. */
1226 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
1227
1228 /* Set ADC state */
1229 ADC_STATE_CLR_SET(hadc->State,
1230 HAL_ADC_STATE_REG_BUSY,
1231 HAL_ADC_STATE_READY);
1232 }
1233 else
1234 {
1235 /* Change ADC state to error state */
1236 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1237
1238 /* Set ADC error code to ADC peripheral internal error */
1239 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
1240 }
1241 }
1242 }
1243
1244 /* Clear end of conversion flag of regular group if low power feature */
1245 /* "LowPowerAutoWait " is disabled, to not interfere with this feature */
1246 /* until data register is read using function HAL_ADC_GetValue(). */
1247 if (hadc->Init.LowPowerAutoWait == DISABLE)
1248 {
1249 /* Clear regular group conversion flag */
1250 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS));
1251 }
1252
1253 /* Return function status */
1254 return HAL_OK;
1255 }
1256
1257 /**
1258 * @brief Poll for ADC event.
1259 * @param hadc ADC handle
1260 * @param EventType the ADC event type.
1261 * This parameter can be one of the following values:
1262 * @arg ADC_AWD_EVENT: ADC Analog watchdog event
1263 * @arg ADC_OVR_EVENT: ADC Overrun event
1264 * @param Timeout Timeout value in millisecond.
1265 * @note The relevant flag is cleared if found to be set, except for ADC_FLAG_OVR.
1266 * Indeed, the latter is reset only if hadc->Init.Overrun field is set
1267 * to ADC_OVR_DATA_OVERWRITTEN. Otherwise, data register may be potentially overwritten
1268 * by a new converted data as soon as OVR is cleared.
1269 * To reset OVR flag once the preserved data is retrieved, the user can resort
1270 * to macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
1271 * @retval HAL status
1272 */
HAL_ADC_PollForEvent(ADC_HandleTypeDef * hadc,uint32_t EventType,uint32_t Timeout)1273 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef *hadc, uint32_t EventType, uint32_t Timeout)
1274 {
1275 uint32_t tickstart = 0U;
1276
1277 /* Check the parameters */
1278 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1279 assert_param(IS_ADC_EVENT_TYPE(EventType));
1280
1281 /* Get tick count */
1282 tickstart = HAL_GetTick();
1283
1284 /* Check selected event flag */
1285 while (__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
1286 {
1287 /* Check if timeout is disabled (set to infinite wait) */
1288 if (Timeout != HAL_MAX_DELAY)
1289 {
1290 if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
1291 {
1292 /* New check to avoid false timeout detection in case of preemption */
1293 if (__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
1294 {
1295 /* Update ADC state machine to timeout */
1296 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1297
1298 /* Process unlocked */
1299 __HAL_UNLOCK(hadc);
1300
1301 return HAL_TIMEOUT;
1302 }
1303 }
1304 }
1305 }
1306
1307 switch (EventType)
1308 {
1309 /* Analog watchdog (level out of window) event */
1310 case ADC_AWD_EVENT:
1311 /* Set ADC state */
1312 SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
1313
1314 /* Clear ADC analog watchdog flag */
1315 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
1316 break;
1317
1318 /* Overrun event */
1319 default: /* Case ADC_OVR_EVENT */
1320 /* If overrun is set to overwrite previous data, overrun event is not */
1321 /* considered as an error. */
1322 /* (cf ref manual "Managing conversions without using the DMA and without */
1323 /* overrun ") */
1324 if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED)
1325 {
1326 /* Set ADC state */
1327 SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
1328
1329 /* Set ADC error code to overrun */
1330 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
1331 }
1332
1333 /* Clear ADC Overrun flag */
1334 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
1335 break;
1336 }
1337
1338 /* Return function status */
1339 return HAL_OK;
1340 }
1341
1342 /**
1343 * @brief Enable ADC, start conversion of regular group with interruption.
1344 * @note Interruptions enabled in this function according to initialization
1345 * setting : EOC (end of conversion), EOS (end of sequence),
1346 * OVR overrun.
1347 * Each of these interruptions has its dedicated callback function.
1348 * @note To guarantee a proper reset of all interruptions once all the needed
1349 * conversions are obtained, HAL_ADC_Stop_IT() must be called to ensure
1350 * a correct stop of the IT-based conversions.
1351 * @note By default, HAL_ADC_Start_IT() doesn't enable the End Of Sampling
1352 * interruption. If required (e.g. in case of oversampling with trigger
1353 * mode), the user must:
1354 * 1. first clear the EOSMP flag if set with macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOSMP)
1355 * 2. then enable the EOSMP interrupt with macro __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOSMP)
1356 * before calling HAL_ADC_Start_IT().
1357 * @param hadc ADC handle
1358 * @retval HAL status
1359 */
HAL_ADC_Start_IT(ADC_HandleTypeDef * hadc)1360 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef *hadc)
1361 {
1362 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1363
1364 /* Check the parameters */
1365 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1366
1367 /* Perform ADC enable and conversion start if no conversion is on going */
1368 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1369 {
1370 /* Process locked */
1371 __HAL_LOCK(hadc);
1372
1373 /* Enable the ADC peripheral */
1374 /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
1375 /* performed automatically by hardware. */
1376 if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
1377 {
1378 tmp_hal_status = ADC_Enable(hadc);
1379 }
1380
1381 /* Start conversion if ADC is effectively enabled */
1382 if (tmp_hal_status == HAL_OK)
1383 {
1384 /* Set ADC state */
1385 /* - Clear state bitfield related to regular group conversion results */
1386 /* - Set state bitfield related to regular operation */
1387 ADC_STATE_CLR_SET(hadc->State,
1388 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
1389 HAL_ADC_STATE_REG_BUSY);
1390
1391 /* Reset ADC all error code fields */
1392 ADC_CLEAR_ERRORCODE(hadc);
1393
1394 /* Process unlocked */
1395 /* Unlock before starting ADC conversions: in case of potential */
1396 /* interruption, to let the process to ADC IRQ Handler. */
1397 __HAL_UNLOCK(hadc);
1398
1399 /* Clear regular group conversion flag and overrun flag */
1400 /* (To ensure of no unknown state from potential previous ADC */
1401 /* operations) */
1402 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
1403
1404 /* Enable ADC end of conversion interrupt */
1405 /* Enable ADC overrun interrupt */
1406 switch (hadc->Init.EOCSelection)
1407 {
1408 case ADC_EOC_SEQ_CONV:
1409 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
1410 __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR));
1411 break;
1412 /* case ADC_EOC_SINGLE_CONV */
1413 default:
1414 __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
1415 break;
1416 }
1417
1418 /* Enable conversion of regular group. */
1419 /* If software start has been selected, conversion starts immediately. */
1420 /* If external trigger has been selected, conversion will start at next */
1421 /* trigger event. */
1422 hadc->Instance->CR |= ADC_CR_ADSTART;
1423 }
1424 }
1425 else
1426 {
1427 tmp_hal_status = HAL_BUSY;
1428 }
1429
1430 /* Return function status */
1431 return tmp_hal_status;
1432 }
1433
1434 /**
1435 * @brief Stop ADC conversion of regular group (and injected group in
1436 * case of auto_injection mode), disable interrution of
1437 * end-of-conversion, disable ADC peripheral.
1438 * @param hadc ADC handle
1439 * @retval HAL status.
1440 */
HAL_ADC_Stop_IT(ADC_HandleTypeDef * hadc)1441 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef *hadc)
1442 {
1443 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1444
1445 /* Check the parameters */
1446 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1447
1448 /* Process locked */
1449 __HAL_LOCK(hadc);
1450
1451 /* 1. Stop potential conversion on going, on ADC group regular */
1452 tmp_hal_status = ADC_ConversionStop(hadc);
1453
1454 /* Disable ADC peripheral if conversions are effectively stopped */
1455 if (tmp_hal_status == HAL_OK)
1456 {
1457 /* Disable ADC end of conversion interrupt for regular group */
1458 /* Disable ADC overrun interrupt */
1459 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
1460
1461 /* 2. Disable the ADC peripheral */
1462 tmp_hal_status = ADC_Disable(hadc);
1463
1464 /* Check if ADC is effectively disabled */
1465 if (tmp_hal_status == HAL_OK)
1466 {
1467 /* Set ADC state */
1468 ADC_STATE_CLR_SET(hadc->State,
1469 HAL_ADC_STATE_REG_BUSY,
1470 HAL_ADC_STATE_READY);
1471 }
1472 }
1473
1474 /* Process unlocked */
1475 __HAL_UNLOCK(hadc);
1476
1477 /* Return function status */
1478 return tmp_hal_status;
1479 }
1480
1481 /**
1482 * @brief Enable ADC, start conversion of regular group and transfer result through DMA.
1483 * @note Interruptions enabled in this function:
1484 * overrun (if applicable), DMA half transfer, DMA transfer complete.
1485 * Each of these interruptions has its dedicated callback function.
1486 * @param hadc ADC handle
1487 * @param pData Destination Buffer address.
1488 * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes)
1489 * @retval HAL status.
1490 */
HAL_ADC_Start_DMA(ADC_HandleTypeDef * hadc,uint32_t * pData,uint32_t Length)1491 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length)
1492 {
1493 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1494
1495 /* Check the parameters */
1496 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1497
1498 /* Perform ADC enable and conversion start if no conversion is on going */
1499 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1500 {
1501 /* Process locked */
1502 __HAL_LOCK(hadc);
1503
1504 /* Enable ADC DMA mode */
1505 hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN;
1506
1507 /* Enable the ADC peripheral */
1508 /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
1509 /* performed automatically by hardware. */
1510 if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
1511 {
1512 tmp_hal_status = ADC_Enable(hadc);
1513 }
1514
1515 /* Start conversion if ADC is effectively enabled */
1516 if (tmp_hal_status == HAL_OK)
1517 {
1518 /* Set ADC state */
1519 /* - Clear state bitfield related to regular group conversion results */
1520 /* - Set state bitfield related to regular operation */
1521 ADC_STATE_CLR_SET(hadc->State,
1522 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
1523 HAL_ADC_STATE_REG_BUSY);
1524
1525 /* Reset ADC all error code fields */
1526 ADC_CLEAR_ERRORCODE(hadc);
1527
1528 /* Process unlocked */
1529 /* Unlock before starting ADC conversions: in case of potential */
1530 /* interruption, to let the process to ADC IRQ Handler. */
1531 __HAL_UNLOCK(hadc);
1532
1533 /* Set the DMA transfer complete callback */
1534 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
1535
1536 /* Set the DMA half transfer complete callback */
1537 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
1538
1539 /* Set the DMA error callback */
1540 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
1541
1542
1543 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
1544 /* start (in case of SW start): */
1545
1546 /* Clear regular group conversion flag and overrun flag */
1547 /* (To ensure of no unknown state from potential previous ADC */
1548 /* operations) */
1549 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
1550
1551 /* Enable ADC overrun interrupt */
1552 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
1553
1554 /* Start the DMA channel */
1555 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
1556
1557 /* Enable conversion of regular group. */
1558 /* If software start has been selected, conversion starts immediately. */
1559 /* If external trigger has been selected, conversion will start at next */
1560 /* trigger event. */
1561 hadc->Instance->CR |= ADC_CR_ADSTART;
1562 }
1563 }
1564 else
1565 {
1566 tmp_hal_status = HAL_BUSY;
1567 }
1568
1569 /* Return function status */
1570 return tmp_hal_status;
1571 }
1572
1573 /**
1574 * @brief Stop ADC conversion of regular group (and injected group in
1575 * case of auto_injection mode), disable ADC DMA transfer, disable
1576 * ADC peripheral.
1577 * Each of these interruptions has its dedicated callback function.
1578 * @param hadc ADC handle
1579 * @retval HAL status.
1580 */
HAL_ADC_Stop_DMA(ADC_HandleTypeDef * hadc)1581 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef *hadc)
1582 {
1583 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1584
1585 /* Check the parameters */
1586 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1587
1588 /* Process locked */
1589 __HAL_LOCK(hadc);
1590
1591 /* 1. Stop potential ADC group regular conversion on going */
1592 tmp_hal_status = ADC_ConversionStop(hadc);
1593
1594 /* Disable ADC peripheral if conversions are effectively stopped */
1595 if (tmp_hal_status == HAL_OK)
1596 {
1597 /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
1598 CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN);
1599
1600 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1601 /* while DMA transfer is on going) */
1602 if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
1603 {
1604 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1605
1606 /* Check if DMA channel effectively disabled */
1607 if (tmp_hal_status != HAL_OK)
1608 {
1609 /* Update ADC state machine to error */
1610 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1611 }
1612 }
1613
1614 /* Disable ADC overrun interrupt */
1615 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1616
1617 /* 2. Disable the ADC peripheral */
1618 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */
1619 /* in memory a potential failing status. */
1620 if (tmp_hal_status == HAL_OK)
1621 {
1622 tmp_hal_status = ADC_Disable(hadc);
1623 }
1624 else
1625 {
1626 ADC_Disable(hadc);
1627 }
1628
1629 /* Check if ADC is effectively disabled */
1630 if (tmp_hal_status == HAL_OK)
1631 {
1632 /* Set ADC state */
1633 ADC_STATE_CLR_SET(hadc->State,
1634 HAL_ADC_STATE_REG_BUSY,
1635 HAL_ADC_STATE_READY);
1636 }
1637
1638 }
1639
1640 /* Process unlocked */
1641 __HAL_UNLOCK(hadc);
1642
1643 /* Return function status */
1644 return tmp_hal_status;
1645 }
1646
1647 /**
1648 * @brief Get ADC regular group conversion result.
1649 * @note Reading register DR automatically clears ADC flag EOC
1650 * (ADC group regular end of unitary conversion).
1651 * @note This function does not clear ADC flag EOS
1652 * (ADC group regular end of sequence conversion).
1653 * Occurrence of flag EOS rising:
1654 * - If sequencer is composed of 1 rank, flag EOS is equivalent
1655 * to flag EOC.
1656 * - If sequencer is composed of several ranks, during the scan
1657 * sequence flag EOC only is raised, at the end of the scan sequence
1658 * both flags EOC and EOS are raised.
1659 * To clear this flag, either use function:
1660 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1661 * model polling: @ref HAL_ADC_PollForConversion()
1662 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
1663 * @param hadc ADC handle
1664 * @retval ADC group regular conversion data
1665 */
HAL_ADC_GetValue(ADC_HandleTypeDef * hadc)1666 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef *hadc)
1667 {
1668 /* Check the parameters */
1669 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1670
1671 /* Note: EOC flag is not cleared here by software because automatically */
1672 /* cleared by hardware when reading register DR. */
1673
1674 /* Return ADC converted value */
1675 return hadc->Instance->DR;
1676 }
1677
1678 /**
1679 * @brief Handle ADC interrupt request.
1680 * @param hadc ADC handle
1681 * @retval None
1682 */
HAL_ADC_IRQHandler(ADC_HandleTypeDef * hadc)1683 void HAL_ADC_IRQHandler(ADC_HandleTypeDef *hadc)
1684 {
1685 uint32_t tmp_isr = hadc->Instance->ISR;
1686 uint32_t tmp_ier = hadc->Instance->IER;
1687
1688 /* Check the parameters */
1689 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1690 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
1691 assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
1692
1693 /* ========== Check End of Conversion flag for regular group ========== */
1694 if ((((tmp_isr & ADC_FLAG_EOC) == ADC_FLAG_EOC) && ((tmp_ier & ADC_IT_EOC) == ADC_IT_EOC)) ||
1695 (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)))
1696 {
1697 /* Update state machine on conversion status if not in error state */
1698 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
1699 {
1700 /* Set ADC state */
1701 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
1702 }
1703
1704 /* Determine whether any further conversion upcoming on group regular */
1705 /* by external trigger, continuous mode or scan sequence on going. */
1706 if (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
1707 (hadc->Init.ContinuousConvMode == DISABLE))
1708 {
1709 /* If End of Sequence is reached, disable interrupts */
1710 if ((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS)
1711 {
1712 /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
1713 /* ADSTART==0 (no conversion on going) */
1714 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1715 {
1716 /* Disable ADC end of single conversion interrupt on group regular */
1717 /* Note: Overrun interrupt was enabled with EOC interrupt in */
1718 /* HAL_Start_IT(), but is not disabled here because can be used */
1719 /* by overrun IRQ process below. */
1720 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
1721
1722 /* Set ADC state */
1723 ADC_STATE_CLR_SET(hadc->State,
1724 HAL_ADC_STATE_REG_BUSY,
1725 HAL_ADC_STATE_READY);
1726 }
1727 else
1728 {
1729 /* Change ADC state to error state */
1730 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1731
1732 /* Set ADC error code to ADC peripheral internal error */
1733 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
1734 }
1735 }
1736 }
1737
1738 /* Note: into callback, to determine if conversion has been triggered */
1739 /* from EOC or EOS, possibility to use: */
1740 /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */
1741 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1742 hadc->ConvCpltCallback(hadc);
1743 #else
1744 HAL_ADC_ConvCpltCallback(hadc);
1745 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1746
1747 /* Clear regular group conversion flag */
1748 /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */
1749 /* conversion flags clear induces the release of the preserved data.*/
1750 /* Therefore, if the preserved data value is needed, it must be */
1751 /* read preliminarily into HAL_ADC_ConvCpltCallback(). */
1752 /* Note: Management of low power auto-wait enabled: flags must be cleared */
1753 /* by user when fetching ADC conversion data. */
1754 /* This case is managed in IRQ handler, but this low-power mode */
1755 /* should not be used with programming model IT or DMA. */
1756 /* Refer to comment of parameter "LowPowerAutoWait". */
1757 if (hadc->Init.LowPowerAutoWait != ENABLE)
1758 {
1759 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS));
1760 }
1761 }
1762
1763 /* ========== Check analog watchdog 1 flag ========== */
1764 if (((tmp_isr & ADC_FLAG_AWD) == ADC_FLAG_AWD) && ((tmp_ier & ADC_IT_AWD) == ADC_IT_AWD))
1765 {
1766 /* Set ADC state */
1767 SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
1768
1769 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1770 hadc->LevelOutOfWindowCallback(hadc);
1771 #else
1772 HAL_ADC_LevelOutOfWindowCallback(hadc);
1773 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1774
1775 /* Clear ADC Analog watchdog flag */
1776 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
1777
1778 }
1779
1780
1781 /* ========== Check Overrun flag ========== */
1782 if (((tmp_isr & ADC_FLAG_OVR) == ADC_FLAG_OVR) && ((tmp_ier & ADC_IT_OVR) == ADC_IT_OVR))
1783 {
1784 /* If overrun is set to overwrite previous data (default setting), */
1785 /* overrun event is not considered as an error. */
1786 /* (cf ref manual "Managing conversions without using the DMA and without */
1787 /* overrun ") */
1788 /* Exception for usage with DMA overrun event always considered as an */
1789 /* error. */
1790 if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) ||
1791 HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN))
1792 {
1793 /* Set ADC error code to overrun */
1794 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
1795
1796 /* Clear ADC overrun flag */
1797 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
1798
1799 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1800 hadc->ErrorCallback(hadc);
1801 #else
1802 HAL_ADC_ErrorCallback(hadc);
1803 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1804 }
1805
1806 /* Clear the Overrun flag */
1807 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
1808 }
1809
1810 }
1811
1812 /**
1813 * @brief Conversion complete callback in non-blocking mode.
1814 * @param hadc ADC handle
1815 * @retval None
1816 */
HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef * hadc)1817 __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc)
1818 {
1819 /* Prevent unused argument(s) compilation warning */
1820 UNUSED(hadc);
1821
1822 /* NOTE : This function should not be modified. When the callback is needed,
1823 function HAL_ADC_ConvCpltCallback must be implemented in the user file.
1824 */
1825 }
1826
1827 /**
1828 * @brief Conversion DMA half-transfer callback in non-blocking mode.
1829 * @param hadc ADC handle
1830 * @retval None
1831 */
HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef * hadc)1832 __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef *hadc)
1833 {
1834 /* Prevent unused argument(s) compilation warning */
1835 UNUSED(hadc);
1836
1837 /* NOTE : This function should not be modified. When the callback is needed,
1838 function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
1839 */
1840 }
1841
1842 /**
1843 * @brief Analog watchdog 1 callback in non-blocking mode.
1844 * @param hadc ADC handle
1845 * @retval None
1846 */
HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef * hadc)1847 __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef *hadc)
1848 {
1849 /* Prevent unused argument(s) compilation warning */
1850 UNUSED(hadc);
1851
1852 /* NOTE : This function should not be modified. When the callback is needed,
1853 function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file.
1854 */
1855 }
1856
1857 /**
1858 * @brief ADC error callback in non-blocking mode
1859 * (ADC conversion with interruption or transfer by DMA).
1860 * @note In case of error due to overrun when using ADC with DMA transfer
1861 * (HAL ADC handle parameter "ErrorCode" to state "HAL_ADC_ERROR_OVR"):
1862 * - Reinitialize the DMA using function "HAL_ADC_Stop_DMA()".
1863 * - If needed, restart a new ADC conversion using function
1864 * "HAL_ADC_Start_DMA()"
1865 * (this function is also clearing overrun flag)
1866 * @param hadc ADC handle
1867 * @retval None
1868 */
HAL_ADC_ErrorCallback(ADC_HandleTypeDef * hadc)1869 __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
1870 {
1871 /* Prevent unused argument(s) compilation warning */
1872 UNUSED(hadc);
1873
1874 /* NOTE : This function should not be modified. When the callback is needed,
1875 function HAL_ADC_ErrorCallback must be implemented in the user file.
1876 */
1877 }
1878
1879 /**
1880 * @}
1881 */
1882
1883 /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
1884 * @brief Peripheral Control functions
1885 *
1886 @verbatim
1887 ===============================================================================
1888 ##### Peripheral Control functions #####
1889 ===============================================================================
1890 [..] This section provides functions allowing to:
1891 (+) Configure channels on regular group
1892 (+) Configure the analog watchdog
1893
1894 @endverbatim
1895 * @{
1896 */
1897
1898 /**
1899 * @brief Configure a channel to be assigned to ADC group regular.
1900 * @note In case of usage of internal measurement channels:
1901 * VrefInt/Vlcd(STM32L0x3xx only)/TempSensor.
1902 * Sampling time constraints must be respected (sampling time can be
1903 * adjusted in function of ADC clock frequency and sampling time
1904 * setting).
1905 * Refer to device datasheet for timings values, parameters TS_vrefint,
1906 * TS_vlcd (STM32L0x3xx only), TS_temp (values rough order: 5us to 17us).
1907 * These internal paths can be be disabled using function
1908 * HAL_ADC_DeInit().
1909 * @note Possibility to update parameters on the fly:
1910 * This function initializes channel into ADC group regular,
1911 * following calls to this function can be used to reconfigure
1912 * some parameters of structure "ADC_ChannelConfTypeDef" on the fly,
1913 * without resetting the ADC.
1914 * The setting of these parameters is conditioned to ADC state:
1915 * Refer to comments of structure "ADC_ChannelConfTypeDef".
1916 * @param hadc ADC handle
1917 * @param sConfig Structure of ADC channel assigned to ADC group regular.
1918 * @retval HAL status
1919 */
HAL_ADC_ConfigChannel(ADC_HandleTypeDef * hadc,ADC_ChannelConfTypeDef * sConfig)1920 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, ADC_ChannelConfTypeDef *sConfig)
1921 {
1922 /* Check the parameters */
1923 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1924 assert_param(IS_ADC_CHANNEL(sConfig->Channel));
1925 assert_param(IS_ADC_RANK(sConfig->Rank));
1926
1927 /* Process locked */
1928 __HAL_LOCK(hadc);
1929
1930 /* Parameters update conditioned to ADC state: */
1931 /* Parameters that can be updated when ADC is disabled or enabled without */
1932 /* conversion on going on regular group: */
1933 /* - Channel number */
1934 /* - Management of internal measurement channels: Vbat/VrefInt/TempSensor */
1935 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET)
1936 {
1937 /* Update ADC state machine to error */
1938 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1939 /* Process unlocked */
1940 __HAL_UNLOCK(hadc);
1941 return HAL_ERROR;
1942 }
1943
1944 if (sConfig->Rank != ADC_RANK_NONE)
1945 {
1946 /* Enable selected channels */
1947 hadc->Instance->CHSELR |= (uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK);
1948
1949 /* Management of internal measurement channels: Vlcd (STM32L0x3xx only)/VrefInt/TempSensor */
1950 /* internal measurement paths enable: If internal channel selected, enable */
1951 /* dedicated internal buffers and path. */
1952
1953 #if defined(ADC_CCR_TSEN)
1954 /* If Temperature sensor channel is selected, then enable the internal */
1955 /* buffers and path */
1956 if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK))
1957 {
1958 ADC->CCR |= ADC_CCR_TSEN;
1959
1960 /* Delay for temperature sensor stabilization time */
1961 ADC_DelayMicroSecond(ADC_TEMPSENSOR_DELAY_US);
1962 }
1963 #endif
1964
1965 /* If VRefInt channel is selected, then enable the internal buffers and path */
1966 if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK))
1967 {
1968 ADC->CCR |= ADC_CCR_VREFEN;
1969 }
1970
1971 #if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
1972 /* If Vlcd channel is selected, then enable the internal buffers and path */
1973 if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VLCD) == (ADC_CHANNEL_VLCD & ADC_CHANNEL_MASK))
1974 {
1975 ADC->CCR |= ADC_CCR_VLCDEN;
1976 }
1977 #endif
1978 }
1979 else
1980 {
1981 /* Regular sequence configuration */
1982 /* Reset the channel selection register from the selected channel */
1983 hadc->Instance->CHSELR &= ~((uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK));
1984
1985 /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
1986 /* internal measurement paths disable: If internal channel selected, */
1987 /* disable dedicated internal buffers and path. */
1988 #if defined(ADC_CCR_TSEN)
1989 if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK))
1990 {
1991 ADC->CCR &= ~ADC_CCR_TSEN;
1992 }
1993 #endif
1994
1995 /* If VRefInt channel is selected, then enable the internal buffers and path */
1996 if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK))
1997 {
1998 ADC->CCR &= ~ADC_CCR_VREFEN;
1999 }
2000
2001 #if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
2002 /* If Vlcd channel is selected, then enable the internal buffers and path */
2003 if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VLCD) == (ADC_CHANNEL_VLCD & ADC_CHANNEL_MASK))
2004 {
2005 ADC->CCR &= ~ADC_CCR_VLCDEN;
2006 }
2007 #endif
2008 }
2009
2010 /* Process unlocked */
2011 __HAL_UNLOCK(hadc);
2012
2013 /* Return function status */
2014 return HAL_OK;
2015 }
2016
2017 /**
2018 * @brief Configure the analog watchdog.
2019 * @note Possibility to update parameters on the fly:
2020 * This function initializes the selected analog watchdog, successive
2021 * calls to this function can be used to reconfigure some parameters
2022 * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without resetting
2023 * the ADC.
2024 * The setting of these parameters is conditioned to ADC state.
2025 * For parameters constraints, see comments of structure
2026 * "ADC_AnalogWDGConfTypeDef".
2027 * @note Analog watchdog thresholds can be modified while ADC conversion
2028 * is on going.
2029 * In this case, some constraints must be taken into account:
2030 * the programmed threshold values are effective from the next
2031 * ADC EOC (end of unitary conversion).
2032 * Considering that registers write delay may happen due to
2033 * bus activity, this might cause an uncertainty on the
2034 * effective timing of the new programmed threshold values.
2035 * @param hadc ADC handle
2036 * @param AnalogWDGConfig Structure of ADC analog watchdog configuration
2037 * @retval HAL status
2038 */
HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef * hadc,ADC_AnalogWDGConfTypeDef * AnalogWDGConfig)2039 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef *hadc, ADC_AnalogWDGConfTypeDef *AnalogWDGConfig)
2040 {
2041 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2042
2043 uint32_t tmpAWDHighThresholdShifted;
2044 uint32_t tmpAWDLowThresholdShifted;
2045
2046 /* Check the parameters */
2047 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2048 assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
2049 assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
2050
2051 if (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)
2052 {
2053 assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
2054 }
2055
2056 /* Verify if threshold is within the selected ADC resolution */
2057 assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold));
2058 assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold));
2059
2060 /* Process locked */
2061 __HAL_LOCK(hadc);
2062
2063 /* Parameters update conditioned to ADC state: */
2064 /* Parameters that can be updated when ADC is disabled or enabled without */
2065 /* conversion on going on regular group: */
2066 /* - Analog watchdog channels */
2067 /* - Analog watchdog thresholds */
2068 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
2069 {
2070 /* Configure ADC Analog watchdog interrupt */
2071 if (AnalogWDGConfig->ITMode == ENABLE)
2072 {
2073 /* Enable the ADC Analog watchdog interrupt */
2074 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
2075 }
2076 else
2077 {
2078 /* Disable the ADC Analog watchdog interrupt */
2079 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
2080 }
2081
2082 /* Configuration of analog watchdog: */
2083 /* - Set the analog watchdog mode */
2084 /* - Set the Analog watchdog channel (is not used if watchdog */
2085 /* mode "all channels": ADC_CFGR1_AWD1SGL=0) */
2086 hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDSGL |
2087 ADC_CFGR1_AWDEN |
2088 ADC_CFGR1_AWDCH);
2089
2090 hadc->Instance->CFGR1 |= (AnalogWDGConfig->WatchdogMode |
2091 (AnalogWDGConfig->Channel & ADC_CHANNEL_AWD_MASK));
2092
2093
2094 /* Shift the offset in function of the selected ADC resolution: Thresholds */
2095 /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
2096 tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
2097 tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
2098
2099 /* Clear High & Low high thresholds */
2100 hadc->Instance->TR &= (uint32_t) ~(ADC_TR_HT | ADC_TR_LT);
2101
2102 /* Set the high threshold */
2103 hadc->Instance->TR = ADC_TRX_HIGHTHRESHOLD(tmpAWDHighThresholdShifted);
2104 /* Set the low threshold */
2105 hadc->Instance->TR |= tmpAWDLowThresholdShifted;
2106 }
2107 /* If a conversion is on going on regular group, no update could be done */
2108 /* on neither of the AWD configuration structure parameters. */
2109 else
2110 {
2111 /* Update ADC state machine to error */
2112 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2113
2114 tmp_hal_status = HAL_ERROR;
2115 }
2116
2117 /* Process unlocked */
2118 __HAL_UNLOCK(hadc);
2119
2120 /* Return function status */
2121 return tmp_hal_status;
2122 }
2123
2124
2125 /**
2126 * @}
2127 */
2128
2129 /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
2130 * @brief ADC Peripheral State functions
2131 *
2132 @verbatim
2133 ===============================================================================
2134 ##### Peripheral state and errors functions #####
2135 ===============================================================================
2136 [..]
2137 This subsection provides functions to get in run-time the status of the
2138 peripheral.
2139 (+) Check the ADC state
2140 (+) Check the ADC error code
2141
2142 @endverbatim
2143 * @{
2144 */
2145
2146 /**
2147 * @brief Return the ADC handle state.
2148 * @note ADC state machine is managed by bitfields, ADC status must be
2149 * compared with states bits.
2150 * For example:
2151 * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) "
2152 * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) "
2153 * @param hadc ADC handle
2154 * @retval ADC handle state (bitfield on 32 bits)
2155 */
HAL_ADC_GetState(ADC_HandleTypeDef * hadc)2156 uint32_t HAL_ADC_GetState(ADC_HandleTypeDef *hadc)
2157 {
2158 /* Check the parameters */
2159 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2160
2161 /* Return ADC handle state */
2162 return hadc->State;
2163 }
2164
2165 /**
2166 * @brief Return the ADC error code.
2167 * @param hadc ADC handle
2168 * @retval ADC error code (bitfield on 32 bits)
2169 */
HAL_ADC_GetError(ADC_HandleTypeDef * hadc)2170 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
2171 {
2172 /* Check the parameters */
2173 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2174
2175 return hadc->ErrorCode;
2176 }
2177
2178 /**
2179 * @}
2180 */
2181
2182 /**
2183 * @}
2184 */
2185
2186 /** @defgroup ADC_Private_Functions ADC Private Functions
2187 * @{
2188 */
2189
2190 /**
2191 * @brief Enable the selected ADC.
2192 * @note Prerequisite condition to use this function: ADC must be disabled
2193 * and voltage regulator must be enabled (done into HAL_ADC_Init()).
2194 * @note If low power mode AutoPowerOff is enabled, power-on/off phases are
2195 * performed automatically by hardware.
2196 * In this mode, this function is useless and must not be called because
2197 * flag ADC_FLAG_RDY is not usable.
2198 * Therefore, this function must be called under condition of
2199 * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)".
2200 * @param hadc ADC handle
2201 * @retval HAL status.
2202 */
ADC_Enable(ADC_HandleTypeDef * hadc)2203 static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef *hadc)
2204 {
2205 uint32_t tickstart = 0U;
2206
2207 /* ADC enable and wait for ADC ready (in case of ADC is disabled or */
2208 /* enabling phase not yet completed: flag ADC ready not yet set). */
2209 /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
2210 /* causes: ADC clock not running, ...). */
2211 if (ADC_IS_ENABLE(hadc) == RESET)
2212 {
2213 /* Check if conditions to enable the ADC are fulfilled */
2214 if (ADC_ENABLING_CONDITIONS(hadc) == RESET)
2215 {
2216 /* Update ADC state machine to error */
2217 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2218
2219 /* Set ADC error code to ADC peripheral internal error */
2220 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2221
2222 return HAL_ERROR;
2223 }
2224
2225 /* Enable the ADC peripheral */
2226 __HAL_ADC_ENABLE(hadc);
2227
2228 /* Delay for ADC stabilization time. */
2229 ADC_DelayMicroSecond(ADC_STAB_DELAY_US);
2230
2231 /* Get tick count */
2232 tickstart = HAL_GetTick();
2233
2234 /* Wait for ADC effectively enabled */
2235 while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
2236 {
2237 if ((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
2238 {
2239 /* New check to avoid false timeout detection in case of preemption */
2240 if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
2241 {
2242 /* Update ADC state machine to error */
2243 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2244
2245 /* Set ADC error code to ADC peripheral internal error */
2246 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2247
2248 return HAL_ERROR;
2249 }
2250 }
2251 }
2252 }
2253
2254 /* Return HAL status */
2255 return HAL_OK;
2256 }
2257
2258 /**
2259 * @brief Disable the selected ADC.
2260 * @note Prerequisite condition to use this function: ADC conversions must be
2261 * stopped.
2262 * @param hadc ADC handle
2263 * @retval HAL status.
2264 */
ADC_Disable(ADC_HandleTypeDef * hadc)2265 static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef *hadc)
2266 {
2267 uint32_t tickstart = 0U;
2268
2269 /* Verification if ADC is not already disabled: */
2270 /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */
2271 /* disabled. */
2272 if (ADC_IS_ENABLE(hadc) != RESET)
2273 {
2274 /* Check if conditions to disable the ADC are fulfilled */
2275 if (ADC_DISABLING_CONDITIONS(hadc) != RESET)
2276 {
2277 /* Disable the ADC peripheral */
2278 __HAL_ADC_DISABLE(hadc);
2279 }
2280 else
2281 {
2282 /* Update ADC state machine to error */
2283 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2284
2285 /* Set ADC error code to ADC peripheral internal error */
2286 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2287
2288 return HAL_ERROR;
2289 }
2290
2291 /* Wait for ADC effectively disabled */
2292 /* Get tick count */
2293 tickstart = HAL_GetTick();
2294
2295 while (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
2296 {
2297 if ((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
2298 {
2299 /* New check to avoid false timeout detection in case of preemption */
2300 if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
2301 {
2302 /* Update ADC state machine to error */
2303 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2304
2305 /* Set ADC error code to ADC peripheral internal error */
2306 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2307
2308 return HAL_ERROR;
2309 }
2310 }
2311 }
2312 }
2313
2314 /* Return HAL status */
2315 return HAL_OK;
2316 }
2317
2318
2319 /**
2320 * @brief Stop ADC conversion.
2321 * @note Prerequisite condition to use this function: ADC conversions must be
2322 * stopped to disable the ADC.
2323 * @param hadc ADC handle
2324 * @retval HAL status.
2325 */
ADC_ConversionStop(ADC_HandleTypeDef * hadc)2326 static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef *hadc)
2327 {
2328 uint32_t tickstart = 0U;
2329
2330 /* Check the parameters */
2331 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2332
2333 /* Verification if ADC is not already stopped on regular group to bypass */
2334 /* this function if not needed. */
2335 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc))
2336 {
2337
2338 /* Stop potential conversion on going on regular group */
2339 /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */
2340 if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) &&
2341 HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS))
2342 {
2343 /* Stop conversions on regular group */
2344 hadc->Instance->CR |= ADC_CR_ADSTP;
2345 }
2346
2347 /* Wait for conversion effectively stopped */
2348 /* Get tick count */
2349 tickstart = HAL_GetTick();
2350
2351 while ((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
2352 {
2353 if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
2354 {
2355 /* New check to avoid false timeout detection in case of preemption */
2356 if ((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
2357 {
2358 /* Update ADC state machine to error */
2359 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2360
2361 /* Set ADC error code to ADC peripheral internal error */
2362 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2363
2364 return HAL_ERROR;
2365 }
2366 }
2367 }
2368 }
2369
2370 /* Return HAL status */
2371 return HAL_OK;
2372 }
2373
2374
2375 /**
2376 * @brief DMA transfer complete callback.
2377 * @param hdma pointer to DMA handle.
2378 * @retval None
2379 */
ADC_DMAConvCplt(DMA_HandleTypeDef * hdma)2380 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
2381 {
2382 /* Retrieve ADC handle corresponding to current DMA handle */
2383 ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2384
2385 /* Update state machine on conversion status if not in error state */
2386 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
2387 {
2388 /* Set ADC state */
2389 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
2390
2391 /* Determine whether any further conversion upcoming on group regular */
2392 /* by external trigger, continuous mode or scan sequence on going. */
2393 if (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
2394 (hadc->Init.ContinuousConvMode == DISABLE))
2395 {
2396 /* If End of Sequence is reached, disable interrupts */
2397 if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS))
2398 {
2399 /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
2400 /* ADSTART==0 (no conversion on going) */
2401 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
2402 {
2403 /* Disable ADC end of single conversion interrupt on group regular */
2404 /* Note: Overrun interrupt was enabled with EOC interrupt in */
2405 /* HAL_Start_IT(), but is not disabled here because can be used */
2406 /* by overrun IRQ process below. */
2407 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
2408
2409 /* Set ADC state */
2410 ADC_STATE_CLR_SET(hadc->State,
2411 HAL_ADC_STATE_REG_BUSY,
2412 HAL_ADC_STATE_READY);
2413 }
2414 else
2415 {
2416 /* Change ADC state to error state */
2417 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2418
2419 /* Set ADC error code to ADC peripheral internal error */
2420 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2421 }
2422 }
2423 }
2424
2425 /* Conversion complete callback */
2426 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2427 hadc->ConvCpltCallback(hadc);
2428 #else
2429 HAL_ADC_ConvCpltCallback(hadc);
2430 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2431 }
2432 else
2433 {
2434 /* Call DMA error callback */
2435 hadc->DMA_Handle->XferErrorCallback(hdma);
2436 }
2437 }
2438
2439 /**
2440 * @brief DMA half transfer complete callback.
2441 * @param hdma pointer to DMA handle.
2442 * @retval None
2443 */
ADC_DMAHalfConvCplt(DMA_HandleTypeDef * hdma)2444 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
2445 {
2446 /* Retrieve ADC handle corresponding to current DMA handle */
2447 ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2448
2449 /* Half conversion callback */
2450 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2451 hadc->ConvHalfCpltCallback(hadc);
2452 #else
2453 HAL_ADC_ConvHalfCpltCallback(hadc);
2454 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2455 }
2456
2457 /**
2458 * @brief DMA error callback.
2459 * @param hdma pointer to DMA handle.
2460 * @retval None
2461 */
ADC_DMAError(DMA_HandleTypeDef * hdma)2462 static void ADC_DMAError(DMA_HandleTypeDef *hdma)
2463 {
2464 /* Retrieve ADC handle corresponding to current DMA handle */
2465 ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2466
2467 /* Set ADC state */
2468 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
2469
2470 /* Set ADC error code to DMA error */
2471 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
2472
2473 /* Error callback */
2474 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2475 hadc->ErrorCallback(hadc);
2476 #else
2477 HAL_ADC_ErrorCallback(hadc);
2478 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2479 }
2480
2481 /**
2482 * @brief Delay micro seconds
2483 * @param microSecond delay
2484 * @retval None
2485 */
ADC_DelayMicroSecond(uint32_t microSecond)2486 static void ADC_DelayMicroSecond(uint32_t microSecond)
2487 {
2488 /* Compute number of CPU cycles to wait for */
2489 __IO uint32_t waitLoopIndex = (microSecond * (SystemCoreClock / 1000000U));
2490
2491 while (waitLoopIndex != 0U)
2492 {
2493 waitLoopIndex--;
2494 }
2495 }
2496
2497 /**
2498 * @}
2499 */
2500
2501 #endif /* HAL_ADC_MODULE_ENABLED */
2502 /**
2503 * @}
2504 */
2505
2506 /**
2507 * @}
2508 */
2509
2510
