1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_dfsdm.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Digital Filter for Sigma-Delta Modulators
7 * (DFSDM) peripherals:
8 * + Initialization and configuration of channels and filters
9 * + Regular channels configuration
10 * + Injected channels configuration
11 * + Regular/Injected Channels DMA Configuration
12 * + Interrupts and flags management
13 * + Analog watchdog feature
14 * + Short-circuit detector feature
15 * + Extremes detector feature
16 * + Clock absence detector feature
17 * + Break generation on analog watchdog or short-circuit event
18 *
19 ******************************************************************************
20 * @attention
21 *
22 * Copyright (c) 2017 STMicroelectronics.
23 * All rights reserved.
24 *
25 * This software is licensed under terms that can be found in the LICENSE file
26 * in the root directory of this software component.
27 * If no LICENSE file comes with this software, it is provided AS-IS.
28 *
29 ******************************************************************************
30 @verbatim
31 ==============================================================================
32 ##### How to use this driver #####
33 ==============================================================================
34 [..]
35 *** Channel initialization ***
36 ==============================
37 [..]
38 (#) User has first to initialize channels (before filters initialization).
39 (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
40 (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
41 (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
42 (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
43 (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
44 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
45 (#) Configure the output clock, input, serial interface, analog watchdog,
46 offset and data right bit shift parameters for this channel using the
47 HAL_DFSDM_ChannelInit() function.
48
49 *** Channel clock absence detector ***
50 ======================================
51 [..]
52 (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
53 HAL_DFSDM_ChannelCkabStart_IT().
54 (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
55 absence.
56 (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
57 clock absence is detected.
58 (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
59 HAL_DFSDM_ChannelCkabStop_IT().
60 (#) Please note that the same mode (polling or interrupt) has to be used
61 for all channels because the channels are sharing the same interrupt.
62 (#) Please note also that in interrupt mode, if clock absence detector is
63 stopped for one channel, interrupt will be disabled for all channels.
64
65 *** Channel short circuit detector ***
66 ======================================
67 [..]
68 (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
69 or HAL_DFSDM_ChannelScdStart_IT().
70 (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
71 circuit.
72 (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
73 short circuit is detected.
74 (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
75 or HAL_DFSDM_ChannelScdStop_IT().
76 (#) Please note that the same mode (polling or interrupt) has to be used
77 for all channels because the channels are sharing the same interrupt.
78 (#) Please note also that in interrupt mode, if short circuit detector is
79 stopped for one channel, interrupt will be disabled for all channels.
80
81 *** Channel analog watchdog value ***
82 =====================================
83 [..]
84 (#) Get analog watchdog filter value of a channel using
85 HAL_DFSDM_ChannelGetAwdValue().
86
87 *** Channel offset value ***
88 =====================================
89 [..]
90 (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
91
92 *** Filter initialization ***
93 =============================
94 [..]
95 (#) After channel initialization, user has to init filters.
96 (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
97 (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
98 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
99 Please note that DFSDMz_FLT0 global interrupt could be already
100 enabled if interrupt is used for channel.
101 (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
102 with DFSDMz filter handle using __HAL_LINKDMA().
103 (#) Configure the regular conversion, injected conversion and filter
104 parameters for this filter using the HAL_DFSDM_FilterInit() function.
105
106 *** Filter regular channel conversion ***
107 =========================================
108 [..]
109 (#) Select regular channel and enable/disable continuous mode using
110 HAL_DFSDM_FilterConfigRegChannel().
111 (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
112 HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
113 HAL_DFSDM_FilterRegularMsbStart_DMA().
114 (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
115 the end of regular conversion.
116 (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
117 at the end of regular conversion.
118 (#) Get value of regular conversion and corresponding channel using
119 HAL_DFSDM_FilterGetRegularValue().
120 (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
121 HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
122 half transfer and at the transfer complete. Please note that
123 HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
124 circular mode.
125 (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
126 HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
127
128 *** Filter injected channels conversion ***
129 ===========================================
130 [..]
131 (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
132 (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
133 HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
134 HAL_DFSDM_FilterInjectedMsbStart_DMA().
135 (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
136 the end of injected conversion.
137 (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
138 at the end of injected conversion.
139 (#) Get value of injected conversion and corresponding channel using
140 HAL_DFSDM_FilterGetInjectedValue().
141 (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
142 HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
143 half transfer and at the transfer complete. Please note that
144 HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
145 circular mode.
146 (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
147 HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
148
149 *** Filter analog watchdog ***
150 ==============================
151 [..]
152 (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
153 (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
154 (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
155
156 *** Filter extreme detector ***
157 ===============================
158 [..]
159 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
160 (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
161 (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
162 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
163
164 *** Filter conversion time ***
165 ==============================
166 [..]
167 (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
168
169 *** Callback registration ***
170 =============================
171 [..]
172 The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS when set to 1
173 allows the user to configure dynamically the driver callbacks.
174 Use functions HAL_DFSDM_Channel_RegisterCallback(),
175 HAL_DFSDM_Filter_RegisterCallback() or
176 HAL_DFSDM_Filter_RegisterAwdCallback() to register a user callback.
177
178 [..]
179 Function HAL_DFSDM_Channel_RegisterCallback() allows to register
180 following callbacks:
181 (+) CkabCallback : DFSDM channel clock absence detection callback.
182 (+) ScdCallback : DFSDM channel short circuit detection callback.
183 (+) MspInitCallback : DFSDM channel MSP init callback.
184 (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
185 [..]
186 This function takes as parameters the HAL peripheral handle, the Callback ID
187 and a pointer to the user callback function.
188
189 [..]
190 Function HAL_DFSDM_Filter_RegisterCallback() allows to register
191 following callbacks:
192 (+) RegConvCpltCallback : DFSDM filter regular conversion complete callback.
193 (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
194 (+) InjConvCpltCallback : DFSDM filter injected conversion complete callback.
195 (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
196 (+) ErrorCallback : DFSDM filter error callback.
197 (+) MspInitCallback : DFSDM filter MSP init callback.
198 (+) MspDeInitCallback : DFSDM filter MSP de-init callback.
199 [..]
200 This function takes as parameters the HAL peripheral handle, the Callback ID
201 and a pointer to the user callback function.
202
203 [..]
204 For specific DFSDM filter analog watchdog callback use dedicated register callback:
205 HAL_DFSDM_Filter_RegisterAwdCallback().
206
207 [..]
208 Use functions HAL_DFSDM_Channel_UnRegisterCallback() or
209 HAL_DFSDM_Filter_UnRegisterCallback() to reset a callback to the default
210 weak function.
211
212 [..]
213 HAL_DFSDM_Channel_UnRegisterCallback() takes as parameters the HAL peripheral handle,
214 and the Callback ID.
215 [..]
216 This function allows to reset following callbacks:
217 (+) CkabCallback : DFSDM channel clock absence detection callback.
218 (+) ScdCallback : DFSDM channel short circuit detection callback.
219 (+) MspInitCallback : DFSDM channel MSP init callback.
220 (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
221
222 [..]
223 HAL_DFSDM_Filter_UnRegisterCallback() takes as parameters the HAL peripheral handle,
224 and the Callback ID.
225 [..]
226 This function allows to reset following callbacks:
227 (+) RegConvCpltCallback : DFSDM filter regular conversion complete callback.
228 (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
229 (+) InjConvCpltCallback : DFSDM filter injected conversion complete callback.
230 (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
231 (+) ErrorCallback : DFSDM filter error callback.
232 (+) MspInitCallback : DFSDM filter MSP init callback.
233 (+) MspDeInitCallback : DFSDM filter MSP de-init callback.
234
235 [..]
236 For specific DFSDM filter analog watchdog callback use dedicated unregister callback:
237 HAL_DFSDM_Filter_UnRegisterAwdCallback().
238
239 [..]
240 By default, after the call of init function and if the state is RESET
241 all callbacks are reset to the corresponding legacy weak functions:
242 examples HAL_DFSDM_ChannelScdCallback(), HAL_DFSDM_FilterErrorCallback().
243 Exception done for MspInit and MspDeInit callbacks that are respectively
244 reset to the legacy weak functions in the init and de-init only when these
245 callbacks are null (not registered beforehand).
246 If not, MspInit or MspDeInit are not null, the init and de-init keep and use
247 the user MspInit/MspDeInit callbacks (registered beforehand)
248
249 [..]
250 Callbacks can be registered/unregistered in READY state only.
251 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
252 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
253 during the init/de-init.
254 In that case first register the MspInit/MspDeInit user callbacks using
255 HAL_DFSDM_Channel_RegisterCallback() or
256 HAL_DFSDM_Filter_RegisterCallback() before calling init or de-init function.
257
258 [..]
259 When The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS is set to 0 or
260 not defined, the callback registering feature is not available
261 and weak callbacks are used.
262
263 @endverbatim
264 ******************************************************************************
265 */
266
267 /* Includes ------------------------------------------------------------------*/
268 #include "stm32h7xx_hal.h"
269
270 /** @addtogroup STM32H7xx_HAL_Driver
271 * @{
272 */
273 #ifdef HAL_DFSDM_MODULE_ENABLED
274
275 /** @defgroup DFSDM DFSDM
276 * @brief DFSDM HAL driver module
277 * @{
278 */
279
280 /* Private typedef -----------------------------------------------------------*/
281 /* Private define ------------------------------------------------------------*/
282 /** @defgroup DFSDM_Private_Define DFSDM Private Define
283 * @{
284 */
285 #define DFSDM_FLTCR1_MSB_RCH_OFFSET 8
286 #define DFSDM_MSB_MASK 0xFFFF0000U
287 #define DFSDM_LSB_MASK 0x0000FFFFU
288 #define DFSDM_CKAB_TIMEOUT 5000U
289 #define DFSDM1_CHANNEL_NUMBER 8U
290 #if defined(DFSDM2_Channel0)
291 #define DFSDM2_CHANNEL_NUMBER 2U
292 #endif /* DFSDM2_Channel0 */
293 /**
294 * @}
295 */
296
297 /* Private macro -------------------------------------------------------------*/
298 /* Private variables ---------------------------------------------------------*/
299 /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
300 * @{
301 */
302 static __IO uint32_t v_dfsdm1ChannelCounter = 0;
303 static DFSDM_Channel_HandleTypeDef *a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
304 #if defined(DFSDM2_Channel0)
305 static __IO uint32_t v_dfsdm2ChannelCounter = 0;
306 static DFSDM_Channel_HandleTypeDef *a_dfsdm2ChannelHandle[DFSDM2_CHANNEL_NUMBER] = {NULL};
307 #endif /* DFSDM2_Channel0 */
308 /**
309 * @}
310 */
311
312 /* Private function prototypes -----------------------------------------------*/
313 /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
314 * @{
315 */
316 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
317 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance);
318 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
319 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
320 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
321 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
322 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
323 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
324 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
325 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
326 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
327 /**
328 * @}
329 */
330
331 /* Exported functions --------------------------------------------------------*/
332 /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
333 * @{
334 */
335
336 /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
337 * @brief Channel initialization and de-initialization functions
338 *
339 @verbatim
340 ==============================================================================
341 ##### Channel initialization and de-initialization functions #####
342 ==============================================================================
343 [..] This section provides functions allowing to:
344 (+) Initialize the DFSDM channel.
345 (+) De-initialize the DFSDM channel.
346 @endverbatim
347 * @{
348 */
349
350 /**
351 * @brief Initialize the DFSDM channel according to the specified parameters
352 * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
353 * @param hdfsdm_channel DFSDM channel handle.
354 * @retval HAL status.
355 */
HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)356 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
357 {
358 __IO uint32_t *channelCounterPtr;
359 DFSDM_Channel_HandleTypeDef **channelHandleTable;
360 DFSDM_Channel_TypeDef *channel0Instance;
361
362 /* Check DFSDM Channel handle */
363 if(hdfsdm_channel == NULL)
364 {
365 return HAL_ERROR;
366 }
367
368 /* Check parameters */
369 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
370 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
371 assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
372 assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
373 assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
374 assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
375 assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
376 assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
377 assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
378 assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
379 assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
380
381 #if defined(DFSDM2_Channel0)
382 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
383 {
384 channelCounterPtr = &v_dfsdm1ChannelCounter;
385 channelHandleTable = a_dfsdm1ChannelHandle;
386 channel0Instance = DFSDM1_Channel0;
387 }
388 else
389 {
390 channelCounterPtr = &v_dfsdm2ChannelCounter;
391 channelHandleTable = a_dfsdm2ChannelHandle;
392 channel0Instance = DFSDM2_Channel0;
393 }
394 #else /* DFSDM2_Channel0 */
395 channelCounterPtr = &v_dfsdm1ChannelCounter;
396 channelHandleTable = a_dfsdm1ChannelHandle;
397 channel0Instance = DFSDM1_Channel0;
398 #endif /* DFSDM2_Channel0 */
399
400 /* Check that channel has not been already initialized */
401 if (channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
402 {
403 return HAL_ERROR;
404 }
405
406 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
407 /* Reset callback pointers to the weak predefined callbacks */
408 hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
409 hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback;
410
411 /* Call MSP init function */
412 if(hdfsdm_channel->MspInitCallback == NULL)
413 {
414 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
415 }
416 hdfsdm_channel->MspInitCallback(hdfsdm_channel);
417 #else
418 /* Call MSP init function */
419 HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
420 #endif
421
422 /* Update the channel counter */
423 (*channelCounterPtr)++;
424
425 /* Configure output serial clock and enable global DFSDM interface only for first channel */
426 if(*channelCounterPtr == 1U)
427 {
428 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
429 /* Set the output serial clock source */
430 channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
431 channel0Instance->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
432
433 /* Reset clock divider */
434 channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
435 if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
436 {
437 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
438 /* Set the output clock divider */
439 channel0Instance->CHCFGR1 |= (uint32_t)((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
440 DFSDM_CHCFGR1_CKOUTDIV_Pos);
441 }
442
443 /* enable the DFSDM global interface */
444 channel0Instance->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
445 }
446
447 /* Set channel input parameters */
448 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
449 DFSDM_CHCFGR1_CHINSEL);
450 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
451 hdfsdm_channel->Init.Input.DataPacking |
452 hdfsdm_channel->Init.Input.Pins);
453
454 /* Set serial interface parameters */
455 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
456 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
457 hdfsdm_channel->Init.SerialInterface.SpiClock);
458
459 /* Set analog watchdog parameters */
460 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
461 hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
462 ((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos));
463
464 /* Set channel offset and right bit shift */
465 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
466 hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |
467 (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
468
469 /* Enable DFSDM channel */
470 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
471
472 /* Set DFSDM Channel to ready state */
473 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
474
475 /* Store channel handle in DFSDM channel handle table */
476 channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
477
478 return HAL_OK;
479 }
480
481 /**
482 * @brief De-initialize the DFSDM channel.
483 * @param hdfsdm_channel DFSDM channel handle.
484 * @retval HAL status.
485 */
HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)486 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
487 {
488 __IO uint32_t *channelCounterPtr;
489 DFSDM_Channel_HandleTypeDef **channelHandleTable;
490 DFSDM_Channel_TypeDef *channel0Instance;
491
492 /* Check DFSDM Channel handle */
493 if(hdfsdm_channel == NULL)
494 {
495 return HAL_ERROR;
496 }
497
498 /* Check parameters */
499 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
500
501 #if defined(DFSDM2_Channel0)
502 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
503 {
504 channelCounterPtr = &v_dfsdm1ChannelCounter;
505 channelHandleTable = a_dfsdm1ChannelHandle;
506 channel0Instance = DFSDM1_Channel0;
507 }
508 else
509 {
510 channelCounterPtr = &v_dfsdm2ChannelCounter;
511 channelHandleTable = a_dfsdm2ChannelHandle;
512 channel0Instance = DFSDM2_Channel0;
513 }
514 #else /* DFSDM2_Channel0 */
515 channelCounterPtr = &v_dfsdm1ChannelCounter;
516 channelHandleTable = a_dfsdm1ChannelHandle;
517 channel0Instance = DFSDM1_Channel0;
518 #endif /* DFSDM2_Channel0 */
519
520 /* Check that channel has not been already deinitialized */
521 if (channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
522 {
523 return HAL_ERROR;
524 }
525
526 /* Disable the DFSDM channel */
527 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
528
529 /* Update the channel counter */
530 (*channelCounterPtr)--;
531
532 /* Disable global DFSDM at deinit of last channel */
533 if (*channelCounterPtr == 0U)
534 {
535 channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
536 }
537
538 /* Call MSP deinit function */
539 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
540 if(hdfsdm_channel->MspDeInitCallback == NULL)
541 {
542 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
543 }
544 hdfsdm_channel->MspDeInitCallback(hdfsdm_channel);
545 #else
546 HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
547 #endif
548
549 /* Set DFSDM Channel in reset state */
550 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
551
552 /* Reset channel handle in DFSDM channel handle table */
553 channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
554
555 return HAL_OK;
556 }
557
558 /**
559 * @brief Initialize the DFSDM channel MSP.
560 * @param hdfsdm_channel DFSDM channel handle.
561 * @retval None
562 */
HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)563 __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
564 {
565 /* Prevent unused argument(s) compilation warning */
566 UNUSED(hdfsdm_channel);
567
568 /* NOTE : This function should not be modified, when the function is needed,
569 the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
570 */
571 }
572
573 /**
574 * @brief De-initialize the DFSDM channel MSP.
575 * @param hdfsdm_channel DFSDM channel handle.
576 * @retval None
577 */
HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)578 __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
579 {
580 /* Prevent unused argument(s) compilation warning */
581 UNUSED(hdfsdm_channel);
582
583 /* NOTE : This function should not be modified, when the function is needed,
584 the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
585 */
586 }
587
588 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
589 /**
590 * @brief Register a user DFSDM channel callback
591 * to be used instead of the weak predefined callback.
592 * @param hdfsdm_channel DFSDM channel handle.
593 * @param CallbackID ID of the callback to be registered.
594 * This parameter can be one of the following values:
595 * @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
596 * @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
597 * @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
598 * @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
599 * @param pCallback pointer to the callback function.
600 * @retval HAL status.
601 */
HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,pDFSDM_Channel_CallbackTypeDef pCallback)602 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
603 HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,
604 pDFSDM_Channel_CallbackTypeDef pCallback)
605 {
606 HAL_StatusTypeDef status = HAL_OK;
607
608 if(pCallback == NULL)
609 {
610 /* update return status */
611 status = HAL_ERROR;
612 }
613 else
614 {
615 if(HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
616 {
617 switch (CallbackID)
618 {
619 case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
620 hdfsdm_channel->CkabCallback = pCallback;
621 break;
622 case HAL_DFSDM_CHANNEL_SCD_CB_ID :
623 hdfsdm_channel->ScdCallback = pCallback;
624 break;
625 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
626 hdfsdm_channel->MspInitCallback = pCallback;
627 break;
628 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
629 hdfsdm_channel->MspDeInitCallback = pCallback;
630 break;
631 default :
632 /* update return status */
633 status = HAL_ERROR;
634 break;
635 }
636 }
637 else if(HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
638 {
639 switch (CallbackID)
640 {
641 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
642 hdfsdm_channel->MspInitCallback = pCallback;
643 break;
644 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
645 hdfsdm_channel->MspDeInitCallback = pCallback;
646 break;
647 default :
648 /* update return status */
649 status = HAL_ERROR;
650 break;
651 }
652 }
653 else
654 {
655 /* update return status */
656 status = HAL_ERROR;
657 }
658 }
659 return status;
660 }
661
662 /**
663 * @brief Unregister a user DFSDM channel callback.
664 * DFSDM channel callback is redirected to the weak predefined callback.
665 * @param hdfsdm_channel DFSDM channel handle.
666 * @param CallbackID ID of the callback to be unregistered.
667 * This parameter can be one of the following values:
668 * @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
669 * @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
670 * @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
671 * @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
672 * @retval HAL status.
673 */
HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)674 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
675 HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)
676 {
677 HAL_StatusTypeDef status = HAL_OK;
678
679 if(HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
680 {
681 switch (CallbackID)
682 {
683 case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
684 hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
685 break;
686 case HAL_DFSDM_CHANNEL_SCD_CB_ID :
687 hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback;
688 break;
689 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
690 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
691 break;
692 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
693 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
694 break;
695 default :
696 /* update return status */
697 status = HAL_ERROR;
698 break;
699 }
700 }
701 else if(HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
702 {
703 switch (CallbackID)
704 {
705 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
706 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
707 break;
708 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
709 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
710 break;
711 default :
712 /* update return status */
713 status = HAL_ERROR;
714 break;
715 }
716 }
717 else
718 {
719 /* update return status */
720 status = HAL_ERROR;
721 }
722 return status;
723 }
724 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
725
726 /**
727 * @}
728 */
729
730 /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
731 * @brief Channel operation functions
732 *
733 @verbatim
734 ==============================================================================
735 ##### Channel operation functions #####
736 ==============================================================================
737 [..] This section provides functions allowing to:
738 (+) Manage clock absence detector feature.
739 (+) Manage short circuit detector feature.
740 (+) Get analog watchdog value.
741 (+) Modify offset value.
742 @endverbatim
743 * @{
744 */
745
746 /**
747 * @brief This function allows to start clock absence detection in polling mode.
748 * @note Same mode has to be used for all channels.
749 * @note If clock is not available on this channel during 5 seconds,
750 * clock absence detection will not be activated and function
751 * will return HAL_TIMEOUT error.
752 * @param hdfsdm_channel DFSDM channel handle.
753 * @retval HAL status
754 */
HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)755 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
756 {
757 HAL_StatusTypeDef status = HAL_OK;
758 uint32_t channel;
759 uint32_t tickstart;
760 DFSDM_Filter_TypeDef *filter0Instance;
761
762 /* Check parameters */
763 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
764
765 #if defined(DFSDM2_Channel0)
766 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
767 {
768 filter0Instance = DFSDM1_Filter0;
769 }
770 else
771 {
772 filter0Instance = DFSDM2_Filter0;
773 }
774 #else /* DFSDM2_Channel0 */
775 filter0Instance = DFSDM1_Filter0;
776 #endif /* DFSDM2_Channel0 */
777
778 /* Check DFSDM channel state */
779 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
780 {
781 /* Return error status */
782 status = HAL_ERROR;
783 }
784 else
785 {
786 /* Get channel number from channel instance */
787 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
788
789 /* Get timeout */
790 tickstart = HAL_GetTick();
791
792 /* Clear clock absence flag */
793 while ((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
794 {
795 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
796
797 /* Check the Timeout */
798 if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
799 {
800 /* Set timeout status */
801 status = HAL_TIMEOUT;
802 break;
803 }
804 }
805
806 if(status == HAL_OK)
807 {
808 /* Start clock absence detection */
809 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
810 }
811 }
812 /* Return function status */
813 return status;
814 }
815
816 /**
817 * @brief This function allows to poll for the clock absence detection.
818 * @param hdfsdm_channel DFSDM channel handle.
819 * @param Timeout Timeout value in milliseconds.
820 * @retval HAL status
821 */
HAL_DFSDM_ChannelPollForCkab(const DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Timeout)822 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(const DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
823 uint32_t Timeout)
824 {
825 uint32_t tickstart;
826 uint32_t channel;
827 DFSDM_Filter_TypeDef *filter0Instance;
828
829 /* Check parameters */
830 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
831
832 #if defined(DFSDM2_Channel0)
833 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
834 {
835 filter0Instance = DFSDM1_Filter0;
836 }
837 else
838 {
839 filter0Instance = DFSDM2_Filter0;
840 }
841 #else /* DFSDM2_Channel0 */
842 filter0Instance = DFSDM1_Filter0;
843 #endif /* DFSDM2_Channel0 */
844
845 /* Check DFSDM channel state */
846 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
847 {
848 /* Return error status */
849 return HAL_ERROR;
850 }
851 else
852 {
853 /* Get channel number from channel instance */
854 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
855
856 /* Get timeout */
857 tickstart = HAL_GetTick();
858
859 /* Wait clock absence detection */
860 while ((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) == 0U)
861 {
862 /* Check the Timeout */
863 if(Timeout != HAL_MAX_DELAY)
864 {
865 if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U))
866 {
867 /* Return timeout status */
868 return HAL_TIMEOUT;
869 }
870 }
871 }
872
873 /* Clear clock absence detection flag */
874 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
875
876 /* Return function status */
877 return HAL_OK;
878 }
879 }
880
881 /**
882 * @brief This function allows to stop clock absence detection in polling mode.
883 * @param hdfsdm_channel DFSDM channel handle.
884 * @retval HAL status
885 */
HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)886 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
887 {
888 HAL_StatusTypeDef status = HAL_OK;
889 uint32_t channel;
890 DFSDM_Filter_TypeDef *filter0Instance;
891
892 /* Check parameters */
893 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
894
895 #if defined(DFSDM2_Channel0)
896 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
897 {
898 filter0Instance = DFSDM1_Filter0;
899 }
900 else
901 {
902 filter0Instance = DFSDM2_Filter0;
903 }
904 #else /* DFSDM2_Channel0 */
905 filter0Instance = DFSDM1_Filter0;
906 #endif /* DFSDM2_Channel0 */
907
908 /* Check DFSDM channel state */
909 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
910 {
911 /* Return error status */
912 status = HAL_ERROR;
913 }
914 else
915 {
916 /* Stop clock absence detection */
917 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
918
919 /* Clear clock absence flag */
920 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
921 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
922 }
923 /* Return function status */
924 return status;
925 }
926
927 /**
928 * @brief This function allows to start clock absence detection in interrupt mode.
929 * @note Same mode has to be used for all channels.
930 * @note If clock is not available on this channel during 5 seconds,
931 * clock absence detection will not be activated and function
932 * will return HAL_TIMEOUT error.
933 * @param hdfsdm_channel DFSDM channel handle.
934 * @retval HAL status
935 */
HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)936 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
937 {
938 HAL_StatusTypeDef status = HAL_OK;
939 uint32_t channel;
940 uint32_t tickstart;
941 DFSDM_Filter_TypeDef *filter0Instance;
942
943 /* Check parameters */
944 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
945
946 #if defined(DFSDM2_Channel0)
947 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
948 {
949 filter0Instance = DFSDM1_Filter0;
950 }
951 else
952 {
953 filter0Instance = DFSDM2_Filter0;
954 }
955 #else /* DFSDM2_Channel0 */
956 filter0Instance = DFSDM1_Filter0;
957 #endif /* DFSDM2_Channel0 */
958
959 /* Check DFSDM channel state */
960 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
961 {
962 /* Return error status */
963 status = HAL_ERROR;
964 }
965 else
966 {
967 /* Get channel number from channel instance */
968 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
969
970 /* Get timeout */
971 tickstart = HAL_GetTick();
972
973 /* Clear clock absence flag */
974 while ((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
975 {
976 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
977
978 /* Check the Timeout */
979 if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
980 {
981 /* Set timeout status */
982 status = HAL_TIMEOUT;
983 break;
984 }
985 }
986
987 if(status == HAL_OK)
988 {
989 /* Activate clock absence detection interrupt */
990 filter0Instance->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
991
992 /* Start clock absence detection */
993 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
994 }
995 }
996 /* Return function status */
997 return status;
998 }
999
1000 /**
1001 * @brief Clock absence detection callback.
1002 * @param hdfsdm_channel DFSDM channel handle.
1003 * @retval None
1004 */
HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1005 __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1006 {
1007 /* Prevent unused argument(s) compilation warning */
1008 UNUSED(hdfsdm_channel);
1009
1010 /* NOTE : This function should not be modified, when the callback is needed,
1011 the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
1012 */
1013 }
1014
1015 /**
1016 * @brief This function allows to stop clock absence detection in interrupt mode.
1017 * @note Interrupt will be disabled for all channels
1018 * @param hdfsdm_channel DFSDM channel handle.
1019 * @retval HAL status
1020 */
HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1021 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1022 {
1023 HAL_StatusTypeDef status = HAL_OK;
1024 uint32_t channel;
1025 DFSDM_Filter_TypeDef *filter0Instance;
1026
1027 /* Check parameters */
1028 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1029
1030 #if defined(DFSDM2_Channel0)
1031 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
1032 {
1033 filter0Instance = DFSDM1_Filter0;
1034 }
1035 else
1036 {
1037 filter0Instance = DFSDM2_Filter0;
1038 }
1039 #else /* DFSDM2_Channel0 */
1040 filter0Instance = DFSDM1_Filter0;
1041 #endif /* DFSDM2_Channel0 */
1042
1043 /* Check DFSDM channel state */
1044 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1045 {
1046 /* Return error status */
1047 status = HAL_ERROR;
1048 }
1049 else
1050 {
1051 /* Stop clock absence detection */
1052 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
1053
1054 /* Clear clock absence flag */
1055 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1056 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
1057
1058 /* Disable clock absence detection interrupt */
1059 filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
1060 }
1061 /* Return function status */
1062 return status;
1063 }
1064
1065 /**
1066 * @brief This function allows to start short circuit detection in polling mode.
1067 * @note Same mode has to be used for all channels
1068 * @param hdfsdm_channel DFSDM channel handle.
1069 * @param Threshold Short circuit detector threshold.
1070 * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
1071 * @param BreakSignal Break signals assigned to short circuit event.
1072 * This parameter can be a values combination of @ref DFSDM_BreakSignals.
1073 * @retval HAL status
1074 */
HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Threshold,uint32_t BreakSignal)1075 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1076 uint32_t Threshold,
1077 uint32_t BreakSignal)
1078 {
1079 HAL_StatusTypeDef status = HAL_OK;
1080
1081 /* Check parameters */
1082 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1083 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
1084 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
1085
1086 /* Check DFSDM channel state */
1087 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1088 {
1089 /* Return error status */
1090 status = HAL_ERROR;
1091 }
1092 else
1093 {
1094 /* Configure threshold and break signals */
1095 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
1096 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
1097 Threshold);
1098
1099 /* Start short circuit detection */
1100 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
1101 }
1102 /* Return function status */
1103 return status;
1104 }
1105
1106 /**
1107 * @brief This function allows to poll for the short circuit detection.
1108 * @param hdfsdm_channel DFSDM channel handle.
1109 * @param Timeout Timeout value in milliseconds.
1110 * @retval HAL status
1111 */
HAL_DFSDM_ChannelPollForScd(const DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Timeout)1112 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(const DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1113 uint32_t Timeout)
1114 {
1115 uint32_t tickstart;
1116 uint32_t channel;
1117 DFSDM_Filter_TypeDef *filter0Instance;
1118
1119 /* Check parameters */
1120 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1121
1122 #if defined(DFSDM2_Channel0)
1123 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
1124 {
1125 filter0Instance = DFSDM1_Filter0;
1126 }
1127 else
1128 {
1129 filter0Instance = DFSDM2_Filter0;
1130 }
1131 #else /* DFSDM2_Channel0 */
1132 filter0Instance = DFSDM1_Filter0;
1133 #endif /* DFSDM2_Channel0 */
1134
1135 /* Check DFSDM channel state */
1136 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1137 {
1138 /* Return error status */
1139 return HAL_ERROR;
1140 }
1141 else
1142 {
1143 /* Get channel number from channel instance */
1144 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1145
1146 /* Get timeout */
1147 tickstart = HAL_GetTick();
1148
1149 /* Wait short circuit detection */
1150 while (((filter0Instance->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0U)
1151 {
1152 /* Check the Timeout */
1153 if(Timeout != HAL_MAX_DELAY)
1154 {
1155 if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U))
1156 {
1157 /* Return timeout status */
1158 return HAL_TIMEOUT;
1159 }
1160 }
1161 }
1162
1163 /* Clear short circuit detection flag */
1164 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1165
1166 /* Return function status */
1167 return HAL_OK;
1168 }
1169 }
1170
1171 /**
1172 * @brief This function allows to stop short circuit detection in polling mode.
1173 * @param hdfsdm_channel DFSDM channel handle.
1174 * @retval HAL status
1175 */
HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1176 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1177 {
1178 HAL_StatusTypeDef status = HAL_OK;
1179 uint32_t channel;
1180 DFSDM_Filter_TypeDef *filter0Instance;
1181
1182 /* Check parameters */
1183 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1184
1185 #if defined(DFSDM2_Channel0)
1186 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
1187 {
1188 filter0Instance = DFSDM1_Filter0;
1189 }
1190 else
1191 {
1192 filter0Instance = DFSDM2_Filter0;
1193 }
1194 #else /* DFSDM2_Channel0 */
1195 filter0Instance = DFSDM1_Filter0;
1196 #endif /* DFSDM2_Channel0 */
1197
1198 /* Check DFSDM channel state */
1199 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1200 {
1201 /* Return error status */
1202 status = HAL_ERROR;
1203 }
1204 else
1205 {
1206 /* Stop short circuit detection */
1207 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
1208
1209 /* Clear short circuit detection flag */
1210 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1211 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1212 }
1213 /* Return function status */
1214 return status;
1215 }
1216
1217 /**
1218 * @brief This function allows to start short circuit detection in interrupt mode.
1219 * @note Same mode has to be used for all channels
1220 * @param hdfsdm_channel DFSDM channel handle.
1221 * @param Threshold Short circuit detector threshold.
1222 * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
1223 * @param BreakSignal Break signals assigned to short circuit event.
1224 * This parameter can be a values combination of @ref DFSDM_BreakSignals.
1225 * @retval HAL status
1226 */
HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Threshold,uint32_t BreakSignal)1227 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1228 uint32_t Threshold,
1229 uint32_t BreakSignal)
1230 {
1231 HAL_StatusTypeDef status = HAL_OK;
1232 DFSDM_Filter_TypeDef *filter0Instance;
1233
1234 /* Check parameters */
1235 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1236 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
1237 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
1238
1239 #if defined(DFSDM2_Channel0)
1240 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
1241 {
1242 filter0Instance = DFSDM1_Filter0;
1243 }
1244 else
1245 {
1246 filter0Instance = DFSDM2_Filter0;
1247 }
1248 #else /* DFSDM2_Channel0 */
1249 filter0Instance = DFSDM1_Filter0;
1250 #endif /* DFSDM2_Channel0 */
1251
1252 /* Check DFSDM channel state */
1253 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1254 {
1255 /* Return error status */
1256 status = HAL_ERROR;
1257 }
1258 else
1259 {
1260 /* Activate short circuit detection interrupt */
1261 filter0Instance->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
1262
1263 /* Configure threshold and break signals */
1264 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
1265 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
1266 Threshold);
1267
1268 /* Start short circuit detection */
1269 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
1270 }
1271 /* Return function status */
1272 return status;
1273 }
1274
1275 /**
1276 * @brief Short circuit detection callback.
1277 * @param hdfsdm_channel DFSDM channel handle.
1278 * @retval None
1279 */
HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1280 __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1281 {
1282 /* Prevent unused argument(s) compilation warning */
1283 UNUSED(hdfsdm_channel);
1284
1285 /* NOTE : This function should not be modified, when the callback is needed,
1286 the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
1287 */
1288 }
1289
1290 /**
1291 * @brief This function allows to stop short circuit detection in interrupt mode.
1292 * @note Interrupt will be disabled for all channels
1293 * @param hdfsdm_channel DFSDM channel handle.
1294 * @retval HAL status
1295 */
HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1296 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1297 {
1298 HAL_StatusTypeDef status = HAL_OK;
1299 uint32_t channel;
1300 DFSDM_Filter_TypeDef *filter0Instance;
1301
1302 /* Check parameters */
1303 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1304
1305 #if defined(DFSDM2_Channel0)
1306 if (IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
1307 {
1308 filter0Instance = DFSDM1_Filter0;
1309 }
1310 else
1311 {
1312 filter0Instance = DFSDM2_Filter0;
1313 }
1314 #else /* DFSDM2_Channel0 */
1315 filter0Instance = DFSDM1_Filter0;
1316 #endif /* DFSDM2_Channel0 */
1317
1318 /* Check DFSDM channel state */
1319 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1320 {
1321 /* Return error status */
1322 status = HAL_ERROR;
1323 }
1324 else
1325 {
1326 /* Stop short circuit detection */
1327 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
1328
1329 /* Clear short circuit detection flag */
1330 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1331 filter0Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1332
1333 /* Disable short circuit detection interrupt */
1334 filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
1335 }
1336 /* Return function status */
1337 return status;
1338 }
1339
1340 /**
1341 * @brief This function allows to get channel analog watchdog value.
1342 * @param hdfsdm_channel DFSDM channel handle.
1343 * @retval Channel analog watchdog value.
1344 */
HAL_DFSDM_ChannelGetAwdValue(const DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1345 int16_t HAL_DFSDM_ChannelGetAwdValue(const DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1346 {
1347 return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
1348 }
1349
1350 /**
1351 * @brief This function allows to modify channel offset value.
1352 * @param hdfsdm_channel DFSDM channel handle.
1353 * @param Offset DFSDM channel offset.
1354 * This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
1355 * @retval HAL status.
1356 */
HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,int32_t Offset)1357 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1358 int32_t Offset)
1359 {
1360 HAL_StatusTypeDef status = HAL_OK;
1361
1362 /* Check parameters */
1363 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1364 assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
1365
1366 /* Check DFSDM channel state */
1367 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1368 {
1369 /* Return error status */
1370 status = HAL_ERROR;
1371 }
1372 else
1373 {
1374 /* Modify channel offset */
1375 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
1376 hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos);
1377 }
1378 /* Return function status */
1379 return status;
1380 }
1381
1382 /**
1383 * @}
1384 */
1385
1386 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
1387 * @brief Channel state function
1388 *
1389 @verbatim
1390 ==============================================================================
1391 ##### Channel state function #####
1392 ==============================================================================
1393 [..] This section provides function allowing to:
1394 (+) Get channel handle state.
1395 @endverbatim
1396 * @{
1397 */
1398
1399 /**
1400 * @brief This function allows to get the current DFSDM channel handle state.
1401 * @param hdfsdm_channel DFSDM channel handle.
1402 * @retval DFSDM channel state.
1403 */
HAL_DFSDM_ChannelGetState(const DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1404 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(const DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1405 {
1406 /* Return DFSDM channel handle state */
1407 return hdfsdm_channel->State;
1408 }
1409
1410 /**
1411 * @}
1412 */
1413
1414 /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
1415 * @brief Filter initialization and de-initialization functions
1416 *
1417 @verbatim
1418 ==============================================================================
1419 ##### Filter initialization and de-initialization functions #####
1420 ==============================================================================
1421 [..] This section provides functions allowing to:
1422 (+) Initialize the DFSDM filter.
1423 (+) De-initialize the DFSDM filter.
1424 @endverbatim
1425 * @{
1426 */
1427
1428 /**
1429 * @brief Initialize the DFSDM filter according to the specified parameters
1430 * in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
1431 * @param hdfsdm_filter DFSDM filter handle.
1432 * @retval HAL status.
1433 */
HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1434 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1435 {
1436 const DFSDM_Filter_TypeDef *filter0Instance;
1437
1438 /* Check DFSDM Channel handle */
1439 if(hdfsdm_filter == NULL)
1440 {
1441 return HAL_ERROR;
1442 }
1443
1444 /* Check parameters */
1445 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1446 assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
1447 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
1448 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
1449 assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
1450 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
1451 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
1452 assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
1453 assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
1454 assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
1455
1456 #if defined(DFSDM2_Channel0)
1457 if (IS_DFSDM1_FILTER_INSTANCE(hdfsdm_filter->Instance))
1458 {
1459 filter0Instance = DFSDM1_Filter0;
1460 }
1461 else
1462 {
1463 filter0Instance = DFSDM2_Filter0;
1464 }
1465 #else /* DFSDM2_Channel0 */
1466 filter0Instance = DFSDM1_Filter0;
1467 #endif /* DFSDM2_Channel0 */
1468
1469 /* Check parameters compatibility */
1470 if ((hdfsdm_filter->Instance == filter0Instance) &&
1471 ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
1472 (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
1473 {
1474 return HAL_ERROR;
1475 }
1476
1477 /* Initialize DFSDM filter variables with default values */
1478 hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
1479 hdfsdm_filter->InjectedChannelsNbr = 1;
1480 hdfsdm_filter->InjConvRemaining = 1;
1481 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
1482
1483 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1484 /* Reset callback pointers to the weak predefined callbacks */
1485 hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback;
1486 hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback;
1487 hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
1488 hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback;
1489 hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
1490 hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback;
1491
1492 /* Call MSP init function */
1493 if(hdfsdm_filter->MspInitCallback == NULL)
1494 {
1495 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1496 }
1497 hdfsdm_filter->MspInitCallback(hdfsdm_filter);
1498 #else
1499 /* Call MSP init function */
1500 HAL_DFSDM_FilterMspInit(hdfsdm_filter);
1501 #endif
1502
1503 /* Set regular parameters */
1504 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
1505 if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
1506 {
1507 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
1508 }
1509 else
1510 {
1511 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
1512 }
1513
1514 if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
1515 {
1516 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
1517 }
1518 else
1519 {
1520 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
1521 }
1522
1523 /* Set injected parameters */
1524 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
1525 if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
1526 {
1527 assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
1528 assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
1529 hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
1530 }
1531
1532 if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
1533 {
1534 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
1535 }
1536 else
1537 {
1538 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
1539 }
1540
1541 if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
1542 {
1543 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
1544 }
1545 else
1546 {
1547 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
1548 }
1549
1550 /* Set filter parameters */
1551 hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
1552 hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
1553 ((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_Pos) |
1554 (hdfsdm_filter->Init.FilterParam.IntOversampling - 1U));
1555
1556 /* Store regular and injected triggers and injected scan mode*/
1557 hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
1558 hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
1559 hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
1560 hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
1561
1562 /* Enable DFSDM filter */
1563 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
1564
1565 /* Set DFSDM filter to ready state */
1566 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
1567
1568 return HAL_OK;
1569 }
1570
1571 /**
1572 * @brief De-initializes the DFSDM filter.
1573 * @param hdfsdm_filter DFSDM filter handle.
1574 * @retval HAL status.
1575 */
HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1576 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1577 {
1578 /* Check DFSDM filter handle */
1579 if(hdfsdm_filter == NULL)
1580 {
1581 return HAL_ERROR;
1582 }
1583
1584 /* Check parameters */
1585 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1586
1587 /* Disable the DFSDM filter */
1588 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
1589
1590 /* Call MSP deinit function */
1591 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1592 if(hdfsdm_filter->MspDeInitCallback == NULL)
1593 {
1594 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1595 }
1596 hdfsdm_filter->MspDeInitCallback(hdfsdm_filter);
1597 #else
1598 HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
1599 #endif
1600
1601 /* Set DFSDM filter in reset state */
1602 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
1603
1604 return HAL_OK;
1605 }
1606
1607 /**
1608 * @brief Initializes the DFSDM filter MSP.
1609 * @param hdfsdm_filter DFSDM filter handle.
1610 * @retval None
1611 */
HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1612 __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1613 {
1614 /* Prevent unused argument(s) compilation warning */
1615 UNUSED(hdfsdm_filter);
1616
1617 /* NOTE : This function should not be modified, when the function is needed,
1618 the HAL_DFSDM_FilterMspInit could be implemented in the user file.
1619 */
1620 }
1621
1622 /**
1623 * @brief De-initializes the DFSDM filter MSP.
1624 * @param hdfsdm_filter DFSDM filter handle.
1625 * @retval None
1626 */
HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1627 __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1628 {
1629 /* Prevent unused argument(s) compilation warning */
1630 UNUSED(hdfsdm_filter);
1631
1632 /* NOTE : This function should not be modified, when the function is needed,
1633 the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
1634 */
1635 }
1636
1637 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1638 /**
1639 * @brief Register a user DFSDM filter callback
1640 * to be used instead of the weak predefined callback.
1641 * @param hdfsdm_filter DFSDM filter handle.
1642 * @param CallbackID ID of the callback to be registered.
1643 * This parameter can be one of the following values:
1644 * @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
1645 * @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
1646 * @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
1647 * @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
1648 * @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
1649 * @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
1650 * @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
1651 * @param pCallback pointer to the callback function.
1652 * @retval HAL status.
1653 */
HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,pDFSDM_Filter_CallbackTypeDef pCallback)1654 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1655 HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,
1656 pDFSDM_Filter_CallbackTypeDef pCallback)
1657 {
1658 HAL_StatusTypeDef status = HAL_OK;
1659
1660 if(pCallback == NULL)
1661 {
1662 /* update the error code */
1663 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1664 /* update return status */
1665 status = HAL_ERROR;
1666 }
1667 else
1668 {
1669 if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1670 {
1671 switch (CallbackID)
1672 {
1673 case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
1674 hdfsdm_filter->RegConvCpltCallback = pCallback;
1675 break;
1676 case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
1677 hdfsdm_filter->RegConvHalfCpltCallback = pCallback;
1678 break;
1679 case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
1680 hdfsdm_filter->InjConvCpltCallback = pCallback;
1681 break;
1682 case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
1683 hdfsdm_filter->InjConvHalfCpltCallback = pCallback;
1684 break;
1685 case HAL_DFSDM_FILTER_ERROR_CB_ID :
1686 hdfsdm_filter->ErrorCallback = pCallback;
1687 break;
1688 case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1689 hdfsdm_filter->MspInitCallback = pCallback;
1690 break;
1691 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1692 hdfsdm_filter->MspDeInitCallback = pCallback;
1693 break;
1694 default :
1695 /* update the error code */
1696 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1697 /* update return status */
1698 status = HAL_ERROR;
1699 break;
1700 }
1701 }
1702 else if(HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
1703 {
1704 switch (CallbackID)
1705 {
1706 case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1707 hdfsdm_filter->MspInitCallback = pCallback;
1708 break;
1709 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1710 hdfsdm_filter->MspDeInitCallback = pCallback;
1711 break;
1712 default :
1713 /* update the error code */
1714 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1715 /* update return status */
1716 status = HAL_ERROR;
1717 break;
1718 }
1719 }
1720 else
1721 {
1722 /* update the error code */
1723 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1724 /* update return status */
1725 status = HAL_ERROR;
1726 }
1727 }
1728 return status;
1729 }
1730
1731 /**
1732 * @brief Unregister a user DFSDM filter callback.
1733 * DFSDM filter callback is redirected to the weak predefined callback.
1734 * @param hdfsdm_filter DFSDM filter handle.
1735 * @param CallbackID ID of the callback to be unregistered.
1736 * This parameter can be one of the following values:
1737 * @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
1738 * @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
1739 * @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
1740 * @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
1741 * @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
1742 * @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
1743 * @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
1744 * @retval HAL status.
1745 */
HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)1746 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1747 HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)
1748 {
1749 HAL_StatusTypeDef status = HAL_OK;
1750
1751 if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1752 {
1753 switch (CallbackID)
1754 {
1755 case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
1756 hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback;
1757 break;
1758 case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
1759 hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
1760 break;
1761 case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
1762 hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback;
1763 break;
1764 case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
1765 hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
1766 break;
1767 case HAL_DFSDM_FILTER_ERROR_CB_ID :
1768 hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback;
1769 break;
1770 case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1771 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1772 break;
1773 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1774 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1775 break;
1776 default :
1777 /* update the error code */
1778 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1779 /* update return status */
1780 status = HAL_ERROR;
1781 break;
1782 }
1783 }
1784 else if(HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
1785 {
1786 switch (CallbackID)
1787 {
1788 case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1789 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1790 break;
1791 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1792 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1793 break;
1794 default :
1795 /* update the error code */
1796 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1797 /* update return status */
1798 status = HAL_ERROR;
1799 break;
1800 }
1801 }
1802 else
1803 {
1804 /* update the error code */
1805 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1806 /* update return status */
1807 status = HAL_ERROR;
1808 }
1809 return status;
1810 }
1811
1812 /**
1813 * @brief Register a user DFSDM filter analog watchdog callback
1814 * to be used instead of the weak predefined callback.
1815 * @param hdfsdm_filter DFSDM filter handle.
1816 * @param pCallback pointer to the DFSDM filter analog watchdog callback function.
1817 * @retval HAL status.
1818 */
HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,pDFSDM_Filter_AwdCallbackTypeDef pCallback)1819 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1820 pDFSDM_Filter_AwdCallbackTypeDef pCallback)
1821 {
1822 HAL_StatusTypeDef status = HAL_OK;
1823
1824 if(pCallback == NULL)
1825 {
1826 /* update the error code */
1827 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1828 /* update return status */
1829 status = HAL_ERROR;
1830 }
1831 else
1832 {
1833 if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1834 {
1835 hdfsdm_filter->AwdCallback = pCallback;
1836 }
1837 else
1838 {
1839 /* update the error code */
1840 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1841 /* update return status */
1842 status = HAL_ERROR;
1843 }
1844 }
1845 return status;
1846 }
1847
1848 /**
1849 * @brief Unregister a user DFSDM filter analog watchdog callback.
1850 * DFSDM filter AWD callback is redirected to the weak predefined callback.
1851 * @param hdfsdm_filter DFSDM filter handle.
1852 * @retval HAL status.
1853 */
HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1854 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1855 {
1856 HAL_StatusTypeDef status = HAL_OK;
1857
1858 if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1859 {
1860 hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback;
1861 }
1862 else
1863 {
1864 /* update the error code */
1865 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1866 /* update return status */
1867 status = HAL_ERROR;
1868 }
1869 return status;
1870 }
1871 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
1872
1873 /**
1874 * @}
1875 */
1876
1877 /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
1878 * @brief Filter control functions
1879 *
1880 @verbatim
1881 ==============================================================================
1882 ##### Filter control functions #####
1883 ==============================================================================
1884 [..] This section provides functions allowing to:
1885 (+) Select channel and enable/disable continuous mode for regular conversion.
1886 (+) Select channels for injected conversion.
1887 @endverbatim
1888 * @{
1889 */
1890
1891 /**
1892 * @brief This function allows to select channel and to enable/disable
1893 * continuous mode for regular conversion.
1894 * @param hdfsdm_filter DFSDM filter handle.
1895 * @param Channel Channel for regular conversion.
1896 * This parameter can be a value of @ref DFSDM_Channel_Selection.
1897 * @param ContinuousMode Enable/disable continuous mode for regular conversion.
1898 * This parameter can be a value of @ref DFSDM_ContinuousMode.
1899 * @retval HAL status
1900 */
HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel,uint32_t ContinuousMode)1901 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1902 uint32_t Channel,
1903 uint32_t ContinuousMode)
1904 {
1905 HAL_StatusTypeDef status = HAL_OK;
1906
1907 /* Check parameters */
1908 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1909 assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
1910 assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
1911
1912 /* Check DFSDM filter state */
1913 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1914 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1915 {
1916 /* Configure channel and continuous mode for regular conversion */
1917 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
1918 if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
1919 {
1920 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
1921 DFSDM_FLTCR1_RCONT);
1922 }
1923 else
1924 {
1925 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
1926 }
1927 /* Store continuous mode information */
1928 hdfsdm_filter->RegularContMode = ContinuousMode;
1929 }
1930 else
1931 {
1932 status = HAL_ERROR;
1933 }
1934
1935 /* Return function status */
1936 return status;
1937 }
1938
1939 /**
1940 * @brief This function allows to select channels for injected conversion.
1941 * @param hdfsdm_filter DFSDM filter handle.
1942 * @param Channel Channels for injected conversion.
1943 * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
1944 * @retval HAL status
1945 */
HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel)1946 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1947 uint32_t Channel)
1948 {
1949 HAL_StatusTypeDef status = HAL_OK;
1950
1951 /* Check parameters */
1952 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1953 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
1954
1955 /* Check DFSDM filter state */
1956 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1957 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1958 {
1959 /* Configure channel for injected conversion */
1960 hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
1961 /* Store number of injected channels */
1962 hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
1963 /* Update number of injected channels remaining */
1964 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
1965 hdfsdm_filter->InjectedChannelsNbr : 1U;
1966 }
1967 else
1968 {
1969 status = HAL_ERROR;
1970 }
1971 /* Return function status */
1972 return status;
1973 }
1974
1975 /**
1976 * @}
1977 */
1978
1979 /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
1980 * @brief Filter operation functions
1981 *
1982 @verbatim
1983 ==============================================================================
1984 ##### Filter operation functions #####
1985 ==============================================================================
1986 [..] This section provides functions allowing to:
1987 (+) Start conversion of regular/injected channel.
1988 (+) Poll for the end of regular/injected conversion.
1989 (+) Stop conversion of regular/injected channel.
1990 (+) Start conversion of regular/injected channel and enable interrupt.
1991 (+) Call the callback functions at the end of regular/injected conversions.
1992 (+) Stop conversion of regular/injected channel and disable interrupt.
1993 (+) Start conversion of regular/injected channel and enable DMA transfer.
1994 (+) Stop conversion of regular/injected channel and disable DMA transfer.
1995 (+) Start analog watchdog and enable interrupt.
1996 (+) Call the callback function when analog watchdog occurs.
1997 (+) Stop analog watchdog and disable interrupt.
1998 (+) Start extreme detector.
1999 (+) Stop extreme detector.
2000 (+) Get result of regular channel conversion.
2001 (+) Get result of injected channel conversion.
2002 (+) Get extreme detector maximum and minimum values.
2003 (+) Get conversion time.
2004 (+) Handle DFSDM interrupt request.
2005 @endverbatim
2006 * @{
2007 */
2008
2009 /**
2010 * @brief This function allows to start regular conversion in polling mode.
2011 * @note This function should be called only when DFSDM filter instance is
2012 * in idle state or if injected conversion is ongoing.
2013 * @param hdfsdm_filter DFSDM filter handle.
2014 * @retval HAL status
2015 */
HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2016 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2017 {
2018 HAL_StatusTypeDef status = HAL_OK;
2019
2020 /* Check parameters */
2021 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2022
2023 /* Check DFSDM filter state */
2024 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2025 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2026 {
2027 /* Start regular conversion */
2028 DFSDM_RegConvStart(hdfsdm_filter);
2029 }
2030 else
2031 {
2032 status = HAL_ERROR;
2033 }
2034 /* Return function status */
2035 return status;
2036 }
2037
2038 /**
2039 * @brief This function allows to poll for the end of regular conversion.
2040 * @note This function should be called only if regular conversion is ongoing.
2041 * @param hdfsdm_filter DFSDM filter handle.
2042 * @param Timeout Timeout value in milliseconds.
2043 * @retval HAL status
2044 */
HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Timeout)2045 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2046 uint32_t Timeout)
2047 {
2048 uint32_t tickstart;
2049
2050 /* Check parameters */
2051 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2052
2053 /* Check DFSDM filter state */
2054 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
2055 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2056 {
2057 /* Return error status */
2058 return HAL_ERROR;
2059 }
2060 else
2061 {
2062 /* Get timeout */
2063 tickstart = HAL_GetTick();
2064
2065 /* Wait end of regular conversion */
2066 while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
2067 {
2068 /* Check the Timeout */
2069 if(Timeout != HAL_MAX_DELAY)
2070 {
2071 if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
2072 {
2073 /* Return timeout status */
2074 return HAL_TIMEOUT;
2075 }
2076 }
2077 }
2078 /* Check if overrun occurs */
2079 if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
2080 {
2081 /* Update error code and call error callback */
2082 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
2083 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2084 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2085 #else
2086 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2087 #endif
2088
2089 /* Clear regular overrun flag */
2090 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
2091 }
2092 /* Update DFSDM filter state only if not continuous conversion and SW trigger */
2093 if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2094 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
2095 {
2096 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
2097 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
2098 }
2099 /* Return function status */
2100 return HAL_OK;
2101 }
2102 }
2103
2104 /**
2105 * @brief This function allows to stop regular conversion in polling mode.
2106 * @note This function should be called only if regular conversion is ongoing.
2107 * @param hdfsdm_filter DFSDM filter handle.
2108 * @retval HAL status
2109 */
HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2110 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2111 {
2112 HAL_StatusTypeDef status = HAL_OK;
2113
2114 /* Check parameters */
2115 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2116
2117 /* Check DFSDM filter state */
2118 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
2119 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2120 {
2121 /* Return error status */
2122 status = HAL_ERROR;
2123 }
2124 else
2125 {
2126 /* Stop regular conversion */
2127 DFSDM_RegConvStop(hdfsdm_filter);
2128 }
2129 /* Return function status */
2130 return status;
2131 }
2132
2133 /**
2134 * @brief This function allows to start regular conversion in interrupt mode.
2135 * @note This function should be called only when DFSDM filter instance is
2136 * in idle state or if injected conversion is ongoing.
2137 * @param hdfsdm_filter DFSDM filter handle.
2138 * @retval HAL status
2139 */
HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2140 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2141 {
2142 HAL_StatusTypeDef status = HAL_OK;
2143
2144 /* Check parameters */
2145 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2146
2147 /* Check DFSDM filter state */
2148 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2149 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2150 {
2151 /* Enable interrupts for regular conversions */
2152 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
2153
2154 /* Start regular conversion */
2155 DFSDM_RegConvStart(hdfsdm_filter);
2156 }
2157 else
2158 {
2159 status = HAL_ERROR;
2160 }
2161 /* Return function status */
2162 return status;
2163 }
2164
2165 /**
2166 * @brief This function allows to stop regular conversion in interrupt mode.
2167 * @note This function should be called only if regular conversion is ongoing.
2168 * @param hdfsdm_filter DFSDM filter handle.
2169 * @retval HAL status
2170 */
HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2171 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2172 {
2173 HAL_StatusTypeDef status = HAL_OK;
2174
2175 /* Check parameters */
2176 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2177
2178 /* Check DFSDM filter state */
2179 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
2180 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2181 {
2182 /* Return error status */
2183 status = HAL_ERROR;
2184 }
2185 else
2186 {
2187 /* Disable interrupts for regular conversions */
2188 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
2189
2190 /* Stop regular conversion */
2191 DFSDM_RegConvStop(hdfsdm_filter);
2192 }
2193 /* Return function status */
2194 return status;
2195 }
2196
2197 /**
2198 * @brief This function allows to start regular conversion in DMA mode.
2199 * @note This function should be called only when DFSDM filter instance is
2200 * in idle state or if injected conversion is ongoing.
2201 * Please note that data on buffer will contain signed regular conversion
2202 * value on 24 most significant bits and corresponding channel on 3 least
2203 * significant bits.
2204 * @param hdfsdm_filter DFSDM filter handle.
2205 * @param pData The destination buffer address.
2206 * @param Length The length of data to be transferred from DFSDM filter to memory.
2207 * @retval HAL status
2208 */
HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int32_t * pData,uint32_t Length)2209 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2210 int32_t *pData,
2211 uint32_t Length)
2212 {
2213 HAL_StatusTypeDef status = HAL_OK;
2214
2215 /* Check parameters */
2216 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2217
2218 /* Check destination address and length */
2219 if((pData == NULL) || (Length == 0U))
2220 {
2221 status = HAL_ERROR;
2222 }
2223 /* Check that DMA is enabled for regular conversion */
2224 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
2225 {
2226 status = HAL_ERROR;
2227 }
2228 /* Check parameters compatibility */
2229 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2230 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2231 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
2232 (Length != 1U))
2233 {
2234 status = HAL_ERROR;
2235 }
2236 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2237 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2238 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
2239 {
2240 status = HAL_ERROR;
2241 }
2242 /* Check DFSDM filter state */
2243 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2244 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2245 {
2246 /* Set callbacks on DMA handler */
2247 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
2248 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
2249 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
2250 DFSDM_DMARegularHalfConvCplt : NULL;
2251
2252 /* Start DMA in interrupt mode */
2253 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
2254 (uint32_t) pData, Length) != HAL_OK)
2255 {
2256 /* Set DFSDM filter in error state */
2257 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2258 status = HAL_ERROR;
2259 }
2260 else
2261 {
2262 /* Start regular conversion */
2263 DFSDM_RegConvStart(hdfsdm_filter);
2264 }
2265 }
2266 else
2267 {
2268 status = HAL_ERROR;
2269 }
2270 /* Return function status */
2271 return status;
2272 }
2273
2274 /**
2275 * @brief This function allows to start regular conversion in DMA mode and to get
2276 * only the 16 most significant bits of conversion.
2277 * @note This function should be called only when DFSDM filter instance is
2278 * in idle state or if injected conversion is ongoing.
2279 * Please note that data on buffer will contain signed 16 most significant
2280 * bits of regular conversion.
2281 * @param hdfsdm_filter DFSDM filter handle.
2282 * @param pData The destination buffer address.
2283 * @param Length The length of data to be transferred from DFSDM filter to memory.
2284 * @retval HAL status
2285 */
HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int16_t * pData,uint32_t Length)2286 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2287 int16_t *pData,
2288 uint32_t Length)
2289 {
2290 HAL_StatusTypeDef status = HAL_OK;
2291
2292 /* Check parameters */
2293 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2294
2295 /* Check destination address and length */
2296 if((pData == NULL) || (Length == 0U))
2297 {
2298 status = HAL_ERROR;
2299 }
2300 /* Check that DMA is enabled for regular conversion */
2301 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
2302 {
2303 status = HAL_ERROR;
2304 }
2305 /* Check parameters compatibility */
2306 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2307 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2308 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
2309 (Length != 1U))
2310 {
2311 status = HAL_ERROR;
2312 }
2313 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2314 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2315 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
2316 {
2317 status = HAL_ERROR;
2318 }
2319 /* Check DFSDM filter state */
2320 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2321 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2322 {
2323 /* Set callbacks on DMA handler */
2324 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
2325 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
2326 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
2327 DFSDM_DMARegularHalfConvCplt : NULL;
2328
2329 /* Start DMA in interrupt mode */
2330 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \
2331 (uint32_t) pData, Length) != HAL_OK)
2332 {
2333 /* Set DFSDM filter in error state */
2334 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2335 status = HAL_ERROR;
2336 }
2337 else
2338 {
2339 /* Start regular conversion */
2340 DFSDM_RegConvStart(hdfsdm_filter);
2341 }
2342 }
2343 else
2344 {
2345 status = HAL_ERROR;
2346 }
2347 /* Return function status */
2348 return status;
2349 }
2350
2351 /**
2352 * @brief This function allows to stop regular conversion in DMA mode.
2353 * @note This function should be called only if regular conversion is ongoing.
2354 * @param hdfsdm_filter DFSDM filter handle.
2355 * @retval HAL status
2356 */
HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2357 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2358 {
2359 HAL_StatusTypeDef status = HAL_OK;
2360
2361 /* Check parameters */
2362 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2363
2364 /* Check DFSDM filter state */
2365 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
2366 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2367 {
2368 /* Return error status */
2369 status = HAL_ERROR;
2370 }
2371 else
2372 {
2373 /* Stop current DMA transfer */
2374 if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
2375 {
2376 /* Set DFSDM filter in error state */
2377 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2378 status = HAL_ERROR;
2379 }
2380 else
2381 {
2382 /* Stop regular conversion */
2383 DFSDM_RegConvStop(hdfsdm_filter);
2384 }
2385 }
2386 /* Return function status */
2387 return status;
2388 }
2389
2390 /**
2391 * @brief This function allows to get regular conversion value.
2392 * @param hdfsdm_filter DFSDM filter handle.
2393 * @param Channel Corresponding channel of regular conversion.
2394 * @retval Regular conversion value
2395 */
HAL_DFSDM_FilterGetRegularValue(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2396 int32_t HAL_DFSDM_FilterGetRegularValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2397 uint32_t *Channel)
2398 {
2399 uint32_t reg;
2400 int32_t value;
2401
2402 /* Check parameters */
2403 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2404 assert_param(Channel != (void *)0);
2405
2406 /* Get value of data register for regular channel */
2407 reg = hdfsdm_filter->Instance->FLTRDATAR;
2408
2409 /* Extract channel and regular conversion value */
2410 *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
2411 /* Regular conversion value is a signed value located on 24 MSB of register */
2412 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2413 reg &= DFSDM_FLTRDATAR_RDATA;
2414 value = ((int32_t)reg) / 256;
2415
2416 /* return regular conversion value */
2417 return value;
2418 }
2419
2420 /**
2421 * @brief This function allows to start injected conversion in polling mode.
2422 * @note This function should be called only when DFSDM filter instance is
2423 * in idle state or if regular conversion is ongoing.
2424 * @param hdfsdm_filter DFSDM filter handle.
2425 * @retval HAL status
2426 */
HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2427 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2428 {
2429 HAL_StatusTypeDef status = HAL_OK;
2430
2431 /* Check parameters */
2432 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2433
2434 /* Check DFSDM filter state */
2435 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2436 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2437 {
2438 /* Start injected conversion */
2439 DFSDM_InjConvStart(hdfsdm_filter);
2440 }
2441 else
2442 {
2443 status = HAL_ERROR;
2444 }
2445 /* Return function status */
2446 return status;
2447 }
2448
2449 /**
2450 * @brief This function allows to poll for the end of injected conversion.
2451 * @note This function should be called only if injected conversion is ongoing.
2452 * @param hdfsdm_filter DFSDM filter handle.
2453 * @param Timeout Timeout value in milliseconds.
2454 * @retval HAL status
2455 */
HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Timeout)2456 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2457 uint32_t Timeout)
2458 {
2459 uint32_t tickstart;
2460
2461 /* Check parameters */
2462 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2463
2464 /* Check DFSDM filter state */
2465 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2466 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2467 {
2468 /* Return error status */
2469 return HAL_ERROR;
2470 }
2471 else
2472 {
2473 /* Get timeout */
2474 tickstart = HAL_GetTick();
2475
2476 /* Wait end of injected conversions */
2477 while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
2478 {
2479 /* Check the Timeout */
2480 if(Timeout != HAL_MAX_DELAY)
2481 {
2482 if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
2483 {
2484 /* Return timeout status */
2485 return HAL_TIMEOUT;
2486 }
2487 }
2488 }
2489 /* Check if overrun occurs */
2490 if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
2491 {
2492 /* Update error code and call error callback */
2493 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
2494 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2495 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2496 #else
2497 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2498 #endif
2499
2500 /* Clear injected overrun flag */
2501 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
2502 }
2503
2504 /* Update remaining injected conversions */
2505 hdfsdm_filter->InjConvRemaining--;
2506 if(hdfsdm_filter->InjConvRemaining == 0U)
2507 {
2508 /* Update DFSDM filter state only if trigger is software */
2509 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2510 {
2511 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
2512 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
2513 }
2514
2515 /* end of injected sequence, reset the value */
2516 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2517 hdfsdm_filter->InjectedChannelsNbr : 1U;
2518 }
2519
2520 /* Return function status */
2521 return HAL_OK;
2522 }
2523 }
2524
2525 /**
2526 * @brief This function allows to stop injected conversion in polling mode.
2527 * @note This function should be called only if injected conversion is ongoing.
2528 * @param hdfsdm_filter DFSDM filter handle.
2529 * @retval HAL status
2530 */
HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2531 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2532 {
2533 HAL_StatusTypeDef status = HAL_OK;
2534
2535 /* Check parameters */
2536 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2537
2538 /* Check DFSDM filter state */
2539 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2540 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2541 {
2542 /* Return error status */
2543 status = HAL_ERROR;
2544 }
2545 else
2546 {
2547 /* Stop injected conversion */
2548 DFSDM_InjConvStop(hdfsdm_filter);
2549 }
2550 /* Return function status */
2551 return status;
2552 }
2553
2554 /**
2555 * @brief This function allows to start injected conversion in interrupt mode.
2556 * @note This function should be called only when DFSDM filter instance is
2557 * in idle state or if regular conversion is ongoing.
2558 * @param hdfsdm_filter DFSDM filter handle.
2559 * @retval HAL status
2560 */
HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2561 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2562 {
2563 HAL_StatusTypeDef status = HAL_OK;
2564
2565 /* Check parameters */
2566 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2567
2568 /* Check DFSDM filter state */
2569 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2570 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2571 {
2572 /* Enable interrupts for injected conversions */
2573 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
2574
2575 /* Start injected conversion */
2576 DFSDM_InjConvStart(hdfsdm_filter);
2577 }
2578 else
2579 {
2580 status = HAL_ERROR;
2581 }
2582 /* Return function status */
2583 return status;
2584 }
2585
2586 /**
2587 * @brief This function allows to stop injected conversion in interrupt mode.
2588 * @note This function should be called only if injected conversion is ongoing.
2589 * @param hdfsdm_filter DFSDM filter handle.
2590 * @retval HAL status
2591 */
HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2592 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2593 {
2594 HAL_StatusTypeDef status = HAL_OK;
2595
2596 /* Check parameters */
2597 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2598
2599 /* Check DFSDM filter state */
2600 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2601 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2602 {
2603 /* Return error status */
2604 status = HAL_ERROR;
2605 }
2606 else
2607 {
2608 /* Disable interrupts for injected conversions */
2609 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
2610
2611 /* Stop injected conversion */
2612 DFSDM_InjConvStop(hdfsdm_filter);
2613 }
2614 /* Return function status */
2615 return status;
2616 }
2617
2618 /**
2619 * @brief This function allows to start injected conversion in DMA mode.
2620 * @note This function should be called only when DFSDM filter instance is
2621 * in idle state or if regular conversion is ongoing.
2622 * Please note that data on buffer will contain signed injected conversion
2623 * value on 24 most significant bits and corresponding channel on 3 least
2624 * significant bits.
2625 * @param hdfsdm_filter DFSDM filter handle.
2626 * @param pData The destination buffer address.
2627 * @param Length The length of data to be transferred from DFSDM filter to memory.
2628 * @retval HAL status
2629 */
HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int32_t * pData,uint32_t Length)2630 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2631 int32_t *pData,
2632 uint32_t Length)
2633 {
2634 HAL_StatusTypeDef status = HAL_OK;
2635
2636 /* Check parameters */
2637 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2638
2639 /* Check destination address and length */
2640 if((pData == NULL) || (Length == 0U))
2641 {
2642 status = HAL_ERROR;
2643 }
2644 /* Check that DMA is enabled for injected conversion */
2645 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2646 {
2647 status = HAL_ERROR;
2648 }
2649 /* Check parameters compatibility */
2650 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2651 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2652 (Length > hdfsdm_filter->InjConvRemaining))
2653 {
2654 status = HAL_ERROR;
2655 }
2656 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2657 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2658 {
2659 status = HAL_ERROR;
2660 }
2661 /* Check DFSDM filter state */
2662 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2663 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2664 {
2665 /* Set callbacks on DMA handler */
2666 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2667 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2668 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
2669 DFSDM_DMAInjectedHalfConvCplt : NULL;
2670
2671 /* Start DMA in interrupt mode */
2672 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
2673 (uint32_t) pData, Length) != HAL_OK)
2674 {
2675 /* Set DFSDM filter in error state */
2676 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2677 status = HAL_ERROR;
2678 }
2679 else
2680 {
2681 /* Start injected conversion */
2682 DFSDM_InjConvStart(hdfsdm_filter);
2683 }
2684 }
2685 else
2686 {
2687 status = HAL_ERROR;
2688 }
2689 /* Return function status */
2690 return status;
2691 }
2692
2693 /**
2694 * @brief This function allows to start injected conversion in DMA mode and to get
2695 * only the 16 most significant bits of conversion.
2696 * @note This function should be called only when DFSDM filter instance is
2697 * in idle state or if regular conversion is ongoing.
2698 * Please note that data on buffer will contain signed 16 most significant
2699 * bits of injected conversion.
2700 * @param hdfsdm_filter DFSDM filter handle.
2701 * @param pData The destination buffer address.
2702 * @param Length The length of data to be transferred from DFSDM filter to memory.
2703 * @retval HAL status
2704 */
HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int16_t * pData,uint32_t Length)2705 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2706 int16_t *pData,
2707 uint32_t Length)
2708 {
2709 HAL_StatusTypeDef status = HAL_OK;
2710
2711 /* Check parameters */
2712 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2713
2714 /* Check destination address and length */
2715 if((pData == NULL) || (Length == 0U))
2716 {
2717 status = HAL_ERROR;
2718 }
2719 /* Check that DMA is enabled for injected conversion */
2720 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2721 {
2722 status = HAL_ERROR;
2723 }
2724 /* Check parameters compatibility */
2725 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2726 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2727 (Length > hdfsdm_filter->InjConvRemaining))
2728 {
2729 status = HAL_ERROR;
2730 }
2731 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2732 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2733 {
2734 status = HAL_ERROR;
2735 }
2736 /* Check DFSDM filter state */
2737 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2738 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2739 {
2740 /* Set callbacks on DMA handler */
2741 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2742 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2743 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
2744 DFSDM_DMAInjectedHalfConvCplt : NULL;
2745
2746 /* Start DMA in interrupt mode */
2747 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \
2748 (uint32_t) pData, Length) != HAL_OK)
2749 {
2750 /* Set DFSDM filter in error state */
2751 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2752 status = HAL_ERROR;
2753 }
2754 else
2755 {
2756 /* Start injected conversion */
2757 DFSDM_InjConvStart(hdfsdm_filter);
2758 }
2759 }
2760 else
2761 {
2762 status = HAL_ERROR;
2763 }
2764 /* Return function status */
2765 return status;
2766 }
2767
2768 /**
2769 * @brief This function allows to stop injected conversion in DMA mode.
2770 * @note This function should be called only if injected conversion is ongoing.
2771 * @param hdfsdm_filter DFSDM filter handle.
2772 * @retval HAL status
2773 */
HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2774 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2775 {
2776 HAL_StatusTypeDef status = HAL_OK;
2777
2778 /* Check parameters */
2779 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2780
2781 /* Check DFSDM filter state */
2782 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2783 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2784 {
2785 /* Return error status */
2786 status = HAL_ERROR;
2787 }
2788 else
2789 {
2790 /* Stop current DMA transfer */
2791 if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
2792 {
2793 /* Set DFSDM filter in error state */
2794 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2795 status = HAL_ERROR;
2796 }
2797 else
2798 {
2799 /* Stop regular conversion */
2800 DFSDM_InjConvStop(hdfsdm_filter);
2801 }
2802 }
2803 /* Return function status */
2804 return status;
2805 }
2806
2807 /**
2808 * @brief This function allows to get injected conversion value.
2809 * @param hdfsdm_filter DFSDM filter handle.
2810 * @param Channel Corresponding channel of injected conversion.
2811 * @retval Injected conversion value
2812 */
HAL_DFSDM_FilterGetInjectedValue(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2813 int32_t HAL_DFSDM_FilterGetInjectedValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2814 uint32_t *Channel)
2815 {
2816 uint32_t reg;
2817 int32_t value;
2818
2819 /* Check parameters */
2820 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2821 assert_param(Channel != (void *)0);
2822
2823 /* Get value of data register for injected channel */
2824 reg = hdfsdm_filter->Instance->FLTJDATAR;
2825
2826 /* Extract channel and injected conversion value */
2827 *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
2828 /* Injected conversion value is a signed value located on 24 MSB of register */
2829 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2830 reg &= DFSDM_FLTJDATAR_JDATA;
2831 value = ((int32_t)reg) / 256;
2832
2833 /* return regular conversion value */
2834 return value;
2835 }
2836
2837 /**
2838 * @brief This function allows to start filter analog watchdog in interrupt mode.
2839 * @param hdfsdm_filter DFSDM filter handle.
2840 * @param awdParam DFSDM filter analog watchdog parameters.
2841 * @retval HAL status
2842 */
HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,const DFSDM_Filter_AwdParamTypeDef * awdParam)2843 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2844 const DFSDM_Filter_AwdParamTypeDef *awdParam)
2845 {
2846 HAL_StatusTypeDef status = HAL_OK;
2847
2848 /* Check parameters */
2849 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2850 assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
2851 assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
2852 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
2853 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
2854 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
2855 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
2856
2857 /* Check DFSDM filter state */
2858 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2859 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2860 {
2861 /* Return error status */
2862 status = HAL_ERROR;
2863 }
2864 else
2865 {
2866 /* Set analog watchdog data source */
2867 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2868 hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
2869
2870 /* Set thresholds and break signals */
2871 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2872 hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \
2873 awdParam->HighBreakSignal);
2874 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2875 hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \
2876 awdParam->LowBreakSignal);
2877
2878 /* Set channels and interrupt for analog watchdog */
2879 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
2880 hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \
2881 DFSDM_FLTCR2_AWDIE);
2882 }
2883 /* Return function status */
2884 return status;
2885 }
2886
2887 /**
2888 * @brief This function allows to stop filter analog watchdog in interrupt mode.
2889 * @param hdfsdm_filter DFSDM filter handle.
2890 * @retval HAL status
2891 */
HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2892 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2893 {
2894 HAL_StatusTypeDef status = HAL_OK;
2895
2896 /* Check parameters */
2897 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2898
2899 /* Check DFSDM filter state */
2900 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2901 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2902 {
2903 /* Return error status */
2904 status = HAL_ERROR;
2905 }
2906 else
2907 {
2908 /* Reset channels for analog watchdog and deactivate interrupt */
2909 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
2910
2911 /* Clear all analog watchdog flags */
2912 hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
2913
2914 /* Reset thresholds and break signals */
2915 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2916 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2917
2918 /* Reset analog watchdog data source */
2919 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2920 }
2921 /* Return function status */
2922 return status;
2923 }
2924
2925 /**
2926 * @brief This function allows to start extreme detector feature.
2927 * @param hdfsdm_filter DFSDM filter handle.
2928 * @param Channel Channels where extreme detector is enabled.
2929 * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
2930 * @retval HAL status
2931 */
HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel)2932 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2933 uint32_t Channel)
2934 {
2935 HAL_StatusTypeDef status = HAL_OK;
2936
2937 /* Check parameters */
2938 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2939 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
2940
2941 /* Check DFSDM filter state */
2942 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2943 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2944 {
2945 /* Return error status */
2946 status = HAL_ERROR;
2947 }
2948 else
2949 {
2950 /* Set channels for extreme detector */
2951 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2952 hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos);
2953 }
2954 /* Return function status */
2955 return status;
2956 }
2957
2958 /**
2959 * @brief This function allows to stop extreme detector feature.
2960 * @param hdfsdm_filter DFSDM filter handle.
2961 * @retval HAL status
2962 */
HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2963 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2964 {
2965 HAL_StatusTypeDef status = HAL_OK;
2966 __IO uint32_t reg1;
2967 __IO uint32_t reg2;
2968
2969 /* Check parameters */
2970 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2971
2972 /* Check DFSDM filter state */
2973 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2974 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2975 {
2976 /* Return error status */
2977 status = HAL_ERROR;
2978 }
2979 else
2980 {
2981 /* Reset channels for extreme detector */
2982 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2983
2984 /* Clear extreme detector values */
2985 reg1 = hdfsdm_filter->Instance->FLTEXMAX;
2986 reg2 = hdfsdm_filter->Instance->FLTEXMIN;
2987 UNUSED(reg1); /* To avoid GCC warning */
2988 UNUSED(reg2); /* To avoid GCC warning */
2989 }
2990 /* Return function status */
2991 return status;
2992 }
2993
2994 /**
2995 * @brief This function allows to get extreme detector maximum value.
2996 * @param hdfsdm_filter DFSDM filter handle.
2997 * @param Channel Corresponding channel.
2998 * @retval Extreme detector maximum value
2999 * This value is between Min_Data = -8388608 and Max_Data = 8388607.
3000 */
HAL_DFSDM_FilterGetExdMaxValue(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)3001 int32_t HAL_DFSDM_FilterGetExdMaxValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
3002 uint32_t *Channel)
3003 {
3004 uint32_t reg;
3005 int32_t value;
3006
3007 /* Check parameters */
3008 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
3009 assert_param(Channel != (void *)0);
3010
3011 /* Get value of extreme detector maximum register */
3012 reg = hdfsdm_filter->Instance->FLTEXMAX;
3013
3014 /* Extract channel and extreme detector maximum value */
3015 *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
3016 /* Extreme detector maximum value is a signed value located on 24 MSB of register */
3017 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
3018 reg &= DFSDM_FLTEXMAX_EXMAX;
3019 value = ((int32_t)reg) / 256;
3020
3021 /* return extreme detector maximum value */
3022 return value;
3023 }
3024
3025 /**
3026 * @brief This function allows to get extreme detector minimum value.
3027 * @param hdfsdm_filter DFSDM filter handle.
3028 * @param Channel Corresponding channel.
3029 * @retval Extreme detector minimum value
3030 * This value is between Min_Data = -8388608 and Max_Data = 8388607.
3031 */
HAL_DFSDM_FilterGetExdMinValue(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)3032 int32_t HAL_DFSDM_FilterGetExdMinValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
3033 uint32_t *Channel)
3034 {
3035 uint32_t reg;
3036 int32_t value;
3037
3038 /* Check parameters */
3039 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
3040 assert_param(Channel != (void *)0);
3041
3042 /* Get value of extreme detector minimum register */
3043 reg = hdfsdm_filter->Instance->FLTEXMIN;
3044
3045 /* Extract channel and extreme detector minimum value */
3046 *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
3047 /* Extreme detector minimum value is a signed value located on 24 MSB of register */
3048 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
3049 reg &= DFSDM_FLTEXMIN_EXMIN;
3050 value = ((int32_t)reg) / 256;
3051
3052 /* return extreme detector minimum value */
3053 return value;
3054 }
3055
3056 /**
3057 * @brief This function allows to get conversion time value.
3058 * @param hdfsdm_filter DFSDM filter handle.
3059 * @retval Conversion time value
3060 * @note To get time in second, this value has to be divided by DFSDM clock frequency.
3061 */
HAL_DFSDM_FilterGetConvTimeValue(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3062 uint32_t HAL_DFSDM_FilterGetConvTimeValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3063 {
3064 uint32_t reg;
3065 uint32_t value;
3066
3067 /* Check parameters */
3068 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
3069
3070 /* Get value of conversion timer register */
3071 reg = hdfsdm_filter->Instance->FLTCNVTIMR;
3072
3073 /* Extract conversion time value */
3074 value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos);
3075
3076 /* return extreme detector minimum value */
3077 return value;
3078 }
3079
3080 /**
3081 * @brief This function handles the DFSDM interrupts.
3082 * @param hdfsdm_filter DFSDM filter handle.
3083 * @retval None
3084 */
HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3085 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3086 {
3087 DFSDM_Channel_HandleTypeDef **channelHandleTable;
3088 const DFSDM_Filter_TypeDef *filter0Instance;
3089 uint32_t channelNumber;
3090
3091 /* Get FTLISR and FLTCR2 register values */
3092 const uint32_t temp_fltisr = hdfsdm_filter->Instance->FLTISR;
3093 const uint32_t temp_fltcr2 = hdfsdm_filter->Instance->FLTCR2;
3094
3095 #if defined(DFSDM2_Channel0)
3096 if (IS_DFSDM1_FILTER_INSTANCE(hdfsdm_filter->Instance))
3097 {
3098 channelHandleTable = a_dfsdm1ChannelHandle;
3099 filter0Instance = DFSDM1_Filter0;
3100 channelNumber = DFSDM1_CHANNEL_NUMBER;
3101 }
3102 else
3103 {
3104 channelHandleTable = a_dfsdm2ChannelHandle;
3105 filter0Instance = DFSDM2_Filter0;
3106 channelNumber = DFSDM2_CHANNEL_NUMBER;
3107 }
3108 #else /* DFSDM2_Channel0 */
3109 channelHandleTable = a_dfsdm1ChannelHandle;
3110 filter0Instance = DFSDM1_Filter0;
3111 channelNumber = DFSDM1_CHANNEL_NUMBER;
3112 #endif /* DFSDM2_Channel0 */
3113
3114 /* Check if overrun occurs during regular conversion */
3115 if(((temp_fltisr & DFSDM_FLTISR_ROVRF) != 0U) && \
3116 ((temp_fltcr2 & DFSDM_FLTCR2_ROVRIE) != 0U))
3117 {
3118 /* Clear regular overrun flag */
3119 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
3120
3121 /* Update error code */
3122 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
3123
3124 /* Call error callback */
3125 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3126 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
3127 #else
3128 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
3129 #endif
3130 }
3131 /* Check if overrun occurs during injected conversion */
3132 else if(((temp_fltisr & DFSDM_FLTISR_JOVRF) != 0U) && \
3133 ((temp_fltcr2 & DFSDM_FLTCR2_JOVRIE) != 0U))
3134 {
3135 /* Clear injected overrun flag */
3136 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
3137
3138 /* Update error code */
3139 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
3140
3141 /* Call error callback */
3142 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3143 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
3144 #else
3145 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
3146 #endif
3147 }
3148 /* Check if end of regular conversion */
3149 else if(((temp_fltisr & DFSDM_FLTISR_REOCF) != 0U) && \
3150 ((temp_fltcr2 & DFSDM_FLTCR2_REOCIE) != 0U))
3151 {
3152 /* Call regular conversion complete callback */
3153 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3154 hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
3155 #else
3156 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
3157 #endif
3158
3159 /* End of conversion if mode is not continuous and software trigger */
3160 if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
3161 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3162 {
3163 /* Disable interrupts for regular conversions */
3164 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
3165
3166 /* Update DFSDM filter state */
3167 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
3168 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
3169 }
3170 }
3171 /* Check if end of injected conversion */
3172 else if(((temp_fltisr & DFSDM_FLTISR_JEOCF) != 0U) && \
3173 ((temp_fltcr2 & DFSDM_FLTCR2_JEOCIE) != 0U))
3174 {
3175 /* Call injected conversion complete callback */
3176 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3177 hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
3178 #else
3179 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
3180 #endif
3181
3182 /* Update remaining injected conversions */
3183 hdfsdm_filter->InjConvRemaining--;
3184 if(hdfsdm_filter->InjConvRemaining == 0U)
3185 {
3186 /* End of conversion if trigger is software */
3187 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3188 {
3189 /* Disable interrupts for injected conversions */
3190 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
3191
3192 /* Update DFSDM filter state */
3193 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
3194 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
3195 }
3196 /* end of injected sequence, reset the value */
3197 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3198 hdfsdm_filter->InjectedChannelsNbr : 1U;
3199 }
3200 }
3201 /* Check if analog watchdog occurs */
3202 else if(((temp_fltisr & DFSDM_FLTISR_AWDF) != 0U) && \
3203 ((temp_fltcr2 & DFSDM_FLTCR2_AWDIE) != 0U))
3204 {
3205 uint32_t reg;
3206 uint32_t threshold;
3207 uint32_t channel = 0;
3208
3209 /* Get channel and threshold */
3210 reg = hdfsdm_filter->Instance->FLTAWSR;
3211 threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
3212 if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
3213 {
3214 reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos;
3215 }
3216 while (((reg & 1U) == 0U) && (channel < (channelNumber - 1U)))
3217 {
3218 channel++;
3219 reg = reg >> 1;
3220 }
3221 /* Clear analog watchdog flag */
3222 hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
3223 (1UL << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \
3224 (1UL << channel);
3225
3226 /* Call analog watchdog callback */
3227 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3228 hdfsdm_filter->AwdCallback(hdfsdm_filter, channel, threshold);
3229 #else
3230 HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
3231 #endif
3232 }
3233 /* Check if clock absence occurs */
3234 else if((hdfsdm_filter->Instance == filter0Instance) && \
3235 ((temp_fltisr & DFSDM_FLTISR_CKABF) != 0U) && \
3236 ((temp_fltcr2 & DFSDM_FLTCR2_CKABIE) != 0U))
3237 {
3238 uint32_t reg;
3239 uint32_t channel = 0;
3240
3241 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);
3242
3243 while (channel < channelNumber)
3244 {
3245 /* Check if flag is set and corresponding channel is enabled */
3246 if (((reg & 1U) != 0U) && (channelHandleTable[channel] != NULL))
3247 {
3248 /* Check clock absence has been enabled for this channel */
3249 if ((channelHandleTable[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
3250 {
3251 /* Clear clock absence flag */
3252 hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
3253
3254 /* Call clock absence callback */
3255 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3256 channelHandleTable[channel]->CkabCallback(channelHandleTable[channel]);
3257 #else
3258 HAL_DFSDM_ChannelCkabCallback(channelHandleTable[channel]);
3259 #endif
3260 }
3261 }
3262 channel++;
3263 reg = reg >> 1;
3264 }
3265 }
3266 /* Check if short circuit detection occurs */
3267 else if((hdfsdm_filter->Instance == filter0Instance) && \
3268 ((temp_fltisr & DFSDM_FLTISR_SCDF) != 0U) && \
3269 ((temp_fltcr2 & DFSDM_FLTCR2_SCDIE) != 0U))
3270 {
3271 uint32_t reg;
3272 uint32_t channel = 0;
3273
3274 /* Get channel */
3275 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);
3276 while (((reg & 1U) == 0U) && (channel < (channelNumber - 1U)))
3277 {
3278 channel++;
3279 reg = reg >> 1;
3280 }
3281
3282 /* Clear short circuit detection flag */
3283 hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
3284
3285 /* Call short circuit detection callback */
3286 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3287 channelHandleTable[channel]->ScdCallback(channelHandleTable[channel]);
3288 #else
3289 HAL_DFSDM_ChannelScdCallback(channelHandleTable[channel]);
3290 #endif
3291 }
3292 }
3293
3294 /**
3295 * @brief Regular conversion complete callback.
3296 * @note In interrupt mode, user has to read conversion value in this function
3297 * using HAL_DFSDM_FilterGetRegularValue.
3298 * @param hdfsdm_filter DFSDM filter handle.
3299 * @retval None
3300 */
HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3301 __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3302 {
3303 /* Prevent unused argument(s) compilation warning */
3304 UNUSED(hdfsdm_filter);
3305
3306 /* NOTE : This function should not be modified, when the callback is needed,
3307 the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
3308 */
3309 }
3310
3311 /**
3312 * @brief Half regular conversion complete callback.
3313 * @param hdfsdm_filter DFSDM filter handle.
3314 * @retval None
3315 */
HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3316 __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3317 {
3318 /* Prevent unused argument(s) compilation warning */
3319 UNUSED(hdfsdm_filter);
3320
3321 /* NOTE : This function should not be modified, when the callback is needed,
3322 the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
3323 */
3324 }
3325
3326 /**
3327 * @brief Injected conversion complete callback.
3328 * @note In interrupt mode, user has to read conversion value in this function
3329 * using HAL_DFSDM_FilterGetInjectedValue.
3330 * @param hdfsdm_filter DFSDM filter handle.
3331 * @retval None
3332 */
HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3333 __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3334 {
3335 /* Prevent unused argument(s) compilation warning */
3336 UNUSED(hdfsdm_filter);
3337
3338 /* NOTE : This function should not be modified, when the callback is needed,
3339 the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
3340 */
3341 }
3342
3343 /**
3344 * @brief Half injected conversion complete callback.
3345 * @param hdfsdm_filter DFSDM filter handle.
3346 * @retval None
3347 */
HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3348 __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3349 {
3350 /* Prevent unused argument(s) compilation warning */
3351 UNUSED(hdfsdm_filter);
3352
3353 /* NOTE : This function should not be modified, when the callback is needed,
3354 the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
3355 */
3356 }
3357
3358 /**
3359 * @brief Filter analog watchdog callback.
3360 * @param hdfsdm_filter DFSDM filter handle.
3361 * @param Channel Corresponding channel.
3362 * @param Threshold Low or high threshold has been reached.
3363 * @retval None
3364 */
HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel,uint32_t Threshold)3365 __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
3366 uint32_t Channel, uint32_t Threshold)
3367 {
3368 /* Prevent unused argument(s) compilation warning */
3369 UNUSED(hdfsdm_filter);
3370 UNUSED(Channel);
3371 UNUSED(Threshold);
3372
3373 /* NOTE : This function should not be modified, when the callback is needed,
3374 the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
3375 */
3376 }
3377
3378 /**
3379 * @brief Error callback.
3380 * @param hdfsdm_filter DFSDM filter handle.
3381 * @retval None
3382 */
HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3383 __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3384 {
3385 /* Prevent unused argument(s) compilation warning */
3386 UNUSED(hdfsdm_filter);
3387
3388 /* NOTE : This function should not be modified, when the callback is needed,
3389 the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
3390 */
3391 }
3392
3393 /**
3394 * @}
3395 */
3396
3397 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
3398 * @brief Filter state functions
3399 *
3400 @verbatim
3401 ==============================================================================
3402 ##### Filter state functions #####
3403 ==============================================================================
3404 [..] This section provides functions allowing to:
3405 (+) Get the DFSDM filter state.
3406 (+) Get the DFSDM filter error.
3407 @endverbatim
3408 * @{
3409 */
3410
3411 /**
3412 * @brief This function allows to get the current DFSDM filter handle state.
3413 * @param hdfsdm_filter DFSDM filter handle.
3414 * @retval DFSDM filter state.
3415 */
HAL_DFSDM_FilterGetState(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3416 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3417 {
3418 /* Return DFSDM filter handle state */
3419 return hdfsdm_filter->State;
3420 }
3421
3422 /**
3423 * @brief This function allows to get the current DFSDM filter error.
3424 * @param hdfsdm_filter DFSDM filter handle.
3425 * @retval DFSDM filter error code.
3426 */
HAL_DFSDM_FilterGetError(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3427 uint32_t HAL_DFSDM_FilterGetError(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3428 {
3429 return hdfsdm_filter->ErrorCode;
3430 }
3431
3432 /**
3433 * @}
3434 */
3435
3436 /**
3437 * @}
3438 */
3439 /* End of exported functions -------------------------------------------------*/
3440
3441 /* Private functions ---------------------------------------------------------*/
3442 /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
3443 * @{
3444 */
3445
3446 /**
3447 * @brief DMA half transfer complete callback for regular conversion.
3448 * @param hdma DMA handle.
3449 * @retval None
3450 */
DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef * hdma)3451 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
3452 {
3453 /* Get DFSDM filter handle */
3454 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3455
3456 /* Call regular half conversion complete callback */
3457 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3458 hdfsdm_filter->RegConvHalfCpltCallback(hdfsdm_filter);
3459 #else
3460 HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
3461 #endif
3462 }
3463
3464 /**
3465 * @brief DMA transfer complete callback for regular conversion.
3466 * @param hdma DMA handle.
3467 * @retval None
3468 */
DFSDM_DMARegularConvCplt(DMA_HandleTypeDef * hdma)3469 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
3470 {
3471 /* Get DFSDM filter handle */
3472 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3473
3474 /* Call regular conversion complete callback */
3475 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3476 hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
3477 #else
3478 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
3479 #endif
3480 }
3481
3482 /**
3483 * @brief DMA half transfer complete callback for injected conversion.
3484 * @param hdma DMA handle.
3485 * @retval None
3486 */
DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef * hdma)3487 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
3488 {
3489 /* Get DFSDM filter handle */
3490 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3491
3492 /* Call injected half conversion complete callback */
3493 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3494 hdfsdm_filter->InjConvHalfCpltCallback(hdfsdm_filter);
3495 #else
3496 HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
3497 #endif
3498 }
3499
3500 /**
3501 * @brief DMA transfer complete callback for injected conversion.
3502 * @param hdma DMA handle.
3503 * @retval None
3504 */
DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef * hdma)3505 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
3506 {
3507 /* Get DFSDM filter handle */
3508 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3509
3510 /* Call injected conversion complete callback */
3511 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3512 hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
3513 #else
3514 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
3515 #endif
3516 }
3517
3518 /**
3519 * @brief DMA error callback.
3520 * @param hdma DMA handle.
3521 * @retval None
3522 */
DFSDM_DMAError(DMA_HandleTypeDef * hdma)3523 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
3524 {
3525 /* Get DFSDM filter handle */
3526 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3527
3528 /* Update error code */
3529 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
3530
3531 /* Call error callback */
3532 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3533 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
3534 #else
3535 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
3536 #endif
3537 }
3538
3539 /**
3540 * @brief This function allows to get the number of injected channels.
3541 * @param Channels bitfield of injected channels.
3542 * @retval Number of injected channels.
3543 */
DFSDM_GetInjChannelsNbr(uint32_t Channels)3544 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
3545 {
3546 uint32_t nbChannels = 0;
3547 uint32_t tmp;
3548
3549 /* Get the number of channels from bitfield */
3550 tmp = (uint32_t)(Channels & DFSDM_LSB_MASK);
3551 while(tmp != 0U)
3552 {
3553 if((tmp & 1U) != 0U)
3554 {
3555 nbChannels++;
3556 }
3557 tmp = (uint32_t)(tmp >> 1);
3558 }
3559 return nbChannels;
3560 }
3561
3562 /**
3563 * @brief This function allows to get the channel number from channel instance.
3564 * @param Instance DFSDM channel instance.
3565 * @retval Channel number.
3566 */
DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef * Instance)3567 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef* Instance)
3568 {
3569 uint32_t channel;
3570
3571 /* Get channel from instance */
3572 if(Instance == DFSDM1_Channel0)
3573 {
3574 channel = 0;
3575 }
3576 #if defined(DFSDM2_Channel0)
3577 else if (Instance == DFSDM2_Channel0)
3578 {
3579 channel = 0;
3580 }
3581 else if (Instance == DFSDM2_Channel1)
3582 {
3583 channel = 1;
3584 }
3585 #endif /* DFSDM2_Channel0 */
3586 else if(Instance == DFSDM1_Channel1)
3587 {
3588 channel = 1;
3589 }
3590 else if(Instance == DFSDM1_Channel2)
3591 {
3592 channel = 2;
3593 }
3594 else if(Instance == DFSDM1_Channel3)
3595 {
3596 channel = 3;
3597 }
3598 else if(Instance == DFSDM1_Channel4)
3599 {
3600 channel = 4;
3601 }
3602 else if(Instance == DFSDM1_Channel5)
3603 {
3604 channel = 5;
3605 }
3606 else if(Instance == DFSDM1_Channel6)
3607 {
3608 channel = 6;
3609 }
3610 else /* DFSDM1_Channel7 */
3611 {
3612 channel = 7;
3613 }
3614
3615 return channel;
3616 }
3617
3618 /**
3619 * @brief This function allows to really start regular conversion.
3620 * @param hdfsdm_filter DFSDM filter handle.
3621 * @retval None
3622 */
DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3623 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3624 {
3625 /* Check regular trigger */
3626 if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
3627 {
3628 /* Software start of regular conversion */
3629 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3630 }
3631 else /* synchronous trigger */
3632 {
3633 /* Disable DFSDM filter */
3634 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3635
3636 /* Set RSYNC bit in DFSDM_FLTCR1 register */
3637 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
3638
3639 /* Enable DFSDM filter */
3640 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3641
3642 /* If injected conversion was in progress, restart it */
3643 if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
3644 {
3645 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3646 {
3647 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3648 }
3649 /* Update remaining injected conversions */
3650 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3651 hdfsdm_filter->InjectedChannelsNbr : 1U;
3652 }
3653 }
3654 /* Update DFSDM filter state */
3655 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
3656 HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
3657 }
3658
3659 /**
3660 * @brief This function allows to really stop regular conversion.
3661 * @param hdfsdm_filter DFSDM filter handle.
3662 * @retval None
3663 */
DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3664 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3665 {
3666 /* Disable DFSDM filter */
3667 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3668
3669 /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
3670 if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3671 {
3672 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
3673 }
3674
3675 /* Enable DFSDM filter */
3676 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3677
3678 /* If injected conversion was in progress, restart it */
3679 if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
3680 {
3681 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3682 {
3683 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3684 }
3685 /* Update remaining injected conversions */
3686 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3687 hdfsdm_filter->InjectedChannelsNbr : 1U;
3688 }
3689
3690 /* Update DFSDM filter state */
3691 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
3692 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
3693 }
3694
3695 /**
3696 * @brief This function allows to really start injected conversion.
3697 * @param hdfsdm_filter DFSDM filter handle.
3698 * @retval None
3699 */
DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3700 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3701 {
3702 /* Check injected trigger */
3703 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3704 {
3705 /* Software start of injected conversion */
3706 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3707 }
3708 else /* external or synchronous trigger */
3709 {
3710 /* Disable DFSDM filter */
3711 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3712
3713 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3714 {
3715 /* Set JSYNC bit in DFSDM_FLTCR1 register */
3716 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
3717 }
3718 else /* external trigger */
3719 {
3720 /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
3721 hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
3722 }
3723
3724 /* Enable DFSDM filter */
3725 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3726
3727 /* If regular conversion was in progress, restart it */
3728 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
3729 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3730 {
3731 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3732 }
3733 }
3734 /* Update DFSDM filter state */
3735 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
3736 HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
3737 }
3738
3739 /**
3740 * @brief This function allows to really stop injected conversion.
3741 * @param hdfsdm_filter DFSDM filter handle.
3742 * @retval None
3743 */
DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3744 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3745 {
3746 /* Disable DFSDM filter */
3747 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3748
3749 /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
3750 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3751 {
3752 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
3753 }
3754 else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
3755 {
3756 /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
3757 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
3758 }
3759 else
3760 {
3761 /* Nothing to do */
3762 }
3763
3764 /* Enable DFSDM filter */
3765 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3766
3767 /* If regular conversion was in progress, restart it */
3768 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
3769 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3770 {
3771 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3772 }
3773
3774 /* Update remaining injected conversions */
3775 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3776 hdfsdm_filter->InjectedChannelsNbr : 1U;
3777
3778 /* Update DFSDM filter state */
3779 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
3780 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
3781 }
3782
3783 /**
3784 * @}
3785 */
3786 /* End of private functions --------------------------------------------------*/
3787
3788 /**
3789 * @}
3790 */
3791
3792 #endif /* HAL_DFSDM_MODULE_ENABLED */
3793
3794 /**
3795 * @}
3796 */
3797
3798
