1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_dac_ex.c
4 * @author MCD Application Team
5 * @brief Extended DAC HAL module driver.
6 * This file provides firmware functions to manage the extended
7 * functionalities of the DAC peripheral.
8 *
9 *
10 ******************************************************************************
11 * @attention
12 *
13 * Copyright (c) 2017 STMicroelectronics.
14 * All rights reserved.
15 *
16 * This software is licensed under terms that can be found in the LICENSE file
17 * in the root directory of this software component.
18 * If no LICENSE file comes with this software, it is provided AS-IS.
19 *
20 ******************************************************************************
21 @verbatim
22 ==============================================================================
23 ##### How to use this driver #####
24 ==============================================================================
25 [..]
26 *** Dual mode IO operation ***
27 ==============================
28 [..]
29 (+) Use HAL_DACEx_DualStart() to enable both channel and start conversion
30 for dual mode operation.
31 If software trigger is selected, using HAL_DACEx_DualStart() will start
32 the conversion of the value previously set by HAL_DACEx_DualSetValue().
33 (+) Use HAL_DACEx_DualStop() to disable both channel and stop conversion
34 for dual mode operation.
35 (+) Use HAL_DACEx_DualStart_DMA() to enable both channel and start conversion
36 for dual mode operation using DMA to feed DAC converters.
37 First issued trigger will start the conversion of the value previously
38 set by HAL_DACEx_DualSetValue().
39 The same callbacks that are used in single mode are called in dual mode to notify
40 transfer completion (half complete or complete), errors or underrun.
41 (+) Use HAL_DACEx_DualStop_DMA() to disable both channel and stop conversion
42 for dual mode operation using DMA to feed DAC converters.
43 (+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) :
44 Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
45 HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in
46 Channel 1 and Channel 2.
47 *** Signal generation operation ***
48 ===================================
49 [..]
50 (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
51 (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
52
53 (+) HAL_DACEx_SelfCalibrate to calibrate one DAC channel.
54 (+) HAL_DACEx_SetUserTrimming to set user trimming value.
55 (+) HAL_DACEx_GetTrimOffset to retrieve trimming value (factory setting
56 after reset, user setting if HAL_DACEx_SetUserTrimming have been used
57 at least one time after reset).
58
59 @endverbatim
60 ******************************************************************************
61 */
62
63
64 /* Includes ------------------------------------------------------------------*/
65 #include "stm32h7xx_hal.h"
66
67 /** @addtogroup STM32H7xx_HAL_Driver
68 * @{
69 */
70
71 #ifdef HAL_DAC_MODULE_ENABLED
72
73 #if defined(DAC1) || defined(DAC2)
74
75 /** @defgroup DACEx DACEx
76 * @brief DAC Extended HAL module driver
77 * @{
78 */
79
80 /* Private typedef -----------------------------------------------------------*/
81 /* Private define ------------------------------------------------------------*/
82
83 /* Delay for DAC minimum trimming time. */
84 /* Note: minimum time needed between two calibration steps */
85 /* The delay below is specified under conditions: */
86 /* - DAC channel output buffer enabled */
87 /* Literal set to maximum value (refer to device datasheet, */
88 /* electrical characteristics, parameter "tTRIM"). */
89 /* Unit: us */
90 #define DAC_DELAY_TRIM_US (50UL) /*!< Delay for DAC minimum trimming time */
91
92 /* Private macro -------------------------------------------------------------*/
93 /* Private variables ---------------------------------------------------------*/
94 /* Private function prototypes -----------------------------------------------*/
95 /* Exported functions --------------------------------------------------------*/
96
97 /** @defgroup DACEx_Exported_Functions DACEx Exported Functions
98 * @{
99 */
100
101 /** @defgroup DACEx_Exported_Functions_Group2 IO operation functions
102 * @brief Extended IO operation functions
103 *
104 @verbatim
105 ==============================================================================
106 ##### Extended features functions #####
107 ==============================================================================
108 [..] This section provides functions allowing to:
109 (+) Start conversion.
110 (+) Stop conversion.
111 (+) Start conversion and enable DMA transfer.
112 (+) Stop conversion and disable DMA transfer.
113 (+) Get result of conversion.
114 (+) Get result of dual mode conversion.
115
116 @endverbatim
117 * @{
118 */
119
120
121 /**
122 * @brief Enables DAC and starts conversion of both channels.
123 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
124 * the configuration information for the specified DAC.
125 * @retval HAL status
126 */
HAL_DACEx_DualStart(DAC_HandleTypeDef * hdac)127 HAL_StatusTypeDef HAL_DACEx_DualStart(DAC_HandleTypeDef *hdac)
128 {
129 uint32_t tmp_swtrig = 0UL;
130
131 /* Check the DAC peripheral handle */
132 if (hdac == NULL)
133 {
134 return HAL_ERROR;
135 }
136
137
138 /* Process locked */
139 __HAL_LOCK(hdac);
140
141 /* Change DAC state */
142 hdac->State = HAL_DAC_STATE_BUSY;
143
144 /* Enable the Peripheral */
145 __HAL_DAC_ENABLE(hdac, DAC_CHANNEL_1);
146 __HAL_DAC_ENABLE(hdac, DAC_CHANNEL_2);
147
148 /* Check if software trigger enabled */
149 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
150 {
151 tmp_swtrig |= DAC_SWTRIGR_SWTRIG1;
152 }
153 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (DAC_CHANNEL_2 & 0x10UL)))
154 {
155 tmp_swtrig |= DAC_SWTRIGR_SWTRIG2;
156 }
157 /* Enable the selected DAC software conversion*/
158 SET_BIT(hdac->Instance->SWTRIGR, tmp_swtrig);
159
160 /* Change DAC state */
161 hdac->State = HAL_DAC_STATE_READY;
162
163 /* Process unlocked */
164 __HAL_UNLOCK(hdac);
165
166 /* Return function status */
167 return HAL_OK;
168 }
169
170 /**
171 * @brief Disables DAC and stop conversion of both channels.
172 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
173 * the configuration information for the specified DAC.
174 * @retval HAL status
175 */
HAL_DACEx_DualStop(DAC_HandleTypeDef * hdac)176 HAL_StatusTypeDef HAL_DACEx_DualStop(DAC_HandleTypeDef *hdac)
177 {
178 /* Check the DAC peripheral handle */
179 if (hdac == NULL)
180 {
181 return HAL_ERROR;
182 }
183
184
185 /* Disable the Peripheral */
186 __HAL_DAC_DISABLE(hdac, DAC_CHANNEL_1);
187 __HAL_DAC_DISABLE(hdac, DAC_CHANNEL_2);
188
189 /* Change DAC state */
190 hdac->State = HAL_DAC_STATE_READY;
191
192 /* Return function status */
193 return HAL_OK;
194 }
195
196 /**
197 * @brief Enables DAC and starts conversion of both channel 1 and 2 of the same DAC.
198 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
199 * the configuration information for the specified DAC.
200 * @param Channel The DAC channel that will request data from DMA.
201 * This parameter can be one of the following values:
202 * @arg DAC_CHANNEL_1: DAC Channel1 selected
203 * @arg DAC_CHANNEL_2: DAC Channel2 selected
204 * @param pData The destination peripheral Buffer address.
205 * @param Length The length of data to be transferred from memory to DAC peripheral
206 * @param Alignment Specifies the data alignment for DAC channel.
207 * This parameter can be one of the following values:
208 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
209 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
210 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
211 * @retval HAL status
212 */
HAL_DACEx_DualStart_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,const uint32_t * pData,uint32_t Length,uint32_t Alignment)213 HAL_StatusTypeDef HAL_DACEx_DualStart_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel,
214 const uint32_t *pData, uint32_t Length, uint32_t Alignment)
215 {
216 HAL_StatusTypeDef status;
217 uint32_t tmpreg = 0UL;
218
219 /* Check the DAC peripheral handle */
220 if (hdac == NULL)
221 {
222 return HAL_ERROR;
223 }
224
225 /* Check the parameters */
226 assert_param(IS_DAC_CHANNEL(Channel));
227 assert_param(IS_DAC_ALIGN(Alignment));
228
229 /* Process locked */
230 __HAL_LOCK(hdac);
231
232 /* Change DAC state */
233 hdac->State = HAL_DAC_STATE_BUSY;
234
235 if (Channel == DAC_CHANNEL_1)
236 {
237 /* Set the DMA transfer complete callback for channel1 */
238 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
239
240 /* Set the DMA half transfer complete callback for channel1 */
241 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
242
243 /* Set the DMA error callback for channel1 */
244 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
245
246 /* Enable the selected DAC channel1 DMA request */
247 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
248 }
249 else
250 {
251 /* Set the DMA transfer complete callback for channel2 */
252 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
253
254 /* Set the DMA half transfer complete callback for channel2 */
255 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
256
257 /* Set the DMA error callback for channel2 */
258 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
259
260 /* Enable the selected DAC channel2 DMA request */
261 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
262 }
263
264 switch (Alignment)
265 {
266 case DAC_ALIGN_12B_R:
267 /* Get DHR12R1 address */
268 tmpreg = (uint32_t)&hdac->Instance->DHR12RD;
269 break;
270 case DAC_ALIGN_12B_L:
271 /* Get DHR12L1 address */
272 tmpreg = (uint32_t)&hdac->Instance->DHR12LD;
273 break;
274 case DAC_ALIGN_8B_R:
275 /* Get DHR8R1 address */
276 tmpreg = (uint32_t)&hdac->Instance->DHR8RD;
277 break;
278 default:
279 break;
280 }
281
282 /* Enable the DMA channel */
283 if (Channel == DAC_CHANNEL_1)
284 {
285 /* Enable the DAC DMA underrun interrupt */
286 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
287
288 /* Enable the DMA channel */
289 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
290 }
291 else
292 {
293 /* Enable the DAC DMA underrun interrupt */
294 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
295
296 /* Enable the DMA channel */
297 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
298 }
299
300 /* Process Unlocked */
301 __HAL_UNLOCK(hdac);
302
303 if (status == HAL_OK)
304 {
305 /* Enable the Peripheral */
306 __HAL_DAC_ENABLE(hdac, DAC_CHANNEL_1);
307 __HAL_DAC_ENABLE(hdac, DAC_CHANNEL_2);
308 }
309 else
310 {
311 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
312 }
313
314 /* Return function status */
315 return status;
316 }
317
318 /**
319 * @brief Disables DAC and stop conversion both channel.
320 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
321 * the configuration information for the specified DAC.
322 * @param Channel The DAC channel that requests data from DMA.
323 * This parameter can be one of the following values:
324 * @arg DAC_CHANNEL_1: DAC Channel1 selected
325 * @arg DAC_CHANNEL_2: DAC Channel2 selected
326 * @retval HAL status
327 */
HAL_DACEx_DualStop_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel)328 HAL_StatusTypeDef HAL_DACEx_DualStop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
329 {
330 HAL_StatusTypeDef status;
331
332 /* Check the DAC peripheral handle */
333 if (hdac == NULL)
334 {
335 return HAL_ERROR;
336 }
337
338
339 /* Disable the selected DAC channel DMA request */
340 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2 | DAC_CR_DMAEN1);
341
342 /* Disable the Peripheral */
343 __HAL_DAC_DISABLE(hdac, DAC_CHANNEL_1);
344 __HAL_DAC_DISABLE(hdac, DAC_CHANNEL_2);
345
346 /* Disable the DMA channel */
347
348 /* Channel1 is used */
349 if (Channel == DAC_CHANNEL_1)
350 {
351 /* Disable the DMA channel */
352 status = HAL_DMA_Abort(hdac->DMA_Handle1);
353
354 /* Disable the DAC DMA underrun interrupt */
355 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
356 }
357 else
358 {
359 /* Disable the DMA channel */
360 status = HAL_DMA_Abort(hdac->DMA_Handle2);
361
362 /* Disable the DAC DMA underrun interrupt */
363 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
364 }
365
366 /* Check if DMA Channel effectively disabled */
367 if (status != HAL_OK)
368 {
369 /* Update DAC state machine to error */
370 hdac->State = HAL_DAC_STATE_ERROR;
371 }
372 else
373 {
374 /* Change DAC state */
375 hdac->State = HAL_DAC_STATE_READY;
376 }
377
378 /* Return function status */
379 return status;
380 }
381
382
383 /**
384 * @brief Enable or disable the selected DAC channel wave generation.
385 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
386 * the configuration information for the specified DAC.
387 * @param Channel The selected DAC channel.
388 * This parameter can be one of the following values:
389 * @arg DAC_CHANNEL_1: DAC Channel1 selected
390 * @arg DAC_CHANNEL_2: DAC Channel2 selected
391 * @param Amplitude Select max triangle amplitude.
392 * This parameter can be one of the following values:
393 * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
394 * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
395 * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
396 * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
397 * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
398 * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
399 * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
400 * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
401 * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
402 * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
403 * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
404 * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
405 * @retval HAL status
406 */
HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Amplitude)407 HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
408 {
409 /* Check the DAC peripheral handle */
410 if (hdac == NULL)
411 {
412 return HAL_ERROR;
413 }
414
415 /* Check the parameters */
416 assert_param(IS_DAC_CHANNEL(Channel));
417 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
418
419 /* Process locked */
420 __HAL_LOCK(hdac);
421
422 /* Change DAC state */
423 hdac->State = HAL_DAC_STATE_BUSY;
424
425 /* Enable the triangle wave generation for the selected DAC channel */
426 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL),
427 (DAC_CR_WAVE1_1 | Amplitude) << (Channel & 0x10UL));
428
429 /* Change DAC state */
430 hdac->State = HAL_DAC_STATE_READY;
431
432 /* Process unlocked */
433 __HAL_UNLOCK(hdac);
434
435 /* Return function status */
436 return HAL_OK;
437 }
438
439 /**
440 * @brief Enable or disable the selected DAC channel wave generation.
441 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
442 * the configuration information for the specified DAC.
443 * @param Channel The selected DAC channel.
444 * This parameter can be one of the following values:
445 * @arg DAC_CHANNEL_1: DAC Channel1 selected
446 * @arg DAC_CHANNEL_2: DAC Channel2 selected
447 * @param Amplitude Unmask DAC channel LFSR for noise wave generation.
448 * This parameter can be one of the following values:
449 * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
450 * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
451 * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
452 * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
453 * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
454 * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
455 * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
456 * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
457 * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
458 * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
459 * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
460 * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
461 * @retval HAL status
462 */
HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Amplitude)463 HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
464 {
465 /* Check the DAC peripheral handle */
466 if (hdac == NULL)
467 {
468 return HAL_ERROR;
469 }
470
471 /* Check the parameters */
472 assert_param(IS_DAC_CHANNEL(Channel));
473 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
474
475 /* Process locked */
476 __HAL_LOCK(hdac);
477
478 /* Change DAC state */
479 hdac->State = HAL_DAC_STATE_BUSY;
480
481 /* Enable the noise wave generation for the selected DAC channel */
482 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL),
483 (DAC_CR_WAVE1_0 | Amplitude) << (Channel & 0x10UL));
484
485 /* Change DAC state */
486 hdac->State = HAL_DAC_STATE_READY;
487
488 /* Process unlocked */
489 __HAL_UNLOCK(hdac);
490
491 /* Return function status */
492 return HAL_OK;
493 }
494
495
496 /**
497 * @brief Set the specified data holding register value for dual DAC channel.
498 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
499 * the configuration information for the specified DAC.
500 * @param Alignment Specifies the data alignment for dual channel DAC.
501 * This parameter can be one of the following values:
502 * DAC_ALIGN_8B_R: 8bit right data alignment selected
503 * DAC_ALIGN_12B_L: 12bit left data alignment selected
504 * DAC_ALIGN_12B_R: 12bit right data alignment selected
505 * @param Data1 Data for DAC Channel1 to be loaded in the selected data holding register.
506 * @param Data2 Data for DAC Channel2 to be loaded in the selected data holding register.
507 * @note In dual mode, a unique register access is required to write in both
508 * DAC channels at the same time.
509 * @retval HAL status
510 */
HAL_DACEx_DualSetValue(DAC_HandleTypeDef * hdac,uint32_t Alignment,uint32_t Data1,uint32_t Data2)511 HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
512 {
513 uint32_t data;
514 uint32_t tmp;
515
516 /* Check the DAC peripheral handle */
517 if (hdac == NULL)
518 {
519 return HAL_ERROR;
520 }
521
522 /* Check the parameters */
523 assert_param(IS_DAC_ALIGN(Alignment));
524 assert_param(IS_DAC_DATA(Data1));
525 assert_param(IS_DAC_DATA(Data2));
526
527 /* Calculate and set dual DAC data holding register value */
528 if (Alignment == DAC_ALIGN_8B_R)
529 {
530 data = ((uint32_t)Data2 << 8U) | Data1;
531 }
532 else
533 {
534 data = ((uint32_t)Data2 << 16U) | Data1;
535 }
536
537 tmp = (uint32_t)hdac->Instance;
538 tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
539
540 /* Set the dual DAC selected data holding register */
541 *(__IO uint32_t *)tmp = data;
542
543 /* Return function status */
544 return HAL_OK;
545 }
546
547 /**
548 * @brief Conversion complete callback in non-blocking mode for Channel2.
549 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
550 * the configuration information for the specified DAC.
551 * @retval None
552 */
HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef * hdac)553 __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef *hdac)
554 {
555 /* Prevent unused argument(s) compilation warning */
556 UNUSED(hdac);
557
558 /* NOTE : This function should not be modified, when the callback is needed,
559 the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
560 */
561 }
562
563 /**
564 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel2.
565 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
566 * the configuration information for the specified DAC.
567 * @retval None
568 */
HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef * hdac)569 __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef *hdac)
570 {
571 /* Prevent unused argument(s) compilation warning */
572 UNUSED(hdac);
573
574 /* NOTE : This function should not be modified, when the callback is needed,
575 the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
576 */
577 }
578
579 /**
580 * @brief Error DAC callback for Channel2.
581 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
582 * the configuration information for the specified DAC.
583 * @retval None
584 */
HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef * hdac)585 __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
586 {
587 /* Prevent unused argument(s) compilation warning */
588 UNUSED(hdac);
589
590 /* NOTE : This function should not be modified, when the callback is needed,
591 the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
592 */
593 }
594
595 /**
596 * @brief DMA underrun DAC callback for Channel2.
597 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
598 * the configuration information for the specified DAC.
599 * @retval None
600 */
HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef * hdac)601 __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
602 {
603 /* Prevent unused argument(s) compilation warning */
604 UNUSED(hdac);
605
606 /* NOTE : This function should not be modified, when the callback is needed,
607 the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
608 */
609 }
610
611
612 /**
613 * @brief Run the self calibration of one DAC channel.
614 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
615 * the configuration information for the specified DAC.
616 * @param sConfig DAC channel configuration structure.
617 * @param Channel The selected DAC channel.
618 * This parameter can be one of the following values:
619 * @arg DAC_CHANNEL_1: DAC Channel1 selected
620 * @arg DAC_CHANNEL_2: DAC Channel2 selected
621 * @retval Updates DAC_TrimmingValue. , DAC_UserTrimming set to DAC_UserTrimming
622 * @retval HAL status
623 * @note Calibration runs about 7 ms.
624 */
HAL_DACEx_SelfCalibrate(DAC_HandleTypeDef * hdac,DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)625 HAL_StatusTypeDef HAL_DACEx_SelfCalibrate(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
626 {
627 HAL_StatusTypeDef status = HAL_OK;
628
629 uint32_t trimmingvalue;
630 uint32_t delta;
631 __IO uint32_t wait_loop_index;
632
633 /* store/restore channel configuration structure purpose */
634 uint32_t oldmodeconfiguration;
635
636 /* Check the parameters */
637 assert_param(IS_DAC_CHANNEL(Channel));
638
639 /* Check the DAC handle allocation */
640 /* Check if DAC running */
641 if ((hdac == NULL) || (sConfig == NULL))
642 {
643 status = HAL_ERROR;
644 }
645 else if (hdac->State == HAL_DAC_STATE_BUSY)
646 {
647 status = HAL_ERROR;
648 }
649 else
650 {
651 /* Process locked */
652 __HAL_LOCK(hdac);
653
654 /* Store configuration */
655 oldmodeconfiguration = (hdac->Instance->MCR & (DAC_MCR_MODE1 << (Channel & 0x10UL)));
656
657 /* Disable the selected DAC channel */
658 CLEAR_BIT((hdac->Instance->CR), (DAC_CR_EN1 << (Channel & 0x10UL)));
659
660 /* Set mode in MCR for calibration */
661 MODIFY_REG(hdac->Instance->MCR, (DAC_MCR_MODE1 << (Channel & 0x10UL)), 0U);
662
663 /* Enable the selected DAC channel calibration */
664 /* i.e. set DAC_CR_CENx bit */
665 SET_BIT((hdac->Instance->CR), (DAC_CR_CEN1 << (Channel & 0x10UL)));
666
667 /* Init trimming counter */
668 /* Medium value */
669 trimmingvalue = 0x10UL;
670 delta = 0x08UL;
671 while (delta != 0UL)
672 {
673 /* Set candidate trimming */
674 MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (trimmingvalue << (Channel & 0x10UL)));
675
676 /* Wait minimum time needed between two calibration steps (OTRIM) */
677 /* Wait loop initialization and execution */
678 /* Note: Variable divided by 2 to compensate partially CPU processing cycles, scaling in us split to not exceed */
679 /* 32 bits register capacity and handle low frequency. */
680 wait_loop_index = ((DAC_DELAY_TRIM_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL));
681 while (wait_loop_index != 0UL)
682 {
683 wait_loop_index--;
684 }
685
686 if ((hdac->Instance->SR & (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL))) == (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL)))
687 {
688 /* DAC_SR_CAL_FLAGx is HIGH try higher trimming */
689 trimmingvalue -= delta;
690 }
691 else
692 {
693 /* DAC_SR_CAL_FLAGx is LOW try lower trimming */
694 trimmingvalue += delta;
695 }
696 delta >>= 1UL;
697 }
698
699 /* Still need to check if right calibration is current value or one step below */
700 /* Indeed the first value that causes the DAC_SR_CAL_FLAGx bit to change from 0 to 1 */
701 /* Set candidate trimming */
702 MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (trimmingvalue << (Channel & 0x10UL)));
703
704 /* Wait minimum time needed between two calibration steps (OTRIM) */
705 /* Wait loop initialization and execution */
706 /* Note: Variable divided by 2 to compensate partially CPU processing cycles, scaling in us split to not exceed */
707 /* 32 bits register capacity and handle low frequency. */
708 wait_loop_index = ((DAC_DELAY_TRIM_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL));
709 while (wait_loop_index != 0UL)
710 {
711 wait_loop_index--;
712 }
713
714 if ((hdac->Instance->SR & (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL))) == 0UL)
715 {
716 /* Check trimming value below maximum */
717 if (trimmingvalue < 0x1FU)
718 {
719 /* Trimming is actually one value more */
720 trimmingvalue++;
721 }
722 /* Set right trimming */
723 MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (trimmingvalue << (Channel & 0x10UL)));
724 }
725
726 /* Disable the selected DAC channel calibration */
727 /* i.e. clear DAC_CR_CENx bit */
728 CLEAR_BIT((hdac->Instance->CR), (DAC_CR_CEN1 << (Channel & 0x10UL)));
729
730 sConfig->DAC_TrimmingValue = trimmingvalue;
731 sConfig->DAC_UserTrimming = DAC_TRIMMING_USER;
732
733 /* Restore configuration */
734 MODIFY_REG(hdac->Instance->MCR, (DAC_MCR_MODE1 << (Channel & 0x10UL)), oldmodeconfiguration);
735
736 /* Process unlocked */
737 __HAL_UNLOCK(hdac);
738 }
739
740 return status;
741 }
742
743 /**
744 * @brief Set the trimming mode and trimming value (user trimming mode applied).
745 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
746 * the configuration information for the specified DAC.
747 * @param sConfig DAC configuration structure updated with new DAC trimming value.
748 * @param Channel The selected DAC channel.
749 * This parameter can be one of the following values:
750 * @arg DAC_CHANNEL_1: DAC Channel1 selected
751 * @arg DAC_CHANNEL_2: DAC Channel2 selected
752 * @param NewTrimmingValue DAC new trimming value
753 * @retval HAL status
754 */
HAL_DACEx_SetUserTrimming(DAC_HandleTypeDef * hdac,DAC_ChannelConfTypeDef * sConfig,uint32_t Channel,uint32_t NewTrimmingValue)755 HAL_StatusTypeDef HAL_DACEx_SetUserTrimming(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel,
756 uint32_t NewTrimmingValue)
757 {
758 HAL_StatusTypeDef status = HAL_OK;
759
760 /* Check the parameters */
761 assert_param(IS_DAC_CHANNEL(Channel));
762 assert_param(IS_DAC_NEWTRIMMINGVALUE(NewTrimmingValue));
763
764 /* Check the DAC handle and channel configuration struct allocation */
765 if ((hdac == NULL) || (sConfig == NULL))
766 {
767 status = HAL_ERROR;
768 }
769 else
770 {
771 /* Process locked */
772 __HAL_LOCK(hdac);
773
774 /* Set new trimming */
775 MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (NewTrimmingValue << (Channel & 0x10UL)));
776
777 /* Update trimming mode */
778 sConfig->DAC_UserTrimming = DAC_TRIMMING_USER;
779 sConfig->DAC_TrimmingValue = NewTrimmingValue;
780
781 /* Process unlocked */
782 __HAL_UNLOCK(hdac);
783 }
784 return status;
785 }
786
787 /**
788 * @brief Return the DAC trimming value.
789 * @param hdac DAC handle
790 * @param Channel The selected DAC channel.
791 * This parameter can be one of the following values:
792 * @arg DAC_CHANNEL_1: DAC Channel1 selected
793 * @arg DAC_CHANNEL_2: DAC Channel2 selected
794 * @retval TrimmingValue Value between Min_Data=0x00 and Max_Data=0x1F
795 */
HAL_DACEx_GetTrimOffset(const DAC_HandleTypeDef * hdac,uint32_t Channel)796 uint32_t HAL_DACEx_GetTrimOffset(const DAC_HandleTypeDef *hdac, uint32_t Channel)
797 {
798 /* Check the parameter */
799 assert_param(IS_DAC_CHANNEL(Channel));
800
801 /* Retrieve trimming */
802 return ((hdac->Instance->CCR & (DAC_CCR_OTRIM1 << (Channel & 0x10UL))) >> (Channel & 0x10UL));
803 }
804
805 /**
806 * @}
807 */
808
809 /** @defgroup DACEx_Exported_Functions_Group3 Peripheral Control functions
810 * @brief Extended Peripheral Control functions
811 *
812 @verbatim
813 ==============================================================================
814 ##### Peripheral Control functions #####
815 ==============================================================================
816 [..] This section provides functions allowing to:
817 (+) Set the specified data holding register value for DAC channel.
818
819 @endverbatim
820 * @{
821 */
822
823
824 /**
825 * @brief Return the last data output value of the selected DAC channel.
826 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
827 * the configuration information for the specified DAC.
828 * @retval The selected DAC channel data output value.
829 */
HAL_DACEx_DualGetValue(const DAC_HandleTypeDef * hdac)830 uint32_t HAL_DACEx_DualGetValue(const DAC_HandleTypeDef *hdac)
831 {
832 uint32_t tmp = 0UL;
833
834 tmp |= hdac->Instance->DOR1;
835
836 tmp |= hdac->Instance->DOR2 << 16UL;
837
838 /* Returns the DAC channel data output register value */
839 return tmp;
840 }
841
842
843 /**
844 * @}
845 */
846 /**
847 * @}
848 */
849
850 /* Private functions ---------------------------------------------------------*/
851 /** @defgroup DACEx_Private_Functions DACEx private functions
852 * @brief Extended private functions
853 * @{
854 */
855
856
857 /**
858 * @brief DMA conversion complete callback.
859 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
860 * the configuration information for the specified DMA module.
861 * @retval None
862 */
DAC_DMAConvCpltCh2(DMA_HandleTypeDef * hdma)863 void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
864 {
865 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
866
867 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
868 hdac->ConvCpltCallbackCh2(hdac);
869 #else
870 HAL_DACEx_ConvCpltCallbackCh2(hdac);
871 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
872
873 hdac->State = HAL_DAC_STATE_READY;
874 }
875
876 /**
877 * @brief DMA half transfer complete callback.
878 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
879 * the configuration information for the specified DMA module.
880 * @retval None
881 */
DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef * hdma)882 void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
883 {
884 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
885 /* Conversion complete callback */
886 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
887 hdac->ConvHalfCpltCallbackCh2(hdac);
888 #else
889 HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
890 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
891 }
892
893 /**
894 * @brief DMA error callback.
895 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
896 * the configuration information for the specified DMA module.
897 * @retval None
898 */
DAC_DMAErrorCh2(DMA_HandleTypeDef * hdma)899 void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
900 {
901 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
902
903 /* Set DAC error code to DMA error */
904 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
905
906 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
907 hdac->ErrorCallbackCh2(hdac);
908 #else
909 HAL_DACEx_ErrorCallbackCh2(hdac);
910 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
911
912 hdac->State = HAL_DAC_STATE_READY;
913 }
914
915
916 /**
917 * @}
918 */
919
920 /**
921 * @}
922 */
923
924 #endif /* DAC1 || DAC2 */
925
926 #endif /* HAL_DAC_MODULE_ENABLED */
927
928 /**
929 * @}
930 */
931
