1 /**
2   ******************************************************************************
3   * @file    stm32h7rsxx_hal_pwr_ex.c
4   * @author  MCD Application Team
5   * @brief   Extended PWR HAL module driver.
6   *          This file provides firmware functions to manage the following
7   *          functionalities of PWR extension peripheral:
8   *           + Peripheral Extended features functions
9   *
10   ******************************************************************************
11   * @attention
12   *
13   * Copyright (c) 2022 STMicroelectronics.
14   * All rights reserved.
15   *
16   * This software is licensed under terms that can be found in the LICENSE file
17   * in the root directory of this software component.
18   * If no LICENSE file comes with this software, it is provided AS-IS.
19   *
20   ******************************************************************************
21   @verbatim
22   ==============================================================================
23                         ##### How to use this driver #####
24   ==============================================================================
25   [..]
26    (#) Call HAL_PWREx_ConfigSupply() function to configure the regulator supply
27        with the following different setups according to hardware (support SMPS):
28        (+) PWR_DIRECT_SMPS_SUPPLY
29        (+) PWR_SMPS_1V8_SUPPLIES_LDO
30        (+) PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO
31        (+) PWR_SMPS_1V8_SUPPLIES_EXT
32        (+) PWR_LDO_SUPPLY
33        (+) PWR_EXTERNAL_SOURCE_SUPPLY
34 
35    (#) Call HAL_PWREx_GetSupplyConfig() function to get the current supply setup.
36 
37    (#) Call HAL_PWREx_ControlVoltageScaling() function to configure the main
38        internal regulator output voltage. The voltage scaling could be one of
39        the following scales :
40        (+) PWR_REGULATOR_VOLTAGE_SCALE0
41        (+) PWR_REGULATOR_VOLTAGE_SCALE1
42 
43    (#) Call HAL_PWREx_GetVoltageRange() function to get the current output
44        voltage applied to the main regulator.
45 
46    (#) Call HAL_PWREx_ControlStopModeVoltageScaling() function to configure the main
47        internal regulator output voltage in STOP mode. The voltage scaling could be one of
48        the following scales :
49        (+) PWR_REGULATOR_STOP_VOLTAGE_SCALE3
50        (+) PWR_REGULATOR_STOP_VOLTAGE_SCALE5
51 
52    (#) Call HAL_PWREx_GetStopModeVoltageRange() function to get the current output
53        voltage applied to the main regulator in STOP mode.
54 
55    (#) Call HAL_PWREx_EnableFlashPowerDown() and
56        HAL_PWREx_DisableFlashPowerDown() functions to enable and disable the
57        Flash Power Down in STOP mode.
58 
59    (#) Call HAL_PWREx_EnableWakeUpPin() and HAL_PWREx_DisableWakeUpPin()
60        functions to enable and disable the Wake-up pin functionality for
61        the selected pin.
62 
63    (#) Call HAL_PWREx_GetWakeupFlag() and HAL_PWREx_ClearWakeupFlag()
64        functions to manage wake-up flag for the selected pin.
65 
66    (#) Call HAL_PWREx_WAKEUP_PIN_IRQHandler() function to handle all wake-up
67        pins interrupts.
68 
69    (#) Call HAL_PWREx_EnableBkUpReg() and HAL_PWREx_DisableBkUpReg() functions
70        to enable and disable the backup domain regulator.
71 
72    (#) Call HAL_PWREx_EnableUSBReg(), HAL_PWREx_DisableUSBReg(),
73        HAL_PWREx_EnableUSBVoltageDetector() and
74        HAL_PWREx_DisableUSBVoltageDetector() functions to manage USB power
75        regulation functionalities.
76 
77    (#) Call HAL_PWREx_EnableUCPDStandbyMode() and HAL_PWREx_DisableUCPDStandbyMode() functions
78        to enable and disable UCPD Standby mode.
79 
80    (#) Call HAL_PWREx_EnableUCPDDeadBattery() and HAL_PWREx_DisableUCPDDeadBattery() functions
81        to enable and disable UCPD dead battery.
82 
83    (#) Call HAL_PWREx_EnableBatteryCharging() and
84        HAL_PWREx_DisableBatteryCharging() functions to enable and disable the
85        battery charging feature with the selected resistor.
86 
87    (#) Call HAL_PWREx_EnableAnalogBooster() and HAL_PWREx_DisableAnalogBooster() functions
88        to enable and disable the AVD boost feature when the VDD supply voltage is below 2V7.
89 
90    (#) Call HAL_PWREx_EnableXSPIM1() and HAL_PWREx_DisableXSPIM1() functions
91        to enable and disable the XSPIM1.
92 
93    (#) Call HAL_PWREx_EnableXSPIM2() and HAL_PWREx_DisableXSPIM2() functions
94        to enable and disable the XSPIM2.
95 
96    (#) Call HAL_PWREx_ConfigXSPIPortCap() functions to configure the XSPI capacitor port 1 and 2.
97       The capacitor setting could be one of the following values :
98        (+) PWR_CAPACITOR_OFF
99        (+) PWR_CAPACITOR_ONE_THIRD_CAPACITANCE
100        (+) PWR_CAPACITOR_TWO_THIRD_CAPACITANCE
101        (+) PWR_CAPACITOR_FULL_CAPACITANCE
102 
103    (#) Call HAL_PWREx_GetConfigXSPIPortCap() function to get the current
104        capacitor port setting.
105 
106    (#) Call HAL_PWREx_EnableMonitoring() and HAL_PWREx_DisableMonitoring()
107        functions to enable and disable the VBAT and Temperature monitoring.
108        When VBAT and Temperature monitoring feature is enables, use
109        HAL_PWREx_GetTemperatureLevel() and HAL_PWREx_GetVBATLevel() to get
110        respectively the Temperature level and VBAT level.
111 
112    (#) Call HAL_PWREx_ConfigAVD() after setting parameter to be configured
113        (event mode and voltage threshold) in order to set up the Analog Voltage
114        Detector then use HAL_PWREx_EnableAVD() and  HAL_PWREx_DisableAVD()
115        functions to start and stop the AVD detection.
116        (+) AVD level could be one of the following values :
117              (++) 1V7
118              (++) 2V1
119              (++) 2V5
120              (++) 2V8
121 
122    (#) Call HAL_PWREx_PVD_AVD_IRQHandler() function to handle the PWR PVD and
123        AVD interrupt request.
124 
125    (#) Call HAL_PWREx_EnablePullUpPullDownConfig() and
126        HAL_PWREx_DisablePullUpPullDownConfig() to I/O enable / disable pull-up
127        and pull-down configuration.
128 
129    (#) Call HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() to
130        apply respectively pull-up and pull-down to selected I/O.
131        Call HAL_PWREx_DisableGPIOPullUp() and HAL_PWREx_DisableGPIOPullDown() to
132        disable applied respectively pull-up and pull-down to selected I/O.
133 
134   @endverbatim
135   */
136 
137 /* Includes ------------------------------------------------------------------*/
138 #include "stm32h7rsxx_hal.h"
139 
140 /** @addtogroup STM32H7RSxx_HAL_Driver
141   * @{
142   */
143 
144 /** @defgroup PWREx PWREx
145   * @brief PWR Extended HAL module driver
146   * @{
147   */
148 
149 #ifdef HAL_PWR_MODULE_ENABLED
150 
151 /* Private typedef -----------------------------------------------------------*/
152 /* Private define ------------------------------------------------------------*/
153 
154 /** @addtogroup PWREx_Private_Constants
155   * @{
156   */
157 
158 /** @defgroup PWREx_AVD_Mode_Mask PWR Extended AVD Mode Mask
159   * @{
160   */
161 #define AVD_MODE_IT                    (0x00010000U)
162 #define AVD_MODE_EVT                   (0x00020000U)
163 #define AVD_RISING_EDGE                (0x00000001U)
164 #define AVD_FALLING_EDGE               (0x00000002U)
165 #define AVD_RISING_FALLING_EDGE        (0x00000003U)
166 /**
167   * @}
168   */
169 
170 /** @defgroup PWREx_REG_SET_TIMEOUT PWR Extended Flag Setting Time Out Value
171   * @{
172   */
173 #define PWR_FLAG_SETTING_DELAY         (1000U)
174 /**
175   * @}
176   */
177 
178 /** @defgroup PWREx_WakeUp_Pins_Offsets PWREx Wake-Up Pins masks and offsets
179   * @{
180   */
181 /* Wake-Up Pins EXTI register mask */
182 #define PWR_EXTI_WAKEUP_PINS_MASK  (EXTI_IMR2_IM55 | EXTI_IMR2_IM56 |\
183                                     EXTI_IMR2_IM57 | EXTI_IMR2_IM58 )
184 
185 /* Wake-Up Pins PWR Pin Pull shift offsets */
186 #define PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET (2U)
187 /**
188   * @}
189   */
190 
191 /**
192   * @}
193   */
194 
195 /* Private macro -------------------------------------------------------------*/
196 /* Private variables ---------------------------------------------------------*/
197 /* Private function prototypes -----------------------------------------------*/
198 /* Private functions ---------------------------------------------------------*/
199 /* Exported types ------------------------------------------------------------*/
200 /* Exported functions --------------------------------------------------------*/
201 
202 /** @defgroup PWREx_Exported_Functions PWREx Exported Functions
203   * @{
204   */
205 
206 /** @defgroup PWREx_Exported_Functions_Group1 Power Supply Control Functions
207   * @brief    Power supply control functions
208   *
209 @verbatim
210  ===============================================================================
211                   ##### Power supply control functions #####
212  ===============================================================================
213     [..]
214    (#) When the system is powered on, the POR monitors VDD supply. Once VDD is
215        above the POR threshold level, the SMPS step-down converter and voltage
216       regulator are enabled in the default supply configuration:
217 
218       (+) The SMPS step-down converter output level is set at 1.35 V.
219           The voltage regulator LDO output level is set at 1.11 V.
220           Depending on the package and configuration the SMPS provides the
221           voltage to internal power domain and/or LDO or external supply.
222 
223       (+) The system is kept in reset mode as long as VCORE is not stable.
224 
225       (+) Once VCORE is stable, the system is taken out of reset and the HSI
226           oscillator is enabled.
227 
228       (+) Once the oscillator is stable, the system is initialized: Flash memory
229           is ready, option bytes are loaded and the CPU starts in limited run mode.
230 
231       (+) The software must then initialize the system including supply
232           configuration programming in PWR control register 2 (PWR_CSR2).
233           Once the supply configuration has been configured, the ACTVOSRDY bit in
234           the PWR control status register 1 (PWR_SR1) must be checked to guarantee
235           valid voltage levels:
236           a) As long as ACTVOSRDY indicates that voltage levels are invalid, the
237              system is in Run mode, write accesses to the RAMs are not permitted and
238              VOS must not be changed.
239           b) Once ACTVOSRDY indicates that voltage levels are valid, the system is
240              in normal Run mode, write accesses to RAMs are allowed and VOS can be
241              changed.
242 
243 @endverbatim
244   * @{
245   */
246 
247 /**
248   * @brief Configure the system Power Supply.
249   * @param  SupplySource : Specifies the Power Supply source to set after a
250   *                        system startup.
251   *         This parameter can be one of the following values :
252   *            @arg PWR_DIRECT_SMPS_SUPPLY : The SMPS supplies the Vcore Power
253   *                                          Domains. The LDO is Bypassed.
254   *            @arg PWR_SMPS_1V8_SUPPLIES_LDO : The SMPS 1.8V output supplies
255   *                                             the LDO. The Vcore Power Domains
256   *                                             are supplied from the LDO.
257   *            @arg PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO : The SMPS 1.8V output
258   *                                                     supplies external
259   *                                                     circuits and the LDO.
260   *                                                     The Vcore Power Domains
261   *                                                     are supplied from the
262   *                                                     LDO.
263   *            @arg PWR_SMPS_1V8_SUPPLIES_EXT : The SMPS 1.8V output supplies
264   *                                             external circuits. The LDO is
265   *                                             Bypassed. The Vcore Power
266   *                                             Domains are supplied from
267   *                                             external source.
268   *            @arg PWR_LDO_SUPPLY : The LDO regulator supplies the Vcore Power
269   *                                  Domains. The SMPS regulator is Bypassed.
270   *            @arg PWR_EXTERNAL_SOURCE_SUPPLY : The SMPS is disabled and the LDO are
271   *                                              Bypassed. The Vcore Power
272   *                                              Domains are supplied from
273   *                                              external source.
274   * @note The SMPS step-down converter is not available on all packages,
275   *       and the Bypass mode is available only when the SMPS is available.
276   * @note  The PWR_DIRECT_SMPS_SUPPLY, PWR_SMPS_1V8_SUPPLIES_LDO,
277   *        PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO and PWR_SMPS_1V8_SUPPLIES_EXT are used
278   *        only for lines that supports SMPS regulator.
279   * @retval HAL status.
280   */
HAL_PWREx_ConfigSupply(uint32_t SupplySource)281 HAL_StatusTypeDef HAL_PWREx_ConfigSupply(uint32_t SupplySource)
282 {
283   uint32_t tickstart;
284 
285   /* Check the parameters */
286   assert_param(IS_PWR_SUPPLY(SupplySource));
287 
288   /* Check if supply source was configured */
289   if ((PWR->CSR2 & (PWR_CSR2_SDEN | PWR_CSR2_LDOEN | PWR_CSR2_BYPASS)) != (PWR_CSR2_SDEN | PWR_CSR2_LDOEN))
290   {
291     /* Check supply configuration */
292     if ((PWR->CSR2 & PWR_SUPPLY_CONFIG_MASK) != SupplySource)
293     {
294       /* Supply configuration update locked, can't apply a new supply config */
295       return HAL_ERROR;
296     }
297     else
298     {
299       /* Supply configuration update locked, but new supply configuration
300          matches with old supply configuration : nothing to do
301       */
302       return HAL_OK;
303     }
304   }
305 
306   /* Set the power supply configuration */
307   MODIFY_REG(PWR->CSR2, PWR_SUPPLY_CONFIG_MASK, SupplySource);
308 
309   /* Get tick */
310   tickstart = HAL_GetTick();
311 
312   /* Wait till voltage level flag is set */
313   while ((PWR->SR1 & PWR_SR1_ACTVOSRDY) == 0U)
314   {
315     if ((HAL_GetTick() - tickstart) > PWR_FLAG_SETTING_DELAY)
316     {
317       return HAL_ERROR;
318     }
319   }
320 
321   /* When the SMPS supplies external circuits verify that SDEXTRDY flag is set */
322   if ((SupplySource == PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO) ||
323       (SupplySource == PWR_SMPS_1V8_SUPPLIES_EXT))
324   {
325     /* Get the current tick number */
326     tickstart = HAL_GetTick();
327 
328     /* Wait till SMPS external supply ready flag is set */
329     while ((PWR->CSR2 & PWR_CSR2_SDEXTRDY) == 0U)
330     {
331       if ((HAL_GetTick() - tickstart) > PWR_FLAG_SETTING_DELAY)
332       {
333         return HAL_ERROR;
334       }
335     }
336   }
337   return HAL_OK;
338 }
339 
340 /**
341   * @brief Get the power supply configuration.
342   * @retval The supply configuration.
343   */
HAL_PWREx_GetSupplyConfig(void)344 uint32_t HAL_PWREx_GetSupplyConfig(void)
345 {
346   return (PWR->CSR2 & PWR_SUPPLY_CONFIG_MASK);
347 }
348 
349 /**
350   * @brief Configure the main internal regulator output voltage.
351   * @param  VoltageScaling : Specifies the regulator output voltage to achieve
352   *                          a tradeoff between performance and power
353   *                          consumption.
354   *          This parameter can be one of the following values :
355   *            @arg PWR_REGULATOR_VOLTAGE_SCALE0 : Regulator voltage scaling range 0 (highest frequency).
356   *            @arg PWR_REGULATOR_VOLTAGE_SCALE1 : Regulator voltage scaling range 1 (lowest power).
357   * @note When increasing the performance, the voltage scaling must be changed
358   *       before increasing the system frequency.
359   *       When decreasing performance, the system frequency must first be decreased
360   *       before changing the voltage scaling.
361   * @note When exiting from Stop mode or Standby mode, the Run mode voltage
362   *       scaling is reset to the default VOS low value.
363   * @retval HAL Status
364   */
HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)365 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
366 {
367   uint32_t tickstart;
368 
369   /* Check the parameters */
370   assert_param(IS_PWR_REGULATOR_VOLTAGE(VoltageScaling));
371 
372   /* Set the voltage range */
373   MODIFY_REG(PWR->CSR4, PWR_CSR4_VOS, VoltageScaling);
374 
375   /* Get tick */
376   tickstart = HAL_GetTick();
377 
378   /* Wait till voltage level flag is set */
379   while ((PWR->CSR4 & PWR_CSR4_VOSRDY) == 0U)
380   {
381     if ((HAL_GetTick() - tickstart) > PWR_FLAG_SETTING_DELAY)
382     {
383       return HAL_ERROR;
384     }
385   }
386 
387   return HAL_OK;
388 }
389 
390 /**
391   * @brief Get the main internal regulator output voltage. Reflecting the last
392   *        VOS value applied to the PMU.
393   * @retval The current applied VOS selection.
394   */
HAL_PWREx_GetVoltageRange(void)395 uint32_t HAL_PWREx_GetVoltageRange(void)
396 {
397   /* Get the active voltage scaling */
398   return (PWR->SR1 & PWR_SR1_ACTVOS);
399 }
400 
401 /**
402   * @brief Configure the main internal regulator output voltage in STOP mode.
403   * @param  VoltageScaling : Specifies the regulator output voltage when the
404   *         system enters Stop mode to achieve a tradeoff between performance
405   *         and power consumption.
406   *          This parameter can be one of the following values:
407   *            @arg PWR_REGULATOR_STOP_VOLTAGE_SCALE3 : System Stop mode voltage scaling range 3 (highest frequency).
408   *            @arg PWR_REGULATOR_STOP_VOLTAGE_SCALE5 : System Stop mode voltage scaling range 5 (lowest power).
409   * @retval HAL Status.
410   */
HAL_PWREx_ControlStopModeVoltageScaling(uint32_t VoltageScaling)411 HAL_StatusTypeDef HAL_PWREx_ControlStopModeVoltageScaling(uint32_t VoltageScaling)
412 {
413   /* Check the parameters */
414   assert_param(IS_PWR_STOP_MODE_REGULATOR_VOLTAGE(VoltageScaling));
415 
416   /* Return the stop mode voltage range */
417   MODIFY_REG(PWR->CR1, PWR_CR1_SVOS, VoltageScaling);
418 
419   return HAL_OK;
420 }
421 
422 /**
423   * @brief Get the main internal regulator output voltage in STOP mode.
424   * @retval The actual applied SVOS selection.
425   */
HAL_PWREx_GetStopModeVoltageRange(void)426 uint32_t HAL_PWREx_GetStopModeVoltageRange(void)
427 {
428   /* Return the stop voltage scaling */
429   return (PWR->CR1 & PWR_CR1_SVOS);
430 }
431 /**
432   * @}
433   */
434 
435 /** @defgroup PWREx_Exported_Functions_Group2 Low Power Control Functions
436   * @brief    Low Power Control Functions
437   *
438 @verbatim
439  ===============================================================================
440                      ##### Low Power Control Functions #####
441  ===============================================================================
442 
443     *** FLASH Power Down configuration ****
444     =======================================
445     [..]
446       By setting the FLPS bit in the PWR_CR1 register using the
447       HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters
448       power down mode when the device enters STOP mode. When the Flash memory is
449       in power down mode, an additional startup delay is incurred when waking up
450       from STOP mode.
451 
452     *** Wakeup Pins configuration ****
453     ===================================
454     [..]
455       Wakeup pins allow the system to exit from Standby mode. The configuration
456       of wakeup pins is done with the HAL_PWREx_EnableWakeUpPin(sPinParams)
457       function with:
458        (+) sPinParams: structure to enable and configure a wakeup pin:
459         (++) WakeUpPin: Wakeup pin to be enabled.
460         (++) PinPolarity: Wakeup pin polarity (rising or falling edge).
461         (++) PinPull: Wakeup pin pull (no pull, pull-up or pull-down).
462     [..]
463       The wakeup pins are internally connected to the EXTI lines [55-58] to
464       generate an interrupt if enabled. The EXTI lines configuration is done by
465       the HAL_EXTI_Dx_EventInputConfig() functions defined in the stm32h7rsxxhal.c
466       file.
467     [..]
468       When a wakeup pin event is received the HAL_PWREx_WAKEUP_PIN_IRQHandler is
469       called and the appropriate flag is set in the PWR_WKUPFR register. Then in
470       the HAL_PWREx_WAKEUP_PIN_IRQHandler function the wakeup pin flag will be
471       cleared and the appropriate user callback will be called. The user can add
472       his own code by customization of function pointer HAL_PWREx_WKUPx_Callback.
473 
474 @endverbatim
475   * @{
476   */
477 
478 /**
479   * @brief Enable the Flash Power Down in Stop mode.
480   * @note   When Flash Power Down is enabled the Flash memory enters low-power
481   *         mode when device is in Stop mode. This feature allows to
482   *         obtain the best trade-off between low-power consumption and restart
483   *         time when exiting from Stop mode.
484   * @retval None.
485   */
HAL_PWREx_EnableFlashPowerDown(void)486 void HAL_PWREx_EnableFlashPowerDown(void)
487 {
488   /* Enable the Flash Power Down */
489   SET_BIT(PWR->CR1, PWR_CR1_FLPS);
490 }
491 
492 /**
493   * @brief Disable the Flash Power Down in Stop mode.
494   * @note   When Flash Power Down is disabled  the Flash memory is kept on
495   *         normal mode when device is in Stop mode. This feature allows
496   *         to obtain the best trade-off between low-power consumption and
497   *         restart time when exiting from Stop mode.
498   * @retval None.
499   */
HAL_PWREx_DisableFlashPowerDown(void)500 void HAL_PWREx_DisableFlashPowerDown(void)
501 {
502   /* Disable the Flash Power Down */
503   CLEAR_BIT(PWR->CR1, PWR_CR1_FLPS);
504 }
505 
506 /**
507   * @brief Enable the Wake-up PINx functionality.
508   * @param  sPinParams : Pointer to a PWREx_WakeupPinTypeDef structure that
509   *                      contains the configuration information for the wake-up
510   *                      Pin.
511   * @retval None.
512   */
HAL_PWREx_EnableWakeUpPin(const PWREx_WakeupPinTypeDef * sPinParams)513 void HAL_PWREx_EnableWakeUpPin(const PWREx_WakeupPinTypeDef *sPinParams)
514 {
515   uint32_t pinConfig;
516   uint32_t regMask;
517   const uint32_t pullMask = PWR_WKUPEPR_WKUPPUPD1;
518 
519   /* Check the parameters */
520   assert_param(IS_PWR_WAKEUP_PIN(sPinParams->WakeUpPin));
521   assert_param(IS_PWR_WAKEUP_PIN_POLARITY(sPinParams->PinPolarity));
522   assert_param(IS_PWR_WAKEUP_PIN_PULL(sPinParams->PinPull));
523 
524   pinConfig = sPinParams->WakeUpPin | \
525               (sPinParams->PinPolarity << ((POSITION_VAL(sPinParams->WakeUpPin) + PWR_WKUPEPR_WKUPP1_Pos) & 0x1FU)) | \
526               (sPinParams->PinPull << (((POSITION_VAL(sPinParams->WakeUpPin) * PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET) + PWR_WKUPEPR_WKUPPUPD1_Pos) & 0x1FU));
527 
528   regMask   = sPinParams->WakeUpPin | \
529               (PWR_WKUPEPR_WKUPP1 << (POSITION_VAL(sPinParams->WakeUpPin) & 0x1FU)) | \
530               (pullMask << ((POSITION_VAL(sPinParams->WakeUpPin) * PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET) & 0x1FU));
531 
532   /* Enable and Specify the Wake-Up pin polarity and the pull configuration
533      for the event detection (rising or falling edge) */
534   MODIFY_REG(PWR->WKUPEPR, regMask, pinConfig);
535 
536   /* Configure the Wakeup Pin EXTI Line */
537   MODIFY_REG(EXTI->IMR2, PWR_EXTI_WAKEUP_PINS_MASK, (sPinParams->WakeUpPin << EXTI_IMR2_IM55_Pos));
538 }
539 
540 /**
541   * @brief Disable the Wake-up PINx functionality.
542   * @param  WakeUpPin : Specifies the Wake-Up pin to be disabled.
543   *          This parameter can be one of the following values:
544   *           @arg PWR_WAKEUP_PIN1 : Disable PA0  wake-up PIN.
545   *           @arg PWR_WAKEUP_PIN2 : Disable PA2  wake-up PIN.
546   *           @arg PWR_WAKEUP_PIN3 : Disable PC13 wake-up PIN.
547   *           @arg PWR_WAKEUP_PIN4 : Disable PC1  wake-up PIN.
548   * @retval None
549   */
HAL_PWREx_DisableWakeUpPin(uint32_t WakeUpPin)550 void HAL_PWREx_DisableWakeUpPin(uint32_t WakeUpPin)
551 {
552   /* Check the parameter */
553   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPin));
554 
555   /* Disable the WakeUpPin */
556   CLEAR_BIT(PWR->WKUPEPR, WakeUpPin);
557 }
558 
559 /**
560   * @brief Get the Wake-Up Pin pending flags.
561   * @param  WakeUpFlag : Specifies the Wake-Up PIN flag to be checked.
562   *          This parameter can be one of the following values:
563   *            @arg PWR_WAKEUP_FLAG1    : Get wakeup event received from PA0.
564   *            @arg PWR_WAKEUP_FLAG2    : Get wakeup event received from PA2.
565   *            @arg PWR_WAKEUP_FLAG3    : Get wakeup event received from PC13.
566   *            @arg PWR_WAKEUP_FLAG4    : Get wakeup event received from PC1.
567   *            @arg PWR_WAKEUP_FLAG_ALL : Get Wakeup event received from all
568   *                                      wake up pins.
569   * @retval The Wake-Up pin flag.
570   */
HAL_PWREx_GetWakeupFlag(uint32_t WakeUpFlag)571 uint32_t HAL_PWREx_GetWakeupFlag(uint32_t WakeUpFlag)
572 {
573   /* Check the parameters */
574   assert_param(IS_PWR_WAKEUP_FLAG(WakeUpFlag));
575 
576   /* Return the wake up pin flag */
577   return (PWR->WKUPFR & WakeUpFlag);
578 }
579 
580 /**
581   * @brief Clear the Wake-Up pin pending flag.
582   * @param  WakeUpFlag: Specifies the Wake-Up PIN flag to clear.
583   *          This parameter can be one of the following values:
584   *            @arg PWR_WAKEUP_FLAG1    : Clear the wakeup event received from PA0.
585   *            @arg PWR_WAKEUP_FLAG2    : Clear the wakeup event received from PA2.
586   *            @arg PWR_WAKEUP_FLAG3    : Clear the wakeup event received from PC13.
587   *            @arg PWR_WAKEUP_FLAG4    : Clear the wakeup event received from PC1.
588   *            @arg PWR_WAKEUP_FLAG_ALL : Clear the wakeup events received from all
589   *                                       wake up pins.
590   * @retval HAL status.
591   */
HAL_PWREx_ClearWakeupFlag(uint32_t WakeUpFlag)592 HAL_StatusTypeDef HAL_PWREx_ClearWakeupFlag(uint32_t WakeUpFlag)
593 {
594   /* Check the parameter */
595   assert_param(IS_PWR_WAKEUP_FLAG(WakeUpFlag));
596 
597   /* Clear the wake up event received from wake up pin x */
598   WRITE_REG(PWR->WKUPCR, WakeUpFlag);
599 
600   /* Check if the wake up event is well cleared */
601   if ((PWR->WKUPFR & WakeUpFlag) != 0U)
602   {
603     return HAL_ERROR;
604   }
605 
606   return HAL_OK;
607 }
608 
609 /**
610   * @brief This function handles the PWR WAKEUP PIN interrupt request.
611   * @note   This API should be called under the WAKEUP_PIN_IRQHandler().
612   * @retval None.
613   */
HAL_PWREx_WAKEUP_PIN_IRQHandler(void)614 void HAL_PWREx_WAKEUP_PIN_IRQHandler(void)
615 {
616   /* Wakeup pin EXTI line interrupt detected */
617   if (READ_BIT(PWR->WKUPFR, PWR_WKUPFR_WKUPF1) != 0U)
618   {
619     /* Clear PWR WKUPF1 flag */
620     __HAL_PWR_CLEAR_WAKEUPFLAG(PWR_FLAG_WKUP1);
621 
622     /* PWR WKUP1 interrupt user callback */
623     HAL_PWREx_WKUP1_Callback();
624   }
625 
626   if (READ_BIT(PWR->WKUPFR, PWR_WKUPFR_WKUPF2) != 0U)
627   {
628     /* Clear PWR WKUPF2 flag */
629     __HAL_PWR_CLEAR_WAKEUPFLAG(PWR_FLAG_WKUP2);
630 
631     /* PWR WKUP2 interrupt user callback */
632     HAL_PWREx_WKUP2_Callback();
633   }
634 
635   if (READ_BIT(PWR->WKUPFR, PWR_WKUPFR_WKUPF3) != 0U)
636   {
637     /* Clear PWR WKUPF3 flag */
638     __HAL_PWR_CLEAR_WAKEUPFLAG(PWR_FLAG_WKUP3);
639 
640     /* PWR WKUP3 interrupt user callback */
641     HAL_PWREx_WKUP3_Callback();
642   }
643 
644   if (READ_BIT(PWR->WKUPFR, PWR_WKUPFR_WKUPF4) != 0U)
645   {
646     /* Clear PWR WKUPF4 flag */
647     __HAL_PWR_CLEAR_WAKEUPFLAG(PWR_FLAG_WKUP4);
648 
649     /* PWR WKUP4 interrupt user callback */
650     HAL_PWREx_WKUP4_Callback();
651   }
652 }
653 
654 /**
655   * @brief PWR WKUP1 interrupt callback.
656   * @retval None.
657   */
HAL_PWREx_WKUP1_Callback(void)658 __weak void HAL_PWREx_WKUP1_Callback(void)
659 {
660   /* NOTE : This function should not be modified, when the callback is needed,
661             the HAL_PWREx_WKUP1Callback can be implemented in the user file
662   */
663 }
664 
665 /**
666   * @brief PWR WKUP2 interrupt callback.
667   * @retval None.
668   */
HAL_PWREx_WKUP2_Callback(void)669 __weak void HAL_PWREx_WKUP2_Callback(void)
670 {
671   /* NOTE : This function should not be modified, when the callback is needed,
672             the HAL_PWREx_WKUP2Callback can be implemented in the user file
673   */
674 }
675 
676 /**
677   * @brief PWR WKUP3 interrupt callback.
678   * @retval None.
679   */
HAL_PWREx_WKUP3_Callback(void)680 __weak void HAL_PWREx_WKUP3_Callback(void)
681 {
682   /* NOTE : This function should not be modified, when the callback is needed,
683             the HAL_PWREx_WKUP3Callback can be implemented in the user file
684   */
685 }
686 
687 /**
688   * @brief PWR WKUP4 interrupt callback.
689   * @retval None.
690   */
HAL_PWREx_WKUP4_Callback(void)691 __weak void HAL_PWREx_WKUP4_Callback(void)
692 {
693   /* NOTE : This function should not be modified, when the callback is needed,
694             the HAL_PWREx_WKUP4Callback can be implemented in the user file
695   */
696 }
697 /**
698   * @}
699   */
700 
701 /** @defgroup PWREx_Exported_Functions_Group3 Peripherals Control Functions
702   * @brief    Peripherals Control Functions
703   *
704 @verbatim
705  ===============================================================================
706                  ##### Peripherals Control Functions #####
707  ===============================================================================
708 
709     *** Main and Backup Regulators configuration ***
710     ================================================
711     [..]
712       (+) The backup domain includes 4 Kbytes of backup SRAM accessible only
713           from the CPU, and addressed in 32-bit, 16-bit or 8-bit mode. Its
714           content is retained even in Standby or VBAT mode when the low power
715           backup regulator is enabled. It can be considered as an internal
716           EEPROM when VBAT is always present. You can use the
717           HAL_PWREx_EnableBkUpReg() function to enable the low power backup
718           regulator.
719       (+) When the backup domain is supplied by VDD (analog switch connected to
720           VDD) the backup SRAM is powered from VDD which replaces the VBAT power
721           supply to save battery life.
722       (+) The backup SRAM is not mass erased by a tamper event. It is read
723           protected to prevent confidential data, such as cryptographic private
724           key, from being accessed. The backup SRAM can be erased only through
725           the Flash interface when a protection level change from level 1 to
726           level 0 is requested.
727       -@- Refer to the description of Read protection (RDP) in the Flash
728           programming manual.
729       (+) The main internal regulator can be configured to have a tradeoff
730           between performance and power consumption when the device does not
731           operate at the maximum frequency. This is done through
732           HAL_PWREx_ControlVoltageScaling(VOS) function which configure the VOS
733           bit in PWR_CSR4 register.
734       (+) The main internal regulator can be configured to operate in Low Power
735           mode when the system enters STOP mode to further reduce power
736           consumption.
737           This is done through HAL_PWREx_ControlStopModeVoltageScaling(SVOS)
738           function which configure the SVOS bit in PWR_CR1 register.
739     -@- Refer to the product datasheets for more details.
740 
741     *** USB Regulator configuration ***
742     ===================================
743     [..]
744       (+) The USB transceivers are supplied from a dedicated VDD33USB supply
745           that can be provided either by the integrated USB regulator, or by an
746           external USB supply.
747       (+) The USB regulator is enabled by HAL_PWREx_EnableUSBReg() function, the
748           VDD33USB is then provided from the USB regulator.
749       (+) When the USB regulator is enabled, the VDD33USB supply level detector
750           shall be enabled through  HAL_PWREx_EnableUSBVoltageDetector()
751           function.
752       (+) The USB regulator is disabled through HAL_PWREx_DisableUSBReg()
753           function and VDD33USB can be provided from an external supply. In this
754           case VDD33USB and VDD50USB shall be connected together.
755 
756     *** VBAT battery charging ***
757     =============================
758     [..]
759       (+) When VDD is present, the external battery connected to VBAT can be
760           charged through an internal resistance. VBAT charging can be performed
761           either through a 5 KOhm resistor or through a 1.5 KOhm resistor.
762       (+) VBAT charging is enabled by HAL_PWREx_EnableBatteryCharging
763           (ResistorValue) function with:
764        (++) ResistorValue:
765         (+++) PWR_BATTERY_CHARGING_RESISTOR_5: 5 KOhm resistor.
766         (+++) PWR_BATTERY_CHARGING_RESISTOR_1_5: 1.5 KOhm resistor.
767       (+) VBAT charging is disabled by HAL_PWREx_DisableBatteryCharging()
768           function.
769 
770 @endverbatim
771   * @{
772   */
773 
774 /**
775   * @brief Enable the Backup Regulator.
776   * @retval HAL status.
777   */
HAL_PWREx_EnableBkUpReg(void)778 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
779 {
780   uint32_t tickstart;
781 
782   /* Enable the Backup regulator */
783   SET_BIT(PWR->CSR1, PWR_CSR1_BREN);
784 
785   /* Get tick */
786   tickstart = HAL_GetTick();
787 
788   /* Wait till Backup regulator ready flag is set */
789   while ((PWR->CSR1 & PWR_CSR1_BRRDY) == 0U)
790   {
791     if ((HAL_GetTick() - tickstart) > PWR_FLAG_SETTING_DELAY)
792     {
793       return HAL_ERROR;
794     }
795   }
796 
797   return HAL_OK;
798 }
799 
800 /**
801   * @brief Disable the Backup Regulator.
802   * @retval HAL status.
803   */
HAL_PWREx_DisableBkUpReg(void)804 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
805 {
806   uint32_t tickstart;
807 
808   /* Disable the Backup regulator */
809   CLEAR_BIT(PWR->CSR1, PWR_CSR1_BREN);
810 
811   /* Get tick */
812   tickstart = HAL_GetTick();
813 
814   /* Wait till Backup regulator ready flag is reset */
815   while ((PWR->CSR1 & PWR_CSR1_BRRDY)  != 0U)
816   {
817     if ((HAL_GetTick() - tickstart) > PWR_FLAG_SETTING_DELAY)
818     {
819       return HAL_ERROR;
820     }
821   }
822 
823   return HAL_OK;
824 }
825 
826 /**
827   * @brief Enable the USB Regulator.
828   * @retval None.
829   */
HAL_PWREx_EnableUSBReg(void)830 void HAL_PWREx_EnableUSBReg(void)
831 {
832   /* Enable the USB regulator */
833   SET_BIT(PWR->CSR2, PWR_CSR2_USBREGEN);
834 }
835 
836 /**
837   * @brief Disable the USB Regulator.
838   * @retval None.
839   */
HAL_PWREx_DisableUSBReg(void)840 void HAL_PWREx_DisableUSBReg(void)
841 {
842   /* Disable the USB regulator */
843   CLEAR_BIT(PWR->CSR2, PWR_CSR2_USBREGEN);
844 }
845 
846 /**
847   * @brief Enable the USB voltage level detector.
848   * @retval HAL status.
849   */
HAL_PWREx_EnableUSBVoltageDetector(void)850 HAL_StatusTypeDef HAL_PWREx_EnableUSBVoltageDetector(void)
851 {
852   uint32_t tickstart;
853 
854   /* Enable the USB voltage detector */
855   SET_BIT(PWR->CSR2, PWR_CSR2_USB33DEN);
856 
857   /* Get tick */
858   tickstart = HAL_GetTick();
859 
860   /* Wait till the USB regulator ready flag is set */
861   while ((PWR->CSR2 & PWR_CSR2_USB33RDY) == 0U)
862   {
863     if ((HAL_GetTick() - tickstart) > PWR_FLAG_SETTING_DELAY)
864     {
865       return HAL_ERROR;
866     }
867   }
868   return HAL_OK;
869 }
870 
871 /**
872   * @brief Disable the USB voltage level detector.
873   * @retval HAL status.
874   */
HAL_PWREx_DisableUSBVoltageDetector(void)875 HAL_StatusTypeDef HAL_PWREx_DisableUSBVoltageDetector(void)
876 {
877   uint32_t tickstart;
878 
879   /* Disable the USB voltage detector */
880   CLEAR_BIT(PWR->CSR2, PWR_CSR2_USB33DEN);
881 
882   /* Get tick */
883   tickstart = HAL_GetTick();
884 
885   /* Wait till the USB regulator ready flag is reset */
886   while ((PWR->CSR2 & PWR_CSR2_USB33RDY) != 0U)
887   {
888     if ((HAL_GetTick() - tickstart) > PWR_FLAG_SETTING_DELAY)
889     {
890       return HAL_ERROR;
891     }
892   }
893 
894   return HAL_OK;
895 }
896 
897 /**
898   * @brief Enable the USB HS regulator.
899   * @retval None.
900   */
HAL_PWREx_EnableUSBHSregulator(void)901 void HAL_PWREx_EnableUSBHSregulator(void)
902 {
903   /* Enable the USB HS regulator */
904   SET_BIT(PWR->CSR2, PWR_CSR2_USBHSREGEN);
905 }
906 
907 /**
908   * @brief Disable the USB HS regulator.
909   * @retval None.
910   */
HAL_PWREx_DisableUSBHSregulator(void)911 void HAL_PWREx_DisableUSBHSregulator(void)
912 {
913   /* Disable the USB HS regulator */
914   CLEAR_BIT(PWR->CSR2, PWR_CSR2_USBHSREGEN);
915 }
916 
917 /**
918   * @brief Enable UCPD configuration memorization in Standby.
919   * @retval None
920   * @note  This function must be called just before entering Standby mode when using UCPD.
921   */
HAL_PWREx_EnableUCPDStandbyMode(void)922 void HAL_PWREx_EnableUCPDStandbyMode(void)
923 {
924   /* Memorize UCPD configuration when entering standby mode */
925   SET_BIT(PWR->UCPDR, PWR_UCPDR_UCPD_STBY);
926 }
927 
928 /**
929   * @brief Disable UCPD configuration memorization in Standby.
930   * @note  This function must be called on exiting the Standby mode and before any UCPD
931   *        configuration update.
932   * @retval None
933   */
HAL_PWREx_DisableUCPDStandbyMode(void)934 void HAL_PWREx_DisableUCPDStandbyMode(void)
935 {
936   CLEAR_BIT(PWR->UCPDR, PWR_UCPDR_UCPD_STBY);
937 }
938 
939 /**
940   * @brief Enable dead battery behavior.
941   * @retval None
942   */
HAL_PWREx_EnableUCPDDeadBattery(void)943 void HAL_PWREx_EnableUCPDDeadBattery(void)
944 {
945   /* Enable dead battery behavior */
946   CLEAR_BIT(PWR->UCPDR, PWR_UCPDR_UCPD_DBDIS);
947 }
948 
949 /**
950   * @brief Disable dead battery behavior.
951   * @retval None
952   */
HAL_PWREx_DisableUCPDDeadBattery(void)953 void HAL_PWREx_DisableUCPDDeadBattery(void)
954 {
955   /* Disable dead battery behavior */
956   SET_BIT(PWR->UCPDR, PWR_UCPDR_UCPD_DBDIS);
957 }
958 
959 /**
960   * @brief Enable the Battery charging.
961   * @note   When VDD is present, charge the external battery through an internal
962   *         resistor.
963   *         It is automatically disabled in VBAT mode.
964   * @param  ResistorValue : Specifies the charging resistor.
965   *          This parameter can be one of the following values :
966   *            @arg PWR_BATTERY_CHARGING_RESISTOR_5   : 5 KOhm resistor.
967   *            @arg PWR_BATTERY_CHARGING_RESISTOR_1_5 : 1.5 KOhm resistor.
968   * @retval None.
969   */
HAL_PWREx_EnableBatteryCharging(uint32_t ResistorValue)970 void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorValue)
971 {
972   /* Check the parameter */
973   assert_param(IS_PWR_BATTERY_RESISTOR_SELECT(ResistorValue));
974 
975   /* Specify the charging resistor and enable the Battery charging */
976   MODIFY_REG(PWR->CSR2, (PWR_CSR2_VBRS | PWR_CSR2_VBE), (ResistorValue | PWR_CSR2_VBE));
977 
978 }
979 
980 /**
981   * @brief Disable the Battery charging.
982   * @retval None.
983   */
HAL_PWREx_DisableBatteryCharging(void)984 void HAL_PWREx_DisableBatteryCharging(void)
985 {
986   /* Disable the Battery charging and restore default charging resistor value */
987   CLEAR_BIT(PWR->CSR2, (PWR_CSR2_VBE | PWR_CSR2_VBRS));
988 }
989 
990 /**
991   * @brief Enable the booster to guarantee the analog switch AC performance when
992   *        the VDD supply voltage is below 2V7.
993   * @note   The VDD supply voltage can be monitored through the PVD and the PLS
994   *         field bits.
995   * @retval None.
996   */
HAL_PWREx_EnableAnalogBooster(void)997 void HAL_PWREx_EnableAnalogBooster(void)
998 {
999   /* Enable the Analog voltage */
1000   SET_BIT(PWR->CR1, PWR_CR1_AVDREADY);
1001 
1002   /* Enable VDDA booster */
1003   SET_BIT(PWR->CR1, PWR_CR1_BOOSTE);
1004 }
1005 
1006 /**
1007   * @brief Disable the analog booster.
1008   * @retval None.
1009   */
HAL_PWREx_DisableAnalogBooster(void)1010 void HAL_PWREx_DisableAnalogBooster(void)
1011 {
1012   /* Disable VDDA booster */
1013   CLEAR_BIT(PWR->CR1, PWR_CR1_BOOSTE);
1014 
1015   /* Disable the Analog voltage */
1016   CLEAR_BIT(PWR->CR1, PWR_CR1_AVDREADY);
1017 }
1018 
1019 /**
1020   * @brief  Enable the XSPIM_P1 interface.
1021   * @note   The XSPIM_P1 supply must be stable prior to setting
1022             this bit.
1023   * @retval None.
1024   */
HAL_PWREx_EnableXSPIM1(void)1025 void HAL_PWREx_EnableXSPIM1(void)
1026 {
1027   SET_BIT(PWR->CSR2, PWR_CSR2_EN_XSPIM1);
1028 }
1029 
1030 /**
1031   * @brief Disable the XSPIM_P1 interface.
1032   * @retval None.
1033   */
HAL_PWREx_DisableXSPIM1(void)1034 void HAL_PWREx_DisableXSPIM1(void)
1035 {
1036   CLEAR_BIT(PWR->CSR2, PWR_CSR2_EN_XSPIM1);
1037 }
1038 
1039 /**
1040   * @brief  Enable the XSPIM_P2 interface.
1041   * @note   The XSPIM_P2 supply must be stable prior to setting
1042             this bit.
1043   * @retval None.
1044   */
HAL_PWREx_EnableXSPIM2(void)1045 void HAL_PWREx_EnableXSPIM2(void)
1046 {
1047   SET_BIT(PWR->CSR2, PWR_CSR2_EN_XSPIM2);
1048 }
1049 
1050 /**
1051   * @brief Disable the XSPIM_P2 interface.
1052   * @retval None.
1053   */
HAL_PWREx_DisableXSPIM2(void)1054 void HAL_PWREx_DisableXSPIM2(void)
1055 {
1056   CLEAR_BIT(PWR->CSR2, PWR_CSR2_EN_XSPIM2);
1057 }
1058 
1059 /**
1060   * @brief  Configure the capacitor port
1061   * @param  PortCapacitor Select the Port
1062   *         This parameter can be one of the following values:
1063   *           @arg @ref PWR_CAPACITOR_PORT1    XSPI port 1 capacitor
1064   *           @arg @ref PWR_CAPACITOR_PORT2    XSPI port 2 capacitor
1065   * @param  PortCapacitorSetting Select the capacitor setting
1066   *         This parameter can be one of the following values:
1067   *           @arg @ref PWR_CAPACITOR_OFF                     XSPI Capacitor OFF
1068   *           @arg @ref PWR_CAPACITOR_ONE_THIRD_CAPACITANCE   XSPI Capacitor set to 1/3
1069   *           @arg @ref PWR_CAPACITOR_TWO_THIRD_CAPACITANCE   XSPI Capacitor set to 2/3
1070   *           @arg @ref PWR_CAPACITOR_FULL_CAPACITANCE        XSPI Capacitor set to full capacitance
1071   * @retval None.
1072   */
HAL_PWREx_ConfigXSPIPortCap(uint32_t PortCapacitor,uint32_t PortCapacitorSetting)1073 void HAL_PWREx_ConfigXSPIPortCap(uint32_t PortCapacitor, uint32_t PortCapacitorSetting)
1074 {
1075   /* Check the parameters */
1076   assert_param(IS_PWR_CAPACITOR(PortCapacitor));
1077   assert_param(IS_PWR_CAPACITOR_SETTING(PortCapacitorSetting));
1078 
1079   if (PortCapacitor == PWR_CAPACITOR_PORT1)
1080   {
1081     /* Set Port1 Capacitor setting */
1082     MODIFY_REG(PWR->CSR2, PWR_CSR2_XSPICAP1, PortCapacitorSetting);
1083   }
1084   else
1085   {
1086     /* Set Port2 Capacitor setting */
1087     MODIFY_REG(PWR->CSR2, PWR_CSR2_XSPICAP2, PortCapacitorSetting << (PWR_CSR2_XSPICAP2_Pos - PWR_CSR2_XSPICAP1_Pos));
1088   }
1089 }
1090 
1091 /**
1092   * @brief  Get the capacitor port setting
1093   * @param  PortCapacitor Select the Port
1094   *         This parameter can be one of the following values:
1095   *           @arg @ref PWR_CAPACITOR_PORT1    XSPI port 1 capacitor
1096   *           @arg @ref PWR_CAPACITOR_PORT2    XSPI port 2 capacitor
1097   * @retval The capacitor setting:
1098   *           @arg @ref PWR_CAPACITOR_OFF                     XSPI Capacitor OFF
1099   *           @arg @ref PWR_CAPACITOR_ONE_THIRD_CAPACITANCE   XSPI Capacitor set to 1/3
1100   *           @arg @ref PWR_CAPACITOR_TWO_THIRD_CAPACITANCE   XSPI Capacitor set to 2/3
1101   *           @arg @ref PWR_CAPACITOR_FULL_CAPACITANCE        XSPI Capacitor set to full capacitance
1102   */
HAL_PWREx_GetConfigXSPIPortCap(uint32_t PortCapacitor)1103 uint32_t HAL_PWREx_GetConfigXSPIPortCap(uint32_t PortCapacitor)
1104 {
1105   uint32_t PortCapacitorSetting;
1106 
1107   /* Check the parameter */
1108   assert_param(IS_PWR_CAPACITOR(PortCapacitor));
1109 
1110   if (PortCapacitor == PWR_CAPACITOR_PORT1)
1111   {
1112     /* Get Port1 Capacitor setting */
1113     PortCapacitorSetting = READ_BIT(PWR->CSR2, PWR_CSR2_XSPICAP1);
1114   }
1115   else
1116   {
1117     /* Get Port2 Capacitor setting */
1118     PortCapacitorSetting = (READ_BIT(PWR->CSR2, PWR_CSR2_XSPICAP2) >> (PWR_CSR2_XSPICAP2_Pos - PWR_CSR2_XSPICAP1_Pos));
1119   }
1120 
1121   return PortCapacitorSetting;
1122 }
1123 
1124 /**
1125   * @}
1126   */
1127 
1128 /** @defgroup PWREx_Exported_Functions_Group4 Power Monitoring functions
1129   * @brief    Power Monitoring functions
1130   *
1131 @verbatim
1132  ===============================================================================
1133                  ##### Power Monitoring functions #####
1134  ===============================================================================
1135 
1136     *** VBAT and Temperature supervision ***
1137     ========================================
1138     [..]
1139       (+) The VBAT battery voltage supply can be monitored by comparing it with
1140           two threshold levels: VBAThigh and VBATlow. VBATH flag and VBATL flags
1141           in the PWR control register 2 (PWR_CR2), indicate if VBAT is higher or
1142           lower than the threshold.
1143       (+) The temperature can be monitored by comparing it with two threshold
1144           levels, TEMPhigh and TEMPlow. TEMPH and TEMPL flags, in the PWR
1145           control register 2 (PWR_CR2), indicate whether the device temperature
1146           is higher or lower than the threshold.
1147       (+) The VBAT and the temperature monitoring is enabled by
1148           HAL_PWREx_EnableMonitoring() function and disabled by
1149           HAL_PWREx_DisableMonitoring() function.
1150       (+) The HAL_PWREx_GetVBATLevel() function returns the VBAT level which can
1151           be : PWR_VBAT_BELOW_LOW_THRESHOLD or PWR_VBAT_ABOVE_HIGH_THRESHOLD or
1152           PWR_VBAT_BETWEEN_HIGH_LOW_THRESHOLD.
1153       (+) The HAL_PWREx_GetTemperatureLevel() function returns the Temperature
1154           level which can be :
1155           PWR_TEMP_BELOW_LOW_THRESHOLD or PWR_TEMP_ABOVE_HIGH_THRESHOLD or
1156           PWR_TEMP_BETWEEN_HIGH_LOW_THRESHOLD.
1157 
1158     *** AVD configuration ***
1159     =========================
1160     [..]
1161       (+) The AVD is used to monitor the VDDA power supply by comparing it to a
1162           threshold selected by the AVD Level (ALS[3:0] bits in the PWR_CR1
1163           register).
1164       (+) A AVDO flag is available to indicate if VDDA is higher or lower
1165           than the AVD threshold. This event is internally connected to the EXTI
1166           line 16 to generate an interrupt if enabled.
1167           It is configurable through __HAL_PWR_AVD_EXTI_ENABLE_IT() macro.
1168       (+) The AVD is stopped in System Standby mode.
1169 
1170 @endverbatim
1171   * @{
1172   */
1173 
1174 /**
1175   * @brief Enable the VBAT and temperature monitoring.
1176   * @retval HAL status.
1177   */
HAL_PWREx_EnableMonitoring(void)1178 void HAL_PWREx_EnableMonitoring(void)
1179 {
1180   /* Enable the VBAT and Temperature monitoring */
1181   SET_BIT(PWR->CSR1, PWR_CSR1_MONEN);
1182 }
1183 
1184 /**
1185   * @brief Disable the VBAT and temperature monitoring.
1186   * @retval HAL status.
1187   */
HAL_PWREx_DisableMonitoring(void)1188 void HAL_PWREx_DisableMonitoring(void)
1189 {
1190   /* Disable the VBAT and Temperature monitoring */
1191   CLEAR_BIT(PWR->CSR1, PWR_CSR1_MONEN);
1192 }
1193 
1194 /**
1195   * @brief Indicate whether the junction temperature is between, above or below
1196   *        the thresholds.
1197   * @retval Temperature level.
1198   */
HAL_PWREx_GetTemperatureLevel(void)1199 uint32_t HAL_PWREx_GetTemperatureLevel(void)
1200 {
1201   uint32_t tempLevel;
1202   uint32_t regValue;
1203 
1204   /* Read the temperature flags */
1205   regValue = READ_BIT(PWR->CSR1, (PWR_CSR1_TEMPH | PWR_CSR1_TEMPL));
1206 
1207   /* Check if the temperature is below the threshold */
1208   if (regValue == PWR_CSR1_TEMPL)
1209   {
1210     tempLevel = PWR_TEMP_BELOW_LOW_THRESHOLD;
1211   }
1212   /* Check if the temperature is above the threshold */
1213   else if (regValue == PWR_CSR1_TEMPH)
1214   {
1215     tempLevel = PWR_TEMP_ABOVE_HIGH_THRESHOLD;
1216   }
1217   /* The temperature is between the thresholds */
1218   else
1219   {
1220     tempLevel = PWR_TEMP_BETWEEN_HIGH_LOW_THRESHOLD;
1221   }
1222 
1223   return tempLevel;
1224 }
1225 
1226 /**
1227   * @brief Indicate whether the Battery voltage level is between, above or below
1228   *        the thresholds.
1229   * @retval VBAT level.
1230   */
HAL_PWREx_GetVBATLevel(void)1231 uint32_t HAL_PWREx_GetVBATLevel(void)
1232 {
1233   uint32_t vbatLevel;
1234   uint32_t regValue;
1235 
1236   /* Read the VBAT flags */
1237   regValue = READ_BIT(PWR->CSR1, (PWR_CSR1_VBATH | PWR_CSR1_VBATL));
1238 
1239   /* Check if the VBAT is below the threshold */
1240   if (regValue == PWR_CSR1_VBATL)
1241   {
1242     vbatLevel = PWR_VBAT_BELOW_LOW_THRESHOLD;
1243   }
1244   /* Check if the VBAT is above the threshold */
1245   else if (regValue == PWR_CSR1_VBATH)
1246   {
1247     vbatLevel = PWR_VBAT_ABOVE_HIGH_THRESHOLD;
1248   }
1249   /* The VBAT is between the thresholds */
1250   else
1251   {
1252     vbatLevel = PWR_VBAT_BETWEEN_HIGH_LOW_THRESHOLD;
1253   }
1254 
1255   return vbatLevel;
1256 }
1257 
1258 /**
1259   * @brief  Configure the event mode and the voltage threshold detected by the
1260   *         Analog Voltage Detector (AVD).
1261   * @param  sConfigAVD : Pointer to an PWREx_AVDTypeDef structure that contains
1262   *                      the configuration information for the AVD.
1263   * @note   Refer to the electrical characteristics of your device datasheet for
1264   *         more details about the voltage threshold corresponding to each
1265   *         detection level.
1266   * @note   As PVD and AVD share the same EXTI line, the EXTI operating mode to
1267   *         configure will replace a possible previous configuration done through
1268   *         HAL_PWR_ConfigPVD.
1269   * @retval None.
1270   */
HAL_PWREx_ConfigAVD(const PWREx_AVDTypeDef * sConfigAVD)1271 void HAL_PWREx_ConfigAVD(const PWREx_AVDTypeDef *sConfigAVD)
1272 {
1273   /* Check the parameters */
1274   assert_param(IS_PWR_AVD_LEVEL(sConfigAVD->AVDLevel));
1275   assert_param(IS_PWR_AVD_MODE(sConfigAVD->Mode));
1276 
1277   /* Set the ALS[18:17] bits according to AVDLevel value */
1278   MODIFY_REG(PWR->CR1, PWR_CR1_ALS, sConfigAVD->AVDLevel);
1279 
1280   /* Clear any previous config */
1281   __HAL_PWR_AVD_EXTI_DISABLE_EVENT();
1282   __HAL_PWR_AVD_EXTI_DISABLE_IT();
1283 
1284   __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE();
1285   __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE();
1286 
1287   /* Configure the interrupt mode */
1288   if ((sConfigAVD->Mode & AVD_MODE_IT) == AVD_MODE_IT)
1289   {
1290     __HAL_PWR_AVD_EXTI_ENABLE_IT();
1291   }
1292 
1293   /* Configure the event mode */
1294   if ((sConfigAVD->Mode & AVD_MODE_EVT) == AVD_MODE_EVT)
1295   {
1296     __HAL_PWR_AVD_EXTI_ENABLE_EVENT();
1297   }
1298 
1299   /* Rising edge configuration */
1300   if ((sConfigAVD->Mode & AVD_RISING_EDGE) == AVD_RISING_EDGE)
1301   {
1302     __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE();
1303   }
1304 
1305   /* Falling edge configuration */
1306   if ((sConfigAVD->Mode & AVD_FALLING_EDGE) == AVD_FALLING_EDGE)
1307   {
1308     __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE();
1309   }
1310 }
1311 
1312 /**
1313   * @brief Enable the Analog Voltage Detector (AVD).
1314   * @retval None.
1315   */
HAL_PWREx_EnableAVD(void)1316 void HAL_PWREx_EnableAVD(void)
1317 {
1318   /* Enable the Analog Voltage Detector */
1319   SET_BIT(PWR->CR1, PWR_CR1_AVDEN);
1320 }
1321 
1322 /**
1323   * @brief Disable the Analog Voltage Detector(AVD).
1324   * @retval None.
1325   */
HAL_PWREx_DisableAVD(void)1326 void HAL_PWREx_DisableAVD(void)
1327 {
1328   /* Disable the Analog Voltage Detector */
1329   CLEAR_BIT(PWR->CR1, PWR_CR1_AVDEN);
1330 }
1331 
1332 /**
1333   * @brief  This function handles the PWR PVD/AVD interrupt request.
1334   * @note   This API should be called under the PVD_AVD_IRQHandler().
1335   * @retval None
1336   */
HAL_PWREx_PVD_AVD_IRQHandler(void)1337 void HAL_PWREx_PVD_AVD_IRQHandler(void)
1338 {
1339   /* Check PWR EXTI flags for PVD/AVD */
1340   if (((EXTI->PR1) & EXTI_PR1_PR16) != 0U)
1341   {
1342     /* Clear PVD/AVD exti pending bit */
1343     WRITE_REG(EXTI->PR1, EXTI_PR1_PR16);
1344 
1345     /* PWR PVD/AVD interrupt user callback */
1346     HAL_PWREx_PVD_AVD_Callback();
1347   }
1348 }
1349 
1350 /**
1351   * @brief  PWR PVD/AVD interrupt callback.
1352   * @retval None.
1353   */
HAL_PWREx_PVD_AVD_Callback(void)1354 __weak void HAL_PWREx_PVD_AVD_Callback(void)
1355 {
1356   /* NOTE : This function should not be modified, when the callback is needed,
1357             the HAL_PWREx_PVD_AVD_Callback can be implemented in the user file
1358   */
1359 }
1360 
1361 /**
1362   * @}
1363   */
1364 
1365 /** @defgroup PWREx_Exported_Functions_Group5 I/O Pull-Up Pull-Down Configuration Functions
1366   * @brief    I/O pull-up / pull-down configuration functions
1367   *
1368 @verbatim
1369  ===============================================================================
1370                      ##### Voltage monitoring Functions #####
1371  ===============================================================================
1372     [..]
1373       In Standby mode, pull up and pull down can be configured to
1374       maintain an I/O in the selected state. If the APC bit in the PWR_APCR
1375       register is set, the I/Os can be configured either with a pull-up through
1376       PWR_PUCRx registers (x=N,O), or with a pull-down through
1377       PWR_PDCRx registers (x=N,O,P), or can be kept in analog state
1378       if none of the PWR_PUCRx or PWR_PDCRx register is set.
1379 
1380     [..]
1381       The pull-down configuration has highest priority over pull-up
1382       configuration in case both PWR_PUCRx and PWR_PDCRx are set for the same
1383       I/O.
1384 
1385 @endverbatim
1386   * @{
1387   */
1388 
1389 /**
1390   * @brief  Enable pull-up and pull-down configuration.
1391   * @note   When APC bit is set, the I/O pull-up and pull-down configurations
1392   *         defined in PWR_PUCRx and PWR_PDCRx registers are applied in Standby
1393   *         mode.
1394   * @note   Pull-up set by PUy bit of PWR_PUCRx register is not activated if the
1395   *         corresponding PDy bit of PWR_PDCRx register is also set (pull-down
1396   *         configuration priority is higher). HAL_PWREx_EnableGPIOPullUp() and
1397   *         HAL_PWREx_EnableGPIOPullDown() API's ensure there is no conflict
1398   *         when setting PUy or PDy bit.
1399   * @retval None.
1400   */
HAL_PWREx_EnablePullUpPullDownConfig(void)1401 void HAL_PWREx_EnablePullUpPullDownConfig(void)
1402 {
1403   SET_BIT(PWR->APCR, PWR_APCR_APC);
1404 }
1405 
1406 /**
1407   * @brief  Disable pull-up and pull-down configuration.
1408   * @note   When APC bit is cleared, the I/O pull-up and pull-down configurations
1409   *         defined in PWR_PUCRx and PWR_PDCRx registers are not applied in
1410   *         Standby mode.
1411   * @retval None.
1412   */
HAL_PWREx_DisablePullUpPullDownConfig(void)1413 void HAL_PWREx_DisablePullUpPullDownConfig(void)
1414 {
1415   CLEAR_BIT(PWR->APCR, PWR_APCR_APC);
1416 }
1417 
1418 /**
1419   * @brief  Enable GPIO pull-up state in Standby mode.
1420   * @note   Set the relevant PUy bits of PWR_PUCRx register to configure the I/O in
1421   *         pull-up state in Standby mode.
1422   * @note   This state is effective in Standby mode only if APC bit
1423   *         is set through HAL_PWREx_EnablePullUpPullDownConfig() API.
1424   * @note   The configuration is maintained when exiting the Standby mode.
1425   * @note   Even if a PUy bit to set is reserved, the other PUy bits entered as
1426   *         input parameter at the same time are set.
1427   * @note   The pullup is not activated if the corresponding PDy bit is also set.
1428   * @param  GPIO_Port : Specify the IO port.
1429   *                     This parameter can be a value of @ref PWREx_GPIO_PullUp_Port.
1430   * @param  GPIO_Pin  : Specify the I/O pins numbers.
1431   *                     This parameter can be a combination of @ref PWREx_GPIO_PullUp_Pin_Mask.
1432   * @retval HAL Status
1433   */
HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO_Port,uint32_t GPIO_Pin)1434 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO_Port, uint32_t GPIO_Pin)
1435 {
1436   HAL_StatusTypeDef status = HAL_OK;
1437 
1438   /* Check the parameters */
1439   assert_param(IS_PWR_GPIO_PULLPUP_PORT(GPIO_Port));
1440   assert_param(IS_PWR_GPIO_PIN_MASK(GPIO_Pin));
1441 
1442   switch (GPIO_Port)
1443   {
1444     case PWR_GPIO_PULLUP_PORT_N:
1445       SET_BIT(PWR->PUCRN, GPIO_Pin);
1446       break;
1447 
1448     case PWR_GPIO_PULLUP_PORT_O:
1449       SET_BIT(PWR->PUCRO, GPIO_Pin);
1450       break;
1451 
1452     default:
1453       status = HAL_ERROR;
1454       break;
1455   }
1456 
1457   return status;
1458 }
1459 
1460 /**
1461   * @brief  Disable GPIO pull-up state in Standby mode.
1462   * @note   Reset the relevant PUy bits of PWR_PUCRx register used to configure the I/O
1463   *         in pull-up state in Standby mode.
1464   * @note  Even if a PUy bit to reset is reserved, the other PUy bits entered as input
1465   *        parameter at the same time are reset.
1466   * @param  GPIO_Port : Specify the IO port.
1467   *                     This parameter can be a value of @ref PWREx_GPIO_PullUp_Port.
1468   * @param  GPIO_Pin  : Specify the I/O pins numbers.
1469   *                     This parameter can be a combination of @ref PWREx_GPIO_PullUp_Pin_Mask.
1470   * @retval HAL Status
1471   */
HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO_Port,uint32_t GPIO_Pin)1472 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO_Port, uint32_t GPIO_Pin)
1473 {
1474   HAL_StatusTypeDef status = HAL_OK;
1475 
1476   /* Check the parameters */
1477   assert_param(IS_PWR_GPIO_PULLPUP_PORT(GPIO_Port));
1478   assert_param(IS_PWR_GPIO_PIN_MASK(GPIO_Pin));
1479 
1480   switch (GPIO_Port)
1481   {
1482     case PWR_GPIO_PULLUP_PORT_N:
1483       CLEAR_BIT(PWR->PUCRN, GPIO_Pin);
1484       break;
1485 
1486     case PWR_GPIO_PULLUP_PORT_O:
1487       CLEAR_BIT(PWR->PUCRO, GPIO_Pin);
1488       break;
1489 
1490     default:
1491       status = HAL_ERROR;
1492       break;
1493   }
1494 
1495   return status;
1496 }
1497 
1498 /**
1499   * @brief Enable GPIO pull-down state in Standby mode.
1500   * @note  Set the relevant PDy bits of PWR_PDCRx register to configure the I/O in
1501   *        pull-down state in Standby mode.
1502   * @note  This state is effective in Standby mode only if APC bit
1503   *        is set through HAL_PWREx_EnablePullUpPullDownConfig() API.
1504   * @note  The configuration is maintained when exiting the Standby mode.
1505   * @note  Even if a PDy bit to set is reserved, the other PDy bits entered as input
1506   *        parameter at the same time are set.
1507   * @param  GPIO_Port : Specify the IO port.
1508   *                     This parameter can be a value of @ref PWREx_GPIO_PullDown_Port.
1509   * @param  GPIO_Pin  : Specify the I/O pins numbers.
1510   *                     This parameter can be a combination of @ref PWREx_GPIO_PullDown_Pin_Mask.
1511   * @retval HAL Status
1512   */
HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO_Port,uint32_t GPIO_Pin)1513 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO_Port, uint32_t GPIO_Pin)
1514 {
1515   HAL_StatusTypeDef status = HAL_OK;
1516 
1517   /* Check the parameters */
1518   assert_param(IS_PWR_GPIO_PULLDOWN_PORT(GPIO_Port));
1519   assert_param(IS_PWR_GPIO_PIN_MASK(GPIO_Pin));
1520 
1521   switch (GPIO_Port)
1522   {
1523     case PWR_GPIO_PULLDOWN_PORT_N:
1524       SET_BIT(PWR->PDCRN, GPIO_Pin);
1525       break;
1526 
1527     case PWR_GPIO_PULLDOWN_PORT_O:
1528       SET_BIT(PWR->PDCRO, GPIO_Pin);
1529       break;
1530 
1531     case PWR_GPIO_PULLDOWN_PORT_P:
1532       SET_BIT(PWR->PDCRP, GPIO_Pin);
1533       break;
1534 
1535     default:
1536       status = HAL_ERROR;
1537       break;
1538   }
1539 
1540   return status;
1541 }
1542 
1543 /**
1544   * @brief Disable GPIO pull-down state in Standby mode.
1545   * @note  Reset the relevant PDy bits of PWR_PDCRx register used to configure the I/O
1546   *        in pull-down state in Standby mode.
1547   * @note  Even if a PDy bit to reset is reserved, the other PDy bits entered as input
1548   *        parameter at the same time are reset.
1549   * @param  GPIO_Port : Specify the IO port.
1550   *                     This parameter can be a value of @ref PWREx_GPIO_PullDown_Port.
1551   * @param  GPIO_Pin  : Specify the I/O pins numbers.
1552   *                     This parameter can be a value of @ref PWREx_GPIO_PullDown_Pin_Mask.
1553   * @retval HAL Status
1554   */
HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO_Port,uint32_t GPIO_Pin)1555 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO_Port, uint32_t GPIO_Pin)
1556 {
1557   HAL_StatusTypeDef status = HAL_OK;
1558 
1559   /* Check the parameters */
1560   assert_param(IS_PWR_GPIO_PULLDOWN_PORT(GPIO_Port));
1561   assert_param(IS_PWR_GPIO_PIN_MASK(GPIO_Pin));
1562 
1563   switch (GPIO_Port)
1564   {
1565     case PWR_GPIO_PULLDOWN_PORT_N:
1566       CLEAR_BIT(PWR->PDCRN, GPIO_Pin);
1567       break;
1568 
1569     case PWR_GPIO_PULLDOWN_PORT_O:
1570       CLEAR_BIT(PWR->PDCRO, GPIO_Pin);
1571       break;
1572 
1573     case PWR_GPIO_PULLDOWN_PORT_P:
1574       CLEAR_BIT(PWR->PDCRP, GPIO_Pin);
1575       break;
1576 
1577     default:
1578       status = HAL_ERROR;
1579       break;
1580   }
1581 
1582   return status;
1583 }
1584 /**
1585   * @}
1586   */
1587 
1588 /**
1589   * @}
1590   */
1591 
1592 #endif /* HAL_PWR_MODULE_ENABLED */
1593 
1594 /**
1595   * @}
1596   */
1597 
1598 /**
1599   * @}
1600   */
1601