1 /**
2 ******************************************************************************
3 * @file stm32g4xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32g4xx_ll_usart.h"
22 #include "stm32g4xx_ll_rcc.h"
23 #include "stm32g4xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29
30 /** @addtogroup STM32G4xx_LL_Driver
31 * @{
32 */
33
34 #if defined(USART1) || defined(USART2) || defined(USART3) || defined(UART4) || defined(UART5)
35
36 /** @addtogroup USART_LL
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /** @addtogroup USART_LL_Private_Constants
44 * @{
45 */
46
47 /* Definition of default baudrate value used for USART initialisation */
48 #define USART_DEFAULT_BAUDRATE (9600U)
49
50 /**
51 * @}
52 */
53
54 /* Private macros ------------------------------------------------------------*/
55 /** @addtogroup USART_LL_Private_Macros
56 * @{
57 */
58
59 #define IS_LL_USART_PRESCALER(__VALUE__) (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
60 || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
61 || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
62 || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
63 || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
64 || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
65 || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
66 || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
67 || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
68 || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
69 || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
70 || ((__VALUE__) == LL_USART_PRESCALER_DIV256))
71
72 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
73 * divided by the smallest oversampling used on the USART (i.e. 8) */
74 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 18750000U)
75
76 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
77 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
78
79 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
80 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
81 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
82 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
83
84 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
85 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
86 || ((__VALUE__) == LL_USART_PARITY_ODD))
87
88 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
89 || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
90 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
91
92 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
93 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
94
95 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
96 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
97
98 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
99 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
100
101 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
102 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
103
104 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
105 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
106
107 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
108 || ((__VALUE__) == LL_USART_STOPBITS_1) \
109 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
110 || ((__VALUE__) == LL_USART_STOPBITS_2))
111
112 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
113 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
114 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
115 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
116
117 /**
118 * @}
119 */
120
121 /* Private function prototypes -----------------------------------------------*/
122
123 /* Exported functions --------------------------------------------------------*/
124 /** @addtogroup USART_LL_Exported_Functions
125 * @{
126 */
127
128 /** @addtogroup USART_LL_EF_Init
129 * @{
130 */
131
132 /**
133 * @brief De-initialize USART registers (Registers restored to their default values).
134 * @param USARTx USART Instance
135 * @retval An ErrorStatus enumeration value:
136 * - SUCCESS: USART registers are de-initialized
137 * - ERROR: USART registers are not de-initialized
138 */
LL_USART_DeInit(const USART_TypeDef * USARTx)139 ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
140 {
141 ErrorStatus status = SUCCESS;
142
143 /* Check the parameters */
144 assert_param(IS_UART_INSTANCE(USARTx));
145
146 if (USARTx == USART1)
147 {
148 /* Force reset of USART clock */
149 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
150
151 /* Release reset of USART clock */
152 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
153 }
154 else if (USARTx == USART2)
155 {
156 /* Force reset of USART clock */
157 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
158
159 /* Release reset of USART clock */
160 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
161 }
162 #if defined(USART3)
163 else if (USARTx == USART3)
164 {
165 /* Force reset of USART clock */
166 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
167
168 /* Release reset of USART clock */
169 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
170 }
171 #endif /* USART3 */
172 #if defined(UART4)
173 else if (USARTx == UART4)
174 {
175 /* Force reset of UART clock */
176 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
177
178 /* Release reset of UART clock */
179 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
180 }
181 #endif /* UART4 */
182 #if defined(UART5)
183 else if (USARTx == UART5)
184 {
185 /* Force reset of UART clock */
186 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
187
188 /* Release reset of UART clock */
189 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
190 }
191 #endif /* UART5 */
192 else
193 {
194 status = ERROR;
195 }
196
197 return (status);
198 }
199
200 /**
201 * @brief Initialize USART registers according to the specified
202 * parameters in USART_InitStruct.
203 * @note As some bits in USART configuration registers can only be written when
204 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
205 * this function. Otherwise, ERROR result will be returned.
206 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
207 * @param USARTx USART Instance
208 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
209 * that contains the configuration information for the specified USART peripheral.
210 * @retval An ErrorStatus enumeration value:
211 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
212 * - ERROR: Problem occurred during USART Registers initialization
213 */
LL_USART_Init(USART_TypeDef * USARTx,const LL_USART_InitTypeDef * USART_InitStruct)214 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
215 {
216 ErrorStatus status = ERROR;
217 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
218
219 /* Check the parameters */
220 assert_param(IS_UART_INSTANCE(USARTx));
221 assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
222 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
223 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
224 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
225 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
226 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
227 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
228 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
229
230 /* USART needs to be in disabled state, in order to be able to configure some bits in
231 CRx registers */
232 if (LL_USART_IsEnabled(USARTx) == 0U)
233 {
234 /*---------------------------- USART CR1 Configuration ---------------------
235 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
236 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
237 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
238 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
239 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
240 */
241 MODIFY_REG(USARTx->CR1,
242 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
243 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
244 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
245 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
246
247 /*---------------------------- USART CR2 Configuration ---------------------
248 * Configure USARTx CR2 (Stop bits) with parameters:
249 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
250 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
251 */
252 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
253
254 /*---------------------------- USART CR3 Configuration ---------------------
255 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
256 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
257 * USART_InitStruct->HardwareFlowControl value.
258 */
259 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
260
261 /*---------------------------- USART BRR Configuration ---------------------
262 * Retrieve Clock frequency used for USART Peripheral
263 */
264 if (USARTx == USART1)
265 {
266 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
267 }
268 else if (USARTx == USART2)
269 {
270 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
271 }
272 #if defined(USART3)
273 else if (USARTx == USART3)
274 {
275 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
276 }
277 #endif /* USART3 */
278 #if defined(UART4)
279 else if (USARTx == UART4)
280 {
281 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
282 }
283 #endif /* UART4 */
284 #if defined(UART5)
285 else if (USARTx == UART5)
286 {
287 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
288 }
289 #endif /* UART5 */
290 else
291 {
292 /* Nothing to do, as error code is already assigned to ERROR value */
293 }
294
295 /* Configure the USART Baud Rate :
296 - prescaler value is required
297 - valid baud rate value (different from 0) is required
298 - Peripheral clock as returned by RCC service, should be valid (different from 0).
299 */
300 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
301 && (USART_InitStruct->BaudRate != 0U))
302 {
303 status = SUCCESS;
304 LL_USART_SetBaudRate(USARTx,
305 periphclk,
306 USART_InitStruct->PrescalerValue,
307 USART_InitStruct->OverSampling,
308 USART_InitStruct->BaudRate);
309
310 /* Check BRR is greater than or equal to 16d */
311 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
312 }
313
314 /*---------------------------- USART PRESC Configuration -----------------------
315 * Configure USARTx PRESC (Prescaler) with parameters:
316 * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
317 */
318 LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
319 }
320 /* Endif (=> USART not in Disabled state => return ERROR) */
321
322 return (status);
323 }
324
325 /**
326 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
327 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
328 * whose fields will be set to default values.
329 * @retval None
330 */
331
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)332 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
333 {
334 /* Set USART_InitStruct fields to default values */
335 USART_InitStruct->PrescalerValue = LL_USART_PRESCALER_DIV1;
336 USART_InitStruct->BaudRate = USART_DEFAULT_BAUDRATE;
337 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
338 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
339 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
340 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
341 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
342 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
343 }
344
345 /**
346 * @brief Initialize USART Clock related settings according to the
347 * specified parameters in the USART_ClockInitStruct.
348 * @note As some bits in USART configuration registers can only be written when
349 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
350 * this function. Otherwise, ERROR result will be returned.
351 * @param USARTx USART Instance
352 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
353 * that contains the Clock configuration information for the specified USART peripheral.
354 * @retval An ErrorStatus enumeration value:
355 * - SUCCESS: USART registers related to Clock settings are initialized according
356 * to USART_ClockInitStruct content
357 * - ERROR: Problem occurred during USART Registers initialization
358 */
LL_USART_ClockInit(USART_TypeDef * USARTx,const LL_USART_ClockInitTypeDef * USART_ClockInitStruct)359 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
360 {
361 ErrorStatus status = SUCCESS;
362
363 /* Check USART Instance and Clock signal output parameters */
364 assert_param(IS_UART_INSTANCE(USARTx));
365 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
366
367 /* USART needs to be in disabled state, in order to be able to configure some bits in
368 CRx registers */
369 if (LL_USART_IsEnabled(USARTx) == 0U)
370 {
371 /* Ensure USART instance is USART capable */
372 assert_param(IS_USART_INSTANCE(USARTx));
373
374 /* Check clock related parameters */
375 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
376 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
377 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
378
379 /*---------------------------- USART CR2 Configuration -----------------------
380 * Configure USARTx CR2 (Clock signal related bits) with parameters:
381 * - Clock Output: USART_CR2_CLKEN bit according to USART_ClockInitStruct->ClockOutput value
382 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
383 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
384 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
385 */
386 MODIFY_REG(USARTx->CR2,
387 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
388 USART_ClockInitStruct->ClockOutput | USART_ClockInitStruct->ClockPolarity |
389 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
390 }
391 /* Else (USART not in Disabled state => return ERROR */
392 else
393 {
394 status = ERROR;
395 }
396
397 return (status);
398 }
399
400 /**
401 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
402 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
403 * whose fields will be set to default values.
404 * @retval None
405 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)406 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
407 {
408 /* Set LL_USART_ClockInitStruct fields with default values */
409 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
410 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
411 LL_USART_CLOCK_DISABLE */
412 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
413 LL_USART_CLOCK_DISABLE */
414 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
415 LL_USART_CLOCK_DISABLE */
416 }
417
418 /**
419 * @}
420 */
421
422 /**
423 * @}
424 */
425
426 /**
427 * @}
428 */
429
430 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
431
432 /**
433 * @}
434 */
435
436 #endif /* USE_FULL_LL_DRIVER */
437
438
439
