1 /**
2 ******************************************************************************
3 * @file stm32g4xx_ll_dac.c
4 * @author MCD Application Team
5 * @brief DAC LL module driver
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32g4xx_ll_dac.h"
22 #include "stm32g4xx_ll_bus.h"
23
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29
30 /** @addtogroup STM32G4xx_LL_Driver
31 * @{
32 */
33
34 #if defined(DAC1) || defined(DAC2) || defined(DAC3) ||defined (DAC4)
35
36 /** @addtogroup DAC_LL DAC
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private macros ------------------------------------------------------------*/
44
45 /** @addtogroup DAC_LL_Private_Macros
46 * @{
47 */
48 #if defined(STM32G414xx) || defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
49 #define IS_LL_DAC_CHANNEL(__DACX__, __DAC_CHANNEL__) \
50 (((__DACX__) == DAC2) ? \
51 ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1) \
52 : \
53 (((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1) \
54 || ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_2)) \
55 )
56 #elif defined(STM32G411xB) || defined(STM32G411xC)
57 #define IS_LL_DAC_CHANNEL(__DACX__, __DAC_CHANNEL__) \
58 (((__DACX__) == DAC1) ? \
59 ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1) \
60 : \
61 (((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1) \
62 || ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_2)) \
63 )
64 #else
65 #define IS_LL_DAC_CHANNEL(__DACX__, __DAC_CHANNEL__) \
66 (((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1) \
67 || ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_2) \
68 )
69 #endif /* STM32G414xx || STM32G474xx || STM32G484xx || STM32G473xx || STM32G483xx */
70
71 #if defined(STM32G414xx) || defined(STM32G474xx) || defined(STM32G484xx)
72 #define IS_LL_DAC_TRIGGER_SOURCE(__DACX__, __TRIGGER_SOURCE__) \
73 (((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
74 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO) \
75 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
76 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
77 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO) \
78 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE9) \
79 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
80 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
81 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_RST_TRG1) \
82 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_RST_TRG2) \
83 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_RST_TRG3) \
84 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_RST_TRG4) \
85 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_RST_TRG5) \
86 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_RST_TRG6) \
87 || (((__DACX__) == DAC3) ? ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM1_TRGO) \
88 : ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM8_TRGO)) \
89 || (((__DACX__) == DAC1) && ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_TRGO1))\
90 || (((__DACX__) == DAC2) && ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_TRGO2))\
91 || (((__DACX__) == DAC3) && ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_TRGO3))\
92 || (((__DACX__) == DAC4) && ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_TRGO1))\
93 )
94 #else
95 #define IS_LL_DAC_TRIGGER_SOURCE(__DACX__, __TRIGGER_SOURCE__) \
96 (((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
97 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO) \
98 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
99 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
100 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO) \
101 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE9) \
102 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
103 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
104 || (((__DACX__) == DAC3) ? ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM1_TRGO) \
105 : ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM8_TRGO)) \
106 )
107 #endif /* STM32G414xx || STM32G474xx || STM32G484xx */
108
109 #if defined(STM32G414xx) || defined(STM32G474xx) || defined(STM32G484xx)
110 #define IS_LL_DAC_TRIGGER_SOURCE2(__DACX__, __TRIGGER_SOURCE__) \
111 (((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
112 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO) \
113 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
114 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
115 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO) \
116 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE10) \
117 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
118 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
119 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_STEP_TRG1) \
120 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_STEP_TRG2) \
121 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_STEP_TRG3) \
122 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_STEP_TRG4) \
123 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_STEP_TRG5) \
124 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_STEP_TRG6) \
125 || (((__DACX__) == DAC3) ? ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM1_TRGO) \
126 : ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM8_TRGO)) \
127 )
128 #else
129 #define IS_LL_DAC_TRIGGER_SOURCE2(__DACX__, __TRIGGER_SOURCE__) \
130 (((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
131 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO) \
132 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
133 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
134 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO) \
135 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE10) \
136 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
137 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
138 || (((__DACX__) == DAC3) ? ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM1_TRGO) \
139 : ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM8_TRGO)) \
140 )
141 #endif /* STM32G414xx || STM32G474xx || STM32G484xx */
142
143 #define IS_LL_DAC_WAVE_AUTO_GENER_MODE(__WAVE_AUTO_GENERATION_MODE__) \
144 (((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NONE) \
145 || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NOISE) \
146 || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE) \
147 || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_SAWTOOTH) \
148 )
149
150 #define IS_LL_DAC_WAVE_AUTO_GENER_CONFIG(__WAVE_AUTO_GENERATION_MODE__, __WAVE_AUTO_GENERATION_CONFIG__) \
151 ( (((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NOISE) \
152 && (((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BIT0) \
153 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS1_0) \
154 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS2_0) \
155 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS3_0) \
156 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS4_0) \
157 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS5_0) \
158 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS6_0) \
159 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS7_0) \
160 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS8_0) \
161 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS9_0) \
162 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS10_0) \
163 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS11_0)) \
164 ) \
165 ||(((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE) \
166 && (((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1) \
167 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_3) \
168 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_7) \
169 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_15) \
170 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_31) \
171 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_63) \
172 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_127) \
173 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_255) \
174 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_511) \
175 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1023) \
176 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_2047) \
177 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_4095)) \
178 ) \
179 ||(((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_SAWTOOTH) \
180 && (((__WAVE_AUTO_GENERATION_CONFIG__) & ~(DAC_STR1_STINCDATA1|DAC_STR1_STDIR1|DAC_STR1_STRSTDATA1)) \
181 == 0UL) \
182 ) \
183 )
184
185 #define IS_LL_DAC_OUTPUT_BUFFER(__OUTPUT_BUFFER__) \
186 (((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_ENABLE) \
187 || ((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_DISABLE) \
188 )
189
190 #define IS_LL_DAC_OUTPUT_CONNECTION(__OUTPUT_CONNECTION__) \
191 (((__OUTPUT_CONNECTION__) == LL_DAC_OUTPUT_CONNECT_GPIO) \
192 || ((__OUTPUT_CONNECTION__) == LL_DAC_OUTPUT_CONNECT_INTERNAL) \
193 )
194
195 #define IS_LL_DAC_OUTPUT_MODE(__OUTPUT_MODE__) \
196 (((__OUTPUT_MODE__) == LL_DAC_OUTPUT_MODE_NORMAL) \
197 || ((__OUTPUT_MODE__) == LL_DAC_OUTPUT_MODE_SAMPLE_AND_HOLD) \
198 )
199
200 /**
201 * @}
202 */
203
204
205 /* Private function prototypes -----------------------------------------------*/
206
207 /* Exported functions --------------------------------------------------------*/
208 /** @addtogroup DAC_LL_Exported_Functions
209 * @{
210 */
211
212 /** @addtogroup DAC_LL_EF_Init
213 * @{
214 */
215
216 /**
217 * @brief De-initialize registers of the selected DAC instance
218 * to their default reset values.
219 * @param DACx DAC instance
220 * @retval An ErrorStatus enumeration value:
221 * - SUCCESS: DAC registers are de-initialized
222 * - ERROR: not applicable
223 */
LL_DAC_DeInit(const DAC_TypeDef * DACx)224 ErrorStatus LL_DAC_DeInit(const DAC_TypeDef *DACx)
225 {
226 /* Check the parameters */
227 assert_param(IS_DAC_ALL_INSTANCE(DACx));
228
229 #ifdef DAC1
230 if (DACx == DAC1)
231 {
232 /* Force reset of DAC clock */
233 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_DAC1);
234
235 /* Release reset of DAC clock */
236 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_DAC1);
237 }
238 #endif /* DAC1 */
239 #ifdef DAC2
240 if (DACx == DAC2)
241 {
242 /* Force reset of DAC clock */
243 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_DAC2);
244
245 /* Release reset of DAC clock */
246 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_DAC2);
247 }
248 #endif /* DAC2 */
249 #ifdef DAC3
250 if (DACx == DAC3)
251 {
252 /* Force reset of DAC clock */
253 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_DAC3);
254
255 /* Release reset of DAC clock */
256 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_DAC3);
257 }
258 #endif /* DAC3 */
259 #ifdef DAC4
260 if (DACx == DAC4)
261 {
262 /* Force reset of DAC clock */
263 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_DAC4);
264
265 /* Release reset of DAC clock */
266 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_DAC4);
267 }
268 #endif /* DAC4 */
269
270 return SUCCESS;
271 }
272
273 /**
274 * @brief Initialize some features of DAC channel.
275 * @note @ref LL_DAC_Init() aims to ease basic configuration of a DAC channel.
276 * Leaving it ready to be enabled and output:
277 * a level by calling one of
278 * @ref LL_DAC_ConvertData12RightAligned
279 * @ref LL_DAC_ConvertData12LeftAligned
280 * @ref LL_DAC_ConvertData8RightAligned
281 * or one of the supported autogenerated wave.
282 * @note This function allows configuration of:
283 * - Output mode
284 * - Trigger
285 * - Wave generation
286 * @note The setting of these parameters by function @ref LL_DAC_Init()
287 * is conditioned to DAC state:
288 * DAC channel must be disabled.
289 * @param DACx DAC instance
290 * @param DAC_Channel This parameter can be one of the following values:
291 * @arg @ref LL_DAC_CHANNEL_1
292 * @arg @ref LL_DAC_CHANNEL_2 (1)
293 *
294 * (1) On this STM32 series, parameter not available on all instances.
295 * Refer to device datasheet for channels availability.
296 * @param DAC_InitStruct Pointer to a @ref LL_DAC_InitTypeDef structure
297 * @retval An ErrorStatus enumeration value:
298 * - SUCCESS: DAC registers are initialized
299 * - ERROR: DAC registers are not initialized
300 */
LL_DAC_Init(DAC_TypeDef * DACx,uint32_t DAC_Channel,const LL_DAC_InitTypeDef * DAC_InitStruct)301 ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, const LL_DAC_InitTypeDef *DAC_InitStruct)
302 {
303 ErrorStatus status = SUCCESS;
304
305 /* Check the parameters */
306 assert_param(IS_DAC_ALL_INSTANCE(DACx));
307 assert_param(IS_LL_DAC_CHANNEL(DACx, DAC_Channel));
308 assert_param(IS_LL_DAC_TRIGGER_SOURCE(DACx, DAC_InitStruct->TriggerSource));
309 assert_param(IS_LL_DAC_OUTPUT_BUFFER(DAC_InitStruct->OutputBuffer));
310 assert_param(IS_LL_DAC_OUTPUT_CONNECTION(DAC_InitStruct->OutputConnection));
311 assert_param(IS_LL_DAC_OUTPUT_MODE(DAC_InitStruct->OutputMode));
312 assert_param(IS_LL_DAC_WAVE_AUTO_GENER_MODE(DAC_InitStruct->WaveAutoGeneration));
313 if (DAC_InitStruct->WaveAutoGeneration != LL_DAC_WAVE_AUTO_GENERATION_NONE)
314 {
315 assert_param(IS_LL_DAC_WAVE_AUTO_GENER_CONFIG(DAC_InitStruct->WaveAutoGeneration,
316 DAC_InitStruct->WaveAutoGenerationConfig));
317 }
318
319 /* Note: Hardware constraint (refer to description of this function) */
320 /* DAC instance must be disabled. */
321 if (LL_DAC_IsEnabled(DACx, DAC_Channel) == 0UL)
322 {
323 /* Configuration of DAC channel: */
324 /* - TriggerSource */
325 /* - WaveAutoGeneration */
326 /* - OutputBuffer */
327 /* - OutputConnection */
328 /* - OutputMode */
329 if (DAC_InitStruct->WaveAutoGeneration != LL_DAC_WAVE_AUTO_GENERATION_NONE)
330 {
331 if (DAC_InitStruct->WaveAutoGeneration == LL_DAC_WAVE_AUTO_GENERATION_SAWTOOTH)
332 {
333 assert_param(IS_LL_DAC_TRIGGER_SOURCE2(DACx, DAC_InitStruct->TriggerSource2));
334
335 MODIFY_REG(DACx->CR,
336 DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
337 DAC_InitStruct->WaveAutoGeneration << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
338 );
339
340 MODIFY_REG(DACx->STMODR,
341 (DAC_STMODR_STINCTRIGSEL1 | DAC_STMODR_STRSTTRIGSEL1) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
342 (
343 ((DAC_InitStruct->TriggerSource >> DAC_CR_TSEL1_Pos) << DAC_STMODR_STRSTTRIGSEL1_Pos)
344 | ((DAC_InitStruct->TriggerSource2 >> DAC_CR_TSEL1_Pos) << DAC_STMODR_STINCTRIGSEL1_Pos)
345 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
346 );
347
348 WRITE_REG(*(__DAC_PTR_REG_OFFSET(DACx->STR1,
349 (DAC_Channel >> DAC_REG_STRX_REGOFFSET_BITOFFSET_POS) &
350 DAC_REG_STRX_REGOFFSET_MASK_POSBIT0)),
351 DAC_InitStruct->WaveAutoGenerationConfig);
352 }
353 else
354 {
355 MODIFY_REG(DACx->CR,
356 (DAC_CR_TSEL1
357 | DAC_CR_WAVE1
358 | DAC_CR_MAMP1
359 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
360 ,
361 (DAC_InitStruct->TriggerSource
362 | DAC_InitStruct->WaveAutoGeneration
363 | DAC_InitStruct->WaveAutoGenerationConfig
364 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
365 );
366 }
367 }
368 else
369 {
370 MODIFY_REG(DACx->CR,
371 (DAC_CR_TSEL1
372 | DAC_CR_WAVE1
373 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
374 ,
375 (DAC_InitStruct->TriggerSource
376 | LL_DAC_WAVE_AUTO_GENERATION_NONE
377 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
378 );
379 }
380 MODIFY_REG(DACx->MCR,
381 (DAC_MCR_MODE1_1
382 | DAC_MCR_MODE1_0
383 | DAC_MCR_MODE1_2
384 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
385 ,
386 (DAC_InitStruct->OutputBuffer
387 | DAC_InitStruct->OutputConnection
388 | DAC_InitStruct->OutputMode
389 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
390 );
391 }
392 else
393 {
394 /* Initialization error: DAC instance is not disabled. */
395 status = ERROR;
396 }
397 return status;
398 }
399
400 /**
401 * @brief Set each @ref LL_DAC_InitTypeDef field to default value.
402 * @param DAC_InitStruct pointer to a @ref LL_DAC_InitTypeDef structure
403 * whose fields will be set to default values.
404 * @retval None
405 */
LL_DAC_StructInit(LL_DAC_InitTypeDef * DAC_InitStruct)406 void LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct)
407 {
408 /* Set DAC_InitStruct fields to default values */
409 DAC_InitStruct->TriggerSource = LL_DAC_TRIG_SOFTWARE;
410 DAC_InitStruct->TriggerSource2 = LL_DAC_TRIG_SOFTWARE;
411 DAC_InitStruct->WaveAutoGeneration = LL_DAC_WAVE_AUTO_GENERATION_NONE;
412 /* Note: Parameter discarded if wave auto generation is disabled, */
413 /* set anyway to its default value. */
414 DAC_InitStruct->WaveAutoGenerationConfig = LL_DAC_NOISE_LFSR_UNMASK_BIT0;
415 DAC_InitStruct->OutputBuffer = LL_DAC_OUTPUT_BUFFER_ENABLE;
416 DAC_InitStruct->OutputConnection = LL_DAC_OUTPUT_CONNECT_GPIO;
417 DAC_InitStruct->OutputMode = LL_DAC_OUTPUT_MODE_NORMAL;
418 }
419
420 /**
421 * @}
422 */
423
424 /**
425 * @}
426 */
427
428 /**
429 * @}
430 */
431
432 #endif /* DAC1 || DAC2 || DAC3 || DAC4 */
433
434 /**
435 * @}
436 */
437
438 #endif /* USE_FULL_LL_DRIVER */
439
