1 /**
2 ******************************************************************************
3 * @file stm32g4xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2019 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### How to use this driver #####
28 ==============================================================================
29 [..]
30 The LPTIM HAL driver can be used as follows:
31
32 (#)Initialize the LPTIM low level resources by implementing the
33 HAL_LPTIM_MspInit():
34 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
35 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
36 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
37 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
38 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
39
40 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
41 configures mainly:
42 (++) The instance: LPTIM1.
43 (++) Clock: the counter clock.
44 (+++) Source : it can be either the ULPTIM input (IN1) or one of
45 the internal clock; (APB, LSE or LSI).
46 (+++) Prescaler: select the clock divider.
47 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
48 as counter clock source.
49 (+++) Polarity: polarity of the active edge for the counter unit
50 if the ULPTIM input is selected.
51 (+++) SampleTime: clock sampling time to configure the clock glitch
52 filter.
53 (++) Trigger: How the counter start.
54 (+++) Source: trigger can be software or one of the hardware triggers.
55 (+++) ActiveEdge : only for hardware trigger.
56 (+++) SampleTime : trigger sampling time to configure the trigger
57 glitch filter.
58 (++) OutputPolarity : 2 opposite polarities are possible.
59 (++) UpdateMode: specifies whether the update of the autoreload and
60 the compare values is done immediately or after the end of current
61 period.
62 (++) Input1Source: Source selected for input1 (GPIO or comparator output).
63 (++) Input2Source: Source selected for input2 (GPIO or comparator output).
64 Input2 is used only for encoder feature so is used only for LPTIM1 instance.
65
66 (#)Six modes are available:
67
68 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
69 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
70 mode.
71
72 (++) One Pulse Mode: To generate pulse with specified width in response
73 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
74 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
75
76 (++) Set once Mode: In this mode, the output changes the level (from
77 low level to high level if the output polarity is configured high, else
78 the opposite) when a compare match occurs. To start this mode, call
79 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
80 interruption mode.
81
82 (++) Encoder Mode: To use the encoder interface call
83 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
84 interruption mode. Only available for LPTIM1 instance.
85
86 (++) Time out Mode: an active edge on one selected trigger input rests
87 the counter. The first trigger event will start the timer, any
88 successive trigger event will reset the counter and the timer will
89 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
90 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
91
92 (++) Counter Mode: counter can be used to count external events on
93 the LPTIM Input1 or it can be used to count internal clock cycles.
94 To start this mode, call HAL_LPTIM_Counter_Start() or
95 HAL_LPTIM_Counter_Start_IT() for interruption mode.
96
97
98 (#) User can stop any process by calling the corresponding API:
99 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
100 already started in interruption mode.
101
102 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
103
104 *** Callback registration ***
105 =============================================
106 [..]
107 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
108 allows the user to configure dynamically the driver callbacks.
109 [..]
110 Use Function HAL_LPTIM_RegisterCallback() to register a callback.
111 HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
112 the Callback ID and a pointer to the user callback function.
113 [..]
114 Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the
115 default weak function.
116 HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
117 and the Callback ID.
118 [..]
119 These functions allow to register/unregister following callbacks:
120
121 (+) MspInitCallback : LPTIM Base Msp Init Callback.
122 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
123 (+) CompareMatchCallback : Compare match Callback.
124 (+) AutoReloadMatchCallback : Auto-reload match Callback.
125 (+) TriggerCallback : External trigger event detection Callback.
126 (+) CompareWriteCallback : Compare register write complete Callback.
127 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
128 (+) DirectionUpCallback : Up-counting direction change Callback.
129 (+) DirectionDownCallback : Down-counting direction change Callback.
130
131 [..]
132 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
133 all interrupt callbacks are set to the corresponding weak functions:
134 examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback().
135
136 [..]
137 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
138 functionalities in the Init/DeInit only when these callbacks are null
139 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
140 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
141
142 [..]
143 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
144 Exception done MspInit/MspDeInit that can be registered/unregistered
145 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
146 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
147 In that case first register the MspInit/MspDeInit user callbacks
148 using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
149
150 [..]
151 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
152 not defined, the callback registration feature is not available and all callbacks
153 are set to the corresponding weak functions.
154
155 @endverbatim
156 ******************************************************************************
157 */
158
159 /* Includes ------------------------------------------------------------------*/
160 #include "stm32g4xx_hal.h"
161
162 /** @addtogroup STM32G4xx_HAL_Driver
163 * @{
164 */
165
166 /** @defgroup LPTIM LPTIM
167 * @brief LPTIM HAL module driver.
168 * @{
169 */
170
171 #ifdef HAL_LPTIM_MODULE_ENABLED
172
173
174
175 /* Private typedef -----------------------------------------------------------*/
176 /* Private define ------------------------------------------------------------*/
177 /** @addtogroup LPTIM_Private_Constants
178 * @{
179 */
180 #define TIMEOUT 1000UL /* Timeout is 1s */
181 /**
182 * @}
183 */
184
185 /* Private macro -------------------------------------------------------------*/
186 /* Private variables ---------------------------------------------------------*/
187 /* Private function prototypes -----------------------------------------------*/
188 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
189 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
190 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
191 static HAL_StatusTypeDef LPTIM_WaitForFlag(const LPTIM_HandleTypeDef *hlptim, uint32_t flag);
192
193 /* Exported functions --------------------------------------------------------*/
194
195 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
196 * @{
197 */
198
199 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
200 * @brief Initialization and Configuration functions.
201 *
202 @verbatim
203 ==============================================================================
204 ##### Initialization and de-initialization functions #####
205 ==============================================================================
206 [..] This section provides functions allowing to:
207 (+) Initialize the LPTIM according to the specified parameters in the
208 LPTIM_InitTypeDef and initialize the associated handle.
209 (+) DeInitialize the LPTIM peripheral.
210 (+) Initialize the LPTIM MSP.
211 (+) DeInitialize the LPTIM MSP.
212
213 @endverbatim
214 * @{
215 */
216
217 /**
218 * @brief Initialize the LPTIM according to the specified parameters in the
219 * LPTIM_InitTypeDef and initialize the associated handle.
220 * @param hlptim LPTIM handle
221 * @retval HAL status
222 */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)223 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
224 {
225 uint32_t tmpcfgr;
226
227 /* Check the LPTIM handle allocation */
228 if (hlptim == NULL)
229 {
230 return HAL_ERROR;
231 }
232
233 /* Check the parameters */
234 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
235
236 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
237 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
238 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
239 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
240 {
241 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
242 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
243 }
244 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
245 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
246 {
247 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
248 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
249 }
250 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
251 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
252 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
253
254 if (hlptim->State == HAL_LPTIM_STATE_RESET)
255 {
256 /* Allocate lock resource and initialize it */
257 hlptim->Lock = HAL_UNLOCKED;
258
259 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
260 /* Reset interrupt callbacks to legacy weak callbacks */
261 LPTIM_ResetCallback(hlptim);
262
263 if (hlptim->MspInitCallback == NULL)
264 {
265 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
266 }
267
268 /* Init the low level hardware : GPIO, CLOCK, NVIC */
269 hlptim->MspInitCallback(hlptim);
270 #else
271 /* Init the low level hardware : GPIO, CLOCK, NVIC */
272 HAL_LPTIM_MspInit(hlptim);
273 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
274 }
275
276 /* Change the LPTIM state */
277 hlptim->State = HAL_LPTIM_STATE_BUSY;
278
279 /* Get the LPTIMx CFGR value */
280 tmpcfgr = hlptim->Instance->CFGR;
281
282 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
283 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
284 {
285 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
286 }
287 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
288 {
289 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
290 }
291
292 /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
293 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
294 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
295
296 /* Set initialization parameters */
297 tmpcfgr |= (hlptim->Init.Clock.Source |
298 hlptim->Init.Clock.Prescaler |
299 hlptim->Init.OutputPolarity |
300 hlptim->Init.UpdateMode |
301 hlptim->Init.CounterSource);
302
303 /* Glitch filters for internal triggers and external inputs are configured
304 * only if an internal clock source is provided to the LPTIM
305 */
306 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
307 {
308 tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
309 hlptim->Init.UltraLowPowerClock.SampleTime);
310 }
311
312 /* Configure LPTIM external clock polarity and digital filter */
313 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
314 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
315 {
316 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
317 hlptim->Init.UltraLowPowerClock.SampleTime);
318 }
319
320 /* Configure LPTIM external trigger */
321 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
322 {
323 /* Enable External trigger and set the trigger source */
324 tmpcfgr |= (hlptim->Init.Trigger.Source |
325 hlptim->Init.Trigger.ActiveEdge |
326 hlptim->Init.Trigger.SampleTime);
327 }
328
329 /* Write to LPTIMx CFGR */
330 hlptim->Instance->CFGR = tmpcfgr;
331
332 /* Configure LPTIM input sources */
333 if (hlptim->Instance == LPTIM1)
334 {
335 /* Check LPTIM Input1 and Input2 sources */
336 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
337 assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
338
339 /* Configure LPTIM Input1 and Input2 sources */
340 hlptim->Instance->OR = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
341 }
342
343 /* Change the LPTIM state */
344 hlptim->State = HAL_LPTIM_STATE_READY;
345
346 /* Return function status */
347 return HAL_OK;
348 }
349
350 /**
351 * @brief DeInitialize the LPTIM peripheral.
352 * @param hlptim LPTIM handle
353 * @retval HAL status
354 */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)355 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
356 {
357 /* Check the LPTIM handle allocation */
358 if (hlptim == NULL)
359 {
360 return HAL_ERROR;
361 }
362
363 /* Change the LPTIM state */
364 hlptim->State = HAL_LPTIM_STATE_BUSY;
365
366 /* Disable the LPTIM Peripheral Clock */
367 __HAL_LPTIM_DISABLE(hlptim);
368
369 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
370 {
371 return HAL_TIMEOUT;
372 }
373
374 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
375 if (hlptim->MspDeInitCallback == NULL)
376 {
377 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
378 }
379
380 /* DeInit the low level hardware: CLOCK, NVIC.*/
381 hlptim->MspDeInitCallback(hlptim);
382 #else
383 /* DeInit the low level hardware: CLOCK, NVIC.*/
384 HAL_LPTIM_MspDeInit(hlptim);
385 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
386
387 /* Change the LPTIM state */
388 hlptim->State = HAL_LPTIM_STATE_RESET;
389
390 /* Release Lock */
391 __HAL_UNLOCK(hlptim);
392
393 /* Return function status */
394 return HAL_OK;
395 }
396
397 /**
398 * @brief Initialize the LPTIM MSP.
399 * @param hlptim LPTIM handle
400 * @retval None
401 */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)402 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
403 {
404 /* Prevent unused argument(s) compilation warning */
405 UNUSED(hlptim);
406
407 /* NOTE : This function should not be modified, when the callback is needed,
408 the HAL_LPTIM_MspInit could be implemented in the user file
409 */
410 }
411
412 /**
413 * @brief DeInitialize LPTIM MSP.
414 * @param hlptim LPTIM handle
415 * @retval None
416 */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)417 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
418 {
419 /* Prevent unused argument(s) compilation warning */
420 UNUSED(hlptim);
421
422 /* NOTE : This function should not be modified, when the callback is needed,
423 the HAL_LPTIM_MspDeInit could be implemented in the user file
424 */
425 }
426
427 /**
428 * @}
429 */
430
431 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
432 * @brief Start-Stop operation functions.
433 *
434 @verbatim
435 ==============================================================================
436 ##### LPTIM Start Stop operation functions #####
437 ==============================================================================
438 [..] This section provides functions allowing to:
439 (+) Start the PWM mode.
440 (+) Stop the PWM mode.
441 (+) Start the One pulse mode.
442 (+) Stop the One pulse mode.
443 (+) Start the Set once mode.
444 (+) Stop the Set once mode.
445 (+) Start the Encoder mode.
446 (+) Stop the Encoder mode.
447 (+) Start the Timeout mode.
448 (+) Stop the Timeout mode.
449 (+) Start the Counter mode.
450 (+) Stop the Counter mode.
451
452
453 @endverbatim
454 * @{
455 */
456
457 /**
458 * @brief Start the LPTIM PWM generation.
459 * @param hlptim LPTIM handle
460 * @param Period Specifies the Autoreload value.
461 * This parameter must be a value between 0x0001 and 0xFFFF.
462 * @param Pulse Specifies the compare value.
463 * This parameter must be a value between 0x0000 and 0xFFFF.
464 * @retval HAL status
465 */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)466 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
467 {
468 /* Check the parameters */
469 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
470 assert_param(IS_LPTIM_PERIOD(Period));
471 assert_param(IS_LPTIM_PULSE(Pulse));
472
473 /* Set the LPTIM state */
474 hlptim->State = HAL_LPTIM_STATE_BUSY;
475
476 /* Reset WAVE bit to set PWM mode */
477 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
478
479 /* Enable the Peripheral */
480 __HAL_LPTIM_ENABLE(hlptim);
481
482 /* Clear flag */
483 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
484
485 /* Load the period value in the autoreload register */
486 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
487
488 /* Wait for the completion of the write operation to the LPTIM_ARR register */
489 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
490 {
491 return HAL_TIMEOUT;
492 }
493
494 /* Clear flag */
495 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
496
497 /* Load the pulse value in the compare register */
498 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
499
500 /* Wait for the completion of the write operation to the LPTIM_CMP register */
501 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
502 {
503 return HAL_TIMEOUT;
504 }
505
506 /* Start timer in continuous mode */
507 __HAL_LPTIM_START_CONTINUOUS(hlptim);
508
509 /* Change the LPTIM state */
510 hlptim->State = HAL_LPTIM_STATE_READY;
511
512 /* Return function status */
513 return HAL_OK;
514 }
515
516 /**
517 * @brief Stop the LPTIM PWM generation.
518 * @param hlptim LPTIM handle
519 * @retval HAL status
520 */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)521 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
522 {
523 /* Check the parameters */
524 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
525
526 /* Change the LPTIM state */
527 hlptim->State = HAL_LPTIM_STATE_BUSY;
528
529 /* Disable the Peripheral */
530 __HAL_LPTIM_DISABLE(hlptim);
531
532 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
533 {
534 return HAL_TIMEOUT;
535 }
536
537 /* Change the LPTIM state */
538 hlptim->State = HAL_LPTIM_STATE_READY;
539
540 /* Return function status */
541 return HAL_OK;
542 }
543
544 /**
545 * @brief Start the LPTIM PWM generation in interrupt mode.
546 * @param hlptim LPTIM handle
547 * @param Period Specifies the Autoreload value.
548 * This parameter must be a value between 0x0001 and 0xFFFF
549 * @param Pulse Specifies the compare value.
550 * This parameter must be a value between 0x0000 and 0xFFFF
551 * @retval HAL status
552 */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)553 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
554 {
555 /* Check the parameters */
556 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
557 assert_param(IS_LPTIM_PERIOD(Period));
558 assert_param(IS_LPTIM_PULSE(Pulse));
559
560 /* Set the LPTIM state */
561 hlptim->State = HAL_LPTIM_STATE_BUSY;
562
563 /* Reset WAVE bit to set PWM mode */
564 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
565
566 /* Enable the Peripheral */
567 __HAL_LPTIM_ENABLE(hlptim);
568
569 /* Clear flag */
570 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
571
572 /* Load the period value in the autoreload register */
573 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
574
575 /* Wait for the completion of the write operation to the LPTIM_ARR register */
576 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
577 {
578 return HAL_TIMEOUT;
579 }
580
581 /* Clear flag */
582 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
583
584 /* Load the pulse value in the compare register */
585 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
586
587 /* Wait for the completion of the write operation to the LPTIM_CMP register */
588 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
589 {
590 return HAL_TIMEOUT;
591 }
592
593 /* Disable the Peripheral */
594 __HAL_LPTIM_DISABLE(hlptim);
595
596 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
597 {
598 return HAL_TIMEOUT;
599 }
600
601 /* Enable Autoreload write complete interrupt */
602 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
603
604 /* Enable Compare write complete interrupt */
605 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
606
607 /* Enable Autoreload match interrupt */
608 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
609
610 /* Enable Compare match interrupt */
611 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
612
613 /* If external trigger source is used, then enable external trigger interrupt */
614 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
615 {
616 /* Enable external trigger interrupt */
617 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
618 }
619
620 /* Enable the Peripheral */
621 __HAL_LPTIM_ENABLE(hlptim);
622
623 /* Start timer in continuous mode */
624 __HAL_LPTIM_START_CONTINUOUS(hlptim);
625
626 /* Change the LPTIM state */
627 hlptim->State = HAL_LPTIM_STATE_READY;
628
629 /* Return function status */
630 return HAL_OK;
631 }
632
633 /**
634 * @brief Stop the LPTIM PWM generation in interrupt mode.
635 * @param hlptim LPTIM handle
636 * @retval HAL status
637 */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)638 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
639 {
640 /* Check the parameters */
641 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
642
643 /* Change the LPTIM state */
644 hlptim->State = HAL_LPTIM_STATE_BUSY;
645
646 /* Disable the Peripheral */
647 __HAL_LPTIM_DISABLE(hlptim);
648
649 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
650 {
651 return HAL_TIMEOUT;
652 }
653
654 /* Disable Autoreload write complete interrupt */
655 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
656
657 /* Disable Compare write complete interrupt */
658 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
659
660 /* Disable Autoreload match interrupt */
661 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
662
663 /* Disable Compare match interrupt */
664 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
665
666 /* If external trigger source is used, then disable external trigger interrupt */
667 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
668 {
669 /* Disable external trigger interrupt */
670 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
671 }
672
673 /* Change the LPTIM state */
674 hlptim->State = HAL_LPTIM_STATE_READY;
675
676 /* Return function status */
677 return HAL_OK;
678 }
679
680 /**
681 * @brief Start the LPTIM One pulse generation.
682 * @param hlptim LPTIM handle
683 * @param Period Specifies the Autoreload value.
684 * This parameter must be a value between 0x0001 and 0xFFFF.
685 * @param Pulse Specifies the compare value.
686 * This parameter must be a value between 0x0000 and 0xFFFF.
687 * @retval HAL status
688 */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)689 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
690 {
691 /* Check the parameters */
692 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
693 assert_param(IS_LPTIM_PERIOD(Period));
694 assert_param(IS_LPTIM_PULSE(Pulse));
695
696 /* Set the LPTIM state */
697 hlptim->State = HAL_LPTIM_STATE_BUSY;
698
699 /* Reset WAVE bit to set one pulse mode */
700 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
701
702 /* Enable the Peripheral */
703 __HAL_LPTIM_ENABLE(hlptim);
704
705 /* Clear flag */
706 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
707
708 /* Load the period value in the autoreload register */
709 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
710
711 /* Wait for the completion of the write operation to the LPTIM_ARR register */
712 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
713 {
714 return HAL_TIMEOUT;
715 }
716
717 /* Clear flag */
718 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
719
720 /* Load the pulse value in the compare register */
721 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
722
723 /* Wait for the completion of the write operation to the LPTIM_CMP register */
724 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
725 {
726 return HAL_TIMEOUT;
727 }
728
729 /* Start timer in single (one shot) mode */
730 __HAL_LPTIM_START_SINGLE(hlptim);
731
732 /* Change the LPTIM state */
733 hlptim->State = HAL_LPTIM_STATE_READY;
734
735 /* Return function status */
736 return HAL_OK;
737 }
738
739 /**
740 * @brief Stop the LPTIM One pulse generation.
741 * @param hlptim LPTIM handle
742 * @retval HAL status
743 */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)744 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
745 {
746 /* Check the parameters */
747 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
748
749 /* Set the LPTIM state */
750 hlptim->State = HAL_LPTIM_STATE_BUSY;
751
752 /* Disable the Peripheral */
753 __HAL_LPTIM_DISABLE(hlptim);
754
755 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
756 {
757 return HAL_TIMEOUT;
758 }
759
760 /* Change the LPTIM state */
761 hlptim->State = HAL_LPTIM_STATE_READY;
762
763 /* Return function status */
764 return HAL_OK;
765 }
766
767 /**
768 * @brief Start the LPTIM One pulse generation in interrupt mode.
769 * @param hlptim LPTIM handle
770 * @param Period Specifies the Autoreload value.
771 * This parameter must be a value between 0x0001 and 0xFFFF.
772 * @param Pulse Specifies the compare value.
773 * This parameter must be a value between 0x0000 and 0xFFFF.
774 * @retval HAL status
775 */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)776 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
777 {
778 /* Check the parameters */
779 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
780 assert_param(IS_LPTIM_PERIOD(Period));
781 assert_param(IS_LPTIM_PULSE(Pulse));
782
783 /* Set the LPTIM state */
784 hlptim->State = HAL_LPTIM_STATE_BUSY;
785
786 /* Reset WAVE bit to set one pulse mode */
787 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
788
789 /* Enable the Peripheral */
790 __HAL_LPTIM_ENABLE(hlptim);
791
792 /* Clear flag */
793 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
794
795 /* Load the period value in the autoreload register */
796 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
797
798 /* Wait for the completion of the write operation to the LPTIM_ARR register */
799 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
800 {
801 return HAL_TIMEOUT;
802 }
803
804 /* Clear flag */
805 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
806
807 /* Load the pulse value in the compare register */
808 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
809
810 /* Wait for the completion of the write operation to the LPTIM_CMP register */
811 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
812 {
813 return HAL_TIMEOUT;
814 }
815
816 /* Disable the Peripheral */
817 __HAL_LPTIM_DISABLE(hlptim);
818
819 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
820 {
821 return HAL_TIMEOUT;
822 }
823
824 /* Enable Autoreload write complete interrupt */
825 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
826
827 /* Enable Compare write complete interrupt */
828 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
829
830 /* Enable Autoreload match interrupt */
831 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
832
833 /* Enable Compare match interrupt */
834 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
835
836 /* If external trigger source is used, then enable external trigger interrupt */
837 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
838 {
839 /* Enable external trigger interrupt */
840 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
841 }
842
843 /* Enable the Peripheral */
844 __HAL_LPTIM_ENABLE(hlptim);
845
846 /* Start timer in single (one shot) mode */
847 __HAL_LPTIM_START_SINGLE(hlptim);
848
849 /* Change the LPTIM state */
850 hlptim->State = HAL_LPTIM_STATE_READY;
851
852 /* Return function status */
853 return HAL_OK;
854 }
855
856 /**
857 * @brief Stop the LPTIM One pulse generation in interrupt mode.
858 * @param hlptim LPTIM handle
859 * @retval HAL status
860 */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)861 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
862 {
863 /* Check the parameters */
864 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
865
866 /* Set the LPTIM state */
867 hlptim->State = HAL_LPTIM_STATE_BUSY;
868
869
870 /* Disable the Peripheral */
871 __HAL_LPTIM_DISABLE(hlptim);
872
873 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
874 {
875 return HAL_TIMEOUT;
876 }
877
878 /* Disable Autoreload write complete interrupt */
879 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
880
881 /* Disable Compare write complete interrupt */
882 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
883
884 /* Disable Autoreload match interrupt */
885 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
886
887 /* Disable Compare match interrupt */
888 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
889
890 /* If external trigger source is used, then disable external trigger interrupt */
891 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
892 {
893 /* Disable external trigger interrupt */
894 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
895 }
896
897 /* Change the LPTIM state */
898 hlptim->State = HAL_LPTIM_STATE_READY;
899
900 /* Return function status */
901 return HAL_OK;
902 }
903
904 /**
905 * @brief Start the LPTIM in Set once mode.
906 * @param hlptim LPTIM handle
907 * @param Period Specifies the Autoreload value.
908 * This parameter must be a value between 0x0001 and 0xFFFF.
909 * @param Pulse Specifies the compare value.
910 * This parameter must be a value between 0x0000 and 0xFFFF.
911 * @retval HAL status
912 */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)913 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
914 {
915 /* Check the parameters */
916 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
917 assert_param(IS_LPTIM_PERIOD(Period));
918 assert_param(IS_LPTIM_PULSE(Pulse));
919
920 /* Set the LPTIM state */
921 hlptim->State = HAL_LPTIM_STATE_BUSY;
922
923 /* Set WAVE bit to enable the set once mode */
924 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
925
926 /* Enable the Peripheral */
927 __HAL_LPTIM_ENABLE(hlptim);
928
929 /* Clear flag */
930 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
931
932 /* Load the period value in the autoreload register */
933 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
934
935 /* Wait for the completion of the write operation to the LPTIM_ARR register */
936 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
937 {
938 return HAL_TIMEOUT;
939 }
940
941 /* Clear flag */
942 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
943
944 /* Load the pulse value in the compare register */
945 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
946
947 /* Wait for the completion of the write operation to the LPTIM_CMP register */
948 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
949 {
950 return HAL_TIMEOUT;
951 }
952
953 /* Start timer in single (one shot) mode */
954 __HAL_LPTIM_START_SINGLE(hlptim);
955
956 /* Change the LPTIM state */
957 hlptim->State = HAL_LPTIM_STATE_READY;
958
959 /* Return function status */
960 return HAL_OK;
961 }
962
963 /**
964 * @brief Stop the LPTIM Set once mode.
965 * @param hlptim LPTIM handle
966 * @retval HAL status
967 */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)968 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
969 {
970 /* Check the parameters */
971 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
972
973 /* Set the LPTIM state */
974 hlptim->State = HAL_LPTIM_STATE_BUSY;
975
976 /* Disable the Peripheral */
977 __HAL_LPTIM_DISABLE(hlptim);
978
979 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
980 {
981 return HAL_TIMEOUT;
982 }
983
984 /* Change the LPTIM state */
985 hlptim->State = HAL_LPTIM_STATE_READY;
986
987 /* Return function status */
988 return HAL_OK;
989 }
990
991 /**
992 * @brief Start the LPTIM Set once mode in interrupt mode.
993 * @param hlptim LPTIM handle
994 * @param Period Specifies the Autoreload value.
995 * This parameter must be a value between 0x0000 and 0xFFFF.
996 * @param Pulse Specifies the compare value.
997 * This parameter must be a value between 0x0000 and 0xFFFF.
998 * @retval HAL status
999 */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)1000 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1001 {
1002 /* Check the parameters */
1003 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1004 assert_param(IS_LPTIM_PERIOD(Period));
1005 assert_param(IS_LPTIM_PULSE(Pulse));
1006
1007 /* Set the LPTIM state */
1008 hlptim->State = HAL_LPTIM_STATE_BUSY;
1009
1010 /* Set WAVE bit to enable the set once mode */
1011 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1012
1013 /* Enable the Peripheral */
1014 __HAL_LPTIM_ENABLE(hlptim);
1015
1016 /* Clear flag */
1017 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1018
1019 /* Load the period value in the autoreload register */
1020 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1021
1022 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1023 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1024 {
1025 return HAL_TIMEOUT;
1026 }
1027
1028 /* Clear flag */
1029 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1030
1031 /* Load the pulse value in the compare register */
1032 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1033
1034 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1035 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1036 {
1037 return HAL_TIMEOUT;
1038 }
1039
1040 /* Disable the Peripheral */
1041 __HAL_LPTIM_DISABLE(hlptim);
1042
1043 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1044 {
1045 return HAL_TIMEOUT;
1046 }
1047
1048 /* Enable Autoreload write complete interrupt */
1049 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1050
1051 /* Enable Compare write complete interrupt */
1052 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1053
1054 /* Enable Autoreload match interrupt */
1055 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1056
1057 /* Enable Compare match interrupt */
1058 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1059
1060 /* If external trigger source is used, then enable external trigger interrupt */
1061 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1062 {
1063 /* Enable external trigger interrupt */
1064 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1065 }
1066
1067 /* Enable the Peripheral */
1068 __HAL_LPTIM_ENABLE(hlptim);
1069
1070 /* Start timer in single (one shot) mode */
1071 __HAL_LPTIM_START_SINGLE(hlptim);
1072
1073 /* Change the LPTIM state */
1074 hlptim->State = HAL_LPTIM_STATE_READY;
1075
1076 /* Return function status */
1077 return HAL_OK;
1078 }
1079
1080 /**
1081 * @brief Stop the LPTIM Set once mode in interrupt mode.
1082 * @param hlptim LPTIM handle
1083 * @retval HAL status
1084 */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1085 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1086 {
1087 /* Check the parameters */
1088 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1089
1090 /* Set the LPTIM state */
1091 hlptim->State = HAL_LPTIM_STATE_BUSY;
1092
1093 /* Disable the Peripheral */
1094 __HAL_LPTIM_DISABLE(hlptim);
1095
1096 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1097 {
1098 return HAL_TIMEOUT;
1099 }
1100
1101 /* Disable Autoreload write complete interrupt */
1102 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1103
1104 /* Disable Compare write complete interrupt */
1105 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1106
1107 /* Disable Autoreload match interrupt */
1108 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1109
1110 /* Disable Compare match interrupt */
1111 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1112
1113 /* If external trigger source is used, then disable external trigger interrupt */
1114 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1115 {
1116 /* Disable external trigger interrupt */
1117 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1118 }
1119
1120 /* Change the LPTIM state */
1121 hlptim->State = HAL_LPTIM_STATE_READY;
1122
1123 /* Return function status */
1124 return HAL_OK;
1125 }
1126
1127 /**
1128 * @brief Start the Encoder interface.
1129 * @param hlptim LPTIM handle
1130 * @param Period Specifies the Autoreload value.
1131 * This parameter must be a value between 0x0001 and 0xFFFF.
1132 * @retval HAL status
1133 */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1134 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1135 {
1136 uint32_t tmpcfgr;
1137
1138 /* Check the parameters */
1139 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1140 assert_param(IS_LPTIM_PERIOD(Period));
1141 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1142 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1143 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1144
1145 /* Set the LPTIM state */
1146 hlptim->State = HAL_LPTIM_STATE_BUSY;
1147
1148 /* Get the LPTIMx CFGR value */
1149 tmpcfgr = hlptim->Instance->CFGR;
1150
1151 /* Clear CKPOL bits */
1152 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1153
1154 /* Set Input polarity */
1155 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1156
1157 /* Write to LPTIMx CFGR */
1158 hlptim->Instance->CFGR = tmpcfgr;
1159
1160 /* Set ENC bit to enable the encoder interface */
1161 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1162
1163 /* Enable the Peripheral */
1164 __HAL_LPTIM_ENABLE(hlptim);
1165
1166 /* Clear flag */
1167 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1168
1169 /* Load the period value in the autoreload register */
1170 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1171
1172 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1173 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1174 {
1175 return HAL_TIMEOUT;
1176 }
1177
1178 /* Start timer in continuous mode */
1179 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1180
1181 /* Change the LPTIM state */
1182 hlptim->State = HAL_LPTIM_STATE_READY;
1183
1184 /* Return function status */
1185 return HAL_OK;
1186 }
1187
1188 /**
1189 * @brief Stop the Encoder interface.
1190 * @param hlptim LPTIM handle
1191 * @retval HAL status
1192 */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1193 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1194 {
1195 /* Check the parameters */
1196 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1197
1198 /* Set the LPTIM state */
1199 hlptim->State = HAL_LPTIM_STATE_BUSY;
1200
1201 /* Disable the Peripheral */
1202 __HAL_LPTIM_DISABLE(hlptim);
1203
1204 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1205 {
1206 return HAL_TIMEOUT;
1207 }
1208
1209 /* Reset ENC bit to disable the encoder interface */
1210 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1211
1212 /* Change the LPTIM state */
1213 hlptim->State = HAL_LPTIM_STATE_READY;
1214
1215 /* Return function status */
1216 return HAL_OK;
1217 }
1218
1219 /**
1220 * @brief Start the Encoder interface in interrupt mode.
1221 * @param hlptim LPTIM handle
1222 * @param Period Specifies the Autoreload value.
1223 * This parameter must be a value between 0x0000 and 0xFFFF.
1224 * @retval HAL status
1225 */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1226 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1227 {
1228 uint32_t tmpcfgr;
1229
1230 /* Check the parameters */
1231 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1232 assert_param(IS_LPTIM_PERIOD(Period));
1233 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1234 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1235 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1236
1237 /* Set the LPTIM state */
1238 hlptim->State = HAL_LPTIM_STATE_BUSY;
1239
1240 /* Configure edge sensitivity for encoder mode */
1241 /* Get the LPTIMx CFGR value */
1242 tmpcfgr = hlptim->Instance->CFGR;
1243
1244 /* Clear CKPOL bits */
1245 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1246
1247 /* Set Input polarity */
1248 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1249
1250 /* Write to LPTIMx CFGR */
1251 hlptim->Instance->CFGR = tmpcfgr;
1252
1253 /* Set ENC bit to enable the encoder interface */
1254 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1255
1256 /* Enable the Peripheral */
1257 __HAL_LPTIM_ENABLE(hlptim);
1258
1259 /* Clear flag */
1260 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1261
1262 /* Load the period value in the autoreload register */
1263 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1264
1265 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1266 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1267 {
1268 return HAL_TIMEOUT;
1269 }
1270
1271 /* Disable the Peripheral */
1272 __HAL_LPTIM_DISABLE(hlptim);
1273
1274 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1275 {
1276 return HAL_TIMEOUT;
1277 }
1278
1279 /* Enable "switch to down direction" interrupt */
1280 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1281
1282 /* Enable "switch to up direction" interrupt */
1283 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1284
1285 /* Enable the Peripheral */
1286 __HAL_LPTIM_ENABLE(hlptim);
1287
1288 /* Start timer in continuous mode */
1289 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1290
1291 /* Change the LPTIM state */
1292 hlptim->State = HAL_LPTIM_STATE_READY;
1293
1294 /* Return function status */
1295 return HAL_OK;
1296 }
1297
1298 /**
1299 * @brief Stop the Encoder interface in interrupt mode.
1300 * @param hlptim LPTIM handle
1301 * @retval HAL status
1302 */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1303 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1304 {
1305 /* Check the parameters */
1306 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1307
1308 /* Set the LPTIM state */
1309 hlptim->State = HAL_LPTIM_STATE_BUSY;
1310
1311 /* Disable the Peripheral */
1312 __HAL_LPTIM_DISABLE(hlptim);
1313
1314 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1315 {
1316 return HAL_TIMEOUT;
1317 }
1318
1319 /* Reset ENC bit to disable the encoder interface */
1320 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1321
1322 /* Disable "switch to down direction" interrupt */
1323 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1324
1325 /* Disable "switch to up direction" interrupt */
1326 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1327
1328 /* Change the LPTIM state */
1329 hlptim->State = HAL_LPTIM_STATE_READY;
1330
1331 /* Return function status */
1332 return HAL_OK;
1333 }
1334
1335 /**
1336 * @brief Start the Timeout function.
1337 * @note The first trigger event will start the timer, any successive
1338 * trigger event will reset the counter and the timer restarts.
1339 * @param hlptim LPTIM handle
1340 * @param Period Specifies the Autoreload value.
1341 * This parameter must be a value between 0x0001 and 0xFFFF.
1342 * @param Timeout Specifies the TimeOut value to reset the counter.
1343 * This parameter must be a value between 0x0000 and 0xFFFF.
1344 * @retval HAL status
1345 */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1346 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1347 {
1348 /* Check the parameters */
1349 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1350 assert_param(IS_LPTIM_PERIOD(Period));
1351 assert_param(IS_LPTIM_PULSE(Timeout));
1352
1353 /* Set the LPTIM state */
1354 hlptim->State = HAL_LPTIM_STATE_BUSY;
1355
1356 /* Set TIMOUT bit to enable the timeout function */
1357 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1358
1359 /* Enable the Peripheral */
1360 __HAL_LPTIM_ENABLE(hlptim);
1361
1362 /* Clear flag */
1363 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1364
1365 /* Load the period value in the autoreload register */
1366 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1367
1368 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1369 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1370 {
1371 return HAL_TIMEOUT;
1372 }
1373
1374 /* Clear flag */
1375 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1376
1377 /* Load the Timeout value in the compare register */
1378 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1379
1380 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1381 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1382 {
1383 return HAL_TIMEOUT;
1384 }
1385
1386 /* Start timer in continuous mode */
1387 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1388
1389 /* Change the LPTIM state */
1390 hlptim->State = HAL_LPTIM_STATE_READY;
1391
1392 /* Return function status */
1393 return HAL_OK;
1394 }
1395
1396 /**
1397 * @brief Stop the Timeout function.
1398 * @param hlptim LPTIM handle
1399 * @retval HAL status
1400 */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1401 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1402 {
1403 /* Check the parameters */
1404 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1405
1406 /* Set the LPTIM state */
1407 hlptim->State = HAL_LPTIM_STATE_BUSY;
1408
1409 /* Disable the Peripheral */
1410 __HAL_LPTIM_DISABLE(hlptim);
1411
1412 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1413 {
1414 return HAL_TIMEOUT;
1415 }
1416
1417 /* Reset TIMOUT bit to enable the timeout function */
1418 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1419
1420 /* Change the LPTIM state */
1421 hlptim->State = HAL_LPTIM_STATE_READY;
1422
1423 /* Return function status */
1424 return HAL_OK;
1425 }
1426
1427 /**
1428 * @brief Start the Timeout function in interrupt mode.
1429 * @note The first trigger event will start the timer, any successive
1430 * trigger event will reset the counter and the timer restarts.
1431 * @param hlptim LPTIM handle
1432 * @param Period Specifies the Autoreload value.
1433 * This parameter must be a value between 0x0001 and 0xFFFF.
1434 * @param Timeout Specifies the TimeOut value to reset the counter.
1435 * This parameter must be a value between 0x0000 and 0xFFFF.
1436 * @retval HAL status
1437 */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1438 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1439 {
1440 /* Check the parameters */
1441 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1442 assert_param(IS_LPTIM_PERIOD(Period));
1443 assert_param(IS_LPTIM_PULSE(Timeout));
1444
1445 /* Set the LPTIM state */
1446 hlptim->State = HAL_LPTIM_STATE_BUSY;
1447
1448 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1449 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1450
1451 /* Set TIMOUT bit to enable the timeout function */
1452 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1453
1454 /* Enable the Peripheral */
1455 __HAL_LPTIM_ENABLE(hlptim);
1456
1457 /* Clear flag */
1458 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1459
1460 /* Load the period value in the autoreload register */
1461 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1462
1463 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1464 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1465 {
1466 return HAL_TIMEOUT;
1467 }
1468
1469 /* Clear flag */
1470 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1471
1472 /* Load the Timeout value in the compare register */
1473 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1474
1475 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1476 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1477 {
1478 return HAL_TIMEOUT;
1479 }
1480
1481 /* Disable the Peripheral */
1482 __HAL_LPTIM_DISABLE(hlptim);
1483
1484 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1485 {
1486 return HAL_TIMEOUT;
1487 }
1488
1489 /* Enable Compare match interrupt */
1490 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1491
1492 /* Enable the Peripheral */
1493 __HAL_LPTIM_ENABLE(hlptim);
1494
1495 /* Start timer in continuous mode */
1496 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1497
1498 /* Change the LPTIM state */
1499 hlptim->State = HAL_LPTIM_STATE_READY;
1500
1501 /* Return function status */
1502 return HAL_OK;
1503 }
1504
1505 /**
1506 * @brief Stop the Timeout function in interrupt mode.
1507 * @param hlptim LPTIM handle
1508 * @retval HAL status
1509 */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1510 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1511 {
1512 /* Check the parameters */
1513 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1514
1515
1516 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1517 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1518
1519 /* Set the LPTIM state */
1520 hlptim->State = HAL_LPTIM_STATE_BUSY;
1521
1522 /* Disable the Peripheral */
1523 __HAL_LPTIM_DISABLE(hlptim);
1524
1525 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1526 {
1527 return HAL_TIMEOUT;
1528 }
1529
1530 /* Reset TIMOUT bit to enable the timeout function */
1531 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1532
1533 /* Disable Compare match interrupt */
1534 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1535
1536 /* Change the LPTIM state */
1537 hlptim->State = HAL_LPTIM_STATE_READY;
1538
1539 /* Return function status */
1540 return HAL_OK;
1541 }
1542
1543 /**
1544 * @brief Start the Counter mode.
1545 * @param hlptim LPTIM handle
1546 * @param Period Specifies the Autoreload value.
1547 * This parameter must be a value between 0x0001 and 0xFFFF.
1548 * @retval HAL status
1549 */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1550 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1551 {
1552 /* Check the parameters */
1553 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1554 assert_param(IS_LPTIM_PERIOD(Period));
1555
1556 /* Set the LPTIM state */
1557 hlptim->State = HAL_LPTIM_STATE_BUSY;
1558
1559 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1560 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1561 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1562 {
1563 /* Check if clock is prescaled */
1564 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1565 /* Set clock prescaler to 0 */
1566 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1567 }
1568
1569 /* Enable the Peripheral */
1570 __HAL_LPTIM_ENABLE(hlptim);
1571
1572 /* Clear flag */
1573 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1574
1575 /* Load the period value in the autoreload register */
1576 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1577
1578 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1579 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1580 {
1581 return HAL_TIMEOUT;
1582 }
1583
1584 /* Start timer in continuous mode */
1585 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1586
1587 /* Change the LPTIM state */
1588 hlptim->State = HAL_LPTIM_STATE_READY;
1589
1590 /* Return function status */
1591 return HAL_OK;
1592 }
1593
1594 /**
1595 * @brief Stop the Counter mode.
1596 * @param hlptim LPTIM handle
1597 * @retval HAL status
1598 */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1599 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1600 {
1601 /* Check the parameters */
1602 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1603
1604 /* Set the LPTIM state */
1605 hlptim->State = HAL_LPTIM_STATE_BUSY;
1606
1607 /* Disable the Peripheral */
1608 __HAL_LPTIM_DISABLE(hlptim);
1609
1610 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1611 {
1612 return HAL_TIMEOUT;
1613 }
1614
1615 /* Change the LPTIM state */
1616 hlptim->State = HAL_LPTIM_STATE_READY;
1617
1618 /* Return function status */
1619 return HAL_OK;
1620 }
1621
1622 /**
1623 * @brief Start the Counter mode in interrupt mode.
1624 * @param hlptim LPTIM handle
1625 * @param Period Specifies the Autoreload value.
1626 * This parameter must be a value between 0x0001 and 0xFFFF.
1627 * @retval HAL status
1628 */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1629 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1630 {
1631 /* Check the parameters */
1632 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1633 assert_param(IS_LPTIM_PERIOD(Period));
1634
1635 /* Set the LPTIM state */
1636 hlptim->State = HAL_LPTIM_STATE_BUSY;
1637
1638 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1639 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1640
1641 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1642 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1643 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1644 {
1645 /* Check if clock is prescaled */
1646 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1647 /* Set clock prescaler to 0 */
1648 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1649 }
1650
1651 /* Enable the Peripheral */
1652 __HAL_LPTIM_ENABLE(hlptim);
1653
1654 /* Clear flag */
1655 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1656
1657 /* Load the period value in the autoreload register */
1658 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1659
1660 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1661 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1662 {
1663 return HAL_TIMEOUT;
1664 }
1665
1666 /* Disable the Peripheral */
1667 __HAL_LPTIM_DISABLE(hlptim);
1668
1669 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1670 {
1671 return HAL_TIMEOUT;
1672 }
1673
1674 /* Enable Autoreload write complete interrupt */
1675 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1676
1677 /* Enable Autoreload match interrupt */
1678 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1679
1680 /* Enable the Peripheral */
1681 __HAL_LPTIM_ENABLE(hlptim);
1682
1683 /* Start timer in continuous mode */
1684 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1685
1686 /* Change the LPTIM state */
1687 hlptim->State = HAL_LPTIM_STATE_READY;
1688
1689 /* Return function status */
1690 return HAL_OK;
1691 }
1692
1693 /**
1694 * @brief Stop the Counter mode in interrupt mode.
1695 * @param hlptim LPTIM handle
1696 * @retval HAL status
1697 */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1698 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1699 {
1700 /* Check the parameters */
1701 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1702
1703
1704 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1705 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1706
1707 /* Set the LPTIM state */
1708 hlptim->State = HAL_LPTIM_STATE_BUSY;
1709
1710 /* Disable the Peripheral */
1711 __HAL_LPTIM_DISABLE(hlptim);
1712
1713 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1714 {
1715 return HAL_TIMEOUT;
1716 }
1717
1718 /* Disable Autoreload write complete interrupt */
1719 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1720
1721 /* Disable Autoreload match interrupt */
1722 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1723 /* Change the LPTIM state */
1724 hlptim->State = HAL_LPTIM_STATE_READY;
1725
1726 /* Return function status */
1727 return HAL_OK;
1728 }
1729
1730 /**
1731 * @}
1732 */
1733
1734 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1735 * @brief Read operation functions.
1736 *
1737 @verbatim
1738 ==============================================================================
1739 ##### LPTIM Read operation functions #####
1740 ==============================================================================
1741 [..] This section provides LPTIM Reading functions.
1742 (+) Read the counter value.
1743 (+) Read the period (Auto-reload) value.
1744 (+) Read the pulse (Compare)value.
1745 @endverbatim
1746 * @{
1747 */
1748
1749 /**
1750 * @brief Return the current counter value.
1751 * @param hlptim LPTIM handle
1752 * @retval Counter value.
1753 */
HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef * hlptim)1754 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim)
1755 {
1756 /* Check the parameters */
1757 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1758
1759 return (hlptim->Instance->CNT);
1760 }
1761
1762 /**
1763 * @brief Return the current Autoreload (Period) value.
1764 * @param hlptim LPTIM handle
1765 * @retval Autoreload value.
1766 */
HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef * hlptim)1767 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim)
1768 {
1769 /* Check the parameters */
1770 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1771
1772 return (hlptim->Instance->ARR);
1773 }
1774
1775 /**
1776 * @brief Return the current Compare (Pulse) value.
1777 * @param hlptim LPTIM handle
1778 * @retval Compare value.
1779 */
HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef * hlptim)1780 uint32_t HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef *hlptim)
1781 {
1782 /* Check the parameters */
1783 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1784
1785 return (hlptim->Instance->CMP);
1786 }
1787
1788 /**
1789 * @}
1790 */
1791
1792 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1793 * @brief LPTIM IRQ handler.
1794 *
1795 @verbatim
1796 ==============================================================================
1797 ##### LPTIM IRQ handler and callbacks #####
1798 ==============================================================================
1799 [..] This section provides LPTIM IRQ handler and callback functions called within
1800 the IRQ handler:
1801 (+) LPTIM interrupt request handler
1802 (+) Compare match Callback
1803 (+) Auto-reload match Callback
1804 (+) External trigger event detection Callback
1805 (+) Compare register write complete Callback
1806 (+) Auto-reload register write complete Callback
1807 (+) Up-counting direction change Callback
1808 (+) Down-counting direction change Callback
1809
1810 @endverbatim
1811 * @{
1812 */
1813
1814 /**
1815 * @brief Handle LPTIM interrupt request.
1816 * @param hlptim LPTIM handle
1817 * @retval None
1818 */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1819 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1820 {
1821 /* Compare match interrupt */
1822 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1823 {
1824 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1825 {
1826 /* Clear Compare match flag */
1827 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1828
1829 /* Compare match Callback */
1830 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1831 hlptim->CompareMatchCallback(hlptim);
1832 #else
1833 HAL_LPTIM_CompareMatchCallback(hlptim);
1834 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1835 }
1836 }
1837
1838 /* Autoreload match interrupt */
1839 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1840 {
1841 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1842 {
1843 /* Clear Autoreload match flag */
1844 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1845
1846 /* Autoreload match Callback */
1847 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1848 hlptim->AutoReloadMatchCallback(hlptim);
1849 #else
1850 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1851 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1852 }
1853 }
1854
1855 /* Trigger detected interrupt */
1856 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1857 {
1858 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1859 {
1860 /* Clear Trigger detected flag */
1861 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1862
1863 /* Trigger detected callback */
1864 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1865 hlptim->TriggerCallback(hlptim);
1866 #else
1867 HAL_LPTIM_TriggerCallback(hlptim);
1868 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1869 }
1870 }
1871
1872 /* Compare write interrupt */
1873 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1874 {
1875 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1876 {
1877 /* Clear Compare write flag */
1878 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1879
1880 /* Compare write Callback */
1881 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1882 hlptim->CompareWriteCallback(hlptim);
1883 #else
1884 HAL_LPTIM_CompareWriteCallback(hlptim);
1885 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1886 }
1887 }
1888
1889 /* Autoreload write interrupt */
1890 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1891 {
1892 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1893 {
1894 /* Clear Autoreload write flag */
1895 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1896
1897 /* Autoreload write Callback */
1898 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1899 hlptim->AutoReloadWriteCallback(hlptim);
1900 #else
1901 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1902 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1903 }
1904 }
1905
1906 /* Direction counter changed from Down to Up interrupt */
1907 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1908 {
1909 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1910 {
1911 /* Clear Direction counter changed from Down to Up flag */
1912 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1913
1914 /* Direction counter changed from Down to Up Callback */
1915 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1916 hlptim->DirectionUpCallback(hlptim);
1917 #else
1918 HAL_LPTIM_DirectionUpCallback(hlptim);
1919 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1920 }
1921 }
1922
1923 /* Direction counter changed from Up to Down interrupt */
1924 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
1925 {
1926 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
1927 {
1928 /* Clear Direction counter changed from Up to Down flag */
1929 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
1930
1931 /* Direction counter changed from Up to Down Callback */
1932 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1933 hlptim->DirectionDownCallback(hlptim);
1934 #else
1935 HAL_LPTIM_DirectionDownCallback(hlptim);
1936 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1937 }
1938 }
1939 }
1940
1941 /**
1942 * @brief Compare match callback in non-blocking mode.
1943 * @param hlptim LPTIM handle
1944 * @retval None
1945 */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)1946 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
1947 {
1948 /* Prevent unused argument(s) compilation warning */
1949 UNUSED(hlptim);
1950
1951 /* NOTE : This function should not be modified, when the callback is needed,
1952 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1953 */
1954 }
1955
1956 /**
1957 * @brief Autoreload match callback in non-blocking mode.
1958 * @param hlptim LPTIM handle
1959 * @retval None
1960 */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)1961 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
1962 {
1963 /* Prevent unused argument(s) compilation warning */
1964 UNUSED(hlptim);
1965
1966 /* NOTE : This function should not be modified, when the callback is needed,
1967 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
1968 */
1969 }
1970
1971 /**
1972 * @brief Trigger detected callback in non-blocking mode.
1973 * @param hlptim LPTIM handle
1974 * @retval None
1975 */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)1976 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
1977 {
1978 /* Prevent unused argument(s) compilation warning */
1979 UNUSED(hlptim);
1980
1981 /* NOTE : This function should not be modified, when the callback is needed,
1982 the HAL_LPTIM_TriggerCallback could be implemented in the user file
1983 */
1984 }
1985
1986 /**
1987 * @brief Compare write callback in non-blocking mode.
1988 * @param hlptim LPTIM handle
1989 * @retval None
1990 */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)1991 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
1992 {
1993 /* Prevent unused argument(s) compilation warning */
1994 UNUSED(hlptim);
1995
1996 /* NOTE : This function should not be modified, when the callback is needed,
1997 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
1998 */
1999 }
2000
2001 /**
2002 * @brief Autoreload write callback in non-blocking mode.
2003 * @param hlptim LPTIM handle
2004 * @retval None
2005 */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)2006 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2007 {
2008 /* Prevent unused argument(s) compilation warning */
2009 UNUSED(hlptim);
2010
2011 /* NOTE : This function should not be modified, when the callback is needed,
2012 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2013 */
2014 }
2015
2016 /**
2017 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2018 * @param hlptim LPTIM handle
2019 * @retval None
2020 */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2021 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2022 {
2023 /* Prevent unused argument(s) compilation warning */
2024 UNUSED(hlptim);
2025
2026 /* NOTE : This function should not be modified, when the callback is needed,
2027 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2028 */
2029 }
2030
2031 /**
2032 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2033 * @param hlptim LPTIM handle
2034 * @retval None
2035 */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2036 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2037 {
2038 /* Prevent unused argument(s) compilation warning */
2039 UNUSED(hlptim);
2040
2041 /* NOTE : This function should not be modified, when the callback is needed,
2042 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2043 */
2044 }
2045
2046 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2047 /**
2048 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2049 * @param hlptim LPTIM handle
2050 * @param CallbackID ID of the callback to be registered
2051 * This parameter can be one of the following values:
2052 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2053 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2054 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2055 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2056 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2057 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2058 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2059 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2060 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2061 * @param pCallback pointer to the callback function
2062 * @retval status
2063 */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2064 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2065 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2066 pLPTIM_CallbackTypeDef pCallback)
2067 {
2068 HAL_StatusTypeDef status = HAL_OK;
2069
2070 if (pCallback == NULL)
2071 {
2072 return HAL_ERROR;
2073 }
2074
2075 if (hlptim->State == HAL_LPTIM_STATE_READY)
2076 {
2077 switch (CallbackID)
2078 {
2079 case HAL_LPTIM_MSPINIT_CB_ID :
2080 hlptim->MspInitCallback = pCallback;
2081 break;
2082
2083 case HAL_LPTIM_MSPDEINIT_CB_ID :
2084 hlptim->MspDeInitCallback = pCallback;
2085 break;
2086
2087 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2088 hlptim->CompareMatchCallback = pCallback;
2089 break;
2090
2091 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2092 hlptim->AutoReloadMatchCallback = pCallback;
2093 break;
2094
2095 case HAL_LPTIM_TRIGGER_CB_ID :
2096 hlptim->TriggerCallback = pCallback;
2097 break;
2098
2099 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2100 hlptim->CompareWriteCallback = pCallback;
2101 break;
2102
2103 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2104 hlptim->AutoReloadWriteCallback = pCallback;
2105 break;
2106
2107 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2108 hlptim->DirectionUpCallback = pCallback;
2109 break;
2110
2111 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2112 hlptim->DirectionDownCallback = pCallback;
2113 break;
2114
2115 default :
2116 /* Return error status */
2117 status = HAL_ERROR;
2118 break;
2119 }
2120 }
2121 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2122 {
2123 switch (CallbackID)
2124 {
2125 case HAL_LPTIM_MSPINIT_CB_ID :
2126 hlptim->MspInitCallback = pCallback;
2127 break;
2128
2129 case HAL_LPTIM_MSPDEINIT_CB_ID :
2130 hlptim->MspDeInitCallback = pCallback;
2131 break;
2132
2133 default :
2134 /* Return error status */
2135 status = HAL_ERROR;
2136 break;
2137 }
2138 }
2139 else
2140 {
2141 /* Return error status */
2142 status = HAL_ERROR;
2143 }
2144
2145 return status;
2146 }
2147
2148 /**
2149 * @brief Unregister a LPTIM callback
2150 * LLPTIM callback is redirected to the weak predefined callback
2151 * @param hlptim LPTIM handle
2152 * @param CallbackID ID of the callback to be unregistered
2153 * This parameter can be one of the following values:
2154 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2155 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2156 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2157 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2158 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2159 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2160 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2161 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2162 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2163 * @retval status
2164 */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2165 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2166 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2167 {
2168 HAL_StatusTypeDef status = HAL_OK;
2169
2170 if (hlptim->State == HAL_LPTIM_STATE_READY)
2171 {
2172 switch (CallbackID)
2173 {
2174 case HAL_LPTIM_MSPINIT_CB_ID :
2175 /* Legacy weak MspInit Callback */
2176 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2177 break;
2178
2179 case HAL_LPTIM_MSPDEINIT_CB_ID :
2180 /* Legacy weak Msp DeInit Callback */
2181 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2182 break;
2183
2184 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2185 /* Legacy weak Compare match Callback */
2186 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2187 break;
2188
2189 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2190 /* Legacy weak Auto-reload match Callback */
2191 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2192 break;
2193
2194 case HAL_LPTIM_TRIGGER_CB_ID :
2195 /* Legacy weak External trigger event detection Callback */
2196 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2197 break;
2198
2199 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2200 /* Legacy weak Compare register write complete Callback */
2201 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2202 break;
2203
2204 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2205 /* Legacy weak Auto-reload register write complete Callback */
2206 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2207 break;
2208
2209 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2210 /* Legacy weak Up-counting direction change Callback */
2211 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2212 break;
2213
2214 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2215 /* Legacy weak Down-counting direction change Callback */
2216 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2217 break;
2218
2219 default :
2220 /* Return error status */
2221 status = HAL_ERROR;
2222 break;
2223 }
2224 }
2225 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2226 {
2227 switch (CallbackID)
2228 {
2229 case HAL_LPTIM_MSPINIT_CB_ID :
2230 /* Legacy weak MspInit Callback */
2231 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2232 break;
2233
2234 case HAL_LPTIM_MSPDEINIT_CB_ID :
2235 /* Legacy weak Msp DeInit Callback */
2236 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2237 break;
2238
2239 default :
2240 /* Return error status */
2241 status = HAL_ERROR;
2242 break;
2243 }
2244 }
2245 else
2246 {
2247 /* Return error status */
2248 status = HAL_ERROR;
2249 }
2250
2251 return status;
2252 }
2253 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2254
2255 /**
2256 * @}
2257 */
2258
2259 /** @defgroup LPTIM_Group5 Peripheral State functions
2260 * @brief Peripheral State functions.
2261 *
2262 @verbatim
2263 ==============================================================================
2264 ##### Peripheral State functions #####
2265 ==============================================================================
2266 [..]
2267 This subsection permits to get in run-time the status of the peripheral.
2268
2269 @endverbatim
2270 * @{
2271 */
2272
2273 /**
2274 * @brief Return the LPTIM handle state.
2275 * @param hlptim LPTIM handle
2276 * @retval HAL state
2277 */
HAL_LPTIM_GetState(const LPTIM_HandleTypeDef * hlptim)2278 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(const LPTIM_HandleTypeDef *hlptim)
2279 {
2280 /* Return LPTIM handle state */
2281 return hlptim->State;
2282 }
2283
2284 /**
2285 * @}
2286 */
2287
2288
2289 /**
2290 * @}
2291 */
2292
2293 /* Private functions ---------------------------------------------------------*/
2294
2295 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2296 * @{
2297 */
2298 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2299 /**
2300 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2301 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2302 * the configuration information for LPTIM module.
2303 * @retval None
2304 */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2305 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2306 {
2307 /* Reset the LPTIM callback to the legacy weak callbacks */
2308 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2309 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2310 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2311 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2312 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2313 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2314 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2315 }
2316 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2317
2318 /**
2319 * @brief LPTimer Wait for flag set
2320 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2321 * the configuration information for LPTIM module.
2322 * @param flag The lptim flag
2323 * @retval HAL status
2324 */
LPTIM_WaitForFlag(const LPTIM_HandleTypeDef * hlptim,uint32_t flag)2325 static HAL_StatusTypeDef LPTIM_WaitForFlag(const LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2326 {
2327 HAL_StatusTypeDef result = HAL_OK;
2328 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2329 do
2330 {
2331 count--;
2332 if (count == 0UL)
2333 {
2334 result = HAL_TIMEOUT;
2335 }
2336 } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2337
2338 return result;
2339 }
2340
2341 /**
2342 * @brief Disable LPTIM HW instance.
2343 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2344 * the configuration information for LPTIM module.
2345 * @note The following sequence is required to solve LPTIM disable HW limitation.
2346 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2347 * stuck in LPTIM interrupt when entering Stop mode" section.
2348 * @retval None
2349 */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2350 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2351 {
2352 uint32_t tmpclksource = 0;
2353 uint32_t tmpIER;
2354 uint32_t tmpCFGR;
2355 uint32_t tmpCMP;
2356 uint32_t tmpARR;
2357 uint32_t primask_bit;
2358 uint32_t tmpOR;
2359
2360 /* Enter critical section */
2361 primask_bit = __get_PRIMASK();
2362 __set_PRIMASK(1) ;
2363
2364 /*********** Save LPTIM Config ***********/
2365 /* Save LPTIM source clock */
2366 switch ((uint32_t)hlptim->Instance)
2367 {
2368 case LPTIM1_BASE:
2369 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2370 break;
2371 default:
2372 break;
2373 }
2374
2375 /* Save LPTIM configuration registers */
2376 tmpIER = hlptim->Instance->IER;
2377 tmpCFGR = hlptim->Instance->CFGR;
2378 tmpCMP = hlptim->Instance->CMP;
2379 tmpARR = hlptim->Instance->ARR;
2380 tmpOR = hlptim->Instance->OR;
2381
2382 /*********** Reset LPTIM ***********/
2383 switch ((uint32_t)hlptim->Instance)
2384 {
2385 case LPTIM1_BASE:
2386 __HAL_RCC_LPTIM1_FORCE_RESET();
2387 __HAL_RCC_LPTIM1_RELEASE_RESET();
2388 break;
2389 default:
2390 break;
2391 }
2392
2393 /*********** Restore LPTIM Config ***********/
2394 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2395 {
2396 /* Force LPTIM source kernel clock from APB */
2397 switch ((uint32_t)hlptim->Instance)
2398 {
2399 case LPTIM1_BASE:
2400 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2401 break;
2402 default:
2403 break;
2404 }
2405
2406 if (tmpCMP != 0UL)
2407 {
2408 /* Restore CMP register (LPTIM should be enabled first) */
2409 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2410 hlptim->Instance->CMP = tmpCMP;
2411
2412 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2413 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2414 {
2415 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2416 }
2417 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2418 }
2419
2420 if (tmpARR != 0UL)
2421 {
2422 /* Restore ARR register (LPTIM should be enabled first) */
2423 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2424 hlptim->Instance->ARR = tmpARR;
2425
2426 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2427 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2428 {
2429 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2430 }
2431
2432 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2433 }
2434
2435 /* Restore LPTIM source kernel clock */
2436 switch ((uint32_t)hlptim->Instance)
2437 {
2438 case LPTIM1_BASE:
2439 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2440 break;
2441 default:
2442 break;
2443 }
2444 }
2445
2446 /* Restore configuration registers (LPTIM should be disabled first) */
2447 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2448 hlptim->Instance->IER = tmpIER;
2449 hlptim->Instance->CFGR = tmpCFGR;
2450 hlptim->Instance->OR = tmpOR;
2451
2452 /* Exit critical section: restore previous priority mask */
2453 __set_PRIMASK(primask_bit);
2454 }
2455 /**
2456 * @}
2457 */
2458
2459
2460 #endif /* HAL_LPTIM_MODULE_ENABLED */
2461 /**
2462 * @}
2463 */
2464
2465 /**
2466 * @}
2467 */
2468
