1 /**
2 ******************************************************************************
3 * @file stm32g4xx_hal_dac.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 * + Peripheral State and Errors functions
12 *
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2019 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### DAC Peripheral features #####
28 ==============================================================================
29 [..]
30 *** DAC Channels ***
31 ====================
32 [..]
33 STM32G4 devices integrate up to seven 12-bit Digital Analog Converters,
34 up to six of them grouped by pair forming a DAC instance.
35
36 The 2 converters of an single instance (i.e. channel1 & channel2)
37 can be used independently or simultaneously (dual mode):
38 (#) DAC channel1 with DAC_OUT1 as output (not for all) or connected to on-chip
39 peripherals (ex. comparators, operational amplifier).
40 (#) DAC channel2 with DAC_OUT2 as output (not for all) or connected to on-chip
41 peripherals (ex. comparators, operational amplifier).
42 Note: when an instance only includes one converter, only independent mode is
43 supported by this converter.
44
45 STM32G4 instances & converters availability and output PIO mapping (DAC_OUTx):
46 ----------------------------------------------------------------------------
47 | DAC1 | DAC2 | DAC3 | DAC4 |
48 ----------------------------------------------------------------------------
49 Channel 1 | | YES | YES | YES | YES
50 | DAC_OUT1 | PA4 | PA6 | - | -
51 ----------------------------------------------------------------------------
52 Channel 2 | | YES | NO | YES | YES
53 | DAC_OUT2 | PA5 | - | - | -
54 ----------------------------------------------------------------------------
55 Note: On this STM32 series, all devices do not include each DAC instances listed
56 above. Refer to device datasheet for DACx instance availability.
57
58 *** DAC Triggers ***
59 ====================
60 [..]
61 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
62 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
63 [..]
64 Digital to Analog conversion can be triggered by:
65 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
66 The used pin (GPIOx_PIN_9) must be configured in input mode.
67
68 (#) Timers TRGO: TIM1, TIM2, TIM3, TIM4, TIM6, TIM7, TIM8 and TIM15
69 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...)
70
71 (#) Software using DAC_TRIGGER_SOFTWARE
72
73 (#) HRTimer TRGO: HRTIM1 (1)
74 (DAC_TRIGGER_HRTIM_TRG01, DAC_TRIGGER_HRTIM_TRG02...)
75
76 [..]
77 Specific triggers for sawtooth generation:
78 (#) External event: EXTI Line 10 (any GPIOx_PIN_10) using DAC_TRIGGER_EXT_IT10.
79 The used pin (GPIOx_PIN_10) must be configured in input mode.
80
81 (#) HRTimer Step & Reset: HRTIM1 (1)
82 (DAC_TRIGGER_HRTIM_RST_TRG1, DAC_TRIGGER_HRTIM_STEP_TRG1...)
83
84 Note: On this STM32 series, parameter only available if HRTIM feature is
85 supported (refer to device datasheet for supported features list)
86
87 *** DAC Buffer mode feature ***
88 ===============================
89 [..]
90 Each DAC channel integrates an output buffer that can be used to
91 reduce the output impedance, and to drive external loads directly
92 without having to add an external operational amplifier.
93 To enable, the output buffer use
94 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
95 [..]
96 (@) Refer to the device datasheet for more details about output
97 impedance value with and without output buffer.
98
99 *** DAC connect feature ***
100 ===============================
101 [..]
102 Each DAC channel can be connected internally.
103 To connect, use
104 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_INTERNAL;
105 or
106 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_BOTH; (caution: dependence to other parameters,
107 refer to literal description).
108
109 *** GPIO configurations guidelines ***
110 =====================
111 [..]
112 When a DAC channel is used (ex channel1 on PA4) and the other is not
113 (ex channel2 on PA5 is configured in Analog and disabled).
114 Channel1 may disturb channel2 as coupling effect.
115 Note that there is no coupling on channel2 as soon as channel2 is turned on.
116 Coupling on adjacent channel could be avoided as follows:
117 when unused PA5 is configured as INPUT PULL-UP or DOWN.
118 PA5 is configured in ANALOG just before it is turned on.
119
120 *** DAC Sample and Hold feature ***
121 ========================
122 [..]
123 For each converter, 2 modes are supported: normal mode and
124 "sample and hold" mode (i.e. low power mode).
125 In the sample and hold mode, the DAC core converts data, then holds the
126 converted voltage on a capacitor. When not converting, the DAC cores and
127 buffer are completely turned off between samples and the DAC output is
128 tri-stated, therefore reducing the overall power consumption. A new
129 stabilization period is needed before each new conversion.
130
131 The sample and hold allow setting internal or external voltage @
132 low power consumption cost (output value can be at any given rate either
133 by CPU or DMA).
134
135 The Sample and hold block and registers uses either LSI & run in
136 several power modes: run mode, sleep mode, low power run, low power sleep
137 mode & stop1 mode.
138
139 Low power stop1 mode allows only static conversion.
140
141 To enable Sample and Hold mode
142 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
143 RCC_LSI_ON parameters.
144
145 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
146 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
147 DAC_HoldTime & DAC_RefreshTime;
148
149 *** DAC calibration feature ***
150 ===================================
151 [..]
152 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
153 (++) Calibration aims at correcting some offset of output buffer.
154 (++) The DAC uses either factory calibration settings OR user defined
155 calibration (trimming) settings (i.e. trimming mode).
156 (++) The user defined settings can be figured out using self calibration
157 handled by HAL_DACEx_SelfCalibrate.
158 (++) HAL_DACEx_SelfCalibrate:
159 (+++) Runs automatically the calibration.
160 (+++) Enables the user trimming mode
161 (+++) Updates a structure with trimming values with fresh calibration
162 results.
163 The user may store the calibration results for larger
164 (ex monitoring the trimming as a function of temperature
165 for instance)
166
167 *** DAC wave generation feature ***
168 ===================================
169 [..]
170 Both DAC channels can be used to generate
171 (#) Noise wave
172 (#) Triangle wave
173 (#) Sawtooth wave
174
175 *** DAC data format ***
176 =======================
177 [..]
178 The DAC data format can be:
179 (#) 8-bit right alignment using DAC_ALIGN_8B_R
180 (#) 12-bit left alignment using DAC_ALIGN_12B_L
181 (#) 12-bit right alignment using DAC_ALIGN_12B_R
182
183 *** DAC data value to voltage correspondence ***
184 ================================================
185 [..]
186 The analog output voltage on each DAC channel pin is determined
187 by the following equation:
188 [..]
189 DAC_OUTx = VREF+ * DOR / 4095
190 (+) with DOR is the Data Output Register
191 [..]
192 VREF+ is the input voltage reference (refer to the device datasheet)
193 [..]
194 e.g. To set DAC_OUT1 to 0.7V, use
195 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
196
197 *** DMA requests ***
198 =====================
199 [..]
200 A DMAMUX request can be generated when an external trigger (but not a software trigger)
201 occurs if DMAMUX requests are enabled using HAL_DAC_Start_DMA().
202 DMAMUX requests are mapped as following:
203 ----------------------------------------------------------------------------
204 | DAC1 | DAC2 | DAC3 | DAC4 |
205 ----------------------------------------------------------------------------
206 Channel 1 | | 6 | 41 | 102 | 104
207 ----------------------------------------------------------------------------
208 Channel 2 | | 7 | - | 103 | 105
209 ----------------------------------------------------------------------------
210 Note: On this STM32 series, all devices do not include each DAC instances listed
211 above. Refer to device datasheet for DACx instance availability.
212
213 *** High frequency interface mode ***
214 =====================================
215 [..]
216 The high frequency interface informs DAC instance about the bus frequency in use.
217 It is mandatory information for DAC (as internal timing of DAC is bus frequency dependent)
218 provided thanks to parameter DAC_HighFrequency handled in HAL_DAC_ConfigChannel () function.
219 Use of DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC value of DAC_HighFrequency is recommended
220 function figured out the correct setting.
221 The high frequency mode is same for all converters of a same DAC instance. Either same
222 parameter DAC_HighFrequency is used for all DAC converters or again self
223 DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC detection parameter.
224
225 [..]
226 (@) For Dual mode and specific signal (Sawtooth, triangle and noise) generation
227 please refer to Extended Features Driver description
228
229 ##### How to use this driver #####
230 ==============================================================================
231 [..]
232 (+) DAC APB clock must be enabled to get write access to DAC
233 registers using HAL_DAC_Init()
234 (+) If available & needed, configure DAC_OUTx (DAC_OUT1, DAC_OUT2) in analog mode.
235 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
236 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
237
238 *** Calibration mode IO operation ***
239 ======================================
240 [..]
241 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
242 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
243 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
244
245 *** Polling mode IO operation ***
246 =================================
247 [..]
248 (+) Start the DAC peripheral using HAL_DAC_Start()
249 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
250 (+) Stop the DAC peripheral using HAL_DAC_Stop()
251
252 *** DMA mode IO operation ***
253 ==============================
254 [..]
255 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
256 of data to be transferred at each end of conversion
257 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue().
258 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
259 function is executed and user can add his own code by customization of function pointer
260 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
261 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
262 function is executed and user can add his own code by customization of function pointer
263 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
264 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
265 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
266 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
267 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
268 function is executed and user can add his own code by customization of function pointer
269 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
270 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
271 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
272
273 *** Callback registration ***
274 =============================================
275 [..]
276 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
277 allows the user to configure dynamically the driver callbacks.
278
279 Use Functions HAL_DAC_RegisterCallback() to register a user callback,
280 it allows to register following callbacks:
281 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
282 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
283 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
284 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
285 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
286 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
287 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
288 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
289 (+) MspInitCallback : DAC MspInit.
290 (+) MspDeInitCallback : DAC MspdeInit.
291 This function takes as parameters the HAL peripheral handle, the Callback ID
292 and a pointer to the user callback function.
293
294 Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default
295 weak (overridden) function. It allows to reset following callbacks:
296 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
297 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
298 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
299 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
300 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
301 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
302 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
303 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
304 (+) MspInitCallback : DAC MspInit.
305 (+) MspDeInitCallback : DAC MspdeInit.
306 (+) All Callbacks
307 This function) takes as parameters the HAL peripheral handle and the Callback ID.
308
309 By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
310 all callbacks are reset to the corresponding legacy weak (overridden) functions.
311 Exception done for MspInit and MspDeInit callbacks that are respectively
312 reset to the legacy weak (overridden) functions in the HAL_DAC_Init
313 and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
314 If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit
315 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
316
317 Callbacks can be registered/unregistered in READY state only.
318 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
319 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
320 during the Init/DeInit.
321 In that case first register the MspInit/MspDeInit user callbacks
322 using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit
323 or HAL_DAC_Init function.
324
325 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
326 not defined, the callback registering feature is not available
327 and weak (overridden) callbacks are used.
328
329 *** DAC HAL driver macros list ***
330 =============================================
331 [..]
332 Below the list of most used macros in DAC HAL driver.
333
334 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
335 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
336 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
337 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
338
339 [..]
340 (@) You can refer to the DAC HAL driver header file for more useful macros
341
342 @endverbatim
343 ******************************************************************************
344 */
345
346 /* Includes ------------------------------------------------------------------*/
347 #include "stm32g4xx_hal.h"
348
349 /** @addtogroup STM32G4xx_HAL_Driver
350 * @{
351 */
352
353 #ifdef HAL_DAC_MODULE_ENABLED
354 #if defined(DAC1) || defined(DAC2) || defined(DAC3) ||defined (DAC4)
355
356 /** @defgroup DAC DAC
357 * @brief DAC driver modules
358 * @{
359 */
360
361 /* Private typedef -----------------------------------------------------------*/
362 /* Private define ------------------------------------------------------------*/
363 /* Private constants ---------------------------------------------------------*/
364 /** @addtogroup DAC_Private_Constants DAC Private Constants
365 * @{
366 */
367 #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */
368 #define HFSEL_ENABLE_THRESHOLD_80MHZ 80000000U /* 80 MHz */
369 #define HFSEL_ENABLE_THRESHOLD_160MHZ 160000000U /* 160 MHz */
370
371 /**
372 * @}
373 */
374
375 /* Private macro -------------------------------------------------------------*/
376 /* Private variables ---------------------------------------------------------*/
377 /* Private function prototypes -----------------------------------------------*/
378 /* Exported functions -------------------------------------------------------*/
379
380 /** @defgroup DAC_Exported_Functions DAC Exported Functions
381 * @{
382 */
383
384 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
385 * @brief Initialization and Configuration functions
386 *
387 @verbatim
388 ==============================================================================
389 ##### Initialization and de-initialization functions #####
390 ==============================================================================
391 [..] This section provides functions allowing to:
392 (+) Initialize and configure the DAC.
393 (+) De-initialize the DAC.
394
395 @endverbatim
396 * @{
397 */
398
399 /**
400 * @brief Initialize the DAC peripheral according to the specified parameters
401 * in the DAC_InitStruct and initialize the associated handle.
402 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
403 * the configuration information for the specified DAC.
404 * @retval HAL status
405 */
HAL_DAC_Init(DAC_HandleTypeDef * hdac)406 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
407 {
408 /* Check the DAC peripheral handle */
409 if (hdac == NULL)
410 {
411 return HAL_ERROR;
412 }
413 /* Check the parameters */
414 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
415
416 if (hdac->State == HAL_DAC_STATE_RESET)
417 {
418 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
419 /* Init the DAC Callback settings */
420 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
421 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
422 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
423 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
424
425 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
426 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
427 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
428 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
429
430 if (hdac->MspInitCallback == NULL)
431 {
432 hdac->MspInitCallback = HAL_DAC_MspInit;
433 }
434 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
435
436 /* Allocate lock resource and initialize it */
437 hdac->Lock = HAL_UNLOCKED;
438
439 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
440 /* Init the low level hardware */
441 hdac->MspInitCallback(hdac);
442 #else
443 /* Init the low level hardware */
444 HAL_DAC_MspInit(hdac);
445 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
446 }
447
448 /* Initialize the DAC state*/
449 hdac->State = HAL_DAC_STATE_BUSY;
450
451 /* Set DAC error code to none */
452 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
453
454 /* Initialize the DAC state*/
455 hdac->State = HAL_DAC_STATE_READY;
456
457 /* Return function status */
458 return HAL_OK;
459 }
460
461 /**
462 * @brief Deinitialize the DAC peripheral registers to their default reset values.
463 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
464 * the configuration information for the specified DAC.
465 * @retval HAL status
466 */
HAL_DAC_DeInit(DAC_HandleTypeDef * hdac)467 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
468 {
469 /* Check the DAC peripheral handle */
470 if (hdac == NULL)
471 {
472 return HAL_ERROR;
473 }
474
475 /* Check the parameters */
476 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
477
478 /* Change DAC state */
479 hdac->State = HAL_DAC_STATE_BUSY;
480
481 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
482 if (hdac->MspDeInitCallback == NULL)
483 {
484 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
485 }
486 /* DeInit the low level hardware */
487 hdac->MspDeInitCallback(hdac);
488 #else
489 /* DeInit the low level hardware */
490 HAL_DAC_MspDeInit(hdac);
491 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
492
493 /* Set DAC error code to none */
494 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
495
496 /* Change DAC state */
497 hdac->State = HAL_DAC_STATE_RESET;
498
499 /* Release Lock */
500 __HAL_UNLOCK(hdac);
501
502 /* Return function status */
503 return HAL_OK;
504 }
505
506 /**
507 * @brief Initialize the DAC MSP.
508 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
509 * the configuration information for the specified DAC.
510 * @retval None
511 */
HAL_DAC_MspInit(DAC_HandleTypeDef * hdac)512 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
513 {
514 /* Prevent unused argument(s) compilation warning */
515 UNUSED(hdac);
516
517 /* NOTE : This function should not be modified, when the callback is needed,
518 the HAL_DAC_MspInit could be implemented in the user file
519 */
520 }
521
522 /**
523 * @brief DeInitialize the DAC MSP.
524 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
525 * the configuration information for the specified DAC.
526 * @retval None
527 */
HAL_DAC_MspDeInit(DAC_HandleTypeDef * hdac)528 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
529 {
530 /* Prevent unused argument(s) compilation warning */
531 UNUSED(hdac);
532
533 /* NOTE : This function should not be modified, when the callback is needed,
534 the HAL_DAC_MspDeInit could be implemented in the user file
535 */
536 }
537
538 /**
539 * @}
540 */
541
542 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
543 * @brief IO operation functions
544 *
545 @verbatim
546 ==============================================================================
547 ##### IO operation functions #####
548 ==============================================================================
549 [..] This section provides functions allowing to:
550 (+) Start conversion.
551 (+) Stop conversion.
552 (+) Start conversion and enable DMA transfer.
553 (+) Stop conversion and disable DMA transfer.
554 (+) Get result of conversion.
555
556 @endverbatim
557 * @{
558 */
559
560 /**
561 * @brief Enables DAC and starts conversion of channel.
562 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
563 * the configuration information for the specified DAC.
564 * @param Channel The selected DAC channel.
565 * This parameter can be one of the following values:
566 * @arg DAC_CHANNEL_1: DAC Channel1 selected
567 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
568 *
569 * (1) On this STM32 series, parameter not available on all instances.
570 * Refer to device datasheet for channels availability.
571 * @retval HAL status
572 */
HAL_DAC_Start(DAC_HandleTypeDef * hdac,uint32_t Channel)573 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
574 {
575 __IO uint32_t wait_loop_index;
576
577 /* Check the DAC peripheral handle */
578 if (hdac == NULL)
579 {
580 return HAL_ERROR;
581 }
582
583 /* Check the parameters */
584 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
585
586 /* Process locked */
587 __HAL_LOCK(hdac);
588
589 /* Change DAC state */
590 hdac->State = HAL_DAC_STATE_BUSY;
591
592 /* Enable the Peripheral */
593 __HAL_DAC_ENABLE(hdac, Channel);
594 /* Ensure minimum wait before using peripheral after enabling it */
595 /* Wait loop initialization and execution */
596 /* Note: Variable divided by 2 to compensate partially CPU processing cycles, scaling in us split to not exceed 32 */
597 /* bits register capacity and handle low frequency. */
598 wait_loop_index = ((DAC_DELAY_STARTUP_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL));
599 while (wait_loop_index != 0UL)
600 {
601 wait_loop_index--;
602 }
603
604 if (Channel == DAC_CHANNEL_1)
605 {
606 /* Check if software trigger enabled */
607 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
608 {
609 /* Enable the selected DAC software conversion */
610 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
611 }
612 }
613
614 else
615 {
616 /* Check if software trigger enabled */
617 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL)))
618 {
619 /* Enable the selected DAC software conversion*/
620 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
621 }
622 }
623
624
625 /* Change DAC state */
626 hdac->State = HAL_DAC_STATE_READY;
627
628 /* Process unlocked */
629 __HAL_UNLOCK(hdac);
630
631 /* Return function status */
632 return HAL_OK;
633 }
634
635 /**
636 * @brief Disables DAC and stop conversion of channel.
637 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
638 * the configuration information for the specified DAC.
639 * @param Channel The selected DAC channel.
640 * This parameter can be one of the following values:
641 * @arg DAC_CHANNEL_1: DAC Channel1 selected
642 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
643 *
644 * (1) On this STM32 series, parameter not available on all instances.
645 * Refer to device datasheet for channels availability.
646 * @retval HAL status
647 */
HAL_DAC_Stop(DAC_HandleTypeDef * hdac,uint32_t Channel)648 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
649 {
650 /* Check the DAC peripheral handle */
651 if (hdac == NULL)
652 {
653 return HAL_ERROR;
654 }
655
656 /* Check the parameters */
657 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
658
659 /* Disable the Peripheral */
660 __HAL_DAC_DISABLE(hdac, Channel);
661
662 /* Change DAC state */
663 hdac->State = HAL_DAC_STATE_READY;
664
665 /* Return function status */
666 return HAL_OK;
667 }
668
669 /**
670 * @brief Enables DAC and starts conversion of channel.
671 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
672 * the configuration information for the specified DAC.
673 * @param Channel The selected DAC channel.
674 * This parameter can be one of the following values:
675 * @arg DAC_CHANNEL_1: DAC Channel1 selected
676 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
677 *
678 * (1) On this STM32 series, parameter not available on all instances.
679 * Refer to device datasheet for channels availability.
680 * @param pData The source Buffer address.
681 * @param Length The length of data to be transferred from memory to DAC peripheral
682 * @param Alignment Specifies the data alignment for DAC channel.
683 * This parameter can be one of the following values:
684 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
685 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
686 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
687 * @retval HAL status
688 */
HAL_DAC_Start_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,const uint32_t * pData,uint32_t Length,uint32_t Alignment)689 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length,
690 uint32_t Alignment)
691 {
692 HAL_StatusTypeDef status;
693 uint32_t tmpreg;
694 __IO uint32_t wait_loop_index;
695
696 /* Check the DAC peripheral handle */
697 if (hdac == NULL)
698 {
699 return HAL_ERROR;
700 }
701
702 /* Check the parameters */
703 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
704 assert_param(IS_DAC_ALIGN(Alignment));
705
706 /* Process locked */
707 __HAL_LOCK(hdac);
708
709 /* Change DAC state */
710 hdac->State = HAL_DAC_STATE_BUSY;
711
712 if (Channel == DAC_CHANNEL_1)
713 {
714 /* Set the DMA transfer complete callback for channel1 */
715 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
716
717 /* Set the DMA half transfer complete callback for channel1 */
718 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
719
720 /* Set the DMA error callback for channel1 */
721 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
722
723 /* Enable the selected DAC channel1 DMA request */
724 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
725
726 /* Case of use of channel 1 */
727 switch (Alignment)
728 {
729 case DAC_ALIGN_12B_R:
730 /* Get DHR12R1 address */
731 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
732 break;
733 case DAC_ALIGN_12B_L:
734 /* Get DHR12L1 address */
735 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
736 break;
737 default: /* case DAC_ALIGN_8B_R */
738 /* Get DHR8R1 address */
739 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
740 break;
741 }
742 }
743
744 else
745 {
746 /* Set the DMA transfer complete callback for channel2 */
747 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
748
749 /* Set the DMA half transfer complete callback for channel2 */
750 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
751
752 /* Set the DMA error callback for channel2 */
753 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
754
755 /* Enable the selected DAC channel2 DMA request */
756 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
757
758 /* Case of use of channel 2 */
759 switch (Alignment)
760 {
761 case DAC_ALIGN_12B_R:
762 /* Get DHR12R2 address */
763 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
764 break;
765 case DAC_ALIGN_12B_L:
766 /* Get DHR12L2 address */
767 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
768 break;
769 default: /* case DAC_ALIGN_8B_R */
770 /* Get DHR8R2 address */
771 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
772 break;
773 }
774 }
775
776 if (Channel == DAC_CHANNEL_1)
777 {
778 /* Enable the DAC DMA underrun interrupt */
779 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
780
781 /* Enable the DMA channel */
782 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
783 }
784
785 else
786 {
787 /* Enable the DAC DMA underrun interrupt */
788 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
789
790 /* Enable the DMA channel */
791 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
792 }
793
794
795 /* Process Unlocked */
796 __HAL_UNLOCK(hdac);
797
798 if (status == HAL_OK)
799 {
800 /* Enable the Peripheral */
801 __HAL_DAC_ENABLE(hdac, Channel);
802 /* Ensure minimum wait before using peripheral after enabling it */
803 /* Wait loop initialization and execution */
804 /* Note: Variable divided by 2 to compensate partially */
805 /* CPU processing cycles, scaling in us split to not */
806 /* exceed 32 bits register capacity and handle low frequency. */
807 wait_loop_index = ((DAC_DELAY_STARTUP_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL));
808 while (wait_loop_index != 0UL)
809 {
810 wait_loop_index--;
811 }
812 }
813 else
814 {
815 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
816 }
817
818 /* Return function status */
819 return status;
820 }
821
822 /**
823 * @brief Disables DAC and stop conversion of channel.
824 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
825 * the configuration information for the specified DAC.
826 * @param Channel The selected DAC channel.
827 * This parameter can be one of the following values:
828 * @arg DAC_CHANNEL_1: DAC Channel1 selected
829 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
830 *
831 * (1) On this STM32 series, parameter not available on all instances.
832 * Refer to device datasheet for channels availability.
833 * @retval HAL status
834 */
HAL_DAC_Stop_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel)835 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
836 {
837 /* Check the DAC peripheral handle */
838 if (hdac == NULL)
839 {
840 return HAL_ERROR;
841 }
842
843 /* Check the parameters */
844 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
845
846 /* Disable the selected DAC channel DMA request */
847 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL));
848
849 /* Disable the Peripheral */
850 __HAL_DAC_DISABLE(hdac, Channel);
851
852 /* Disable the DMA channel */
853
854 /* Channel1 is used */
855 if (Channel == DAC_CHANNEL_1)
856 {
857 /* Disable the DMA channel */
858 (void)HAL_DMA_Abort(hdac->DMA_Handle1);
859
860 /* Disable the DAC DMA underrun interrupt */
861 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
862 }
863
864 else /* Channel2 is used for */
865 {
866 /* Disable the DMA channel */
867 (void)HAL_DMA_Abort(hdac->DMA_Handle2);
868
869 /* Disable the DAC DMA underrun interrupt */
870 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
871 }
872
873
874 /* Change DAC state */
875 hdac->State = HAL_DAC_STATE_READY;
876
877 /* Return function status */
878 return HAL_OK;
879 }
880
881 /**
882 * @brief Handles DAC interrupt request
883 * This function uses the interruption of DMA
884 * underrun.
885 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
886 * the configuration information for the specified DAC.
887 * @retval None
888 */
HAL_DAC_IRQHandler(DAC_HandleTypeDef * hdac)889 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
890 {
891 uint32_t itsource = hdac->Instance->CR;
892 uint32_t itflag = hdac->Instance->SR;
893
894 if ((itsource & DAC_IT_DMAUDR1) == DAC_IT_DMAUDR1)
895 {
896 /* Check underrun flag of DAC channel 1 */
897 if ((itflag & DAC_FLAG_DMAUDR1) == DAC_FLAG_DMAUDR1)
898 {
899 /* Change DAC state to error state */
900 hdac->State = HAL_DAC_STATE_ERROR;
901
902 /* Set DAC error code to channel1 DMA underrun error */
903 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
904
905 /* Clear the underrun flag */
906 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
907
908 /* Disable the selected DAC channel1 DMA request */
909 __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN1);
910
911 /* Error callback */
912 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
913 hdac->DMAUnderrunCallbackCh1(hdac);
914 #else
915 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
916 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
917 }
918 }
919
920
921 if ((itsource & DAC_IT_DMAUDR2) == DAC_IT_DMAUDR2)
922 {
923 /* Check underrun flag of DAC channel 2 */
924 if ((itflag & DAC_FLAG_DMAUDR2) == DAC_FLAG_DMAUDR2)
925 {
926 /* Change DAC state to error state */
927 hdac->State = HAL_DAC_STATE_ERROR;
928
929 /* Set DAC error code to channel2 DMA underrun error */
930 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
931
932 /* Clear the underrun flag */
933 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
934
935 /* Disable the selected DAC channel2 DMA request */
936 __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN2);
937
938 /* Error callback */
939 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
940 hdac->DMAUnderrunCallbackCh2(hdac);
941 #else
942 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
943 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
944 }
945 }
946
947 }
948
949 /**
950 * @brief Set the specified data holding register value for DAC channel.
951 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
952 * the configuration information for the specified DAC.
953 * @param Channel The selected DAC channel.
954 * This parameter can be one of the following values:
955 * @arg DAC_CHANNEL_1: DAC Channel1 selected
956 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
957 *
958 * (1) On this STM32 series, parameter not available on all instances.
959 * Refer to device datasheet for channels availability.
960 * @param Alignment Specifies the data alignment.
961 * This parameter can be one of the following values:
962 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
963 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
964 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
965 * @param Data Data to be loaded in the selected data holding register.
966 * @retval HAL status
967 */
HAL_DAC_SetValue(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Alignment,uint32_t Data)968 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
969 {
970 __IO uint32_t tmp = 0UL;
971
972 /* Check the DAC peripheral handle */
973 if (hdac == NULL)
974 {
975 return HAL_ERROR;
976 }
977
978 /* Check the parameters */
979 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
980 assert_param(IS_DAC_ALIGN(Alignment));
981 /* In case DMA Double data mode is activated, DATA range is almost full uin32_t one: no check */
982 if ((hdac->Instance->MCR & (DAC_MCR_DMADOUBLE1 << (Channel & 0x10UL))) == 0UL)
983 {
984 assert_param(IS_DAC_DATA(Data));
985 }
986
987 tmp = (uint32_t)hdac->Instance;
988 if (Channel == DAC_CHANNEL_1)
989 {
990 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
991 }
992
993 else
994 {
995 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
996 }
997
998
999 /* Set the DAC channel selected data holding register */
1000 *(__IO uint32_t *) tmp = Data;
1001
1002 /* Return function status */
1003 return HAL_OK;
1004 }
1005
1006 /**
1007 * @brief Conversion complete callback in non-blocking mode for Channel1
1008 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1009 * the configuration information for the specified DAC.
1010 * @retval None
1011 */
HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef * hdac)1012 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
1013 {
1014 /* Prevent unused argument(s) compilation warning */
1015 UNUSED(hdac);
1016
1017 /* NOTE : This function should not be modified, when the callback is needed,
1018 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
1019 */
1020 }
1021
1022 /**
1023 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
1024 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1025 * the configuration information for the specified DAC.
1026 * @retval None
1027 */
HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef * hdac)1028 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
1029 {
1030 /* Prevent unused argument(s) compilation warning */
1031 UNUSED(hdac);
1032
1033 /* NOTE : This function should not be modified, when the callback is needed,
1034 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
1035 */
1036 }
1037
1038 /**
1039 * @brief Error DAC callback for Channel1.
1040 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1041 * the configuration information for the specified DAC.
1042 * @retval None
1043 */
HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef * hdac)1044 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
1045 {
1046 /* Prevent unused argument(s) compilation warning */
1047 UNUSED(hdac);
1048
1049 /* NOTE : This function should not be modified, when the callback is needed,
1050 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
1051 */
1052 }
1053
1054 /**
1055 * @brief DMA underrun DAC callback for channel1.
1056 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1057 * the configuration information for the specified DAC.
1058 * @retval None
1059 */
HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef * hdac)1060 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
1061 {
1062 /* Prevent unused argument(s) compilation warning */
1063 UNUSED(hdac);
1064
1065 /* NOTE : This function should not be modified, when the callback is needed,
1066 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
1067 */
1068 }
1069
1070 /**
1071 * @}
1072 */
1073
1074 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
1075 * @brief Peripheral Control functions
1076 *
1077 @verbatim
1078 ==============================================================================
1079 ##### Peripheral Control functions #####
1080 ==============================================================================
1081 [..] This section provides functions allowing to:
1082 (+) Configure channels.
1083 (+) Set the specified data holding register value for DAC channel.
1084
1085 @endverbatim
1086 * @{
1087 */
1088
1089 /**
1090 * @brief Returns the last data output value of the selected DAC channel.
1091 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1092 * the configuration information for the specified DAC.
1093 * @param Channel The selected DAC channel.
1094 * This parameter can be one of the following values:
1095 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1096 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
1097 *
1098 * (1) On this STM32 series, parameter not available on all instances.
1099 * Refer to device datasheet for channels availability.
1100 * @retval The selected DAC channel data output value.
1101 */
HAL_DAC_GetValue(const DAC_HandleTypeDef * hdac,uint32_t Channel)1102 uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel)
1103 {
1104 uint32_t result;
1105
1106 /* Check the DAC peripheral handle */
1107 assert_param(hdac != NULL);
1108
1109 /* Check the parameters */
1110 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
1111
1112 if (Channel == DAC_CHANNEL_1)
1113 {
1114 result = hdac->Instance->DOR1;
1115 }
1116
1117 else
1118 {
1119 result = hdac->Instance->DOR2;
1120 }
1121
1122 /* Returns the DAC channel data output register value */
1123 return result;
1124 }
1125
1126 /**
1127 * @brief Configures the selected DAC channel.
1128 * @note By calling this function, the high frequency interface mode (HFSEL bits)
1129 * will be set. This parameter scope is the DAC instance. As the function
1130 * is called for each channel, the @ref DAC_HighFrequency of @arg sConfig
1131 * must be the same at each call.
1132 * (or DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC self detect).
1133 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1134 * the configuration information for the specified DAC.
1135 * @param sConfig DAC configuration structure.
1136 * @param Channel The selected DAC channel.
1137 * This parameter can be one of the following values:
1138 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1139 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
1140 *
1141 * (1) On this STM32 series, parameter not available on all instances.
1142 * Refer to device datasheet for channels availability.
1143 * @retval HAL status
1144 */
HAL_DAC_ConfigChannel(DAC_HandleTypeDef * hdac,const DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)1145 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac,
1146 const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
1147 {
1148 HAL_StatusTypeDef status = HAL_OK;
1149 uint32_t tmpreg1;
1150 uint32_t tmpreg2;
1151 uint32_t tickstart;
1152 uint32_t hclkfreq;
1153 uint32_t connectOnChip;
1154
1155 /* Check the DAC peripheral handle and channel configuration struct */
1156 if ((hdac == NULL) || (sConfig == NULL))
1157 {
1158 return HAL_ERROR;
1159 }
1160
1161 /* Check the DAC parameters */
1162 assert_param(IS_DAC_HIGH_FREQUENCY_MODE(sConfig->DAC_HighFrequency));
1163 assert_param(IS_DAC_TRIGGER(hdac->Instance, sConfig->DAC_Trigger));
1164 assert_param(IS_DAC_TRIGGER2(hdac->Instance, sConfig->DAC_Trigger2));
1165 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
1166 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
1167 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
1168 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
1169 {
1170 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
1171 }
1172 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
1173 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
1174 {
1175 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
1176 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
1177 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
1178 }
1179 else
1180 {
1181 /* In case of mode normal and buffer disabled, connection to both on chip periph and external pin is not possible */
1182 if (sConfig->DAC_OutputBuffer == DAC_OUTPUTBUFFER_DISABLE)
1183 {
1184 assert_param(sConfig->DAC_ConnectOnChipPeripheral != DAC_CHIPCONNECT_BOTH);
1185 }
1186 }
1187 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
1188 assert_param(IS_FUNCTIONAL_STATE(sConfig->DAC_DMADoubleDataMode));
1189 assert_param(IS_FUNCTIONAL_STATE(sConfig->DAC_SignedFormat));
1190
1191 /* Process locked */
1192 __HAL_LOCK(hdac);
1193
1194 /* Change DAC state */
1195 hdac->State = HAL_DAC_STATE_BUSY;
1196
1197 /* Sample and hold configuration */
1198 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
1199 {
1200 /* Get timeout */
1201 tickstart = HAL_GetTick();
1202
1203 if (Channel == DAC_CHANNEL_1)
1204 {
1205 /* SHSR1 can be written when BWST1 is cleared */
1206 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1207 {
1208 /* Check for the Timeout */
1209 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1210 {
1211 /* New check to avoid false timeout detection in case of preemption */
1212 if (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1213 {
1214 /* Update error code */
1215 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1216
1217 /* Change the DMA state */
1218 hdac->State = HAL_DAC_STATE_TIMEOUT;
1219
1220 return HAL_TIMEOUT;
1221 }
1222 }
1223 }
1224 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1225 }
1226
1227 else /* Channel 2 */
1228 {
1229 /* SHSR2 can be written when BWST2 is cleared */
1230 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1231 {
1232 /* Check for the Timeout */
1233 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1234 {
1235 /* New check to avoid false timeout detection in case of preemption */
1236 if (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1237 {
1238 /* Update error code */
1239 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1240
1241 /* Change the DMA state */
1242 hdac->State = HAL_DAC_STATE_TIMEOUT;
1243
1244 return HAL_TIMEOUT;
1245 }
1246 }
1247 }
1248 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1249 }
1250
1251
1252 /* HoldTime */
1253 MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL),
1254 (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
1255 /* RefreshTime */
1256 MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL),
1257 (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
1258 }
1259
1260 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
1261 /* USER TRIMMING */
1262 {
1263 /* Get the DAC CCR value */
1264 tmpreg1 = hdac->Instance->CCR;
1265 /* Clear trimming value */
1266 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
1267 /* Configure for the selected trimming offset */
1268 tmpreg2 = sConfig->DAC_TrimmingValue;
1269 /* Calculate CCR register value depending on DAC_Channel */
1270 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1271 /* Write to DAC CCR */
1272 hdac->Instance->CCR = tmpreg1;
1273 }
1274 /* else factory trimming is used (factory setting are available at reset)*/
1275 /* SW Nothing has nothing to do */
1276
1277 /* Get the DAC MCR value */
1278 tmpreg1 = hdac->Instance->MCR;
1279 /* Clear DAC_MCR_MODEx bits */
1280 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
1281 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
1282
1283
1284 if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_EXTERNAL)
1285 {
1286 connectOnChip = 0x00000000UL;
1287 }
1288 else if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_INTERNAL)
1289 {
1290 connectOnChip = DAC_MCR_MODE1_0;
1291 }
1292 else /* (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_BOTH) */
1293 {
1294 if (sConfig->DAC_OutputBuffer == DAC_OUTPUTBUFFER_ENABLE)
1295 {
1296 connectOnChip = DAC_MCR_MODE1_0;
1297 }
1298 else
1299 {
1300 connectOnChip = 0x00000000UL;
1301 }
1302 }
1303 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | connectOnChip);
1304 /* Clear DAC_MCR_DMADOUBLEx */
1305 tmpreg1 &= ~(((uint32_t)(DAC_MCR_DMADOUBLE1)) << (Channel & 0x10UL));
1306 /* Configure for the selected DAC channel: DMA double data mode */
1307 tmpreg2 |= (sConfig->DAC_DMADoubleDataMode == ENABLE) ? DAC_MCR_DMADOUBLE1 : 0UL;
1308 /* Clear DAC_MCR_SINFORMATx */
1309 tmpreg1 &= ~(((uint32_t)(DAC_MCR_SINFORMAT1)) << (Channel & 0x10UL));
1310 /* Configure for the selected DAC channel: Signed format */
1311 tmpreg2 |= (sConfig->DAC_SignedFormat == ENABLE) ? DAC_MCR_SINFORMAT1 : 0UL;
1312 /* Clear DAC_MCR_HFSEL bits */
1313 tmpreg1 &= ~(DAC_MCR_HFSEL);
1314 /* Configure for both DAC channels: high frequency mode */
1315 if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC == sConfig->DAC_HighFrequency)
1316 {
1317 hclkfreq = HAL_RCC_GetHCLKFreq();
1318 if (hclkfreq > HFSEL_ENABLE_THRESHOLD_160MHZ)
1319 {
1320 tmpreg1 |= DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_160MHZ;
1321 }
1322 else if (hclkfreq > HFSEL_ENABLE_THRESHOLD_80MHZ)
1323 {
1324 tmpreg1 |= DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ;
1325 }
1326 else
1327 {
1328 tmpreg1 |= DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE;
1329 }
1330 }
1331 else
1332 {
1333 tmpreg1 |= sConfig->DAC_HighFrequency;
1334 }
1335 /* Calculate MCR register value depending on DAC_Channel */
1336 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1337 /* Write to DAC MCR */
1338 hdac->Instance->MCR = tmpreg1;
1339
1340 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
1341 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
1342
1343 /* Get the DAC CR value */
1344 tmpreg1 = hdac->Instance->CR;
1345 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
1346 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
1347 /* Configure for the selected DAC channel: trigger */
1348 /* Set TSELx and TENx bits according to DAC_Trigger value */
1349 tmpreg2 = sConfig->DAC_Trigger;
1350 /* Calculate CR register value depending on DAC_Channel */
1351 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1352 /* Write to DAC CR */
1353 hdac->Instance->CR = tmpreg1;
1354 /* Disable wave generation */
1355 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL)));
1356
1357 /* Set STRSTTRIGSELx and STINCTRIGSELx bits according to DAC_Trigger & DAC_Trigger2 values */
1358 tmpreg2 = ((sConfig->DAC_Trigger & DAC_CR_TSEL1) >> DAC_CR_TSEL1_Pos) << DAC_STMODR_STRSTTRIGSEL1_Pos;
1359 tmpreg2 |= ((sConfig->DAC_Trigger2 & DAC_CR_TSEL1) >> DAC_CR_TSEL1_Pos) << DAC_STMODR_STINCTRIGSEL1_Pos;
1360 /* Modify STMODR register value depending on DAC_Channel */
1361 MODIFY_REG(hdac->Instance->STMODR, (DAC_STMODR_STINCTRIGSEL1 | DAC_STMODR_STRSTTRIGSEL1)
1362 << (Channel & 0x10UL), tmpreg2 << (Channel & 0x10UL));
1363 /* Change DAC state */
1364 hdac->State = HAL_DAC_STATE_READY;
1365
1366 /* Process unlocked */
1367 __HAL_UNLOCK(hdac);
1368
1369 /* Return function status */
1370 return status;
1371 }
1372
1373 /**
1374 * @}
1375 */
1376
1377 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
1378 * @brief Peripheral State and Errors functions
1379 *
1380 @verbatim
1381 ==============================================================================
1382 ##### Peripheral State and Errors functions #####
1383 ==============================================================================
1384 [..]
1385 This subsection provides functions allowing to
1386 (+) Check the DAC state.
1387 (+) Check the DAC Errors.
1388
1389 @endverbatim
1390 * @{
1391 */
1392
1393 /**
1394 * @brief return the DAC handle state
1395 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1396 * the configuration information for the specified DAC.
1397 * @retval HAL state
1398 */
HAL_DAC_GetState(const DAC_HandleTypeDef * hdac)1399 HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac)
1400 {
1401 /* Return DAC handle state */
1402 return hdac->State;
1403 }
1404
1405
1406 /**
1407 * @brief Return the DAC error code
1408 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1409 * the configuration information for the specified DAC.
1410 * @retval DAC Error Code
1411 */
HAL_DAC_GetError(const DAC_HandleTypeDef * hdac)1412 uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac)
1413 {
1414 return hdac->ErrorCode;
1415 }
1416
1417 /**
1418 * @}
1419 */
1420
1421 /**
1422 * @}
1423 */
1424
1425 /** @addtogroup DAC_Exported_Functions
1426 * @{
1427 */
1428
1429 /** @addtogroup DAC_Exported_Functions_Group1
1430 * @{
1431 */
1432 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1433 /**
1434 * @brief Register a User DAC Callback
1435 * To be used instead of the weak (overridden) predefined callback
1436 * @note The HAL_DAC_RegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to register
1437 * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID
1438 * @param hdac DAC handle
1439 * @param CallbackID ID of the callback to be registered
1440 * This parameter can be one of the following values:
1441 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID
1442 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID
1443 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1444 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1445 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1446 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1447 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1448 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1449 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1450 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1451 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1452 *
1453 * @param pCallback pointer to the Callback function
1454 * @retval status
1455 */
HAL_DAC_RegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID,pDAC_CallbackTypeDef pCallback)1456 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
1457 pDAC_CallbackTypeDef pCallback)
1458 {
1459 HAL_StatusTypeDef status = HAL_OK;
1460
1461 /* Check the DAC peripheral handle */
1462 if (hdac == NULL)
1463 {
1464 return HAL_ERROR;
1465 }
1466
1467 if (pCallback == NULL)
1468 {
1469 /* Update the error code */
1470 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1471 return HAL_ERROR;
1472 }
1473
1474 if (hdac->State == HAL_DAC_STATE_READY)
1475 {
1476 switch (CallbackID)
1477 {
1478 case HAL_DAC_CH1_COMPLETE_CB_ID :
1479 hdac->ConvCpltCallbackCh1 = pCallback;
1480 break;
1481 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1482 hdac->ConvHalfCpltCallbackCh1 = pCallback;
1483 break;
1484 case HAL_DAC_CH1_ERROR_ID :
1485 hdac->ErrorCallbackCh1 = pCallback;
1486 break;
1487 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1488 hdac->DMAUnderrunCallbackCh1 = pCallback;
1489 break;
1490
1491 case HAL_DAC_CH2_COMPLETE_CB_ID :
1492 hdac->ConvCpltCallbackCh2 = pCallback;
1493 break;
1494 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1495 hdac->ConvHalfCpltCallbackCh2 = pCallback;
1496 break;
1497 case HAL_DAC_CH2_ERROR_ID :
1498 hdac->ErrorCallbackCh2 = pCallback;
1499 break;
1500 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1501 hdac->DMAUnderrunCallbackCh2 = pCallback;
1502 break;
1503
1504 case HAL_DAC_MSPINIT_CB_ID :
1505 hdac->MspInitCallback = pCallback;
1506 break;
1507 case HAL_DAC_MSPDEINIT_CB_ID :
1508 hdac->MspDeInitCallback = pCallback;
1509 break;
1510 default :
1511 /* Update the error code */
1512 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1513 /* update return status */
1514 status = HAL_ERROR;
1515 break;
1516 }
1517 }
1518 else if (hdac->State == HAL_DAC_STATE_RESET)
1519 {
1520 switch (CallbackID)
1521 {
1522 case HAL_DAC_MSPINIT_CB_ID :
1523 hdac->MspInitCallback = pCallback;
1524 break;
1525 case HAL_DAC_MSPDEINIT_CB_ID :
1526 hdac->MspDeInitCallback = pCallback;
1527 break;
1528 default :
1529 /* Update the error code */
1530 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1531 /* update return status */
1532 status = HAL_ERROR;
1533 break;
1534 }
1535 }
1536 else
1537 {
1538 /* Update the error code */
1539 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1540 /* update return status */
1541 status = HAL_ERROR;
1542 }
1543
1544 return status;
1545 }
1546
1547 /**
1548 * @brief Unregister a User DAC Callback
1549 * DAC Callback is redirected to the weak (overridden) predefined callback
1550 * @note The HAL_DAC_UnRegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to un-register
1551 * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID
1552 * @param hdac DAC handle
1553 * @param CallbackID ID of the callback to be unregistered
1554 * This parameter can be one of the following values:
1555 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID
1556 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1557 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1558 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1559 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1560 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1561 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1562 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1563 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1564 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1565 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks
1566 * @retval status
1567 */
HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID)1568 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID)
1569 {
1570 HAL_StatusTypeDef status = HAL_OK;
1571
1572 /* Check the DAC peripheral handle */
1573 if (hdac == NULL)
1574 {
1575 return HAL_ERROR;
1576 }
1577
1578 if (hdac->State == HAL_DAC_STATE_READY)
1579 {
1580 switch (CallbackID)
1581 {
1582 case HAL_DAC_CH1_COMPLETE_CB_ID :
1583 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1584 break;
1585 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1586 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1587 break;
1588 case HAL_DAC_CH1_ERROR_ID :
1589 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1590 break;
1591 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1592 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1593 break;
1594
1595 case HAL_DAC_CH2_COMPLETE_CB_ID :
1596 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1597 break;
1598 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1599 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1600 break;
1601 case HAL_DAC_CH2_ERROR_ID :
1602 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1603 break;
1604 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1605 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1606 break;
1607
1608 case HAL_DAC_MSPINIT_CB_ID :
1609 hdac->MspInitCallback = HAL_DAC_MspInit;
1610 break;
1611 case HAL_DAC_MSPDEINIT_CB_ID :
1612 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1613 break;
1614 case HAL_DAC_ALL_CB_ID :
1615 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1616 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1617 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1618 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1619
1620 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1621 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1622 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1623 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1624
1625 hdac->MspInitCallback = HAL_DAC_MspInit;
1626 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1627 break;
1628 default :
1629 /* Update the error code */
1630 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1631 /* update return status */
1632 status = HAL_ERROR;
1633 break;
1634 }
1635 }
1636 else if (hdac->State == HAL_DAC_STATE_RESET)
1637 {
1638 switch (CallbackID)
1639 {
1640 case HAL_DAC_MSPINIT_CB_ID :
1641 hdac->MspInitCallback = HAL_DAC_MspInit;
1642 break;
1643 case HAL_DAC_MSPDEINIT_CB_ID :
1644 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1645 break;
1646 default :
1647 /* Update the error code */
1648 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1649 /* update return status */
1650 status = HAL_ERROR;
1651 break;
1652 }
1653 }
1654 else
1655 {
1656 /* Update the error code */
1657 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1658 /* update return status */
1659 status = HAL_ERROR;
1660 }
1661
1662 return status;
1663 }
1664 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1665
1666 /**
1667 * @}
1668 */
1669
1670 /**
1671 * @}
1672 */
1673
1674 /** @addtogroup DAC_Private_Functions
1675 * @{
1676 */
1677
1678 /**
1679 * @brief DMA conversion complete callback.
1680 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1681 * the configuration information for the specified DMA module.
1682 * @retval None
1683 */
DAC_DMAConvCpltCh1(DMA_HandleTypeDef * hdma)1684 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
1685 {
1686 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1687
1688 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1689 hdac->ConvCpltCallbackCh1(hdac);
1690 #else
1691 HAL_DAC_ConvCpltCallbackCh1(hdac);
1692 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1693
1694 hdac->State = HAL_DAC_STATE_READY;
1695 }
1696
1697 /**
1698 * @brief DMA half transfer complete callback.
1699 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1700 * the configuration information for the specified DMA module.
1701 * @retval None
1702 */
DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef * hdma)1703 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1704 {
1705 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1706 /* Conversion complete callback */
1707 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1708 hdac->ConvHalfCpltCallbackCh1(hdac);
1709 #else
1710 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1711 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1712 }
1713
1714 /**
1715 * @brief DMA error callback
1716 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1717 * the configuration information for the specified DMA module.
1718 * @retval None
1719 */
DAC_DMAErrorCh1(DMA_HandleTypeDef * hdma)1720 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1721 {
1722 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1723
1724 /* Set DAC error code to DMA error */
1725 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1726
1727 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1728 hdac->ErrorCallbackCh1(hdac);
1729 #else
1730 HAL_DAC_ErrorCallbackCh1(hdac);
1731 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1732
1733 hdac->State = HAL_DAC_STATE_READY;
1734 }
1735
1736 /**
1737 * @}
1738 */
1739
1740 /**
1741 * @}
1742 */
1743
1744 #endif /* DAC1 || DAC2 || DAC3 || DAC4 */
1745
1746 #endif /* HAL_DAC_MODULE_ENABLED */
1747 /**
1748 * @}
1749 */
1750
