1 /**
2 ******************************************************************************
3 * @file stm32g0xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2018 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### How to use this driver #####
28 ==============================================================================
29 [..]
30 The LPTIM HAL driver can be used as follows:
31
32 (#)Initialize the LPTIM low level resources by implementing the
33 HAL_LPTIM_MspInit():
34 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
35 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
36 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
37 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
38 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
39
40 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
41 configures mainly:
42 (++) The instance: LPTIM1 or LPTIM2.
43 (++) Clock: the counter clock.
44 (+++) Source : it can be either the ULPTIM input (IN1) or one of
45 the internal clock; (APB, LSE, LSI or MSI).
46 (+++) Prescaler: select the clock divider.
47 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
48 as counter clock source.
49 (+++) Polarity: polarity of the active edge for the counter unit
50 if the ULPTIM input is selected.
51 (+++) SampleTime: clock sampling time to configure the clock glitch
52 filter.
53 (++) Trigger: How the counter start.
54 (+++) Source: trigger can be software or one of the hardware triggers.
55 (+++) ActiveEdge : only for hardware trigger.
56 (+++) SampleTime : trigger sampling time to configure the trigger
57 glitch filter.
58 (++) OutputPolarity : 2 opposite polarities are possible.
59 (++) UpdateMode: specifies whether the update of the autoreload and
60 the compare values is done immediately or after the end of current
61 period.
62 (++) Input1Source: Source selected for input1 (GPIO or comparator output).
63 (++) Input2Source: Source selected for input2 (GPIO or comparator output).
64 Input2 is used only for encoder feature so is used only for LPTIM1 instance.
65
66 (#)Six modes are available:
67
68 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
69 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
70 mode.
71
72 (++) One Pulse Mode: To generate pulse with specified width in response
73 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
74 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
75
76 (++) Set once Mode: In this mode, the output changes the level (from
77 low level to high level if the output polarity is configured high, else
78 the opposite) when a compare match occurs. To start this mode, call
79 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
80 interruption mode.
81
82 (++) Encoder Mode: To use the encoder interface call
83 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
84 interruption mode. Only available for LPTIM1 instance.
85
86 (++) Time out Mode: an active edge on one selected trigger input rests
87 the counter. The first trigger event will start the timer, any
88 successive trigger event will reset the counter and the timer will
89 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
90 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
91
92 (++) Counter Mode: counter can be used to count external events on
93 the LPTIM Input1 or it can be used to count internal clock cycles.
94 To start this mode, call HAL_LPTIM_Counter_Start() or
95 HAL_LPTIM_Counter_Start_IT() for interruption mode.
96
97
98 (#) User can stop any process by calling the corresponding API:
99 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
100 already started in interruption mode.
101
102 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
103
104 *** Callback registration ***
105 =============================================
106 [..]
107 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
108 allows the user to configure dynamically the driver callbacks.
109 [..]
110 Use Function HAL_LPTIM_RegisterCallback() to register a callback.
111 HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
112 the Callback ID and a pointer to the user callback function.
113 [..]
114 Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the
115 default weak function.
116 HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
117 and the Callback ID.
118 [..]
119 These functions allow to register/unregister following callbacks:
120
121 (+) MspInitCallback : LPTIM Base Msp Init Callback.
122 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
123 (+) CompareMatchCallback : Compare match Callback.
124 (+) AutoReloadMatchCallback : Auto-reload match Callback.
125 (+) TriggerCallback : External trigger event detection Callback.
126 (+) CompareWriteCallback : Compare register write complete Callback.
127 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
128 (+) DirectionUpCallback : Up-counting direction change Callback.
129 (+) DirectionDownCallback : Down-counting direction change Callback.
130
131 [..]
132 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
133 all interrupt callbacks are set to the corresponding weak functions:
134 examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback().
135
136 [..]
137 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
138 functionalities in the Init/DeInit only when these callbacks are null
139 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
140 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
141
142 [..]
143 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
144 Exception done MspInit/MspDeInit that can be registered/unregistered
145 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
146 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
147 In that case first register the MspInit/MspDeInit user callbacks
148 using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
149
150 [..]
151 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
152 not defined, the callback registration feature is not available and all callbacks
153 are set to the corresponding weak functions.
154
155 @endverbatim
156 ******************************************************************************
157 */
158
159 /* Includes ------------------------------------------------------------------*/
160 #include "stm32g0xx_hal.h"
161
162 /** @addtogroup STM32G0xx_HAL_Driver
163 * @{
164 */
165
166 /** @defgroup LPTIM LPTIM
167 * @brief LPTIM HAL module driver.
168 * @{
169 */
170
171 #ifdef HAL_LPTIM_MODULE_ENABLED
172
173 #if defined (LPTIM1) || defined (LPTIM2)
174
175 /* Private typedef -----------------------------------------------------------*/
176 /* Private define ------------------------------------------------------------*/
177 /** @addtogroup LPTIM_Private_Constants
178 * @{
179 */
180 #define TIMEOUT 1000UL /* Timeout is 1s */
181 /**
182 * @}
183 */
184
185 /* Private macro -------------------------------------------------------------*/
186 /** @addtogroup LPTIM_Private_Macros
187 * @{
188 */
189 #if defined(LPTIM2)
190 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(__INSTANCE__) \
191 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT() : __HAL_LPTIM_LPTIM2_EXTI_ENABLE_IT())
192
193 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(__INSTANCE__) \
194 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT() : __HAL_LPTIM_LPTIM2_EXTI_DISABLE_IT())
195 #else
196 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(__INSTANCE__) __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT()
197
198 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(__INSTANCE__) __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT()
199 #endif /* LPTIM2 */
200 /**
201 * @}
202 */
203
204 /* Private variables ---------------------------------------------------------*/
205 /* Private function prototypes -----------------------------------------------*/
206 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
207 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
208 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
209 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
210
211 /* Exported functions --------------------------------------------------------*/
212
213 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
214 * @{
215 */
216
217 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
218 * @brief Initialization and Configuration functions.
219 *
220 @verbatim
221 ==============================================================================
222 ##### Initialization and de-initialization functions #####
223 ==============================================================================
224 [..] This section provides functions allowing to:
225 (+) Initialize the LPTIM according to the specified parameters in the
226 LPTIM_InitTypeDef and initialize the associated handle.
227 (+) DeInitialize the LPTIM peripheral.
228 (+) Initialize the LPTIM MSP.
229 (+) DeInitialize the LPTIM MSP.
230
231 @endverbatim
232 * @{
233 */
234
235 /**
236 * @brief Initialize the LPTIM according to the specified parameters in the
237 * LPTIM_InitTypeDef and initialize the associated handle.
238 * @param hlptim LPTIM handle
239 * @retval HAL status
240 */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)241 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
242 {
243 uint32_t tmpcfgr;
244
245 /* Check the LPTIM handle allocation */
246 if (hlptim == NULL)
247 {
248 return HAL_ERROR;
249 }
250
251 /* Check the parameters */
252 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
253
254 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
255 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
256 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
257 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
258 {
259 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
260 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
261 }
262 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
263 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
264 {
265 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
266 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
267 }
268 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
269 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
270 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
271
272 if (hlptim->State == HAL_LPTIM_STATE_RESET)
273 {
274 /* Allocate lock resource and initialize it */
275 hlptim->Lock = HAL_UNLOCKED;
276
277 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
278 /* Reset interrupt callbacks to legacy weak callbacks */
279 LPTIM_ResetCallback(hlptim);
280
281 if (hlptim->MspInitCallback == NULL)
282 {
283 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
284 }
285
286 /* Init the low level hardware : GPIO, CLOCK, NVIC */
287 hlptim->MspInitCallback(hlptim);
288 #else
289 /* Init the low level hardware : GPIO, CLOCK, NVIC */
290 HAL_LPTIM_MspInit(hlptim);
291 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
292 }
293
294 /* Change the LPTIM state */
295 hlptim->State = HAL_LPTIM_STATE_BUSY;
296
297 /* Get the LPTIMx CFGR value */
298 tmpcfgr = hlptim->Instance->CFGR;
299
300 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
301 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
302 {
303 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
304 }
305 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
306 {
307 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
308 }
309
310 /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
311 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
312 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
313
314 /* Set initialization parameters */
315 tmpcfgr |= (hlptim->Init.Clock.Source |
316 hlptim->Init.Clock.Prescaler |
317 hlptim->Init.OutputPolarity |
318 hlptim->Init.UpdateMode |
319 hlptim->Init.CounterSource);
320
321 /* Glitch filters for internal triggers and external inputs are configured
322 * only if an internal clock source is provided to the LPTIM
323 */
324 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
325 {
326 tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
327 hlptim->Init.UltraLowPowerClock.SampleTime);
328 }
329
330 /* Configure LPTIM external clock polarity and digital filter */
331 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
332 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
333 {
334 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
335 hlptim->Init.UltraLowPowerClock.SampleTime);
336 }
337
338 /* Configure LPTIM external trigger */
339 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
340 {
341 /* Enable External trigger and set the trigger source */
342 tmpcfgr |= (hlptim->Init.Trigger.Source |
343 hlptim->Init.Trigger.ActiveEdge |
344 hlptim->Init.Trigger.SampleTime);
345 }
346
347 /* Write to LPTIMx CFGR */
348 hlptim->Instance->CFGR = tmpcfgr;
349
350 /* Configure LPTIM input sources */
351 if (hlptim->Instance == LPTIM1)
352 {
353 /* Check LPTIM Input1 and Input2 sources */
354 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
355 assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
356
357 /* Configure LPTIM Input1 and Input2 sources */
358 hlptim->Instance->CFGR2 = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
359 }
360 else
361 {
362 /* Check LPTIM2 Input1 source */
363 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
364
365 /* Configure LPTIM2 Input1 source */
366 hlptim->Instance->CFGR2 = hlptim->Init.Input1Source;
367 }
368
369 /* Change the LPTIM state */
370 hlptim->State = HAL_LPTIM_STATE_READY;
371
372 /* Return function status */
373 return HAL_OK;
374 }
375
376 /**
377 * @brief DeInitialize the LPTIM peripheral.
378 * @param hlptim LPTIM handle
379 * @retval HAL status
380 */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)381 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
382 {
383 /* Check the LPTIM handle allocation */
384 if (hlptim == NULL)
385 {
386 return HAL_ERROR;
387 }
388
389 /* Change the LPTIM state */
390 hlptim->State = HAL_LPTIM_STATE_BUSY;
391
392 /* Disable the LPTIM Peripheral Clock */
393 __HAL_LPTIM_DISABLE(hlptim);
394
395 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
396 {
397 return HAL_TIMEOUT;
398 }
399
400 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
401 if (hlptim->MspDeInitCallback == NULL)
402 {
403 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
404 }
405
406 /* DeInit the low level hardware: CLOCK, NVIC.*/
407 hlptim->MspDeInitCallback(hlptim);
408 #else
409 /* DeInit the low level hardware: CLOCK, NVIC.*/
410 HAL_LPTIM_MspDeInit(hlptim);
411 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
412
413 /* Change the LPTIM state */
414 hlptim->State = HAL_LPTIM_STATE_RESET;
415
416 /* Release Lock */
417 __HAL_UNLOCK(hlptim);
418
419 /* Return function status */
420 return HAL_OK;
421 }
422
423 /**
424 * @brief Initialize the LPTIM MSP.
425 * @param hlptim LPTIM handle
426 * @retval None
427 */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)428 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
429 {
430 /* Prevent unused argument(s) compilation warning */
431 UNUSED(hlptim);
432
433 /* NOTE : This function should not be modified, when the callback is needed,
434 the HAL_LPTIM_MspInit could be implemented in the user file
435 */
436 }
437
438 /**
439 * @brief DeInitialize LPTIM MSP.
440 * @param hlptim LPTIM handle
441 * @retval None
442 */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)443 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
444 {
445 /* Prevent unused argument(s) compilation warning */
446 UNUSED(hlptim);
447
448 /* NOTE : This function should not be modified, when the callback is needed,
449 the HAL_LPTIM_MspDeInit could be implemented in the user file
450 */
451 }
452
453 /**
454 * @}
455 */
456
457 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
458 * @brief Start-Stop operation functions.
459 *
460 @verbatim
461 ==============================================================================
462 ##### LPTIM Start Stop operation functions #####
463 ==============================================================================
464 [..] This section provides functions allowing to:
465 (+) Start the PWM mode.
466 (+) Stop the PWM mode.
467 (+) Start the One pulse mode.
468 (+) Stop the One pulse mode.
469 (+) Start the Set once mode.
470 (+) Stop the Set once mode.
471 (+) Start the Encoder mode.
472 (+) Stop the Encoder mode.
473 (+) Start the Timeout mode.
474 (+) Stop the Timeout mode.
475 (+) Start the Counter mode.
476 (+) Stop the Counter mode.
477
478
479 @endverbatim
480 * @{
481 */
482
483 /**
484 * @brief Start the LPTIM PWM generation.
485 * @param hlptim LPTIM handle
486 * @param Period Specifies the Autoreload value.
487 * This parameter must be a value between 0x0001 and 0xFFFF.
488 * @param Pulse Specifies the compare value.
489 * This parameter must be a value between 0x0000 and 0xFFFF.
490 * @retval HAL status
491 */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)492 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
493 {
494 /* Check the parameters */
495 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
496 assert_param(IS_LPTIM_PERIOD(Period));
497 assert_param(IS_LPTIM_PULSE(Pulse));
498
499 /* Set the LPTIM state */
500 hlptim->State = HAL_LPTIM_STATE_BUSY;
501
502 /* Reset WAVE bit to set PWM mode */
503 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
504
505 /* Enable the Peripheral */
506 __HAL_LPTIM_ENABLE(hlptim);
507
508 /* Clear flag */
509 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
510
511 /* Load the period value in the autoreload register */
512 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
513
514 /* Wait for the completion of the write operation to the LPTIM_ARR register */
515 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
516 {
517 return HAL_TIMEOUT;
518 }
519
520 /* Clear flag */
521 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
522
523 /* Load the pulse value in the compare register */
524 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
525
526 /* Wait for the completion of the write operation to the LPTIM_CMP register */
527 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
528 {
529 return HAL_TIMEOUT;
530 }
531
532 /* Start timer in continuous mode */
533 __HAL_LPTIM_START_CONTINUOUS(hlptim);
534
535 /* Change the LPTIM state */
536 hlptim->State = HAL_LPTIM_STATE_READY;
537
538 /* Return function status */
539 return HAL_OK;
540 }
541
542 /**
543 * @brief Stop the LPTIM PWM generation.
544 * @param hlptim LPTIM handle
545 * @retval HAL status
546 */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)547 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
548 {
549 /* Check the parameters */
550 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
551
552 /* Change the LPTIM state */
553 hlptim->State = HAL_LPTIM_STATE_BUSY;
554
555 /* Disable the Peripheral */
556 __HAL_LPTIM_DISABLE(hlptim);
557
558 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
559 {
560 return HAL_TIMEOUT;
561 }
562
563 /* Change the LPTIM state */
564 hlptim->State = HAL_LPTIM_STATE_READY;
565
566 /* Return function status */
567 return HAL_OK;
568 }
569
570 /**
571 * @brief Start the LPTIM PWM generation in interrupt mode.
572 * @param hlptim LPTIM handle
573 * @param Period Specifies the Autoreload value.
574 * This parameter must be a value between 0x0001 and 0xFFFF
575 * @param Pulse Specifies the compare value.
576 * This parameter must be a value between 0x0000 and 0xFFFF
577 * @retval HAL status
578 */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)579 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
580 {
581 /* Check the parameters */
582 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
583 assert_param(IS_LPTIM_PERIOD(Period));
584 assert_param(IS_LPTIM_PULSE(Pulse));
585
586 /* Set the LPTIM state */
587 hlptim->State = HAL_LPTIM_STATE_BUSY;
588
589 /* Reset WAVE bit to set PWM mode */
590 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
591
592 /* Enable the Peripheral */
593 __HAL_LPTIM_ENABLE(hlptim);
594
595 /* Clear flag */
596 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
597
598 /* Load the period value in the autoreload register */
599 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
600
601 /* Wait for the completion of the write operation to the LPTIM_ARR register */
602 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
603 {
604 return HAL_TIMEOUT;
605 }
606
607 /* Clear flag */
608 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
609
610 /* Load the pulse value in the compare register */
611 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
612
613 /* Wait for the completion of the write operation to the LPTIM_CMP register */
614 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
615 {
616 return HAL_TIMEOUT;
617 }
618
619 /* Disable the Peripheral */
620 __HAL_LPTIM_DISABLE(hlptim);
621
622 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
623 {
624 return HAL_TIMEOUT;
625 }
626
627 /* Enable Autoreload write complete interrupt */
628 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
629
630 /* Enable Compare write complete interrupt */
631 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
632
633 /* Enable Autoreload match interrupt */
634 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
635
636 /* Enable Compare match interrupt */
637 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
638
639 /* If external trigger source is used, then enable external trigger interrupt */
640 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
641 {
642 /* Enable external trigger interrupt */
643 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
644 }
645
646 /* Enable the Peripheral */
647 __HAL_LPTIM_ENABLE(hlptim);
648
649 /* Start timer in continuous mode */
650 __HAL_LPTIM_START_CONTINUOUS(hlptim);
651
652 /* Change the LPTIM state */
653 hlptim->State = HAL_LPTIM_STATE_READY;
654
655 /* Return function status */
656 return HAL_OK;
657 }
658
659 /**
660 * @brief Stop the LPTIM PWM generation in interrupt mode.
661 * @param hlptim LPTIM handle
662 * @retval HAL status
663 */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)664 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
665 {
666 /* Check the parameters */
667 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
668
669 /* Change the LPTIM state */
670 hlptim->State = HAL_LPTIM_STATE_BUSY;
671
672 /* Disable the Peripheral */
673 __HAL_LPTIM_DISABLE(hlptim);
674
675 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
676 {
677 return HAL_TIMEOUT;
678 }
679
680 /* Disable Autoreload write complete interrupt */
681 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
682
683 /* Disable Compare write complete interrupt */
684 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
685
686 /* Disable Autoreload match interrupt */
687 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
688
689 /* Disable Compare match interrupt */
690 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
691
692 /* If external trigger source is used, then disable external trigger interrupt */
693 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
694 {
695 /* Disable external trigger interrupt */
696 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
697 }
698
699 /* Change the LPTIM state */
700 hlptim->State = HAL_LPTIM_STATE_READY;
701
702 /* Return function status */
703 return HAL_OK;
704 }
705
706 /**
707 * @brief Start the LPTIM One pulse generation.
708 * @param hlptim LPTIM handle
709 * @param Period Specifies the Autoreload value.
710 * This parameter must be a value between 0x0001 and 0xFFFF.
711 * @param Pulse Specifies the compare value.
712 * This parameter must be a value between 0x0000 and 0xFFFF.
713 * @retval HAL status
714 */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)715 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
716 {
717 /* Check the parameters */
718 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
719 assert_param(IS_LPTIM_PERIOD(Period));
720 assert_param(IS_LPTIM_PULSE(Pulse));
721
722 /* Set the LPTIM state */
723 hlptim->State = HAL_LPTIM_STATE_BUSY;
724
725 /* Reset WAVE bit to set one pulse mode */
726 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
727
728 /* Enable the Peripheral */
729 __HAL_LPTIM_ENABLE(hlptim);
730
731 /* Clear flag */
732 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
733
734 /* Load the period value in the autoreload register */
735 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
736
737 /* Wait for the completion of the write operation to the LPTIM_ARR register */
738 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
739 {
740 return HAL_TIMEOUT;
741 }
742
743 /* Clear flag */
744 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
745
746 /* Load the pulse value in the compare register */
747 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
748
749 /* Wait for the completion of the write operation to the LPTIM_CMP register */
750 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
751 {
752 return HAL_TIMEOUT;
753 }
754
755 /* Start timer in single (one shot) mode */
756 __HAL_LPTIM_START_SINGLE(hlptim);
757
758 /* Change the LPTIM state */
759 hlptim->State = HAL_LPTIM_STATE_READY;
760
761 /* Return function status */
762 return HAL_OK;
763 }
764
765 /**
766 * @brief Stop the LPTIM One pulse generation.
767 * @param hlptim LPTIM handle
768 * @retval HAL status
769 */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)770 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
771 {
772 /* Check the parameters */
773 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
774
775 /* Set the LPTIM state */
776 hlptim->State = HAL_LPTIM_STATE_BUSY;
777
778 /* Disable the Peripheral */
779 __HAL_LPTIM_DISABLE(hlptim);
780
781 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
782 {
783 return HAL_TIMEOUT;
784 }
785
786 /* Change the LPTIM state */
787 hlptim->State = HAL_LPTIM_STATE_READY;
788
789 /* Return function status */
790 return HAL_OK;
791 }
792
793 /**
794 * @brief Start the LPTIM One pulse generation in interrupt mode.
795 * @param hlptim LPTIM handle
796 * @param Period Specifies the Autoreload value.
797 * This parameter must be a value between 0x0001 and 0xFFFF.
798 * @param Pulse Specifies the compare value.
799 * This parameter must be a value between 0x0000 and 0xFFFF.
800 * @retval HAL status
801 */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)802 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
803 {
804 /* Check the parameters */
805 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
806 assert_param(IS_LPTIM_PERIOD(Period));
807 assert_param(IS_LPTIM_PULSE(Pulse));
808
809 /* Set the LPTIM state */
810 hlptim->State = HAL_LPTIM_STATE_BUSY;
811
812 /* Reset WAVE bit to set one pulse mode */
813 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
814
815 /* Enable the Peripheral */
816 __HAL_LPTIM_ENABLE(hlptim);
817
818 /* Clear flag */
819 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
820
821 /* Load the period value in the autoreload register */
822 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
823
824 /* Wait for the completion of the write operation to the LPTIM_ARR register */
825 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
826 {
827 return HAL_TIMEOUT;
828 }
829
830 /* Clear flag */
831 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
832
833 /* Load the pulse value in the compare register */
834 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
835
836 /* Wait for the completion of the write operation to the LPTIM_CMP register */
837 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
838 {
839 return HAL_TIMEOUT;
840 }
841
842 /* Disable the Peripheral */
843 __HAL_LPTIM_DISABLE(hlptim);
844
845 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
846 {
847 return HAL_TIMEOUT;
848 }
849
850 /* Enable Autoreload write complete interrupt */
851 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
852
853 /* Enable Compare write complete interrupt */
854 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
855
856 /* Enable Autoreload match interrupt */
857 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
858
859 /* Enable Compare match interrupt */
860 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
861
862 /* If external trigger source is used, then enable external trigger interrupt */
863 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
864 {
865 /* Enable external trigger interrupt */
866 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
867 }
868
869 /* Enable the Peripheral */
870 __HAL_LPTIM_ENABLE(hlptim);
871
872 /* Start timer in single (one shot) mode */
873 __HAL_LPTIM_START_SINGLE(hlptim);
874
875 /* Change the LPTIM state */
876 hlptim->State = HAL_LPTIM_STATE_READY;
877
878 /* Return function status */
879 return HAL_OK;
880 }
881
882 /**
883 * @brief Stop the LPTIM One pulse generation in interrupt mode.
884 * @param hlptim LPTIM handle
885 * @retval HAL status
886 */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)887 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
888 {
889 /* Check the parameters */
890 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
891
892 /* Set the LPTIM state */
893 hlptim->State = HAL_LPTIM_STATE_BUSY;
894
895
896 /* Disable the Peripheral */
897 __HAL_LPTIM_DISABLE(hlptim);
898
899 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
900 {
901 return HAL_TIMEOUT;
902 }
903
904 /* Disable Autoreload write complete interrupt */
905 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
906
907 /* Disable Compare write complete interrupt */
908 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
909
910 /* Disable Autoreload match interrupt */
911 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
912
913 /* Disable Compare match interrupt */
914 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
915
916 /* If external trigger source is used, then disable external trigger interrupt */
917 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
918 {
919 /* Disable external trigger interrupt */
920 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
921 }
922
923 /* Change the LPTIM state */
924 hlptim->State = HAL_LPTIM_STATE_READY;
925
926 /* Return function status */
927 return HAL_OK;
928 }
929
930 /**
931 * @brief Start the LPTIM in Set once mode.
932 * @param hlptim LPTIM handle
933 * @param Period Specifies the Autoreload value.
934 * This parameter must be a value between 0x0001 and 0xFFFF.
935 * @param Pulse Specifies the compare value.
936 * This parameter must be a value between 0x0000 and 0xFFFF.
937 * @retval HAL status
938 */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)939 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
940 {
941 /* Check the parameters */
942 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
943 assert_param(IS_LPTIM_PERIOD(Period));
944 assert_param(IS_LPTIM_PULSE(Pulse));
945
946 /* Set the LPTIM state */
947 hlptim->State = HAL_LPTIM_STATE_BUSY;
948
949 /* Set WAVE bit to enable the set once mode */
950 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
951
952 /* Enable the Peripheral */
953 __HAL_LPTIM_ENABLE(hlptim);
954
955 /* Clear flag */
956 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
957
958 /* Load the period value in the autoreload register */
959 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
960
961 /* Wait for the completion of the write operation to the LPTIM_ARR register */
962 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
963 {
964 return HAL_TIMEOUT;
965 }
966
967 /* Clear flag */
968 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
969
970 /* Load the pulse value in the compare register */
971 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
972
973 /* Wait for the completion of the write operation to the LPTIM_CMP register */
974 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
975 {
976 return HAL_TIMEOUT;
977 }
978
979 /* Start timer in single (one shot) mode */
980 __HAL_LPTIM_START_SINGLE(hlptim);
981
982 /* Change the LPTIM state */
983 hlptim->State = HAL_LPTIM_STATE_READY;
984
985 /* Return function status */
986 return HAL_OK;
987 }
988
989 /**
990 * @brief Stop the LPTIM Set once mode.
991 * @param hlptim LPTIM handle
992 * @retval HAL status
993 */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)994 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
995 {
996 /* Check the parameters */
997 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
998
999 /* Set the LPTIM state */
1000 hlptim->State = HAL_LPTIM_STATE_BUSY;
1001
1002 /* Disable the Peripheral */
1003 __HAL_LPTIM_DISABLE(hlptim);
1004
1005 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1006 {
1007 return HAL_TIMEOUT;
1008 }
1009
1010 /* Change the LPTIM state */
1011 hlptim->State = HAL_LPTIM_STATE_READY;
1012
1013 /* Return function status */
1014 return HAL_OK;
1015 }
1016
1017 /**
1018 * @brief Start the LPTIM Set once mode in interrupt mode.
1019 * @param hlptim LPTIM handle
1020 * @param Period Specifies the Autoreload value.
1021 * This parameter must be a value between 0x0000 and 0xFFFF.
1022 * @param Pulse Specifies the compare value.
1023 * This parameter must be a value between 0x0000 and 0xFFFF.
1024 * @retval HAL status
1025 */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)1026 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1027 {
1028 /* Check the parameters */
1029 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1030 assert_param(IS_LPTIM_PERIOD(Period));
1031 assert_param(IS_LPTIM_PULSE(Pulse));
1032
1033 /* Set the LPTIM state */
1034 hlptim->State = HAL_LPTIM_STATE_BUSY;
1035
1036 /* Set WAVE bit to enable the set once mode */
1037 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1038
1039 /* Enable the Peripheral */
1040 __HAL_LPTIM_ENABLE(hlptim);
1041
1042 /* Clear flag */
1043 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1044
1045 /* Load the period value in the autoreload register */
1046 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1047
1048 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1049 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1050 {
1051 return HAL_TIMEOUT;
1052 }
1053
1054 /* Clear flag */
1055 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1056
1057 /* Load the pulse value in the compare register */
1058 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1059
1060 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1061 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1062 {
1063 return HAL_TIMEOUT;
1064 }
1065
1066 /* Disable the Peripheral */
1067 __HAL_LPTIM_DISABLE(hlptim);
1068
1069 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1070 {
1071 return HAL_TIMEOUT;
1072 }
1073
1074 /* Enable Autoreload write complete interrupt */
1075 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1076
1077 /* Enable Compare write complete interrupt */
1078 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1079
1080 /* Enable Autoreload match interrupt */
1081 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1082
1083 /* Enable Compare match interrupt */
1084 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1085
1086 /* If external trigger source is used, then enable external trigger interrupt */
1087 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1088 {
1089 /* Enable external trigger interrupt */
1090 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1091 }
1092
1093 /* Enable the Peripheral */
1094 __HAL_LPTIM_ENABLE(hlptim);
1095
1096 /* Start timer in single (one shot) mode */
1097 __HAL_LPTIM_START_SINGLE(hlptim);
1098
1099 /* Change the LPTIM state */
1100 hlptim->State = HAL_LPTIM_STATE_READY;
1101
1102 /* Return function status */
1103 return HAL_OK;
1104 }
1105
1106 /**
1107 * @brief Stop the LPTIM Set once mode in interrupt mode.
1108 * @param hlptim LPTIM handle
1109 * @retval HAL status
1110 */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1111 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1112 {
1113 /* Check the parameters */
1114 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1115
1116 /* Set the LPTIM state */
1117 hlptim->State = HAL_LPTIM_STATE_BUSY;
1118
1119 /* Disable the Peripheral */
1120 __HAL_LPTIM_DISABLE(hlptim);
1121
1122 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1123 {
1124 return HAL_TIMEOUT;
1125 }
1126
1127 /* Disable Autoreload write complete interrupt */
1128 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1129
1130 /* Disable Compare write complete interrupt */
1131 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1132
1133 /* Disable Autoreload match interrupt */
1134 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1135
1136 /* Disable Compare match interrupt */
1137 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1138
1139 /* If external trigger source is used, then disable external trigger interrupt */
1140 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1141 {
1142 /* Disable external trigger interrupt */
1143 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1144 }
1145
1146 /* Change the LPTIM state */
1147 hlptim->State = HAL_LPTIM_STATE_READY;
1148
1149 /* Return function status */
1150 return HAL_OK;
1151 }
1152
1153 /**
1154 * @brief Start the Encoder interface.
1155 * @param hlptim LPTIM handle
1156 * @param Period Specifies the Autoreload value.
1157 * This parameter must be a value between 0x0001 and 0xFFFF.
1158 * @retval HAL status
1159 */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1160 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1161 {
1162 uint32_t tmpcfgr;
1163
1164 /* Check the parameters */
1165 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1166 assert_param(IS_LPTIM_PERIOD(Period));
1167 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1168 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1169 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1170
1171 /* Set the LPTIM state */
1172 hlptim->State = HAL_LPTIM_STATE_BUSY;
1173
1174 /* Get the LPTIMx CFGR value */
1175 tmpcfgr = hlptim->Instance->CFGR;
1176
1177 /* Clear CKPOL bits */
1178 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1179
1180 /* Set Input polarity */
1181 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1182
1183 /* Write to LPTIMx CFGR */
1184 hlptim->Instance->CFGR = tmpcfgr;
1185
1186 /* Set ENC bit to enable the encoder interface */
1187 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1188
1189 /* Enable the Peripheral */
1190 __HAL_LPTIM_ENABLE(hlptim);
1191
1192 /* Clear flag */
1193 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1194
1195 /* Load the period value in the autoreload register */
1196 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1197
1198 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1199 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1200 {
1201 return HAL_TIMEOUT;
1202 }
1203
1204 /* Start timer in continuous mode */
1205 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1206
1207 /* Change the LPTIM state */
1208 hlptim->State = HAL_LPTIM_STATE_READY;
1209
1210 /* Return function status */
1211 return HAL_OK;
1212 }
1213
1214 /**
1215 * @brief Stop the Encoder interface.
1216 * @param hlptim LPTIM handle
1217 * @retval HAL status
1218 */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1219 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1220 {
1221 /* Check the parameters */
1222 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1223
1224 /* Set the LPTIM state */
1225 hlptim->State = HAL_LPTIM_STATE_BUSY;
1226
1227 /* Disable the Peripheral */
1228 __HAL_LPTIM_DISABLE(hlptim);
1229
1230 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1231 {
1232 return HAL_TIMEOUT;
1233 }
1234
1235 /* Reset ENC bit to disable the encoder interface */
1236 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1237
1238 /* Change the LPTIM state */
1239 hlptim->State = HAL_LPTIM_STATE_READY;
1240
1241 /* Return function status */
1242 return HAL_OK;
1243 }
1244
1245 /**
1246 * @brief Start the Encoder interface in interrupt mode.
1247 * @param hlptim LPTIM handle
1248 * @param Period Specifies the Autoreload value.
1249 * This parameter must be a value between 0x0000 and 0xFFFF.
1250 * @retval HAL status
1251 */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1252 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1253 {
1254 uint32_t tmpcfgr;
1255
1256 /* Check the parameters */
1257 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1258 assert_param(IS_LPTIM_PERIOD(Period));
1259 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1260 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1261 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1262
1263 /* Set the LPTIM state */
1264 hlptim->State = HAL_LPTIM_STATE_BUSY;
1265
1266 /* Configure edge sensitivity for encoder mode */
1267 /* Get the LPTIMx CFGR value */
1268 tmpcfgr = hlptim->Instance->CFGR;
1269
1270 /* Clear CKPOL bits */
1271 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1272
1273 /* Set Input polarity */
1274 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1275
1276 /* Write to LPTIMx CFGR */
1277 hlptim->Instance->CFGR = tmpcfgr;
1278
1279 /* Set ENC bit to enable the encoder interface */
1280 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1281
1282 /* Enable the Peripheral */
1283 __HAL_LPTIM_ENABLE(hlptim);
1284
1285 /* Clear flag */
1286 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1287
1288 /* Load the period value in the autoreload register */
1289 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1290
1291 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1292 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1293 {
1294 return HAL_TIMEOUT;
1295 }
1296
1297 /* Disable the Peripheral */
1298 __HAL_LPTIM_DISABLE(hlptim);
1299
1300 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1301 {
1302 return HAL_TIMEOUT;
1303 }
1304
1305 /* Enable "switch to down direction" interrupt */
1306 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1307
1308 /* Enable "switch to up direction" interrupt */
1309 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1310
1311 /* Enable the Peripheral */
1312 __HAL_LPTIM_ENABLE(hlptim);
1313
1314 /* Start timer in continuous mode */
1315 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1316
1317 /* Change the LPTIM state */
1318 hlptim->State = HAL_LPTIM_STATE_READY;
1319
1320 /* Return function status */
1321 return HAL_OK;
1322 }
1323
1324 /**
1325 * @brief Stop the Encoder interface in interrupt mode.
1326 * @param hlptim LPTIM handle
1327 * @retval HAL status
1328 */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1329 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1330 {
1331 /* Check the parameters */
1332 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1333
1334 /* Set the LPTIM state */
1335 hlptim->State = HAL_LPTIM_STATE_BUSY;
1336
1337 /* Disable the Peripheral */
1338 __HAL_LPTIM_DISABLE(hlptim);
1339
1340 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1341 {
1342 return HAL_TIMEOUT;
1343 }
1344
1345 /* Reset ENC bit to disable the encoder interface */
1346 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1347
1348 /* Disable "switch to down direction" interrupt */
1349 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1350
1351 /* Disable "switch to up direction" interrupt */
1352 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1353
1354 /* Change the LPTIM state */
1355 hlptim->State = HAL_LPTIM_STATE_READY;
1356
1357 /* Return function status */
1358 return HAL_OK;
1359 }
1360
1361 /**
1362 * @brief Start the Timeout function.
1363 * @note The first trigger event will start the timer, any successive
1364 * trigger event will reset the counter and the timer restarts.
1365 * @param hlptim LPTIM handle
1366 * @param Period Specifies the Autoreload value.
1367 * This parameter must be a value between 0x0001 and 0xFFFF.
1368 * @param Timeout Specifies the TimeOut value to reset the counter.
1369 * This parameter must be a value between 0x0000 and 0xFFFF.
1370 * @retval HAL status
1371 */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1372 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1373 {
1374 /* Check the parameters */
1375 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1376 assert_param(IS_LPTIM_PERIOD(Period));
1377 assert_param(IS_LPTIM_PULSE(Timeout));
1378
1379 /* Set the LPTIM state */
1380 hlptim->State = HAL_LPTIM_STATE_BUSY;
1381
1382 /* Set TIMOUT bit to enable the timeout function */
1383 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1384
1385 /* Enable the Peripheral */
1386 __HAL_LPTIM_ENABLE(hlptim);
1387
1388 /* Clear flag */
1389 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1390
1391 /* Load the period value in the autoreload register */
1392 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1393
1394 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1395 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1396 {
1397 return HAL_TIMEOUT;
1398 }
1399
1400 /* Clear flag */
1401 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1402
1403 /* Load the Timeout value in the compare register */
1404 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1405
1406 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1407 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1408 {
1409 return HAL_TIMEOUT;
1410 }
1411
1412 /* Start timer in continuous mode */
1413 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1414
1415 /* Change the LPTIM state */
1416 hlptim->State = HAL_LPTIM_STATE_READY;
1417
1418 /* Return function status */
1419 return HAL_OK;
1420 }
1421
1422 /**
1423 * @brief Stop the Timeout function.
1424 * @param hlptim LPTIM handle
1425 * @retval HAL status
1426 */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1427 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1428 {
1429 /* Check the parameters */
1430 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1431
1432 /* Set the LPTIM state */
1433 hlptim->State = HAL_LPTIM_STATE_BUSY;
1434
1435 /* Disable the Peripheral */
1436 __HAL_LPTIM_DISABLE(hlptim);
1437
1438 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1439 {
1440 return HAL_TIMEOUT;
1441 }
1442
1443 /* Reset TIMOUT bit to enable the timeout function */
1444 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1445
1446 /* Change the LPTIM state */
1447 hlptim->State = HAL_LPTIM_STATE_READY;
1448
1449 /* Return function status */
1450 return HAL_OK;
1451 }
1452
1453 /**
1454 * @brief Start the Timeout function in interrupt mode.
1455 * @note The first trigger event will start the timer, any successive
1456 * trigger event will reset the counter and the timer restarts.
1457 * @param hlptim LPTIM handle
1458 * @param Period Specifies the Autoreload value.
1459 * This parameter must be a value between 0x0001 and 0xFFFF.
1460 * @param Timeout Specifies the TimeOut value to reset the counter.
1461 * This parameter must be a value between 0x0000 and 0xFFFF.
1462 * @retval HAL status
1463 */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1464 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1465 {
1466 /* Check the parameters */
1467 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1468 assert_param(IS_LPTIM_PERIOD(Period));
1469 assert_param(IS_LPTIM_PULSE(Timeout));
1470
1471 /* Set the LPTIM state */
1472 hlptim->State = HAL_LPTIM_STATE_BUSY;
1473
1474 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1475 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1476
1477 /* Set TIMOUT bit to enable the timeout function */
1478 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1479
1480 /* Enable the Peripheral */
1481 __HAL_LPTIM_ENABLE(hlptim);
1482
1483 /* Clear flag */
1484 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1485
1486 /* Load the period value in the autoreload register */
1487 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1488
1489 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1490 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1491 {
1492 return HAL_TIMEOUT;
1493 }
1494
1495 /* Clear flag */
1496 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1497
1498 /* Load the Timeout value in the compare register */
1499 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1500
1501 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1502 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1503 {
1504 return HAL_TIMEOUT;
1505 }
1506
1507 /* Disable the Peripheral */
1508 __HAL_LPTIM_DISABLE(hlptim);
1509
1510 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1511 {
1512 return HAL_TIMEOUT;
1513 }
1514
1515 /* Enable Compare match interrupt */
1516 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1517
1518 /* Enable the Peripheral */
1519 __HAL_LPTIM_ENABLE(hlptim);
1520
1521 /* Start timer in continuous mode */
1522 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1523
1524 /* Change the LPTIM state */
1525 hlptim->State = HAL_LPTIM_STATE_READY;
1526
1527 /* Return function status */
1528 return HAL_OK;
1529 }
1530
1531 /**
1532 * @brief Stop the Timeout function in interrupt mode.
1533 * @param hlptim LPTIM handle
1534 * @retval HAL status
1535 */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1536 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1537 {
1538 /* Check the parameters */
1539 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1540
1541
1542 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1543 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1544
1545 /* Set the LPTIM state */
1546 hlptim->State = HAL_LPTIM_STATE_BUSY;
1547
1548 /* Disable the Peripheral */
1549 __HAL_LPTIM_DISABLE(hlptim);
1550
1551 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1552 {
1553 return HAL_TIMEOUT;
1554 }
1555
1556 /* Reset TIMOUT bit to enable the timeout function */
1557 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1558
1559 /* Disable Compare match interrupt */
1560 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1561
1562 /* Change the LPTIM state */
1563 hlptim->State = HAL_LPTIM_STATE_READY;
1564
1565 /* Return function status */
1566 return HAL_OK;
1567 }
1568
1569 /**
1570 * @brief Start the Counter mode.
1571 * @param hlptim LPTIM handle
1572 * @param Period Specifies the Autoreload value.
1573 * This parameter must be a value between 0x0001 and 0xFFFF.
1574 * @retval HAL status
1575 */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1576 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1577 {
1578 /* Check the parameters */
1579 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1580 assert_param(IS_LPTIM_PERIOD(Period));
1581
1582 /* Set the LPTIM state */
1583 hlptim->State = HAL_LPTIM_STATE_BUSY;
1584
1585 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1586 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1587 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1588 {
1589 /* Check if clock is prescaled */
1590 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1591 /* Set clock prescaler to 0 */
1592 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1593 }
1594
1595 /* Enable the Peripheral */
1596 __HAL_LPTIM_ENABLE(hlptim);
1597
1598 /* Clear flag */
1599 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1600
1601 /* Load the period value in the autoreload register */
1602 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1603
1604 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1605 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1606 {
1607 return HAL_TIMEOUT;
1608 }
1609
1610 /* Start timer in continuous mode */
1611 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1612
1613 /* Change the LPTIM state */
1614 hlptim->State = HAL_LPTIM_STATE_READY;
1615
1616 /* Return function status */
1617 return HAL_OK;
1618 }
1619
1620 /**
1621 * @brief Stop the Counter mode.
1622 * @param hlptim LPTIM handle
1623 * @retval HAL status
1624 */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1625 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1626 {
1627 /* Check the parameters */
1628 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1629
1630 /* Set the LPTIM state */
1631 hlptim->State = HAL_LPTIM_STATE_BUSY;
1632
1633 /* Disable the Peripheral */
1634 __HAL_LPTIM_DISABLE(hlptim);
1635
1636 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1637 {
1638 return HAL_TIMEOUT;
1639 }
1640
1641 /* Change the LPTIM state */
1642 hlptim->State = HAL_LPTIM_STATE_READY;
1643
1644 /* Return function status */
1645 return HAL_OK;
1646 }
1647
1648 /**
1649 * @brief Start the Counter mode in interrupt mode.
1650 * @param hlptim LPTIM handle
1651 * @param Period Specifies the Autoreload value.
1652 * This parameter must be a value between 0x0001 and 0xFFFF.
1653 * @retval HAL status
1654 */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1655 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1656 {
1657 /* Check the parameters */
1658 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1659 assert_param(IS_LPTIM_PERIOD(Period));
1660
1661 /* Set the LPTIM state */
1662 hlptim->State = HAL_LPTIM_STATE_BUSY;
1663
1664 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1665 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1666
1667 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1668 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1669 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1670 {
1671 /* Check if clock is prescaled */
1672 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1673 /* Set clock prescaler to 0 */
1674 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1675 }
1676
1677 /* Enable the Peripheral */
1678 __HAL_LPTIM_ENABLE(hlptim);
1679
1680 /* Clear flag */
1681 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1682
1683 /* Load the period value in the autoreload register */
1684 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1685
1686 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1687 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1688 {
1689 return HAL_TIMEOUT;
1690 }
1691
1692 /* Disable the Peripheral */
1693 __HAL_LPTIM_DISABLE(hlptim);
1694
1695 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1696 {
1697 return HAL_TIMEOUT;
1698 }
1699
1700 /* Enable Autoreload write complete interrupt */
1701 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1702
1703 /* Enable Autoreload match interrupt */
1704 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1705
1706 /* Enable the Peripheral */
1707 __HAL_LPTIM_ENABLE(hlptim);
1708
1709 /* Start timer in continuous mode */
1710 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1711
1712 /* Change the LPTIM state */
1713 hlptim->State = HAL_LPTIM_STATE_READY;
1714
1715 /* Return function status */
1716 return HAL_OK;
1717 }
1718
1719 /**
1720 * @brief Stop the Counter mode in interrupt mode.
1721 * @param hlptim LPTIM handle
1722 * @retval HAL status
1723 */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1724 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1725 {
1726 /* Check the parameters */
1727 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1728
1729
1730 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1731 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1732
1733 /* Set the LPTIM state */
1734 hlptim->State = HAL_LPTIM_STATE_BUSY;
1735
1736 /* Disable the Peripheral */
1737 __HAL_LPTIM_DISABLE(hlptim);
1738
1739 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1740 {
1741 return HAL_TIMEOUT;
1742 }
1743
1744 /* Disable Autoreload write complete interrupt */
1745 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1746
1747 /* Disable Autoreload match interrupt */
1748 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1749 /* Change the LPTIM state */
1750 hlptim->State = HAL_LPTIM_STATE_READY;
1751
1752 /* Return function status */
1753 return HAL_OK;
1754 }
1755
1756 /**
1757 * @}
1758 */
1759
1760 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1761 * @brief Read operation functions.
1762 *
1763 @verbatim
1764 ==============================================================================
1765 ##### LPTIM Read operation functions #####
1766 ==============================================================================
1767 [..] This section provides LPTIM Reading functions.
1768 (+) Read the counter value.
1769 (+) Read the period (Auto-reload) value.
1770 (+) Read the pulse (Compare)value.
1771 @endverbatim
1772 * @{
1773 */
1774
1775 /**
1776 * @brief Return the current counter value.
1777 * @param hlptim LPTIM handle
1778 * @retval Counter value.
1779 */
HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef * hlptim)1780 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim)
1781 {
1782 /* Check the parameters */
1783 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1784
1785 return (hlptim->Instance->CNT);
1786 }
1787
1788 /**
1789 * @brief Return the current Autoreload (Period) value.
1790 * @param hlptim LPTIM handle
1791 * @retval Autoreload value.
1792 */
HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef * hlptim)1793 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim)
1794 {
1795 /* Check the parameters */
1796 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1797
1798 return (hlptim->Instance->ARR);
1799 }
1800
1801 /**
1802 * @brief Return the current Compare (Pulse) value.
1803 * @param hlptim LPTIM handle
1804 * @retval Compare value.
1805 */
HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef * hlptim)1806 uint32_t HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef *hlptim)
1807 {
1808 /* Check the parameters */
1809 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1810
1811 return (hlptim->Instance->CMP);
1812 }
1813
1814 /**
1815 * @}
1816 */
1817
1818 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1819 * @brief LPTIM IRQ handler.
1820 *
1821 @verbatim
1822 ==============================================================================
1823 ##### LPTIM IRQ handler and callbacks #####
1824 ==============================================================================
1825 [..] This section provides LPTIM IRQ handler and callback functions called within
1826 the IRQ handler:
1827 (+) LPTIM interrupt request handler
1828 (+) Compare match Callback
1829 (+) Auto-reload match Callback
1830 (+) External trigger event detection Callback
1831 (+) Compare register write complete Callback
1832 (+) Auto-reload register write complete Callback
1833 (+) Up-counting direction change Callback
1834 (+) Down-counting direction change Callback
1835
1836 @endverbatim
1837 * @{
1838 */
1839
1840 /**
1841 * @brief Handle LPTIM interrupt request.
1842 * @param hlptim LPTIM handle
1843 * @retval None
1844 */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1845 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1846 {
1847 /* Compare match interrupt */
1848 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1849 {
1850 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1851 {
1852 /* Clear Compare match flag */
1853 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1854
1855 /* Compare match Callback */
1856 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1857 hlptim->CompareMatchCallback(hlptim);
1858 #else
1859 HAL_LPTIM_CompareMatchCallback(hlptim);
1860 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1861 }
1862 }
1863
1864 /* Autoreload match interrupt */
1865 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1866 {
1867 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1868 {
1869 /* Clear Autoreload match flag */
1870 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1871
1872 /* Autoreload match Callback */
1873 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1874 hlptim->AutoReloadMatchCallback(hlptim);
1875 #else
1876 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1877 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1878 }
1879 }
1880
1881 /* Trigger detected interrupt */
1882 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1883 {
1884 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1885 {
1886 /* Clear Trigger detected flag */
1887 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1888
1889 /* Trigger detected callback */
1890 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1891 hlptim->TriggerCallback(hlptim);
1892 #else
1893 HAL_LPTIM_TriggerCallback(hlptim);
1894 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1895 }
1896 }
1897
1898 /* Compare write interrupt */
1899 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1900 {
1901 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1902 {
1903 /* Clear Compare write flag */
1904 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1905
1906 /* Compare write Callback */
1907 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1908 hlptim->CompareWriteCallback(hlptim);
1909 #else
1910 HAL_LPTIM_CompareWriteCallback(hlptim);
1911 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1912 }
1913 }
1914
1915 /* Autoreload write interrupt */
1916 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1917 {
1918 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1919 {
1920 /* Clear Autoreload write flag */
1921 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1922
1923 /* Autoreload write Callback */
1924 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1925 hlptim->AutoReloadWriteCallback(hlptim);
1926 #else
1927 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1928 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1929 }
1930 }
1931
1932 /* Direction counter changed from Down to Up interrupt */
1933 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1934 {
1935 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1936 {
1937 /* Clear Direction counter changed from Down to Up flag */
1938 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1939
1940 /* Direction counter changed from Down to Up Callback */
1941 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1942 hlptim->DirectionUpCallback(hlptim);
1943 #else
1944 HAL_LPTIM_DirectionUpCallback(hlptim);
1945 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1946 }
1947 }
1948
1949 /* Direction counter changed from Up to Down interrupt */
1950 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
1951 {
1952 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
1953 {
1954 /* Clear Direction counter changed from Up to Down flag */
1955 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
1956
1957 /* Direction counter changed from Up to Down Callback */
1958 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1959 hlptim->DirectionDownCallback(hlptim);
1960 #else
1961 HAL_LPTIM_DirectionDownCallback(hlptim);
1962 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1963 }
1964 }
1965 }
1966
1967 /**
1968 * @brief Compare match callback in non-blocking mode.
1969 * @param hlptim LPTIM handle
1970 * @retval None
1971 */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)1972 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
1973 {
1974 /* Prevent unused argument(s) compilation warning */
1975 UNUSED(hlptim);
1976
1977 /* NOTE : This function should not be modified, when the callback is needed,
1978 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1979 */
1980 }
1981
1982 /**
1983 * @brief Autoreload match callback in non-blocking mode.
1984 * @param hlptim LPTIM handle
1985 * @retval None
1986 */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)1987 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
1988 {
1989 /* Prevent unused argument(s) compilation warning */
1990 UNUSED(hlptim);
1991
1992 /* NOTE : This function should not be modified, when the callback is needed,
1993 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
1994 */
1995 }
1996
1997 /**
1998 * @brief Trigger detected callback in non-blocking mode.
1999 * @param hlptim LPTIM handle
2000 * @retval None
2001 */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)2002 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
2003 {
2004 /* Prevent unused argument(s) compilation warning */
2005 UNUSED(hlptim);
2006
2007 /* NOTE : This function should not be modified, when the callback is needed,
2008 the HAL_LPTIM_TriggerCallback could be implemented in the user file
2009 */
2010 }
2011
2012 /**
2013 * @brief Compare write callback in non-blocking mode.
2014 * @param hlptim LPTIM handle
2015 * @retval None
2016 */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)2017 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
2018 {
2019 /* Prevent unused argument(s) compilation warning */
2020 UNUSED(hlptim);
2021
2022 /* NOTE : This function should not be modified, when the callback is needed,
2023 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
2024 */
2025 }
2026
2027 /**
2028 * @brief Autoreload write callback in non-blocking mode.
2029 * @param hlptim LPTIM handle
2030 * @retval None
2031 */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)2032 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2033 {
2034 /* Prevent unused argument(s) compilation warning */
2035 UNUSED(hlptim);
2036
2037 /* NOTE : This function should not be modified, when the callback is needed,
2038 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2039 */
2040 }
2041
2042 /**
2043 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2044 * @param hlptim LPTIM handle
2045 * @retval None
2046 */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2047 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2048 {
2049 /* Prevent unused argument(s) compilation warning */
2050 UNUSED(hlptim);
2051
2052 /* NOTE : This function should not be modified, when the callback is needed,
2053 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2054 */
2055 }
2056
2057 /**
2058 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2059 * @param hlptim LPTIM handle
2060 * @retval None
2061 */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2062 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2063 {
2064 /* Prevent unused argument(s) compilation warning */
2065 UNUSED(hlptim);
2066
2067 /* NOTE : This function should not be modified, when the callback is needed,
2068 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2069 */
2070 }
2071
2072 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2073 /**
2074 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2075 * @param hlptim LPTIM handle
2076 * @param CallbackID ID of the callback to be registered
2077 * This parameter can be one of the following values:
2078 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2079 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2080 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2081 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2082 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2083 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2084 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2085 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2086 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2087 * @param pCallback pointer to the callback function
2088 * @retval status
2089 */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2090 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2091 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2092 pLPTIM_CallbackTypeDef pCallback)
2093 {
2094 HAL_StatusTypeDef status = HAL_OK;
2095
2096 if (pCallback == NULL)
2097 {
2098 return HAL_ERROR;
2099 }
2100
2101 /* Process locked */
2102 __HAL_LOCK(hlptim);
2103
2104 if (hlptim->State == HAL_LPTIM_STATE_READY)
2105 {
2106 switch (CallbackID)
2107 {
2108 case HAL_LPTIM_MSPINIT_CB_ID :
2109 hlptim->MspInitCallback = pCallback;
2110 break;
2111
2112 case HAL_LPTIM_MSPDEINIT_CB_ID :
2113 hlptim->MspDeInitCallback = pCallback;
2114 break;
2115
2116 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2117 hlptim->CompareMatchCallback = pCallback;
2118 break;
2119
2120 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2121 hlptim->AutoReloadMatchCallback = pCallback;
2122 break;
2123
2124 case HAL_LPTIM_TRIGGER_CB_ID :
2125 hlptim->TriggerCallback = pCallback;
2126 break;
2127
2128 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2129 hlptim->CompareWriteCallback = pCallback;
2130 break;
2131
2132 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2133 hlptim->AutoReloadWriteCallback = pCallback;
2134 break;
2135
2136 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2137 hlptim->DirectionUpCallback = pCallback;
2138 break;
2139
2140 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2141 hlptim->DirectionDownCallback = pCallback;
2142 break;
2143
2144 default :
2145 /* Return error status */
2146 status = HAL_ERROR;
2147 break;
2148 }
2149 }
2150 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2151 {
2152 switch (CallbackID)
2153 {
2154 case HAL_LPTIM_MSPINIT_CB_ID :
2155 hlptim->MspInitCallback = pCallback;
2156 break;
2157
2158 case HAL_LPTIM_MSPDEINIT_CB_ID :
2159 hlptim->MspDeInitCallback = pCallback;
2160 break;
2161
2162 default :
2163 /* Return error status */
2164 status = HAL_ERROR;
2165 break;
2166 }
2167 }
2168 else
2169 {
2170 /* Return error status */
2171 status = HAL_ERROR;
2172 }
2173
2174 /* Release Lock */
2175 __HAL_UNLOCK(hlptim);
2176
2177 return status;
2178 }
2179
2180 /**
2181 * @brief Unregister a LPTIM callback
2182 * LLPTIM callback is redirected to the weak predefined callback
2183 * @param hlptim LPTIM handle
2184 * @param CallbackID ID of the callback to be unregistered
2185 * This parameter can be one of the following values:
2186 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2187 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2188 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2189 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2190 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2191 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2192 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2193 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2194 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2195 * @retval status
2196 */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2197 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2198 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2199 {
2200 HAL_StatusTypeDef status = HAL_OK;
2201
2202 /* Process locked */
2203 __HAL_LOCK(hlptim);
2204
2205 if (hlptim->State == HAL_LPTIM_STATE_READY)
2206 {
2207 switch (CallbackID)
2208 {
2209 case HAL_LPTIM_MSPINIT_CB_ID :
2210 /* Legacy weak MspInit Callback */
2211 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2212 break;
2213
2214 case HAL_LPTIM_MSPDEINIT_CB_ID :
2215 /* Legacy weak Msp DeInit Callback */
2216 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2217 break;
2218
2219 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2220 /* Legacy weak Compare match Callback */
2221 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2222 break;
2223
2224 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2225 /* Legacy weak Auto-reload match Callback */
2226 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2227 break;
2228
2229 case HAL_LPTIM_TRIGGER_CB_ID :
2230 /* Legacy weak External trigger event detection Callback */
2231 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2232 break;
2233
2234 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2235 /* Legacy weak Compare register write complete Callback */
2236 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2237 break;
2238
2239 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2240 /* Legacy weak Auto-reload register write complete Callback */
2241 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2242 break;
2243
2244 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2245 /* Legacy weak Up-counting direction change Callback */
2246 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2247 break;
2248
2249 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2250 /* Legacy weak Down-counting direction change Callback */
2251 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2252 break;
2253
2254 default :
2255 /* Return error status */
2256 status = HAL_ERROR;
2257 break;
2258 }
2259 }
2260 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2261 {
2262 switch (CallbackID)
2263 {
2264 case HAL_LPTIM_MSPINIT_CB_ID :
2265 /* Legacy weak MspInit Callback */
2266 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2267 break;
2268
2269 case HAL_LPTIM_MSPDEINIT_CB_ID :
2270 /* Legacy weak Msp DeInit Callback */
2271 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2272 break;
2273
2274 default :
2275 /* Return error status */
2276 status = HAL_ERROR;
2277 break;
2278 }
2279 }
2280 else
2281 {
2282 /* Return error status */
2283 status = HAL_ERROR;
2284 }
2285
2286 /* Release Lock */
2287 __HAL_UNLOCK(hlptim);
2288
2289 return status;
2290 }
2291 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2292
2293 /**
2294 * @}
2295 */
2296
2297 /** @defgroup LPTIM_Group5 Peripheral State functions
2298 * @brief Peripheral State functions.
2299 *
2300 @verbatim
2301 ==============================================================================
2302 ##### Peripheral State functions #####
2303 ==============================================================================
2304 [..]
2305 This subsection permits to get in run-time the status of the peripheral.
2306
2307 @endverbatim
2308 * @{
2309 */
2310
2311 /**
2312 * @brief Return the LPTIM handle state.
2313 * @param hlptim LPTIM handle
2314 * @retval HAL state
2315 */
HAL_LPTIM_GetState(LPTIM_HandleTypeDef * hlptim)2316 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2317 {
2318 /* Return LPTIM handle state */
2319 return hlptim->State;
2320 }
2321
2322 /**
2323 * @}
2324 */
2325
2326
2327 /**
2328 * @}
2329 */
2330
2331 /* Private functions ---------------------------------------------------------*/
2332
2333 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2334 * @{
2335 */
2336 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2337 /**
2338 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2339 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2340 * the configuration information for LPTIM module.
2341 * @retval None
2342 */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2343 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2344 {
2345 /* Reset the LPTIM callback to the legacy weak callbacks */
2346 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2347 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2348 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2349 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2350 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2351 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2352 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2353 }
2354 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2355
2356 /**
2357 * @brief LPTimer Wait for flag set
2358 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2359 * the configuration information for LPTIM module.
2360 * @param flag The lptim flag
2361 * @retval HAL status
2362 */
LPTIM_WaitForFlag(LPTIM_HandleTypeDef * hlptim,uint32_t flag)2363 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2364 {
2365 HAL_StatusTypeDef result = HAL_OK;
2366 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2367 do
2368 {
2369 count--;
2370 if (count == 0UL)
2371 {
2372 result = HAL_TIMEOUT;
2373 }
2374 } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2375
2376 return result;
2377 }
2378
2379 /**
2380 * @brief Disable LPTIM HW instance.
2381 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2382 * the configuration information for LPTIM module.
2383 * @note The following sequence is required to solve LPTIM disable HW limitation.
2384 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2385 * stuck in LPTIM interrupt when entering Stop mode" section.
2386 * @retval None
2387 */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2388 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2389 {
2390 uint32_t tmpclksource = 0;
2391 uint32_t tmpIER;
2392 uint32_t tmpCFGR;
2393 uint32_t tmpCMP;
2394 uint32_t tmpARR;
2395 uint32_t primask_bit;
2396 uint32_t tmpCFGR2;
2397
2398 /* Enter critical section */
2399 primask_bit = __get_PRIMASK();
2400 __set_PRIMASK(1) ;
2401
2402 /*********** Save LPTIM Config ***********/
2403 /* Save LPTIM source clock */
2404 switch ((uint32_t)hlptim->Instance)
2405 {
2406 case LPTIM1_BASE:
2407 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2408 break;
2409 #if defined(LPTIM2)
2410 case LPTIM2_BASE:
2411 tmpclksource = __HAL_RCC_GET_LPTIM2_SOURCE();
2412 break;
2413 #endif /* LPTIM2 */
2414 default:
2415 break;
2416 }
2417
2418 /* Save LPTIM configuration registers */
2419 tmpIER = hlptim->Instance->IER;
2420 tmpCFGR = hlptim->Instance->CFGR;
2421 tmpCMP = hlptim->Instance->CMP;
2422 tmpARR = hlptim->Instance->ARR;
2423 tmpCFGR2 = hlptim->Instance->CFGR2;
2424
2425 /*********** Reset LPTIM ***********/
2426 switch ((uint32_t)hlptim->Instance)
2427 {
2428 case LPTIM1_BASE:
2429 __HAL_RCC_LPTIM1_FORCE_RESET();
2430 __HAL_RCC_LPTIM1_RELEASE_RESET();
2431 break;
2432 #if defined(LPTIM2)
2433 case LPTIM2_BASE:
2434 __HAL_RCC_LPTIM2_FORCE_RESET();
2435 __HAL_RCC_LPTIM2_RELEASE_RESET();
2436 break;
2437 #endif /* LPTIM2 */
2438 default:
2439 break;
2440 }
2441
2442 /*********** Restore LPTIM Config ***********/
2443 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2444 {
2445 /* Force LPTIM source kernel clock from APB */
2446 switch ((uint32_t)hlptim->Instance)
2447 {
2448 case LPTIM1_BASE:
2449 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2450 break;
2451 #if defined(LPTIM2)
2452 case LPTIM2_BASE:
2453 __HAL_RCC_LPTIM2_CONFIG(RCC_LPTIM2CLKSOURCE_PCLK1);
2454 break;
2455 #endif /* LPTIM2 */
2456 default:
2457 break;
2458 }
2459
2460 if (tmpCMP != 0UL)
2461 {
2462 /* Restore CMP register (LPTIM should be enabled first) */
2463 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2464 hlptim->Instance->CMP = tmpCMP;
2465
2466 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2467 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2468 {
2469 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2470 }
2471 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2472 }
2473
2474 if (tmpARR != 0UL)
2475 {
2476 /* Restore ARR register (LPTIM should be enabled first) */
2477 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2478 hlptim->Instance->ARR = tmpARR;
2479
2480 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2481 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2482 {
2483 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2484 }
2485
2486 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2487 }
2488
2489 /* Restore LPTIM source kernel clock */
2490 switch ((uint32_t)hlptim->Instance)
2491 {
2492 case LPTIM1_BASE:
2493 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2494 break;
2495 #if defined(LPTIM2)
2496 case LPTIM2_BASE:
2497 __HAL_RCC_LPTIM2_CONFIG(tmpclksource);
2498 break;
2499 #endif /* LPTIM2 */
2500 default:
2501 break;
2502 }
2503 }
2504
2505 /* Restore configuration registers (LPTIM should be disabled first) */
2506 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2507 hlptim->Instance->IER = tmpIER;
2508 hlptim->Instance->CFGR = tmpCFGR;
2509 hlptim->Instance->CFGR2 = tmpCFGR2;
2510
2511 /* Exit critical section: restore previous priority mask */
2512 __set_PRIMASK(primask_bit);
2513 }
2514 /**
2515 * @}
2516 */
2517 #endif /* LPTIM1 || LPTIM2 */
2518
2519 #endif /* HAL_LPTIM_MODULE_ENABLED */
2520 /**
2521 * @}
2522 */
2523
2524 /**
2525 * @}
2526 */
2527
